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author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-07-12 07:52:43 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-07-12 07:52:43 +0200 |
commit | 1652dfe5b4a13fc9a875e854a464e8c8c665c311 (patch) | |
tree | ccb699606cc404a012a4a3841e549c07fd59322f /dts/src/arm64/qcom/sm8450.dtsi | |
parent | 2433c1259b26c3f4103c2b339a7a06d4f37b11f5 (diff) | |
download | barebox-1652dfe5b4a13fc9a875e854a464e8c8c665c311.tar.gz barebox-1652dfe5b4a13fc9a875e854a464e8c8c665c311.tar.xz |
dts: update to v5.19-rc6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/qcom/sm8450.dtsi')
-rw-r--r-- | dts/src/arm64/qcom/sm8450.dtsi | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/dts/src/arm64/qcom/sm8450.dtsi b/dts/src/arm64/qcom/sm8450.dtsi index 7d08fad763..b87756bf1c 100644 --- a/dts/src/arm64/qcom/sm8450.dtsi +++ b/dts/src/arm64/qcom/sm8450.dtsi @@ -2853,6 +2853,16 @@ reg = <0x0 0x17100000 0x0 0x10000>, /* GICD */ <0x0 0x17180000 0x0 0x200000>; /* GICR * 8 */ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic_its: msi-controller@17140000 { + compatible = "arm,gic-v3-its"; + reg = <0x0 0x17140000 0x0 0x20000>; + msi-controller; + #msi-cells = <1>; + }; }; timer@17420000 { @@ -3037,8 +3047,8 @@ iommus = <&apps_smmu 0xe0 0x0>; - interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>, - <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>; + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; interconnect-names = "ufs-ddr", "cpu-ufs"; clock-names = "core_clk", |