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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-09-12 12:59:05 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-09-12 13:19:34 +0200 |
| commit | 0f433d022c7decc8de31f0b44ed1ada402b4df35 (patch) | |
| tree | cdacf8116104bafed288deac561a0dcbca12b26c /dts/src/arm64/renesas/rzg2lc-smarc.dtsi | |
| parent | 6db5f759917e34acb4bd5ccafbdee04217b44774 (diff) | |
| download | barebox-0f433d022c7decc8de31f0b44ed1ada402b4df35.tar.gz barebox-0f433d022c7decc8de31f0b44ed1ada402b4df35.tar.xz | |
dts: update to v6.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/renesas/rzg2lc-smarc.dtsi')
| -rw-r--r-- | dts/src/arm64/renesas/rzg2lc-smarc.dtsi | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/dts/src/arm64/renesas/rzg2lc-smarc.dtsi b/dts/src/arm64/renesas/rzg2lc-smarc.dtsi index 6818fd49b2..83fce96a25 100644 --- a/dts/src/arm64/renesas/rzg2lc-smarc.dtsi +++ b/dts/src/arm64/renesas/rzg2lc-smarc.dtsi @@ -11,7 +11,6 @@ #include "rzg2lc-smarc-pinfunction.dtsi" #include "rz-smarc-common.dtsi" - / { aliases { serial1 = &scif1; @@ -129,6 +128,19 @@ }; }; +#if PMOD_MTU3 +&mtu3 { + pinctrl-0 = <&mtu3_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&spi1 { + status = "disabled"; +}; +#endif + /* * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board * SW1 should be at position 2->3 so that SER0_CTS# line is activated |