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authorSascha Hauer <s.hauer@pengutronix.de>2021-01-05 12:56:25 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2021-01-07 11:41:05 +0100
commit6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef (patch)
tree5d16ca525c12dddb21d9c4750dfd1a1e354eb731 /dts/src/arm
parent93c4690b4921d3149db3fcf5b62a8aa5010a4ae7 (diff)
downloadbarebox-6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef.tar.gz
dts: update to v5.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm')
-rw-r--r--dts/src/arm/am335x-baltos.dtsi2
-rw-r--r--dts/src/arm/am335x-boneblue.dts54
-rw-r--r--dts/src/arm/am335x-cm-t335.dts2
-rw-r--r--dts/src/arm/am335x-evm.dts2
-rw-r--r--dts/src/arm/am335x-igep0033.dtsi2
-rw-r--r--dts/src/arm/am335x-nano.dts1
-rw-r--r--dts/src/arm/am33xx-l4.dtsi102
-rw-r--r--dts/src/arm/am33xx.dtsi185
-rw-r--r--dts/src/arm/am4372.dtsi175
-rw-r--r--dts/src/arm/am437x-l4.dtsi83
-rw-r--r--dts/src/arm/armada-375.dtsi2
-rw-r--r--dts/src/arm/armada-382-rd-ac3x-48g4x2xl.dts112
-rw-r--r--dts/src/arm/armada-385-turris-omnia.dts179
-rw-r--r--dts/src/arm/armada-388-clearfog.dts4
-rw-r--r--dts/src/arm/armada-388-clearfog.dtsi10
-rw-r--r--dts/src/arm/armada-388-helios4.dts6
-rw-r--r--dts/src/arm/armada-xp-98dx3236.dtsi12
-rw-r--r--dts/src/arm/armada-xp-crs305-1g-4s-bit.dts43
-rw-r--r--dts/src/arm/armada-xp-crs305-1g-4s.dts17
-rw-r--r--dts/src/arm/armada-xp-crs305-1g-4s.dtsi104
-rw-r--r--dts/src/arm/armada-xp-crs326-24g-2s-bit.dts43
-rw-r--r--dts/src/arm/armada-xp-crs326-24g-2s.dts17
-rw-r--r--dts/src/arm/armada-xp-crs326-24g-2s.dtsi104
-rw-r--r--dts/src/arm/armada-xp-crs328-4c-20s-4s-bit.dts43
-rw-r--r--dts/src/arm/armada-xp-crs328-4c-20s-4s.dts17
-rw-r--r--dts/src/arm/armada-xp-crs328-4c-20s-4s.dtsi104
-rw-r--r--dts/src/arm/aspeed-ast2600-evb.dts20
-rw-r--r--dts/src/arm/aspeed-bmc-amd-ethanolx.dts77
-rw-r--r--dts/src/arm/aspeed-bmc-bytedance-g220a.dts924
-rw-r--r--dts/src/arm/aspeed-bmc-facebook-galaxy100.dts57
-rw-r--r--dts/src/arm/aspeed-bmc-facebook-minipack.dts888
-rw-r--r--dts/src/arm/aspeed-bmc-facebook-tiogapass.dts13
-rw-r--r--dts/src/arm/aspeed-bmc-facebook-wedge100.dts120
-rw-r--r--dts/src/arm/aspeed-bmc-facebook-wedge40.dts112
-rw-r--r--dts/src/arm/aspeed-bmc-facebook-wedge400.dts4
-rw-r--r--dts/src/arm/aspeed-bmc-ibm-rainier-4u.dts37
-rw-r--r--dts/src/arm/aspeed-bmc-ibm-rainier.dts39
-rw-r--r--dts/src/arm/aspeed-bmc-intel-s2600wf.dts4
-rw-r--r--dts/src/arm/aspeed-bmc-opp-tacoma.dts11
-rw-r--r--dts/src/arm/aspeed-g4.dtsi5
-rw-r--r--dts/src/arm/aspeed-g5.dtsi5
-rw-r--r--dts/src/arm/aspeed-g6.dtsi13
-rw-r--r--dts/src/arm/ast2400-facebook-netbmc-common.dtsi117
-rw-r--r--dts/src/arm/at91-kizbox.dts55
-rw-r--r--dts/src/arm/at91-kizbox2-common.dtsi8
-rw-r--r--dts/src/arm/at91-kizbox3-hs.dts16
-rw-r--r--dts/src/arm/at91-kizbox3_common.dtsi10
-rw-r--r--dts/src/arm/at91-kizboxmini-common.dtsi8
-rw-r--r--dts/src/arm/at91-sam9x60ek.dts13
-rw-r--r--dts/src/arm/at91-sama5d27_som1.dtsi2
-rw-r--r--dts/src/arm/at91-sama5d3_xplained.dts7
-rw-r--r--dts/src/arm/at91-sama5d4_xplained.dts7
-rw-r--r--dts/src/arm/at91-smartkiz.dts6
-rw-r--r--dts/src/arm/at91sam9260.dtsi25
-rw-r--r--dts/src/arm/at91sam9g45.dtsi27
-rw-r--r--dts/src/arm/at91sam9m10g45ek.dts10
-rw-r--r--dts/src/arm/at91sam9rl.dtsi25
-rw-r--r--dts/src/arm/at91sam9rlek.dts10
-rw-r--r--dts/src/arm/at91sam9x5.dtsi28
-rw-r--r--dts/src/arm/bcm-cygnus.dtsi1
-rw-r--r--dts/src/arm/bcm-nsp.dtsi8
-rw-r--r--dts/src/arm/bcm2711-rpi-4-b.dts2
-rw-r--r--dts/src/arm/bcm283x-rpi-usb-otg.dtsi2
-rw-r--r--dts/src/arm/bcm283x-rpi-usb-peripheral.dtsi2
-rw-r--r--dts/src/arm/bcm4708-luxul-xap-1510.dts7
-rw-r--r--dts/src/arm/bcm4708-luxul-xwc-1000.dts7
-rw-r--r--dts/src/arm/bcm4708-smartrg-sr400ac.dts3
-rw-r--r--dts/src/arm/bcm47081-buffalo-wzr-600dhp2.dts4
-rw-r--r--dts/src/arm/bcm47081-luxul-xap-1410.dts7
-rw-r--r--dts/src/arm/bcm47081-luxul-xwr-1200.dts7
-rw-r--r--dts/src/arm/bcm47081-tplink-archer-c5-v2.dts4
-rw-r--r--dts/src/arm/bcm4709.dtsi4
-rw-r--r--dts/src/arm/bcm47094-linksys-panamera.dts94
-rw-r--r--dts/src/arm/bcm47094-luxul-xap-1610.dts3
-rw-r--r--dts/src/arm/bcm47094-luxul-xwc-2000.dts3
-rw-r--r--dts/src/arm/bcm47094-luxul-xwr-3100.dts3
-rw-r--r--dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts7
-rw-r--r--dts/src/arm/bcm47094.dtsi13
-rw-r--r--dts/src/arm/bcm5301x.dtsi67
-rw-r--r--dts/src/arm/bcm53573.dtsi4
-rw-r--r--dts/src/arm/bcm953012er.dts3
-rw-r--r--dts/src/arm/bcm958522er.dts4
-rw-r--r--dts/src/arm/bcm958525er.dts4
-rw-r--r--dts/src/arm/bcm958525xmc.dts4
-rw-r--r--dts/src/arm/bcm958622hr.dts3
-rw-r--r--dts/src/arm/bcm958623hr.dts3
-rw-r--r--dts/src/arm/bcm958625hr.dts3
-rw-r--r--dts/src/arm/bcm958625k.dts3
-rw-r--r--dts/src/arm/bcm988312hr.dts3
-rw-r--r--dts/src/arm/dove-sbc-a510.dts1
-rw-r--r--dts/src/arm/dra7.dtsi185
-rw-r--r--dts/src/arm/dra7xx-clocks.dtsi14
-rw-r--r--dts/src/arm/exynos-mfc-reserved-memory.dtsi4
-rw-r--r--dts/src/arm/exynos3250-artik5-eval.dts26
-rw-r--r--dts/src/arm/exynos3250-artik5.dtsi2
-rw-r--r--dts/src/arm/exynos3250-monk.dts8
-rw-r--r--dts/src/arm/exynos3250-rinato.dts8
-rw-r--r--dts/src/arm/exynos3250.dtsi54
-rw-r--r--dts/src/arm/exynos4.dtsi26
-rw-r--r--dts/src/arm/exynos4210-i9100.dts6
-rw-r--r--dts/src/arm/exynos4210-origen.dts4
-rw-r--r--dts/src/arm/exynos4210-smdkv310.dts22
-rw-r--r--dts/src/arm/exynos4210-trats.dts35
-rw-r--r--dts/src/arm/exynos4210-universal_c210.dts29
-rw-r--r--dts/src/arm/exynos4210.dtsi36
-rw-r--r--dts/src/arm/exynos4412-galaxy-s3.dtsi9
-rw-r--r--dts/src/arm/exynos4412-itop-elite.dts2
-rw-r--r--dts/src/arm/exynos4412-itop-scp-core.dtsi2
-rw-r--r--dts/src/arm/exynos4412-midas.dtsi47
-rw-r--r--dts/src/arm/exynos4412-n710x.dts2
-rw-r--r--dts/src/arm/exynos4412-odroid-common.dtsi11
-rw-r--r--dts/src/arm/exynos4412-odroidu3.dts26
-rw-r--r--dts/src/arm/exynos4412-odroidx.dts58
-rw-r--r--dts/src/arm/exynos4412-origen.dts14
-rw-r--r--dts/src/arm/exynos4412-p4note-n8010.dts17
-rw-r--r--dts/src/arm/exynos4412-p4note.dtsi1132
-rw-r--r--dts/src/arm/exynos4412-smdk4412.dts20
-rw-r--r--dts/src/arm/exynos4412.dtsi32
-rw-r--r--dts/src/arm/exynos5250-arndale.dts6
-rw-r--r--dts/src/arm/exynos5250-smdk5250.dts4
-rw-r--r--dts/src/arm/exynos5250-snow-common.dtsi4
-rw-r--r--dts/src/arm/exynos5250-snow-rev5.dts2
-rw-r--r--dts/src/arm/exynos5250-snow.dts2
-rw-r--r--dts/src/arm/exynos5250-spring.dts2
-rw-r--r--dts/src/arm/exynos5250.dtsi7
-rw-r--r--dts/src/arm/exynos5410-odroidxu.dts33
-rw-r--r--dts/src/arm/exynos5410-pinctrl.dtsi28
-rw-r--r--dts/src/arm/exynos5410.dtsi4
-rw-r--r--dts/src/arm/exynos5420-arndale-octa.dts4
-rw-r--r--dts/src/arm/exynos5420-peach-pit.dts6
-rw-r--r--dts/src/arm/exynos5420-smdk5420.dts2
-rw-r--r--dts/src/arm/exynos5420.dtsi39
-rw-r--r--dts/src/arm/exynos5422-odroid-core.dtsi34
-rw-r--r--dts/src/arm/exynos5422-odroidhc1.dts4
-rw-r--r--dts/src/arm/exynos5422-odroidxu3-audio.dtsi2
-rw-r--r--dts/src/arm/exynos5422-odroidxu3-common.dtsi4
-rw-r--r--dts/src/arm/exynos5422-odroidxu3-lite.dts22
-rw-r--r--dts/src/arm/exynos5422-odroidxu3.dts30
-rw-r--r--dts/src/arm/exynos5422-odroidxu4.dts4
-rw-r--r--dts/src/arm/exynos54xx-odroidxu-leds.dtsi11
-rw-r--r--dts/src/arm/exynos54xx.dtsi5
-rw-r--r--dts/src/arm/exynos5800-peach-pi.dts4
-rw-r--r--dts/src/arm/hi3519-demb.dts2
-rw-r--r--dts/src/arm/hi3519.dtsi32
-rw-r--r--dts/src/arm/hi3620-hi4511.dts24
-rw-r--r--dts/src/arm/hi3620.dtsi32
-rw-r--r--dts/src/arm/hip01-ca9x2.dts2
-rw-r--r--dts/src/arm/hip01.dtsi26
-rw-r--r--dts/src/arm/hip04-d01.dts2
-rw-r--r--dts/src/arm/hip04.dtsi6
-rw-r--r--dts/src/arm/hisi-x5hd2-dkb.dts2
-rw-r--r--dts/src/arm/hisi-x5hd2.dtsi42
-rw-r--r--dts/src/arm/imx25.dtsi2
-rw-r--r--dts/src/arm/imx27.dtsi2
-rw-r--r--dts/src/arm/imx28.dtsi2
-rw-r--r--dts/src/arm/imx31.dtsi3
-rw-r--r--dts/src/arm/imx35.dtsi2
-rw-r--r--dts/src/arm/imx50-kobo-aura.dts41
-rw-r--r--dts/src/arm/imx50.dtsi2
-rw-r--r--dts/src/arm/imx51-zii-rdu1.dts2
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-rw-r--r--dts/src/arm/imx6dl-pico-dwarf.dts2
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-rw-r--r--dts/src/arm/imx6q-apalis-eval.dts2
-rw-r--r--dts/src/arm/imx6q-apalis-ixora-v1.1.dts2
-rw-r--r--dts/src/arm/imx6q-apalis-ixora.dts2
-rw-r--r--dts/src/arm/imx6q-icore-ofcap10.dts28
-rw-r--r--dts/src/arm/imx6q-pico-dwarf.dts2
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-rw-r--r--dts/src/arm/imx6q-pico-nymph.dts2
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-rw-r--r--dts/src/arm/imx6qdl-cubox-i.dtsi4
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-rw-r--r--dts/src/arm/imx6qdl-phytec-pfla02.dtsi3
-rw-r--r--dts/src/arm/imx6qdl-phytec-phycore-som.dtsi3
-rw-r--r--dts/src/arm/imx6qdl-zii-rdu2.dtsi8
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-rw-r--r--dts/src/arm/rk3288-veyron-tiger.dts2
-rw-r--r--dts/src/arm/rk3288-vmarc-som.dtsi40
-rw-r--r--dts/src/arm/rockchip-radxa-dalang-carrier.dtsi21
-rw-r--r--dts/src/arm/rv1108.dtsi2
-rw-r--r--dts/src/arm/s3c2416-smdk2416.dts2
-rw-r--r--dts/src/arm/s3c6410-smdk6410.dts2
-rw-r--r--dts/src/arm/s5pv210-aquila.dts12
-rw-r--r--dts/src/arm/s5pv210-aries.dtsi7
-rw-r--r--dts/src/arm/s5pv210-goni.dts14
-rw-r--r--dts/src/arm/s5pv210-smdkv210.dts20
-rw-r--r--dts/src/arm/s5pv210.dtsi1
-rw-r--r--dts/src/arm/sama5d2.dtsi7
-rw-r--r--dts/src/arm/sama5d3.dtsi26
-rw-r--r--dts/src/arm/sama5d4.dtsi22
-rw-r--r--dts/src/arm/ste-ab8500.dtsi6
-rw-r--r--dts/src/arm/ste-ab8505.dtsi6
-rw-r--r--dts/src/arm/ste-dbx5x0.dtsi6
-rw-r--r--dts/src/arm/ste-href-stuib.dtsi2
-rw-r--r--dts/src/arm/ste-href-tvk1281618-r2.dtsi2
-rw-r--r--dts/src/arm/ste-href-tvk1281618-r3.dtsi2
-rw-r--r--dts/src/arm/ste-ux500-samsung-golden.dts9
-rw-r--r--dts/src/arm/ste-ux500-samsung-skomer.dts12
-rw-r--r--dts/src/arm/stm32429i-eval.dts1
-rw-r--r--dts/src/arm/stm32h743.dtsi2
-rw-r--r--dts/src/arm/stm32mp15-pinctrl.dtsi90
-rw-r--r--dts/src/arm/stm32mp151.dtsi41
-rw-r--r--dts/src/arm/stm32mp157c-dhcom-picoitx.dts35
-rw-r--r--dts/src/arm/stm32mp157c-dk2.dts4
-rw-r--r--dts/src/arm/stm32mp157c-ed1.dts12
-rw-r--r--dts/src/arm/stm32mp157c-ev1.dts1
-rw-r--r--dts/src/arm/stm32mp157c-lxa-mc1.dts2
-rw-r--r--dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi143
-rw-r--r--dts/src/arm/stm32mp15xx-dhcom-som.dtsi37
-rw-r--r--dts/src/arm/stm32mp15xx-dkx.dtsi38
-rw-r--r--dts/src/arm/sun8i-h2-plus-bananapi-m2-zero.dts64
-rw-r--r--dts/src/arm/sun8i-h3-nanopi-r1.dts169
-rw-r--r--dts/src/arm/sun8i-h3-zeropi.dts85
-rw-r--r--dts/src/arm/sun8i-s3-elimo-impetus.dtsi44
-rw-r--r--dts/src/arm/sun8i-s3-elimo-initium.dts29
-rw-r--r--dts/src/arm/sun8i-v3.dtsi5
-rw-r--r--dts/src/arm/sun8i-v3s.dtsi6
-rw-r--r--dts/src/arm/sunxi-h3-h5.dtsi13
-rw-r--r--dts/src/arm/tegra124-apalis-emc.dtsi8
-rw-r--r--dts/src/arm/tegra124-jetson-tk1-emc.dtsi8
-rw-r--r--dts/src/arm/tegra124-nyan-big-emc.dtsi10
-rw-r--r--dts/src/arm/tegra124-nyan-blaze-emc.dtsi10
-rw-r--r--dts/src/arm/tegra124-peripherals-opp.dtsi419
-rw-r--r--dts/src/arm/tegra124.dtsi54
-rw-r--r--dts/src/arm/tegra20-acer-a500-picasso.dts29
-rw-r--r--dts/src/arm/tegra20-colibri.dtsi4
-rw-r--r--dts/src/arm/tegra20-paz00.dts4
-rw-r--r--dts/src/arm/tegra20-peripherals-opp.dtsi109
-rw-r--r--dts/src/arm/tegra20-ventana.dts11
-rw-r--r--dts/src/arm/tegra20.dtsi33
-rw-r--r--dts/src/arm/tegra30-asus-nexus7-grouper-common.dtsi27
-rw-r--r--dts/src/arm/tegra30-asus-nexus7-grouper-maxim-pmic.dtsi2
-rw-r--r--dts/src/arm/tegra30-asus-nexus7-grouper-memory-timings.dtsi12
-rw-r--r--dts/src/arm/tegra30-asus-nexus7-tilapia.dtsi2
-rw-r--r--dts/src/arm/tegra30-ouya.dts4519
-rw-r--r--dts/src/arm/tegra30-peripherals-opp.dtsi383
-rw-r--r--dts/src/arm/tegra30.dtsi33
-rw-r--r--dts/src/arm/vfxxx.dtsi6
-rw-r--r--dts/src/arm/zynq-7000.dtsi2
-rw-r--r--dts/src/arm/zynq-zc702.dts8
-rw-r--r--dts/src/arm/zynq-zc770-xm011.dts2
-rw-r--r--dts/src/arm/zynq-zc770-xm013.dts7
-rw-r--r--dts/src/arm/zynq-zturn-common.dtsi112
-rw-r--r--dts/src/arm/zynq-zturn-v5.dts15
-rw-r--r--dts/src/arm/zynq-zturn.dts101
-rw-r--r--dts/src/arm/zynq-zybo-z7.dts2
334 files changed, 21023 insertions, 1770 deletions
diff --git a/dts/src/arm/am335x-baltos.dtsi b/dts/src/arm/am335x-baltos.dtsi
index b7f64c7..3ea2861 100644
--- a/dts/src/arm/am335x-baltos.dtsi
+++ b/dts/src/arm/am335x-baltos.dtsi
@@ -168,7 +168,7 @@
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
- AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
diff --git a/dts/src/arm/am335x-boneblue.dts b/dts/src/arm/am335x-boneblue.dts
index c696d57..69acaf4 100644
--- a/dts/src/arm/am335x-boneblue.dts
+++ b/dts/src/arm/am335x-boneblue.dts
@@ -241,6 +241,30 @@
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT, MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
>;
};
+
+ /* E1 */
+ eqep0_pins: pinmux_eqep0_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT, MUX_MODE1) /* (B12) mcasp0_aclkr.eQEP0A_in */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_INPUT, MUX_MODE1) /* (C13) mcasp0_fsr.eQEP0B_in */
+ >;
+ };
+
+ /* E2 */
+ eqep1_pins: pinmux_eqep1_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT, MUX_MODE2) /* (V2) lcd_data12.eQEP1A_in */
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_INPUT, MUX_MODE2) /* (V3) lcd_data13.eQEP1B_in */
+ >;
+ };
+
+ /* E3 */
+ eqep2_pins: pinmux_eqep2_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE4) /* (T12) gpmc_ad12.eQEP2A_in */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE4) /* (R12) gpmc_ad13.eQEP2B_in */
+ >;
+ };
};
&uart0 {
@@ -419,3 +443,33 @@
line-name = "LS_BUF_EN";
};
};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&eqep0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep0_pins>;
+ status = "okay";
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&eqep1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep1_pins>;
+ status = "okay";
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&eqep2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep2_pins>;
+ status = "okay";
+};
diff --git a/dts/src/arm/am335x-cm-t335.dts b/dts/src/arm/am335x-cm-t335.dts
index c6fe9db..36d963d 100644
--- a/dts/src/arm/am335x-cm-t335.dts
+++ b/dts/src/arm/am335x-cm-t335.dts
@@ -122,7 +122,7 @@
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
- /* gpmc_wpn.gpio0_30 */
+ /* gpmc_wpn.gpio0_31 */
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
diff --git a/dts/src/arm/am335x-evm.dts b/dts/src/arm/am335x-evm.dts
index 12dffcc..7c6f2c1 100644
--- a/dts/src/arm/am335x-evm.dts
+++ b/dts/src/arm/am335x-evm.dts
@@ -229,7 +229,7 @@
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
- AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
diff --git a/dts/src/arm/am335x-igep0033.dtsi b/dts/src/arm/am335x-igep0033.dtsi
index c9f354f..7ec23d4 100644
--- a/dts/src/arm/am335x-igep0033.dtsi
+++ b/dts/src/arm/am335x-igep0033.dtsi
@@ -70,7 +70,7 @@
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
- AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
diff --git a/dts/src/arm/am335x-nano.dts b/dts/src/arm/am335x-nano.dts
index 0946fbf..0dbc72d 100644
--- a/dts/src/arm/am335x-nano.dts
+++ b/dts/src/arm/am335x-nano.dts
@@ -238,7 +238,6 @@
&gpmc {
compatible = "ti,am3352-gpmc";
- ti,hwmods = "gpmc";
status = "okay";
gpmc,num-waitpins = <2>;
pinctrl-names = "default";
diff --git a/dts/src/arm/am33xx-l4.dtsi b/dts/src/arm/am33xx-l4.dtsi
index ea20e4b..7808850 100644
--- a/dts/src/arm/am33xx-l4.dtsi
+++ b/dts/src/arm/am33xx-l4.dtsi
@@ -1,5 +1,8 @@
&l4_wkup { /* 0x44c00000 */
- compatible = "ti,am33xx-l4-wkup", "simple-bus";
+ compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
+ power-domains = <&prm_wkup>;
+ clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
+ clock-names = "fck";
reg = <0x44c00000 0x800>,
<0x44c00800 0x800>,
<0x44c01000 0x400>,
@@ -12,7 +15,7 @@
<0x00200000 0x44e00000 0x100000>; /* segment 2 */
segment@0 { /* 0x44c00000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
@@ -22,7 +25,7 @@
};
segment@100000 { /* 0x44d00000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
@@ -34,23 +37,27 @@
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x0 0x4>;
reg-names = "rev";
+ clocks = <&l4_wkup_aon_clkctrl AM3_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;
+ clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0x0 0x4000>;
- status = "disabled";
- };
+ ranges = <0x00000000 0x00000000 0x4000>,
+ <0x00080000 0x00080000 0x2000>;
- target-module@80000 { /* 0x44d80000, ap 6 10.0 */
- compatible = "ti,sysc";
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x80000 0x2000>;
+ wkup_m3: cpu@0 {
+ compatible = "ti,am3352-wkup-m3";
+ reg = <0x00000000 0x4000>,
+ <0x00080000 0x2000>;
+ reg-names = "umem", "dmem";
+ resets = <&prm_wkup 3>;
+ reset-names = "rstctrl";
+ ti,pm-firmware = "am335x-pm-firmware.elf";
+ };
};
};
segment@200000 { /* 0x44e00000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00200000 0x002000>, /* ap 8 */
@@ -274,6 +281,9 @@
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x10000 0x4>;
reg-names = "rev";
+ clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_CONTROL_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00010000 0x00010000>,
@@ -433,6 +443,7 @@
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
+ power-domains = <&prm_rtc>;
clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
@@ -658,7 +669,10 @@
};
&l4_fast { /* 0x4a000000 */
- compatible = "ti,am33xx-l4-fast", "simple-bus";
+ compatible = "ti,am33xx-l4-fast", "simple-pm-bus";
+ power-domains = <&prm_per>;
+ clocks = <&l4hs_clkctrl AM3_L4HS_L4_HS_CLKCTRL 0>;
+ clock-names = "fck";
reg = <0x4a000000 0x800>,
<0x4a000800 0x800>,
<0x4a001000 0x400>;
@@ -668,7 +682,7 @@
ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
segment@0 { /* 0x4a000000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
@@ -837,7 +851,10 @@
};
&l4_per { /* 0x48000000 */
- compatible = "ti,am33xx-l4-per", "simple-bus";
+ compatible = "ti,am33xx-l4-per", "simple-pm-bus";
+ power-domains = <&prm_per>;
+ clocks = <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;
+ clock-names = "fck";
reg = <0x48000000 0x800>,
<0x48000800 0x800>,
<0x48001000 0x400>,
@@ -855,7 +872,7 @@
<0x46400000 0x46400000 0x400000>; /* l3 data port */
segment@0 { /* 0x48000000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
@@ -1466,7 +1483,7 @@
};
segment@100000 { /* 0x48100000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 42 */
@@ -1850,13 +1867,31 @@
};
segment@200000 { /* 0x48200000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
+ ranges = <0x00000000 0x00200000 0x010000>;
+
+ target-module@0 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ power-domains = <&prm_mpu>;
+ clocks = <&mpu_clkctrl AM3_MPU_MPU_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x10000>;
+
+ mpu@0 {
+ compatible = "ti,omap3-mpu";
+ pm-sram = <&pm_sram_code
+ &pm_sram_data>;
+ };
+ };
};
segment@300000 { /* 0x48300000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00300000 0x001000>, /* ap 66 */
@@ -1923,6 +1958,15 @@
status = "disabled";
};
+ eqep0: counter@180 {
+ compatible = "ti,am3352-eqep";
+ reg = <0x180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "sysclkout";
+ interrupts = <79>;
+ status = "disabled";
+ };
+
ehrpwm0: pwm@200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
@@ -1975,6 +2019,15 @@
status = "disabled";
};
+ eqep1: counter@180 {
+ compatible = "ti,am3352-eqep";
+ reg = <0x180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "sysclkout";
+ interrupts = <88>;
+ status = "disabled";
+ };
+
ehrpwm1: pwm@200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
@@ -2027,6 +2080,15 @@
status = "disabled";
};
+ eqep2: counter@180 {
+ compatible = "ti,am3352-eqep";
+ reg = <0x180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "sysclkout";
+ interrupts = <89>;
+ status = "disabled";
+ };
+
ehrpwm2: pwm@200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
diff --git a/dts/src/arm/am33xx.dtsi b/dts/src/arm/am33xx.dtsi
index 4c22980..5b213a1 100644
--- a/dts/src/arm/am33xx.dtsi
+++ b/dts/src/arm/am33xx.dtsi
@@ -144,11 +144,28 @@
};
};
- pmu@4b000000 {
- compatible = "arm,cortex-a8-pmu";
- interrupts = <3>;
- reg = <0x4b000000 0x1000000>;
- ti,hwmods = "debugss";
+ target-module@4b000000 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ clocks = <&l3_clkctrl AM3_L3_L3_INSTR_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4b000000 0x1000000>;
+
+ target-module@140000 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ clocks = <&l3_aon_clkctrl AM3_L3_AON_DEBUGSS_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x140000 0xec0000>;
+
+ pmu@0 {
+ compatible = "arm,cortex-a8-pmu";
+ interrupts = <3>;
+ };
+ };
};
/*
@@ -157,12 +174,6 @@
*/
soc {
compatible = "ti,omap-infra";
- mpu {
- compatible = "ti,omap3-mpu";
- ti,hwmods = "mpu";
- pm-sram = <&pm_sram_code
- &pm_sram_data>;
- };
};
/*
@@ -173,21 +184,15 @@
* the whole bus hierarchy.
*/
ocp: ocp {
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
+ power-domains = <&prm_per>;
+ clocks = <&l3_clkctrl AM3_L3_L3_MAIN_CLKCTRL 0>;
+ clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- ti,hwmods = "l3_main";
l4_wkup: interconnect@44c00000 {
- wkup_m3: wkup_m3@100000 {
- compatible = "ti,am3352-wkup-m3";
- reg = <0x100000 0x4000>,
- <0x180000 0x2000>;
- reg-names = "umem", "dmem";
- ti,hwmods = "wkup_m3";
- ti,pm-firmware = "am335x-pm-firmware.elf";
- };
};
l4_per: interconnect@48000000 {
};
@@ -458,53 +463,89 @@
};
};
- ocmcram: sram@40300000 {
- compatible = "mmio-sram";
- reg = <0x40300000 0x10000>; /* 64k */
- ranges = <0x0 0x40300000 0x10000>;
+ target-module@40300000 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ clocks = <&l3_clkctrl AM3_L3_OCMCRAM_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
#address-cells = <1>;
#size-cells = <1>;
-
- pm_sram_code: pm-code-sram@0 {
- compatible = "ti,sram";
- reg = <0x0 0x1000>;
- protect-exec;
- };
-
- pm_sram_data: pm-data-sram@1000 {
- compatible = "ti,sram";
- reg = <0x1000 0x1000>;
- pool;
+ ranges = <0 0x40300000 0x10000>;
+
+ ocmcram: sram@0 {
+ compatible = "mmio-sram";
+ reg = <0 0x10000>; /* 64k */
+ ranges = <0 0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pm_sram_code: pm-code-sram@0 {
+ compatible = "ti,sram";
+ reg = <0x0 0x1000>;
+ protect-exec;
+ };
+
+ pm_sram_data: pm-data-sram@1000 {
+ compatible = "ti,sram";
+ reg = <0x1000 0x1000>;
+ pool;
+ };
};
};
- emif: emif@4c000000 {
- compatible = "ti,emif-am3352";
- reg = <0x4c000000 0x1000000>;
- ti,hwmods = "emif";
- interrupts = <101>;
- sram = <&pm_sram_code
- &pm_sram_data>;
+ target-module@4c000000 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ reg = <0x4c000000 0x4>;
+ reg-names = "rev";
+ clocks = <&l3_clkctrl AM3_L3_EMIF_CLKCTRL 0>;
+ clock-names = "fck";
ti,no-idle;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4c000000 0x1000000>;
+
+ emif: emif@0 {
+ compatible = "ti,emif-am3352";
+ reg = <0 0x1000000>;
+ interrupts = <101>;
+ sram = <&pm_sram_code
+ &pm_sram_data>;
+ };
};
- gpmc: gpmc@50000000 {
- compatible = "ti,am3352-gpmc";
- ti,hwmods = "gpmc";
- ti,no-idle-on-init;
- reg = <0x50000000 0x2000>;
- interrupts = <100>;
- dmas = <&edma 52 0>;
- dma-names = "rxtx";
- gpmc,num-cs = <7>;
- gpmc,num-waitpins = <2>;
- #address-cells = <2>;
+ target-module@50000000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x50000000 4>,
+ <0x50000010 4>,
+ <0x50000014 4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&l3s_clkctrl AM3_L3S_GPMC_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
#size-cells = <1>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- status = "disabled";
+ ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
+ <0x00000000 0x00000000 0x40000000>; /* data */
+
+ gpmc: gpmc@50000000 {
+ compatible = "ti,am3352-gpmc";
+ reg = <0x50000000 0x2000>;
+ interrupts = <100>;
+ dmas = <&edma 52 0>;
+ dma-names = "rxtx";
+ gpmc,num-cs = <7>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "disabled";
+ };
};
sham_target: target-module@53100000 {
@@ -601,12 +642,20 @@
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0xc00 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_wkup: prm@d00 {
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0xd00 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_mpu: prm@e00 {
+ compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
+ reg = <0xe00 0x100>;
+ #power-domain-cells = <0>;
};
prm_device: prm@f00 {
@@ -615,16 +664,31 @@
#reset-cells = <1>;
};
+ prm_rtc: prm@1000 {
+ compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1000 0x100>;
+ #power-domain-cells = <0>;
+ };
+
prm_gfx: prm@1100 {
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0x1100 0x100>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
+
+ prm_cefuse: prm@1200 {
+ compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1200 0x100>;
+ #power-domain-cells = <0>;
+ };
};
/* Preferred always-on timer for clocksource */
&timer1_target {
+ clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>,
+ <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
+ clock-names = "fck", "ick";
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
@@ -635,6 +699,9 @@
/* Preferred timer for clockevent */
&timer2_target {
+ clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>,
+ <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;
+ clock-names = "fck", "ick";
ti,no-reset-on-init;
ti,no-idle;
timer@0 {
diff --git a/dts/src/arm/am4372.dtsi b/dts/src/arm/am4372.dtsi
index 878406b..57a85a6 100644
--- a/dts/src/arm/am4372.dtsi
+++ b/dts/src/arm/am4372.dtsi
@@ -107,12 +107,6 @@
soc {
compatible = "ti,omap-infra";
- mpu {
- compatible = "ti,omap4-mpu";
- ti,hwmods = "mpu";
- pm-sram = <&pm_sram_code
- &pm_sram_data>;
- };
};
gic: interrupt-controller@48241000 {
@@ -161,40 +155,48 @@
};
ocp@44000000 {
- compatible = "ti,am4372-l3-noc", "simple-bus";
+ compatible = "simple-pm-bus";
+ power-domains = <&prm_per>;
+ clocks = <&l3_clkctrl AM4_L3_L3_MAIN_CLKCTRL 0>;
+ clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- ti,hwmods = "l3_main";
ti,no-idle;
- reg = <0x44000000 0x400000
- 0x44800000 0x400000>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+
+ l3-noc@44000000 {
+ compatible = "ti,am4372-l3-noc";
+ reg = <0x44000000 0x400000>,
+ <0x44800000 0x400000>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
l4_wkup: interconnect@44c00000 {
- wkup_m3: wkup_m3@100000 {
- compatible = "ti,am4372-wkup-m3";
- reg = <0x100000 0x4000>,
- <0x180000 0x2000>;
- reg-names = "umem", "dmem";
- ti,hwmods = "wkup_m3";
- ti,pm-firmware = "am335x-pm-firmware.elf";
- };
};
l4_per: interconnect@48000000 {
};
l4_fast: interconnect@4a000000 {
};
- emif: emif@4c000000 {
- compatible = "ti,emif-am4372";
- reg = <0x4c000000 0x1000000>;
- ti,hwmods = "emif";
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ target-module@4c000000 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ reg = <0x4c000000 0x4>;
+ reg-names = "rev";
+ clocks = <&emif_clkctrl AM4_EMIF_EMIF_CLKCTRL 0>;
+ clock-names = "fck";
ti,no-idle;
- sram = <&pm_sram_code
- &pm_sram_data>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4c000000 0x1000000>;
+
+ emif: emif@0 {
+ compatible = "ti,emif-am4372";
+ reg = <0 0x1000000>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ sram = <&pm_sram_code
+ &pm_sram_data>;
+ };
};
target-module@49000000 {
@@ -434,24 +436,41 @@
ranges = <0x0 0x54400000 0x80000>;
};
- gpmc: gpmc@50000000 {
- compatible = "ti,am3352-gpmc";
- ti,hwmods = "gpmc";
- dmas = <&edma 52 0>;
- dma-names = "rxtx";
- clocks = <&l3s_gclk>;
+ target-module@50000000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x50000000 4>,
+ <0x50000010 4>,
+ <0x50000014 4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&l3s_clkctrl AM4_L3S_GPMC_CLKCTRL 0>;
clock-names = "fck";
- reg = <0x50000000 0x2000>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- gpmc,num-cs = <7>;
- gpmc,num-waitpins = <2>;
- #address-cells = <2>;
+ #address-cells = <1>;
#size-cells = <1>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- status = "disabled";
+ ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
+ <0x00000000 0x00000000 0x40000000>; /* data */
+
+ gpmc: gpmc@50000000 {
+ compatible = "ti,am3352-gpmc";
+ dmas = <&edma 52 0>;
+ dma-names = "rxtx";
+ clocks = <&l3s_gclk>;
+ clock-names = "fck";
+ reg = <0x50000000 0x2000>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ gpmc,num-cs = <7>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "disabled";
+ };
};
target-module@47900000 {
@@ -484,23 +503,33 @@
};
};
- ocmcram: sram@40300000 {
- compatible = "mmio-sram";
- reg = <0x40300000 0x40000>; /* 256k */
- ranges = <0x0 0x40300000 0x40000>;
+ target-module@40300000 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ clocks = <&l3_clkctrl AM4_L3_OCMCRAM_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
#address-cells = <1>;
#size-cells = <1>;
+ ranges = <0 0x40300000 0x40000>;
- pm_sram_code: pm-code-sram@0 {
- compatible = "ti,sram";
- reg = <0x0 0x1000>;
- protect-exec;
- };
-
- pm_sram_data: pm-data-sram@1000 {
- compatible = "ti,sram";
- reg = <0x1000 0x1000>;
- pool;
+ ocmcram: sram@0 {
+ compatible = "mmio-sram";
+ reg = <0 0x40000>; /* 256k */
+ ranges = <0 0 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pm_sram_code: pm-code-sram@0 {
+ compatible = "ti,sram";
+ reg = <0x0 0x1000>;
+ protect-exec;
+ };
+
+ pm_sram_data: pm-data-sram@1000 {
+ compatible = "ti,sram";
+ reg = <0x1000 0x1000>;
+ pool;
+ };
};
};
@@ -531,6 +560,12 @@
#include "am43xx-clocks.dtsi"
&prcm {
+ prm_mpu: prm@300 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x300 0x100>;
+ #power-domain-cells = <0>;
+ };
+
prm_gfx: prm@400 {
compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
reg = <0x400 0x100>;
@@ -538,16 +573,36 @@
#reset-cells = <1>;
};
+ prm_rtc: prm@500 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x500 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_tamper: prm@600 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x600 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_cefuse: prm@700 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x700 0x100>;
+ #power-domain-cells = <0>;
+ };
+
prm_per: prm@800 {
compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
reg = <0x800 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_wkup: prm@2000 {
compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
reg = <0x2000 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_device: prm@4000 {
@@ -561,6 +616,9 @@
&timer1_target {
ti,no-reset-on-init;
ti,no-idle;
+ clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>,
+ <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
+ clock-names = "fck", "ick";
timer@0 {
assigned-clocks = <&timer1_fck>;
assigned-clock-parents = <&sys_clkin_ck>;
@@ -571,6 +629,9 @@
&timer2_target {
ti,no-reset-on-init;
ti,no-idle;
+ clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>,
+ <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;
+ clock-names = "fck", "ick";
timer@0 {
assigned-clocks = <&timer2_fck>;
assigned-clock-parents = <&sys_clkin_ck>;
diff --git a/dts/src/arm/am437x-l4.dtsi b/dts/src/arm/am437x-l4.dtsi
index 243e35f..e217ffc 100644
--- a/dts/src/arm/am437x-l4.dtsi
+++ b/dts/src/arm/am437x-l4.dtsi
@@ -1,5 +1,8 @@
&l4_wkup { /* 0x44c00000 */
- compatible = "ti,am4-l4-wkup", "simple-bus";
+ compatible = "ti,am4-l4-wkup", "simple-pm-bus";
+ power-domains = <&prm_wkup>;
+ clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
+ clock-names = "fck";
reg = <0x44c00000 0x800>,
<0x44c00800 0x800>,
<0x44c01000 0x400>,
@@ -12,7 +15,7 @@
<0x00200000 0x44e00000 0x100000>; /* segment 2 */
segment@0 { /* 0x44c00000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
@@ -22,7 +25,7 @@
};
segment@100000 { /* 0x44d00000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
@@ -32,19 +35,25 @@
<0x000f0000 0x001f0000 0x010000>; /* ap 8 */
target-module@0 { /* 0x44d00000, ap 4 28.0 */
- compatible = "ti,sysc";
- status = "disabled";
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x0 0x4>;
+ reg-names = "rev";
+ clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;
+ clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0x0 0x4000>;
- };
+ ranges = <0x00000000 0x00000000 0x4000>,
+ <0x00080000 0x00080000 0x2000>;
- target-module@80000 { /* 0x44d80000, ap 6 10.0 */
- compatible = "ti,sysc";
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x80000 0x2000>;
+ wkup_m3: cpu@0 {
+ compatible = "ti,am4372-wkup-m3";
+ reg = <0x00000000 0x4000>,
+ <0x00080000 0x2000>;
+ reg-names = "umem", "dmem";
+ resets = <&prm_wkup 3>;
+ reset-names = "rstctrl";
+ ti,pm-firmware = "am335x-pm-firmware.elf";
+ };
};
target-module@f0000 { /* 0x44df0000, ap 8 58.0 */
@@ -75,7 +84,7 @@
};
segment@200000 { /* 0x44e00000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */
@@ -265,6 +274,9 @@
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x10000 0x4>;
reg-names = "rev";
+ clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_CONTROL_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x10000 0x10000>;
@@ -419,6 +431,7 @@
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
+ power-domains = <&prm_rtc>;
clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
@@ -479,7 +492,10 @@
};
&l4_fast { /* 0x4a000000 */
- compatible = "ti,am4-l4-fast", "simple-bus";
+ compatible = "ti,am4-l4-fast", "simple-pm-bus";
+ power-domains = <&prm_per>;
+ clocks = <&l3_clkctrl AM4_L3_L4_HS_CLKCTRL 0>;
+ clock-names = "fck";
reg = <0x4a000000 0x800>,
<0x4a000800 0x800>,
<0x4a001000 0x400>;
@@ -489,7 +505,7 @@
ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
segment@0 { /* 0x4a000000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
@@ -594,7 +610,10 @@
};
&l4_per { /* 0x48000000 */
- compatible = "ti,am4-l4-per", "simple-bus";
+ compatible = "ti,am4-l4-per", "simple-pm-bus";
+ power-domains = <&prm_per>;
+ clocks = <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;
+ clock-names = "fck";
reg = <0x48000000 0x800>,
<0x48000800 0x800>,
<0x48001000 0x400>,
@@ -612,7 +631,7 @@
<0x46400000 0x46400000 0x400000>; /* l3 data port */
segment@0 { /* 0x48000000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
@@ -1187,7 +1206,7 @@
};
segment@100000 { /* 0x48100000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */
@@ -1618,13 +1637,31 @@
};
segment@200000 { /* 0x48200000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
+ ranges = <0x00000000 0x00200000 0x010000>;
+
+ target-module@0 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ power-domains = <&prm_mpu>;
+ clocks = <&mpu_clkctrl AM4_MPU_MPU_CLKCTRL 0>;
+ clock-names = "fck";
+ ti,no-idle;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x10000>;
+
+ mpu@0 {
+ compatible = "ti,omap4-mpu";
+ pm-sram = <&pm_sram_code
+ &pm_sram_data>;
+ };
+ };
};
segment@300000 { /* 0x48300000 */
- compatible = "simple-bus";
+ compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */
@@ -2388,7 +2425,7 @@
ranges = <0 0 0x20000>;
usb1: usb@10000 {
- compatible = "synopsys,dwc3";
+ compatible = "snps,dwc3";
reg = <0x10000 0x10000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
@@ -2468,7 +2505,7 @@
ranges = <0 0 0x20000>;
usb2: usb@10000 {
- compatible = "synopsys,dwc3";
+ compatible = "snps,dwc3";
reg = <0x10000 0x10000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/dts/src/arm/armada-375.dtsi b/dts/src/arm/armada-375.dtsi
index 9805e50..7f2f24a 100644
--- a/dts/src/arm/armada-375.dtsi
+++ b/dts/src/arm/armada-375.dtsi
@@ -426,7 +426,7 @@
status = "disabled";
};
- usb2: usb3@58000 {
+ usb2: usb@58000 {
compatible = "marvell,armada-375-xhci";
reg = <0x58000 0x20000>,<0x5b880 0x80>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/dts/src/arm/armada-382-rd-ac3x-48g4x2xl.dts b/dts/src/arm/armada-382-rd-ac3x-48g4x2xl.dts
new file mode 100644
index 0000000..584f0d0
--- /dev/null
+++ b/dts/src/arm/armada-382-rd-ac3x-48g4x2xl.dts
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for Marvell Armada 382 reference board
+ * (RD-AC3X-48G4X2XL)
+ *
+ * Copyright (C) 2020 Allied Telesis Labs
+ */
+
+/dts-v1/;
+#include "armada-385.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Marvell Armada 382 RD-AC3X";
+ compatible = "marvell,rd-ac3x-48g4x2xl", "marvell,rd-ac3x",
+ "marvell,armada385", "marvell,armada380";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ ethernet0 = &eth1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512MB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ eeprom@53{
+ compatible = "atmel,24c64";
+ reg = <0x53>;
+ };
+
+ /* CPLD device present at 0x3c. Function unknown */
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+};
+
+&eth1 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&pciec {
+ status = "okay";
+};
+
+&pcie1 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+};
+
+&nand_controller {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ label = "pxa3xx_nand-0";
+ nand-rb = <0>;
+ nand-on-flash-bbt;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ reg = <0x00000000 0x00500000>;
+ label = "u-boot";
+ };
+ partition@500000{
+ reg = <0x00500000 0x00400000>;
+ label = "u-boot env";
+ };
+ partition@900000{
+ reg = <0x00900000 0x3F700000>;
+ label = "user";
+ };
+ };
+ };
+};
+
+&refclk {
+ clock-frequency = <200000000>;
+};
diff --git a/dts/src/arm/armada-385-turris-omnia.dts b/dts/src/arm/armada-385-turris-omnia.dts
index 768b6c5..646a064 100644
--- a/dts/src/arm/armada-385-turris-omnia.dts
+++ b/dts/src/arm/armada-385-turris-omnia.dts
@@ -12,6 +12,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
#include "armada-385.dtsi"
/ {
@@ -82,6 +83,32 @@
};
};
};
+
+ sfp: sfp {
+ compatible = "sff,sfp";
+ i2c-bus = <&sfp_i2c>;
+ tx-fault-gpios = <&pcawan 0 GPIO_ACTIVE_HIGH>;
+ tx-disable-gpios = <&pcawan 1 GPIO_ACTIVE_HIGH>;
+ rate-select0-gpios = <&pcawan 2 GPIO_ACTIVE_HIGH>;
+ los-gpios = <&pcawan 3 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&pcawan 4 GPIO_ACTIVE_LOW>;
+ maximum-power-milliwatt = <3000>;
+
+ /*
+ * For now this has to be enabled at boot time by U-Boot when
+ * a SFP module is present. Read more in the comment in the
+ * eth2 node below.
+ */
+ status = "disabled";
+ };
+};
+
+&bm {
+ status = "okay";
+};
+
+&bm_bppi {
+ status = "okay";
};
/* Connected to 88E6176 switch, port 6 */
@@ -90,6 +117,9 @@
pinctrl-0 = <&ge0_rgmii_pins>;
status = "okay";
phy-mode = "rgmii";
+ buffer-manager = <&bm>;
+ bm,pool-long = <0>;
+ bm,pool-short = <3>;
fixed-link {
speed = <1000>;
@@ -103,6 +133,9 @@
pinctrl-0 = <&ge1_rgmii_pins>;
status = "okay";
phy-mode = "rgmii";
+ buffer-manager = <&bm>;
+ bm,pool-long = <1>;
+ bm,pool-short = <3>;
fixed-link {
speed = <1000>;
@@ -112,9 +145,23 @@
/* WAN port */
&eth2 {
+ /*
+ * eth2 is connected via a multiplexor to both the SFP cage and to
+ * ethernet-phy@1. The multiplexor switches the signal to SFP cage when
+ * a SFP module is present, as determined by the mode-def0 GPIO.
+ *
+ * Until kernel supports this configuration properly, in case SFP module
+ * is present, U-Boot has to enable the sfp node above, remove phy
+ * handle and add managed = "in-band-status" property.
+ */
status = "okay";
phy-mode = "sgmii";
- phy = <&phy1>;
+ phy-handle = <&phy1>;
+ phys = <&comphy5 2>;
+ sfp = <&sfp>;
+ buffer-manager = <&bm>;
+ bm,pool-long = <2>;
+ bm,pool-short = <3>;
};
&i2c0 {
@@ -127,7 +174,6 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
- status = "okay";
i2c@0 {
#address-cells = <1>;
@@ -135,7 +181,115 @@
reg = <0>;
/* STM32F0 command interface at address 0x2a */
- /* leds device (in STM32F0) at address 0x2b */
+
+ led-controller@2b {
+ compatible = "cznic,turris-omnia-leds";
+ reg = <0x2b>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /*
+ * LEDs are controlled by MCU (STM32F0) at
+ * address 0x2b.
+ *
+ * The driver does not support HW control mode
+ * for the LEDs yet. Disable the LEDs for now.
+ *
+ * Also LED functions are not stable yet:
+ * - there are 3 LEDs connected via MCU to PCIe
+ * ports. One of these ports supports mSATA.
+ * There is no mSATA nor PCIe function.
+ * For now we use LED_FUNCTION_WLAN, since
+ * in most cases users have wifi cards in
+ * these slots
+ * - there are 2 LEDs dedicated for user: A and
+ * B. Again there is no such function defined.
+ * For now we use LED_FUNCTION_INDICATOR
+ */
+ status = "disabled";
+
+ multi-led@0 {
+ reg = <0x0>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <2>;
+ };
+
+ multi-led@1 {
+ reg = <0x1>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <1>;
+ };
+
+ multi-led@2 {
+ reg = <0x2>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_WLAN;
+ function-enumerator = <3>;
+ };
+
+ multi-led@3 {
+ reg = <0x3>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_WLAN;
+ function-enumerator = <2>;
+ };
+
+ multi-led@4 {
+ reg = <0x4>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_WLAN;
+ function-enumerator = <1>;
+ };
+
+ multi-led@5 {
+ reg = <0x5>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_WAN;
+ };
+
+ multi-led@6 {
+ reg = <0x6>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <4>;
+ };
+
+ multi-led@7 {
+ reg = <0x7>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <3>;
+ };
+
+ multi-led@8 {
+ reg = <0x8>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <2>;
+ };
+
+ multi-led@9 {
+ reg = <0x9>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <1>;
+ };
+
+ multi-led@a {
+ reg = <0xa>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <0>;
+ };
+
+ multi-led@b {
+ reg = <0xb>;
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_POWER;
+ };
+ };
eeprom@54 {
compatible = "atmel,24c64";
@@ -177,7 +331,7 @@
/* routed to PCIe2 connector (CN62A) */
};
- i2c@4 {
+ sfp_i2c: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
@@ -232,9 +386,8 @@
pinctrl-0 = <&mdio_pins>;
status = "okay";
- phy1: phy@1 {
- status = "okay";
- compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
+ phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
/* irq is connected to &pcawan pin 7 */
@@ -242,13 +395,18 @@
/* Switch MV88E6176 at address 0x10 */
switch@10 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&swint_pins>;
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
- dsa,member = <0 0>;
+ dsa,member = <0 0>;
reg = <0x10>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -301,6 +459,11 @@
marvell,function = "gpio";
};
+ swint_pins: swint-pins {
+ marvell,pins = "mpp45";
+ marvell,function = "gpio";
+ };
+
spi0cs0_pins: spi0cs0-pins {
marvell,pins = "mpp25";
marvell,function = "spi0";
diff --git a/dts/src/arm/armada-388-clearfog.dts b/dts/src/arm/armada-388-clearfog.dts
index 20f8d46..4140a53 100644
--- a/dts/src/arm/armada-388-clearfog.dts
+++ b/dts/src/arm/armada-388-clearfog.dts
@@ -73,13 +73,13 @@
* 14-SFP_TX_DISABLE
* 15-SFP_MOD_DEF0
*/
- pcie2_0_clkreq {
+ pcie2-0-clkreq-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
input;
line-name = "pcie2.0-clkreq";
};
- pcie2_0_w_disable {
+ pcie2-0-w-disable-hog {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
diff --git a/dts/src/arm/armada-388-clearfog.dtsi b/dts/src/arm/armada-388-clearfog.dtsi
index a0aa1d1..f8a06ae 100644
--- a/dts/src/arm/armada-388-clearfog.dtsi
+++ b/dts/src/arm/armada-388-clearfog.dtsi
@@ -141,31 +141,31 @@
#gpio-cells = <2>;
reg = <0x20>;
- pcie1_0_clkreq {
+ pcie1-0-clkreq-hog {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
input;
line-name = "pcie1.0-clkreq";
};
- pcie1_0_w_disable {
+ pcie1-0-w-disable-hog {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pcie1.0-w-disable";
};
- usb3_ilimit {
+ usb3-ilimit-hog {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
input;
line-name = "usb3-current-limit";
};
- usb3_power {
+ usb3-power-hog {
gpio-hog;
gpios = <6 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb3-power";
};
- m2_devslp {
+ m2-devslp-hog {
gpio-hog;
gpios = <11 GPIO_ACTIVE_HIGH>;
output-low;
diff --git a/dts/src/arm/armada-388-helios4.dts b/dts/src/arm/armada-388-helios4.dts
index fb49df2..b3728de 100644
--- a/dts/src/arm/armada-388-helios4.dts
+++ b/dts/src/arm/armada-388-helios4.dts
@@ -166,19 +166,19 @@
interrupt-controller;
#interrupt-cells = <2>;
- board_rev_bit_0 {
+ board-rev-bit-0-hog {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
input;
line-name = "board-rev-0";
};
- board_rev_bit_1 {
+ board-rev-bit-1-hog {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
input;
line-name = "board-rev-1";
};
- usb3_ilimit {
+ usb3-ilimit-hog {
gpio-hog;
gpios = <5 GPIO_ACTIVE_HIGH>;
input;
diff --git a/dts/src/arm/armada-xp-98dx3236.dtsi b/dts/src/arm/armada-xp-98dx3236.dtsi
index 654648b..38a052a 100644
--- a/dts/src/arm/armada-xp-98dx3236.dtsi
+++ b/dts/src/arm/armada-xp-98dx3236.dtsi
@@ -264,11 +264,8 @@
&i2c0 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11000 0x100>;
-};
-
-&i2c1 {
- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
- reg = <0x11100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
};
&mpic {
@@ -324,6 +321,11 @@
"mpp2", "mpp3";
marvell,function = "spi0";
};
+
+ i2c0_pins: i2c-pins-0 {
+ marvell,pins = "mpp14", "mpp15";
+ marvell,function = "i2c0";
+ };
};
&spi0 {
diff --git a/dts/src/arm/armada-xp-crs305-1g-4s-bit.dts b/dts/src/arm/armada-xp-crs305-1g-4s-bit.dts
new file mode 100644
index 0000000..a022c68
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs305-1g-4s-bit.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for MikroTik CRS305-1G-4S+ Bit board
+ *
+ * Copyright (C) 2020 Sartura Ltd.
+ * Author: Luka Kovacic <luka.kovacic@sartura.hr>
+ */
+
+#include "armada-xp-crs305-1g-4s.dtsi"
+
+/ {
+ model = "MikroTik CRS305-1G-4S+ Bit";
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ m25p,fast-read;
+
+ partition@u-boot {
+ reg = <0x00000000 0x001f0000>;
+ label = "u-boot";
+ };
+ partition@u-boot-env {
+ reg = <0x001f0000 0x00010000>;
+ label = "u-boot-env";
+ };
+ partition@ubi1 {
+ reg = <0x00200000 0x03f00000>;
+ label = "ubi1";
+ };
+ partition@ubi2 {
+ reg = <0x04100000 0x03f00000>;
+ label = "ubi2";
+ };
+ };
+};
diff --git a/dts/src/arm/armada-xp-crs305-1g-4s.dts b/dts/src/arm/armada-xp-crs305-1g-4s.dts
new file mode 100644
index 0000000..010b83b
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs305-1g-4s.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for MikroTik CRS305-1G-4S+ board
+ *
+ * Copyright (C) 2020 Sartura Ltd.
+ * Author: Luka Kovacic <luka.kovacic@sartura.hr>
+ */
+
+#include "armada-xp-crs305-1g-4s.dtsi"
+
+/ {
+ model = "MikroTik CRS305-1G-4S+";
+};
+
+&spi0 {
+ status = "okay";
+};
diff --git a/dts/src/arm/armada-xp-crs305-1g-4s.dtsi b/dts/src/arm/armada-xp-crs305-1g-4s.dtsi
new file mode 100644
index 0000000..32fb21b
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs305-1g-4s.dtsi
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for CRS305-1G-4S board
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ * Copyright (C) 2020 Sartura Ltd.
+ *
+ * Based on armada-xp-db.dts
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
+ */
+
+/dts-v1/;
+#include "armada-xp-98dx3236.dtsi"
+
+/ {
+ model = "CRS305-1G-4S+";
+ compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
+ };
+};
+
+&L2 {
+ arm,parity-enable;
+ marvell,ecc-enable;
+};
+
+&devbus_bootcs {
+ status = "okay";
+
+ /* Device Bus parameters are required */
+
+ /* Read parameters */
+ devbus,bus-width = <16>;
+ devbus,turn-off-ps = <60000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <124000>;
+ devbus,acc-next-ps = <248000>;
+ devbus,rd-setup-ps = <0>;
+ devbus,rd-hold-ps = <0>;
+
+ /* Write parameters */
+ devbus,sync-enable = <0>;
+ devbus,wr-high-ps = <60000>;
+ devbus,wr-low-ps = <60000>;
+ devbus,ale-wr-ps = <60000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ m25p,fast-read;
+
+ partition@u-boot {
+ reg = <0x00000000 0x001f0000>;
+ label = "u-boot";
+ };
+ partition@u-boot-env {
+ reg = <0x001f0000 0x00010000>;
+ label = "u-boot-env";
+ };
+ partition@ubi1 {
+ reg = <0x00200000 0x00e00000>;
+ label = "ubi1";
+ };
+ };
+};
diff --git a/dts/src/arm/armada-xp-crs326-24g-2s-bit.dts b/dts/src/arm/armada-xp-crs326-24g-2s-bit.dts
new file mode 100644
index 0000000..21f442a
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs326-24g-2s-bit.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for MikroTik CRS326-24G-2S+ Bit board
+ *
+ * Copyright (C) 2020 Sartura Ltd.
+ * Author: Luka Kovacic <luka.kovacic@sartura.hr>
+ */
+
+#include "armada-xp-crs326-24g-2s.dtsi"
+
+/ {
+ model = "MikroTik CRS326-24G-2S+ Bit";
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ m25p,fast-read;
+
+ partition@u-boot {
+ reg = <0x00000000 0x001f0000>;
+ label = "u-boot";
+ };
+ partition@u-boot-env {
+ reg = <0x001f0000 0x00010000>;
+ label = "u-boot-env";
+ };
+ partition@ubi1 {
+ reg = <0x00200000 0x03f00000>;
+ label = "ubi1";
+ };
+ partition@ubi2 {
+ reg = <0x04100000 0x03f00000>;
+ label = "ubi2";
+ };
+ };
+};
diff --git a/dts/src/arm/armada-xp-crs326-24g-2s.dts b/dts/src/arm/armada-xp-crs326-24g-2s.dts
new file mode 100644
index 0000000..83aef43
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs326-24g-2s.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for MikroTik CRS326-24G-2S+ board
+ *
+ * Copyright (C) 2020 Sartura Ltd.
+ * Author: Luka Kovacic <luka.kovacic@sartura.hr>
+ */
+
+#include "armada-xp-crs326-24g-2s.dtsi"
+
+/ {
+ model = "MikroTik CRS326-24G-2S+";
+};
+
+&spi0 {
+ status = "okay";
+};
diff --git a/dts/src/arm/armada-xp-crs326-24g-2s.dtsi b/dts/src/arm/armada-xp-crs326-24g-2s.dtsi
new file mode 100644
index 0000000..f3e1a25
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs326-24g-2s.dtsi
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for CRS326-24G-2S board
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ * Copyright (C) 2020 Sartura Ltd.
+ *
+ * Based on armada-xp-db.dts
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
+ */
+
+/dts-v1/;
+#include "armada-xp-98dx3236.dtsi"
+
+/ {
+ model = "CRS326-24G-2S+";
+ compatible = "mikrotik,crs326-24g-2s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
+ };
+};
+
+&L2 {
+ arm,parity-enable;
+ marvell,ecc-enable;
+};
+
+&devbus_bootcs {
+ status = "okay";
+
+ /* Device Bus parameters are required */
+
+ /* Read parameters */
+ devbus,bus-width = <16>;
+ devbus,turn-off-ps = <60000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <124000>;
+ devbus,acc-next-ps = <248000>;
+ devbus,rd-setup-ps = <0>;
+ devbus,rd-hold-ps = <0>;
+
+ /* Write parameters */
+ devbus,sync-enable = <0>;
+ devbus,wr-high-ps = <60000>;
+ devbus,wr-low-ps = <60000>;
+ devbus,ale-wr-ps = <60000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ m25p,fast-read;
+
+ partition@u-boot {
+ reg = <0x00000000 0x001f0000>;
+ label = "u-boot";
+ };
+ partition@u-boot-env {
+ reg = <0x001f0000 0x00010000>;
+ label = "u-boot-env";
+ };
+ partition@ubi1 {
+ reg = <0x00200000 0x00e00000>;
+ label = "ubi1";
+ };
+ };
+};
diff --git a/dts/src/arm/armada-xp-crs328-4c-20s-4s-bit.dts b/dts/src/arm/armada-xp-crs328-4c-20s-4s-bit.dts
new file mode 100644
index 0000000..e05aee6
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs328-4c-20s-4s-bit.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for MikroTik CRS328-4C-20S-4S+ Bit board
+ *
+ * Copyright (C) 2020 Sartura Ltd.
+ * Author: Luka Kovacic <luka.kovacic@sartura.hr>
+ */
+
+#include "armada-xp-crs328-4c-20s-4s.dtsi"
+
+/ {
+ model = "MikroTik CRS328-4C-20S-4S+ Bit";
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ m25p,fast-read;
+
+ partition@u-boot {
+ reg = <0x00000000 0x001f0000>;
+ label = "u-boot";
+ };
+ partition@u-boot-env {
+ reg = <0x001f0000 0x00010000>;
+ label = "u-boot-env";
+ };
+ partition@ubi1 {
+ reg = <0x00200000 0x03f00000>;
+ label = "ubi1";
+ };
+ partition@ubi2 {
+ reg = <0x04100000 0x03f00000>;
+ label = "ubi2";
+ };
+ };
+};
diff --git a/dts/src/arm/armada-xp-crs328-4c-20s-4s.dts b/dts/src/arm/armada-xp-crs328-4c-20s-4s.dts
new file mode 100644
index 0000000..665757f
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs328-4c-20s-4s.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for MikroTik CRS328-4C-20S-4S+ board
+ *
+ * Copyright (C) 2020 Sartura Ltd.
+ * Author: Luka Kovacic <luka.kovacic@sartura.hr>
+ */
+
+#include "armada-xp-crs328-4c-20s-4s.dtsi"
+
+/ {
+ model = "MikroTik CRS328-4C-20S-4S+";
+};
+
+&spi0 {
+ status = "okay";
+};
diff --git a/dts/src/arm/armada-xp-crs328-4c-20s-4s.dtsi b/dts/src/arm/armada-xp-crs328-4c-20s-4s.dtsi
new file mode 100644
index 0000000..c8b1355
--- /dev/null
+++ b/dts/src/arm/armada-xp-crs328-4c-20s-4s.dtsi
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for CRS328-4C-20S-4S+ board
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ * Copyright (C) 2020 Sartura Ltd.
+ *
+ * Based on armada-xp-db.dts
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
+ */
+
+/dts-v1/;
+#include "armada-xp-98dx3236.dtsi"
+
+/ {
+ model = "CRS328-4C-20S-4S+";
+ compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
+ };
+};
+
+&L2 {
+ arm,parity-enable;
+ marvell,ecc-enable;
+};
+
+&devbus_bootcs {
+ status = "okay";
+
+ /* Device Bus parameters are required */
+
+ /* Read parameters */
+ devbus,bus-width = <16>;
+ devbus,turn-off-ps = <60000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <124000>;
+ devbus,acc-next-ps = <248000>;
+ devbus,rd-setup-ps = <0>;
+ devbus,rd-hold-ps = <0>;
+
+ /* Write parameters */
+ devbus,sync-enable = <0>;
+ devbus,wr-high-ps = <60000>;
+ devbus,wr-low-ps = <60000>;
+ devbus,ale-wr-ps = <60000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ m25p,fast-read;
+
+ partition@u-boot {
+ reg = <0x00000000 0x001f0000>;
+ label = "u-boot";
+ };
+ partition@u-boot-env {
+ reg = <0x001f0000 0x00010000>;
+ label = "u-boot-env";
+ };
+ partition@ubi1 {
+ reg = <0x00200000 0x00e00000>;
+ label = "ubi1";
+ };
+ };
+};
diff --git a/dts/src/arm/aspeed-ast2600-evb.dts b/dts/src/arm/aspeed-ast2600-evb.dts
index 8d0f465..89be131 100644
--- a/dts/src/arm/aspeed-ast2600-evb.dts
+++ b/dts/src/arm/aspeed-ast2600-evb.dts
@@ -23,6 +23,15 @@
};
};
+&mdio0 {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
&mdio1 {
status = "okay";
@@ -50,6 +59,17 @@
};
};
+&mac0 {
+ status = "okay";
+
+ phy-mode = "rgmii";
+ phy-handle = <&ethphy0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default>;
+};
+
+
&mac1 {
status = "okay";
diff --git a/dts/src/arm/aspeed-bmc-amd-ethanolx.dts b/dts/src/arm/aspeed-bmc-amd-ethanolx.dts
index 60ba86f..96ff0ae 100644
--- a/dts/src/arm/aspeed-bmc-amd-ethanolx.dts
+++ b/dts/src/arm/aspeed-bmc-amd-ethanolx.dts
@@ -13,6 +13,21 @@
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+
aliases {
serial0 = &uart1;
serial4 = &uart5;
@@ -82,6 +97,50 @@
&pinctrl_adc4_default>;
};
+&gpio {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "","","FAULT_LED","CHASSIS_ID_LED","","","","",
+ /*B0-B7*/ "","","","","","","","",
+ /*C0-C7*/ "CHASSIS_ID_BTN","INTRUDER","AC_LOSS","","","","","",
+ /*D0-D7*/ "HDT_DBREQ","LOCAL_SPI_ROM_SEL","FPGA_SPI_ROM_SEL","JTAG_MUX_S",
+ "JTAG_MUX_OE","HDT_SEL","ASERT_WARM_RST_BTN","FPGA_RSVD",
+ /*E0-E7*/ "","","MON_P0_PWR_BTN","MON_P0_RST_BTN","MON_P0_NMI_BTN",
+ "MON_P0_PWR_GOOD","MON_PWROK","MON_RESET",
+ /*F0-F7*/ "MON_P0_PROCHOT","MON_P1_PROCHOT","MON_P0_THERMTRIP",
+ "MON_P1_THERMTRIP","P0_PRESENT","P1_PRESENT","MON_ATX_PWR_OK","",
+ /*G0-G7*/ "BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0",
+ "P0_APML_ALERT","P1_APML_ALERT","FPGA ALERT","",
+ /*H0-H7*/ "BRD_ID_0","BRD_ID_1","BRD_ID_2","BRD_ID_3",
+ "PCIE_DISCONNECTED","USB_DISCONNECTED","SPARE_0","SPARE_1",
+ /*I0-I7*/ "","","","","","","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN",
+ "ASSERT_LOCAL_LOCK","ASSERT_P0_PROCHOT","ASSERT_P1_PROCHOT",
+ "ASSERT_CLR_CMOS","ASSERT_BMC_READY",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT",
+ "P0_VDD_MEM_ABCD_SUS_VRHOT","P0_VDD_MEM_EFGH_SUS_VRHOT",
+ "P1_VDD_CORE_RUN_VRHOT","P1_VDD_SOC_RUN_VRHOT",
+ "P1_VDD_MEM_ABCD_SUS_VRHOT","P1_VDD_MEM_EFGH_SUS_VRHOT",
+ /*Q0-Q7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","","","",
+ /*S0-S7*/ "","","","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","","","","","","","",
+ /*Z0-Z7*/ "","","","","","","","",
+ /*AA0-AA7*/ "","SENSOR THERM","","","","","","",
+ /*AB0-AB7*/ "","","","","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
//APML for P0
&i2c0 {
status = "okay";
@@ -139,17 +198,22 @@
&kcs1 {
status = "okay";
- kcs_addr = <0x60>;
+ aspeed,lpc-io-reg = <0x60>;
};
&kcs2 {
status = "okay";
- kcs_addr = <0x62>;
+ aspeed,lpc-io-reg = <0x62>;
+};
+
+&kcs3 {
+ status = "okay";
+ aspeed,lpc-io-reg = <0xCA2>;
};
&kcs4 {
status = "okay";
- kcs_addr = <0x97DE>;
+ aspeed,lpc-io-reg = <0x97DE>;
};
&lpc_snoop {
@@ -215,5 +279,12 @@
};
};
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+&vhub {
+ status = "okay";
+};
diff --git a/dts/src/arm/aspeed-bmc-bytedance-g220a.dts b/dts/src/arm/aspeed-bmc-bytedance-g220a.dts
new file mode 100644
index 0000000..2feb25b
--- /dev/null
+++ b/dts/src/arm/aspeed-bmc-bytedance-g220a.dts
@@ -0,0 +1,924 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2020 Bytedance.
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/leds/leds-pca955x.h>
+
+/ {
+ model = "Bytedance G220A BMC";
+ compatible = "bytedance,g220a-bmc", "aspeed,ast2500";
+
+ aliases {
+ serial4 = &uart5;
+ i2c14 = &channel_3_0;
+ i2c15 = &channel_3_1;
+ i2c16 = &channel_3_2;
+ i2c17 = &channel_3_3;
+ i2c18 = &channel_6_0;
+ i2c19 = &channel_6_1;
+ i2c20 = &channel_6_2;
+ i2c21 = &channel_6_3;
+ i2c22 = &channel_6_4;
+ i2c23 = &channel_6_5;
+ i2c24 = &channel_6_6;
+ i2c25 = &channel_6_7;
+ i2c26 = &channel_6_8;
+ i2c27 = &channel_6_9;
+ i2c28 = &channel_6_10;
+ i2c29 = &channel_6_11;
+ i2c30 = &channel_6_12;
+ i2c31 = &channel_6_13;
+ i2c32 = &channel_6_14;
+ i2c33 = &channel_6_15;
+ i2c34 = &channel_6_16;
+ i2c35 = &channel_6_17;
+ i2c36 = &channel_6_18;
+ i2c37 = &channel_6_19;
+ i2c38 = &channel_6_20;
+ i2c39 = &channel_6_21;
+ i2c40 = &channel_6_22;
+ i2c41 = &channel_6_23;
+ i2c42 = &channel_6_24;
+ i2c43 = &channel_6_25;
+ i2c44 = &channel_10_0;
+ i2c45 = &channel_10_1;
+ i2c46 = &channel_10_2;
+ i2c47 = &channel_10_3;
+ i2c48 = &channel_10_4;
+ i2c49 = &channel_10_5;
+ i2c50 = &channel_10_6;
+ i2c51 = &channel_10_7;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlyprintk";
+ };
+
+ memory@80000000 {
+ reg = <0x80000000 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ vga_memory: framebuffer@bc000000 {
+ no-map;
+ reg = <0xbc000000 0x04000000>; /* 64M */
+ };
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
+ <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
+ <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ bmc_alive {
+ label = "bmc_alive";
+ gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "timer";
+ led-pattern = <1000 1000>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ burn-in-signal {
+ label = "burn-in";
+ gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>;
+ linux,code = <ASPEED_GPIO(R, 5)>;
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <1000>;
+
+ rear-riser1-presence {
+ label = "rear-riser1-presence";
+ gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
+ linux,code = <1>;
+ };
+
+ alrt-pvddq-cpu0 {
+ label = "alrt-pvddq-cpu0";
+ gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
+ linux,code = <2>;
+ };
+
+ rear-riser0-presence {
+ label = "rear-riser0-presence";
+ gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
+ linux,code = <3>;
+ };
+
+ fault-pvddq-cpu0 {
+ label = "fault-pvddq-cpu0";
+ gpios = <&pca0 10 GPIO_ACTIVE_LOW>;
+ linux,code = <4>;
+ };
+
+ alrt-pvddq-cpu1 {
+ label = "alrt-pvddq-cpu1";
+ gpios = <&pca0 11 GPIO_ACTIVE_LOW>;
+ linux,code = <5>;
+ };
+
+ fault-pvddq-cpu1 {
+ label = "alrt-pvddq-cpu1";
+ gpios = <&pca0 12 GPIO_ACTIVE_LOW>;
+ linux,code = <6>;
+ };
+
+ fault-pvccin-cpu1 {
+ label = "fault-pvccin-cpuq";
+ gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
+ linux,code = <7>;
+ };
+
+ bmc-rom0-wp {
+ label = "bmc-rom0-wp";
+ gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
+ linux,code = <8>;
+ };
+
+ bmc-rom1-wp {
+ label = "bmc-rom1-wp";
+ gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
+ linux,code = <9>;
+ };
+
+ fan0-presence {
+ label = "fan0-presence";
+ gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
+ linux,code = <10>;
+ };
+
+ fan1-presence {
+ label = "fan1-presence";
+ gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
+ linux,code = <11>;
+ };
+
+ fan2-presence {
+ label = "fan2-presence";
+ gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
+ linux,code = <12>;
+ };
+
+ fan3-presence {
+ label = "fan3-presence";
+ gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
+ linux,code = <13>;
+ };
+
+ fan4-presence {
+ label = "fan4-presence";
+ gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
+ linux,code = <14>;
+ };
+
+ fan5-presence {
+ label = "fan5-presence";
+ gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
+ linux,code = <15>;
+ };
+
+ front-bp1-presence {
+ label = "front-bp1-presence";
+ gpios = <&pca1 8 GPIO_ACTIVE_LOW>;
+ linux,code = <16>;
+ };
+
+ rear-bp-presence {
+ label = "rear-bp-presence";
+ gpios = <&pca1 9 GPIO_ACTIVE_LOW>;
+ linux,code = <17>;
+ };
+
+ fault-pvccin-cpu0 {
+ label = "fault-pvccin-cpu0";
+ gpios = <&pca1 10 GPIO_ACTIVE_LOW>;
+ linux,code = <18>;
+ };
+
+ alrt-p1v05-pvcc {
+ label = "alrt-p1v05-pvcc1";
+ gpios = <&pca1 11 GPIO_ACTIVE_LOW>;
+ linux,code = <19>;
+ };
+
+ fault-p1v05-pvccio {
+ label = "alrt-p1v05-pvcc1";
+ gpios = <&pca1 12 GPIO_ACTIVE_LOW>;
+ linux,code = <20>;
+ };
+
+ alrt-p1v8-pvccio {
+ label = "alrt-p1v8-pvccio";
+ gpios = <&pca1 13 GPIO_ACTIVE_LOW>;
+ linux,code = <21>;
+ };
+
+ fault-p1v8-pvccio {
+ label = "fault-p1v8-pvccio";
+ gpios = <&pca1 14 GPIO_ACTIVE_LOW>;
+ linux,code = <22>;
+ };
+
+ front-bp0-presence {
+ label = "front-bp0-presence";
+ gpios = <&pca1 15 GPIO_ACTIVE_LOW>;
+ linux,code = <23>;
+ };
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ label = "bmc";
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout-64.dtsi"
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bios";
+ spi-max-frequency = <100000000>;
+ };
+};
+
+&adc {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "SMRST_OCP_N","MAC2_LINK","BMC_CPLD_SMB_RST_R_N","BMC_CPLD_GPIO0",
+ "","","","",
+ /*B0-B7*/ "BMC_INIT_R_OK","FM_BOARD_REV_ID2","FM_PROJECT_ID7","FAULT_P12V_STBY_N",
+ "","CPU0_PROCHOT_LVT3_N","","BIOS_LOAD_DEFAULT_R_N",
+ /*C0-C7*/ "","","","","","","","",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "FM_PROJECT_ID0","FM_PROJECT_ID1","FM_PROJECT_ID2","FM_PROJECT_ID3",
+ "FM_PROJECT_ID4","FM_PROJECT_ID5","","",
+ /*F0-F7*/ "PSU0_PRSNT_N","PSU1_PRSNT_N","","FAULT_P12V_NVME_N",
+ "BIOS_DEBUG_MODE_R_N","DISABLE_CPU_DDR_R_SPD","COOLING_STRATEGY",
+ "PCH_GLB_RST_N",
+ /*G0-G7*/ "P12V_PMBUS_ALERT_N","CPLD_ALERT_N","BMC_RELOAD_N",
+ "P12V_PVDDQ_PMBUS_ALERT_N","BMC_JTAG_TCK_MUX_R_SEL","","NMI_OUT",
+ "NMI_BUTTON",
+ /*H0-H7*/ "BMC_CPLD_JTAG_TDI","BMC_CPLD_JTAG_TDO","BMC_CPLD_JTAG_TCK",
+ "BMC_CPLD_JTAG_TMS","FM_PROJECT_ID6","FM_BOARD_REV_ID0",
+ "PCA9546_U70_RST_N","IRQ_SML0_ALERT_N",
+ /*I0-I7*/ "FAULT_FRONT_RISER_P12V_N","FAULT_OCP_P12V_N","FM_BMC_PCH_SCI_R_N",
+ "","","","","",
+ /*J0-J7*/ "FM_CPU0_SKTOCC_N","FM_CPU1_SKTOCC_N","FM_CPU1_DISABLE_COD_N",
+ "","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "P12V_FAULT_N","PWRGD_P12V_PCIE_RISER","","LEAKAGE_DETECT_INPUT_N",
+ "","IRQ_SML1_PMBUS_ALERT_N","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","FM_PCH_THERMTRIP_N","CHASSIS_INTRUSION",
+ /*R0-R7*/ "","PVCCIN_CPU1_SMBALERT_N","BMC_PREQ_R_N","FAULT_P12V_PCIE_RISER_N",
+ "ALT_P12V_PCIE_RISER_N","BURN_BOARD_N","PVCCIN_CPU0_SMBALERT_N","",
+ /*S0-S7*/ "BMC_PRDY_N","SIO_POWER_GOOD","FM_BMC_PWR_DEBUG_R_N",
+ "FM_BMC_XDP_DEBUG_EN","","STRAP_BMC_BATTERY_GPIOS5","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "","PWRGD_PSU0_PWROK","CPU1_PROCHOT_LVT3_N","IRQ_BMC_PCH_SMI_LPC_N",
+ "","","","",
+ /*Z0-Z7*/ "XDP_PRSNT_N","BMC_XDP_SYS_PWROK","BMC_XDP_JTAG_SEL",
+ "PCH_BMC_SMI_ACTIVE_R_N","","","","",
+ /*AA0-AA7*/ "PWRGD_P12V_STBY_OCP","PS_PWROK","RST_PLTRST_BMC_R_N","HDA_SDO_R",
+ "FM_SLPS4_R_N","PWRGD_PSU1_PWROK","POWER_BUTTON","POWER_OUT",
+ /*AB0-AB7*/ "","RESET_OUT","SPI_BIOS_MODE_SELECT","POST_COMPLETE","","","","",
+ /*AC0-AC7*/ "","","","","","","","CPLD_PLTRST_B_N";
+};
+
+&kcs3 {
+ aspeed,lpc-io-reg = <0xCA2>;
+ status = "okay";
+};
+
+&kcs4 {
+ aspeed,lpc-io-reg = <0xCA4>;
+ status = "okay";
+};
+
+&lpc_snoop {
+ snoop-ports = <0x80>;
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default
+ &pinctrl_nrts1_default
+ &pinctrl_ndtr1_default
+ &pinctrl_ndsr1_default
+ &pinctrl_ncts1_default
+ &pinctrl_ndcd1_default
+ &pinctrl_nri1_default>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd2_default
+ &pinctrl_rxd2_default
+ &pinctrl_nrts2_default
+ &pinctrl_ndtr2_default
+ &pinctrl_ndsr2_default
+ &pinctrl_ncts2_default
+ &pinctrl_ndcd2_default
+ &pinctrl_nri2_default>;
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&mac0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
+ <&syscon ASPEED_CLK_MAC1RCLK>;
+ clock-names = "MACCLK", "RCLK";
+ use-ncsi;
+};
+
+&mac1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+ i2c-switch@70 {
+ compatible = "nxp,pca9546";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ channel_3_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ channel_3_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ channel_3_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ channel_3_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c4 {
+ status = "okay";
+
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+ i2c-switch@72 {
+ compatible = "nxp,pca9548";
+ reg = <0x72>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_6_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ channel_6_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ channel_6_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ channel_6_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ channel_6_4: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ channel_6_5: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ channel_6_6: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ channel_6_7: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
+
+ i2c-switch@70 {
+ compatible = "nxp,pca9546";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_6_8: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_6_12: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ };
+
+ channel_6_13: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ channel_6_14: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ channel_6_15: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+ };
+
+ channel_6_9: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_6_16: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ };
+
+ channel_6_17: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ channel_6_18: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ channel_6_19: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+ };
+
+ channel_6_10: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_6_20: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ channel_6_21: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ channel_6_22: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ channel_6_23: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+ };
+
+ channel_6_11: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_6_24: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ channel_6_25: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+ };
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+ pca0:pca9555@24 {
+ compatible = "nxp,pca9555";
+ reg = <0x24>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ pca1:pca9555@25 {
+ compatible = "nxp,pca9555";
+ reg = <0x25>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+};
+
+&i2c9 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+ i2c-switch@70 {
+ compatible = "nxp,pca9546";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_10_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ channel_10_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ channel_10_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ channel_10_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+
+ i2c-switch@71 {
+ compatible = "nxp,pca9546";
+ reg = <0x71>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel_10_4: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ channel_10_5: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ channel_10_6: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ channel_10_7: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&i2c13 {
+ status = "okay";
+};
+
+&pwm_tacho {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
+ &pinctrl_pwm2_default &pinctrl_pwm3_default
+ &pinctrl_pwm4_default &pinctrl_pwm5_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
+ };
+ fan@2 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
+ };
+ fan@3 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
+ };
+ fan@4 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
+ };
+ fan@5 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
+ };
+};
+
+&gpio {
+ pin_gpio_i3 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "NCSI_BMC_R_SEL";
+ };
+
+ pin_gpio_b6 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(B, 6) GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "EN_NCSI_SWITCH_N";
+ };
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
+};
diff --git a/dts/src/arm/aspeed-bmc-facebook-galaxy100.dts b/dts/src/arm/aspeed-bmc-facebook-galaxy100.dts
new file mode 100644
index 0000000..dcf2134
--- /dev/null
+++ b/dts/src/arm/aspeed-bmc-facebook-galaxy100.dts
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2020 Facebook Inc.
+/dts-v1/;
+
+#include "ast2400-facebook-netbmc-common.dtsi"
+
+/ {
+ model = "Facebook Galaxy 100 BMC";
+ compatible = "facebook,galaxy100-bmc", "aspeed,ast2400";
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
+ };
+
+ ast-adc-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 3>, <&adc 4>, <&adc 8>, <&adc 9>;
+ };
+};
+
+&wdt2 {
+ status = "okay";
+ aspeed,reset-type = "system";
+};
+
+&fmc {
+ flash@1 {
+ status = "okay";
+ m25p,fast-read;
+ label = "spi0.1";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ flash1@0 {
+ reg = <0x0 0x2000000>;
+ label = "flash1";
+ };
+ };
+ };
+};
+
+
+&i2c9 {
+ status = "okay";
+};
+
+&vhub {
+ status = "okay";
+};
+
+&adc {
+ status = "okay";
+};
diff --git a/dts/src/arm/aspeed-bmc-facebook-minipack.dts b/dts/src/arm/aspeed-bmc-facebook-minipack.dts
index c34741d..9eb23e8 100644
--- a/dts/src/arm/aspeed-bmc-facebook-minipack.dts
+++ b/dts/src/arm/aspeed-bmc-facebook-minipack.dts
@@ -70,6 +70,162 @@
i2c45 = &imux45;
i2c46 = &imux46;
i2c47 = &imux47;
+
+ /*
+ * I2C Switch 24-0071 (channel #0 of 8-0070): 8 channels for
+ * connecting to left PDB (Power Distribution Board).
+ */
+ i2c48 = &imux48;
+ i2c49 = &imux49;
+ i2c50 = &imux50;
+ i2c51 = &imux51;
+ i2c52 = &imux52;
+ i2c53 = &imux53;
+ i2c54 = &imux54;
+ i2c55 = &imux55;
+
+ /*
+ * I2C Switch 25-0072 (channel #1 of 8-0070): 8 channels for
+ * connecting to right PDB (Power Distribution Board).
+ */
+ i2c56 = &imux56;
+ i2c57 = &imux57;
+ i2c58 = &imux58;
+ i2c59 = &imux59;
+ i2c60 = &imux60;
+ i2c61 = &imux61;
+ i2c62 = &imux62;
+ i2c63 = &imux63;
+
+ /*
+ * I2C Switch 26-0076 (channel #2 of 8-0070): 8 channels for
+ * connecting to top FCM (Fan Control Module).
+ */
+ i2c64 = &imux64;
+ i2c65 = &imux65;
+ i2c66 = &imux66;
+ i2c67 = &imux67;
+ i2c68 = &imux68;
+ i2c69 = &imux69;
+ i2c70 = &imux70;
+ i2c71 = &imux71;
+
+ /*
+ * I2C Switch 27-0076 (channel #3 of 8-0070): 8 channels for
+ * connecting to bottom FCM (Fan Control Module).
+ */
+ i2c72 = &imux72;
+ i2c73 = &imux73;
+ i2c74 = &imux74;
+ i2c75 = &imux75;
+ i2c76 = &imux76;
+ i2c77 = &imux77;
+ i2c78 = &imux78;
+ i2c79 = &imux79;
+
+ /*
+ * I2C Switch 40-0073 (channel #0 of 11-0070): connecting
+ * to PIM (Port Interface Module) #1 (1-based).
+ */
+ i2c80 = &imux80;
+ i2c81 = &imux81;
+ i2c82 = &imux82;
+ i2c83 = &imux83;
+ i2c84 = &imux84;
+ i2c85 = &imux85;
+ i2c86 = &imux86;
+ i2c87 = &imux87;
+
+ /*
+ * I2C Switch 41-0073 (channel #1 of 11-0070): connecting
+ * to PIM (Port Interface Module) #2 (1-based).
+ */
+ i2c88 = &imux88;
+ i2c89 = &imux89;
+ i2c90 = &imux90;
+ i2c91 = &imux91;
+ i2c92 = &imux92;
+ i2c93 = &imux93;
+ i2c94 = &imux94;
+ i2c95 = &imux95;
+
+ /*
+ * I2C Switch 42-0073 (channel #2 of 11-0070): connecting
+ * to PIM (Port Interface Module) #3 (1-based).
+ */
+ i2c96 = &imux96;
+ i2c97 = &imux97;
+ i2c98 = &imux98;
+ i2c99 = &imux99;
+ i2c100 = &imux100;
+ i2c101 = &imux101;
+ i2c102 = &imux102;
+ i2c103 = &imux103;
+
+ /*
+ * I2C Switch 43-0073 (channel #3 of 11-0070): connecting
+ * to PIM (Port Interface Module) #4 (1-based).
+ */
+ i2c104 = &imux104;
+ i2c105 = &imux105;
+ i2c106 = &imux106;
+ i2c107 = &imux107;
+ i2c108 = &imux108;
+ i2c109 = &imux109;
+ i2c110 = &imux110;
+ i2c111 = &imux111;
+
+ /*
+ * I2C Switch 44-0073 (channel #4 of 11-0070): connecting
+ * to PIM (Port Interface Module) #5 (1-based).
+ */
+ i2c112 = &imux112;
+ i2c113 = &imux113;
+ i2c114 = &imux114;
+ i2c115 = &imux115;
+ i2c116 = &imux116;
+ i2c117 = &imux117;
+ i2c118 = &imux118;
+ i2c119 = &imux119;
+
+ /*
+ * I2C Switch 45-0073 (channel #5 of 11-0070): connecting
+ * to PIM (Port Interface Module) #6 (1-based).
+ */
+ i2c120 = &imux120;
+ i2c121 = &imux121;
+ i2c122 = &imux122;
+ i2c123 = &imux123;
+ i2c124 = &imux124;
+ i2c125 = &imux125;
+ i2c126 = &imux126;
+ i2c127 = &imux127;
+
+ /*
+ * I2C Switch 46-0073 (channel #6 of 11-0070): connecting
+ * to PIM (Port Interface Module) #7 (1-based).
+ */
+ i2c128 = &imux128;
+ i2c129 = &imux129;
+ i2c130 = &imux130;
+ i2c131 = &imux131;
+ i2c132 = &imux132;
+ i2c133 = &imux133;
+ i2c134 = &imux134;
+ i2c135 = &imux135;
+
+ /*
+ * I2C Switch 47-0073 (channel #7 of 11-0070): connecting
+ * to PIM (Port Interface Module) #8 (1-based).
+ */
+ i2c136 = &imux136;
+ i2c137 = &imux137;
+ i2c138 = &imux138;
+ i2c139 = &imux139;
+ i2c140 = &imux140;
+ i2c141 = &imux141;
+ i2c142 = &imux142;
+ i2c143 = &imux143;
};
chosen {
@@ -184,11 +340,16 @@
&i2c2 {
status = "okay";
+ /*
+ * I2C Switch 2-0070 is connecting to SCM (System Controller
+ * Module).
+ */
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
+ i2c-mux-idle-disconnect;
imux16: i2c@0 {
#address-cells = <1>;
@@ -269,29 +430,270 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
+ i2c-mux-idle-disconnect;
+ /*
+ * I2C Switch 8-0070 channel #0: connecting to left PDB
+ * (Power Distribution Board).
+ */
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
+
+ i2c-switch@71 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+ i2c-mux-idle-disconnect;
+
+ imux48: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux49: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux50: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux51: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux52: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux53: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux54: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux55: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 8-0070 channel #1: connecting to right PDB
+ * (Power Distribution Board).
+ */
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+
+ i2c-switch@72 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72>;
+ i2c-mux-idle-disconnect;
+
+ imux56: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux57: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux58: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux59: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux60: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux61: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux62: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux63: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 8-0070 channel #2: connecting to top FCM
+ * (Fan Control Module).
+ */
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
+
+ i2c-switch@76 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x76>;
+ i2c-mux-idle-disconnect;
+
+ imux64: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux65: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux66: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux67: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux68: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux69: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux70: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux71: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 8-0070 channel #3: connecting to bottom
+ * FCM (Fan Control Module).
+ */
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
+
+ i2c-switch@76 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x76>;
+ i2c-mux-idle-disconnect;
+
+ imux72: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux73: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux74: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux75: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux76: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux77: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux78: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux79: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
imux28: i2c@4 {
@@ -323,11 +725,16 @@
&i2c9 {
status = "okay";
+ /*
+ * I2C Switch 9-0070 is connecting to MAC/PHY EEPROMs on SMB
+ * (Switch Main Board).
+ */
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
+ i2c-mux-idle-disconnect;
imux32: i2c@0 {
#address-cells = <1>;
@@ -391,53 +798,534 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
+ i2c-mux-idle-disconnect;
+ /*
+ * I2C Switch 11-0070 channel #0: connecting to PIM
+ * (Port Interface Module) #1 (1-based).
+ */
imux40: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux80: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux81: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux82: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux83: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux84: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux85: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux86: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux87: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 11-0070 channel #1: connecting to PIM
+ * (Port Interface Module) #2 (1-based).
+ */
imux41: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux88: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux89: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux90: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux91: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux92: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux93: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux94: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux95: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 11-0070 channel #2: connecting to PIM
+ * (Port Interface Module) #3 (1-based).
+ */
imux42: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux96: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux97: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux98: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux99: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux100: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux101: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux102: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux103: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 11-0070 channel #3: connecting to PIM
+ * (Port Interface Module) #4 (1-based).
+ */
imux43: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux104: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux105: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux106: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux107: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux108: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux109: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux110: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux111: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 11-0070 channel #4: connecting to PIM
+ * (Port Interface Module) #5 (1-based).
+ */
imux44: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux112: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux113: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux114: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux115: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux116: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux117: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux118: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux119: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 11-0070 channel #5: connecting to PIM
+ * (Port Interface Module) #6 (1-based).
+ */
imux45: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux120: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux121: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux122: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux123: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux124: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux125: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux126: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux127: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 11-0070 channel #6: connecting to PIM
+ * (Port Interface Module) #7 (1-based).
+ */
imux46: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux128: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux129: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux130: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux131: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux132: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux133: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux134: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux135: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
+ /*
+ * I2C Switch 11-0070 channel #7: connecting to PIM
+ * (Port Interface Module) #8 (1-based).
+ */
imux47: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
+
+ i2c-switch@73 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+ i2c-mux-idle-disconnect;
+
+ imux136: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux137: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux138: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux139: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ imux140: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ imux141: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ imux142: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ imux143: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
};
};
};
diff --git a/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts b/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts
index 2d44d9a..cd18641 100644
--- a/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts
+++ b/dts/src/arm/aspeed-bmc-facebook-tiogapass.dts
@@ -82,11 +82,6 @@
status = "okay";
};
-&vuart {
- // VUART Host Console
- status = "okay";
-};
-
&uart1 {
// Host Console
status = "okay";
@@ -196,6 +191,14 @@
use-ncsi;
};
+&mac1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii2_default>;
+ use-ncsi;
+};
+
&adc {
status = "okay";
};
diff --git a/dts/src/arm/aspeed-bmc-facebook-wedge100.dts b/dts/src/arm/aspeed-bmc-facebook-wedge100.dts
index 322587b..39c6be9 100644
--- a/dts/src/arm/aspeed-bmc-facebook-wedge100.dts
+++ b/dts/src/arm/aspeed-bmc-facebook-wedge100.dts
@@ -2,36 +2,16 @@
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
-#include "aspeed-g4.dtsi"
+#include "ast2400-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Wedge 100 BMC";
compatible = "facebook,wedge100-bmc", "aspeed,ast2400";
- aliases {
- /*
- * Override the default uart aliases to avoid breaking
- * the legacy applications.
- */
- serial0 = &uart5;
- serial1 = &uart1;
- serial2 = &uart3;
- serial3 = &uart4;
- };
-
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS2,9600n8 root=/dev/ram rw";
};
-
- memory@40000000 {
- reg = <0x40000000 0x20000000>;
- };
-};
-
-&wdt1 {
- status = "okay";
- aspeed,reset-type = "system";
};
&wdt2 {
@@ -40,108 +20,38 @@
};
&fmc {
- status = "okay";
- flash@0 {
+ flash@1 {
status = "okay";
m25p,fast-read;
- label = "fmc0";
-#include "facebook-bmc-flash-layout.dtsi"
+ label = "spi0.1";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ flash1@0 {
+ reg = <0x0 0x2000000>;
+ label = "flash1";
+ };
+ };
};
};
-&uart1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_txd1_default
- &pinctrl_rxd1_default>;
-};
-
-&uart3 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_txd3_default
- &pinctrl_rxd3_default>;
-};
-
-&uart4 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_txd4_default
- &pinctrl_rxd4_default>;
-};
-
-&uart5 {
- status = "okay";
-};
-
-&mac1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
-};
-
-&i2c0 {
- status = "okay";
-};
-
-&i2c1 {
- status = "okay";
-};
-
-&i2c2 {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
-};
-
-&i2c4 {
- status = "okay";
-};
-
-&i2c5 {
- status = "okay";
-};
-
-&i2c6 {
- status = "okay";
-};
-
&i2c7 {
- status = "okay";
-
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
+ i2c-mux-idle-disconnect;
};
};
-&i2c8 {
- status = "okay";
-};
-
&i2c9 {
status = "okay";
};
-&i2c10 {
- status = "okay";
-};
-
-&i2c11 {
- status = "okay";
-};
-
-&i2c12 {
- status = "okay";
-};
-
-&i2c13 {
- status = "okay";
-};
&vhub {
status = "okay";
diff --git a/dts/src/arm/aspeed-bmc-facebook-wedge40.dts b/dts/src/arm/aspeed-bmc-facebook-wedge40.dts
index 8c426ba..2dcfeae 100644
--- a/dts/src/arm/aspeed-bmc-facebook-wedge40.dts
+++ b/dts/src/arm/aspeed-bmc-facebook-wedge40.dts
@@ -2,137 +2,27 @@
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
-#include "aspeed-g4.dtsi"
+#include "ast2400-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Wedge 40 BMC";
compatible = "facebook,wedge40-bmc", "aspeed,ast2400";
- aliases {
- /*
- * Override the default uart aliases to avoid breaking
- * the legacy applications.
- */
- serial0 = &uart5;
- serial1 = &uart1;
- serial2 = &uart3;
- serial3 = &uart4;
- };
-
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS2,9600n8 root=/dev/ram rw";
};
- memory@40000000 {
- reg = <0x40000000 0x20000000>;
- };
-
ast-adc-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>;
};
};
-&wdt1 {
- status = "okay";
- aspeed,reset-type = "system";
-};
-
&wdt2 {
status = "disabled";
};
-&fmc {
- status = "okay";
- flash@0 {
- status = "okay";
- m25p,fast-read;
- label = "spi0.0";
-#include "facebook-bmc-flash-layout.dtsi"
- };
-};
-
-&uart1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_txd1_default
- &pinctrl_rxd1_default>;
-};
-
-&uart3 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_txd3_default
- &pinctrl_rxd3_default>;
-};
-
-&uart4 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_txd4_default
- &pinctrl_rxd4_default
- &pinctrl_ndts4_default>;
-};
-
-&uart5 {
- status = "okay";
-};
-
-&mac1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
-};
-
-&i2c0 {
- status = "okay";
-};
-
-&i2c1 {
- status = "okay";
-};
-
-&i2c2 {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
-};
-
-&i2c4 {
- status = "okay";
-};
-
-&i2c5 {
- status = "okay";
-};
-
-&i2c6 {
- status = "okay";
-};
-
-&i2c7 {
- status = "okay";
-};
-
-&i2c8 {
- status = "okay";
-};
-
-&i2c11 {
- status = "okay";
-};
-
-&i2c12 {
- status = "okay";
-};
-
-&vhub {
- status = "okay";
-};
-
&adc {
status = "okay";
};
diff --git a/dts/src/arm/aspeed-bmc-facebook-wedge400.dts b/dts/src/arm/aspeed-bmc-facebook-wedge400.dts
index ad1fcad..63a3dd5 100644
--- a/dts/src/arm/aspeed-bmc-facebook-wedge400.dts
+++ b/dts/src/arm/aspeed-bmc-facebook-wedge400.dts
@@ -124,8 +124,8 @@
* "data0" partition (4MB) is reserved for persistent
* data store.
*/
- data0@3800000 {
- reg = <0x7c00000 0x800000>;
+ data0@7c00000 {
+ reg = <0x7c00000 0x400000>;
label = "data0";
};
diff --git a/dts/src/arm/aspeed-bmc-ibm-rainier-4u.dts b/dts/src/arm/aspeed-bmc-ibm-rainier-4u.dts
new file mode 100644
index 0000000..291f7d6
--- /dev/null
+++ b/dts/src/arm/aspeed-bmc-ibm-rainier-4u.dts
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2020 IBM Corp.
+/dts-v1/;
+
+#include "aspeed-bmc-ibm-rainier.dts"
+
+/ {
+ model = "Rainier 4U";
+};
+
+&i2c3 {
+ power-supply@6a {
+ compatible = "ibm,cffps";
+ reg = <0x6a>;
+ };
+
+ power-supply@6b {
+ compatible = "ibm,cffps";
+ reg = <0x6b>;
+ };
+};
+
+&fan0 {
+ tach-pulses = <4>;
+};
+
+&fan1 {
+ tach-pulses = <4>;
+};
+
+&fan2 {
+ tach-pulses = <4>;
+};
+
+&fan3 {
+ tach-pulses = <4>;
+};
diff --git a/dts/src/arm/aspeed-bmc-ibm-rainier.dts b/dts/src/arm/aspeed-bmc-ibm-rainier.dts
index 21ae880..a4b77ae 100644
--- a/dts/src/arm/aspeed-bmc-ibm-rainier.dts
+++ b/dts/src/arm/aspeed-bmc-ibm-rainier.dts
@@ -8,7 +8,7 @@
#include <dt-bindings/leds/leds-pca955x.h>
/ {
- model = "Rainier";
+ model = "Rainier 2U";
compatible = "ibm,rainier-bmc", "aspeed,ast2600";
aliases {
@@ -47,9 +47,18 @@
#size-cells = <1>;
ranges;
- flash_memory: region@B8000000 {
+ flash_memory: region@b8000000 {
no-map;
- reg = <0xB8000000 0x04000000>; /* 64M */
+ reg = <0xb8000000 0x04000000>; /* 64M */
+ };
+
+ ramoops@bc000000 {
+ compatible = "ramoops";
+ reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ pmsg-size = <0x8000>;
+ max-reason = <3>; /* KMSG_DUMP_EMERG */
};
vga_memory: region@bf000000 {
@@ -258,6 +267,7 @@
cfam0_spi2: spi@40 {
reg = <0x40>;
+ compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
@@ -274,6 +284,7 @@
cfam0_spi3: spi@60 {
reg = <0x60>;
+ compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
@@ -370,6 +381,7 @@
cfam1_spi2: spi@40 {
reg = <0x40>;
+ compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
@@ -386,6 +398,7 @@
cfam1_spi3: spi@60 {
reg = <0x60>;
+ compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
@@ -480,6 +493,7 @@
cfam2_spi2: spi@40 {
reg = <0x40>;
+ compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
@@ -496,6 +510,7 @@
cfam2_spi3: spi@60 {
reg = <0x60>;
+ compatible = "ibm,fsi2spi-restricted";
#address-cells = <1>;
#size-cells = <0>;
@@ -594,16 +609,6 @@
compatible = "ibm,cffps";
reg = <0x69>;
};
-
- power-supply@6a {
- compatible = "ibm,cffps";
- reg = <0x6a>;
- };
-
- power-supply@6b {
- compatible = "ibm,cffps";
- reg = <0x6b>;
- };
};
&i2c4 {
@@ -723,25 +728,25 @@
#address-cells = <1>;
#size-cells = <0>;
- fan@0 {
+ fan0: fan@0 {
compatible = "pmbus-fan";
reg = <0>;
tach-pulses = <2>;
};
- fan@1 {
+ fan1: fan@1 {
compatible = "pmbus-fan";
reg = <1>;
tach-pulses = <2>;
};
- fan@2 {
+ fan2: fan@2 {
compatible = "pmbus-fan";
reg = <2>;
tach-pulses = <2>;
};
- fan@3 {
+ fan3: fan@3 {
compatible = "pmbus-fan";
reg = <3>;
tach-pulses = <2>;
diff --git a/dts/src/arm/aspeed-bmc-intel-s2600wf.dts b/dts/src/arm/aspeed-bmc-intel-s2600wf.dts
index 1deb30e..6e9baf3 100644
--- a/dts/src/arm/aspeed-bmc-intel-s2600wf.dts
+++ b/dts/src/arm/aspeed-bmc-intel-s2600wf.dts
@@ -22,9 +22,9 @@
#size-cells = <1>;
ranges;
- vga_memory: framebuffer@7f000000 {
+ vga_memory: framebuffer@9f000000 {
no-map;
- reg = <0x7f000000 0x01000000>;
+ reg = <0x9f000000 0x01000000>; /* 16M */
};
};
diff --git a/dts/src/arm/aspeed-bmc-opp-tacoma.dts b/dts/src/arm/aspeed-bmc-opp-tacoma.dts
index 4d070d6..c1478d2 100644
--- a/dts/src/arm/aspeed-bmc-opp-tacoma.dts
+++ b/dts/src/arm/aspeed-bmc-opp-tacoma.dts
@@ -26,11 +26,20 @@
#size-cells = <1>;
ranges;
- flash_memory: region@ba000000 {
+ flash_memory: region@b8000000 {
no-map;
reg = <0xb8000000 0x4000000>; /* 64M */
};
+ ramoops@bc000000 {
+ compatible = "ramoops";
+ reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ pmsg-size = <0x8000>;
+ max-reason = <3>; /* KMSG_DUMP_EMERG */
+ };
+
vga_memory: region@bf000000 {
no-map;
compatible = "shared-dma-pool";
diff --git a/dts/src/arm/aspeed-g4.dtsi b/dts/src/arm/aspeed-g4.dtsi
index 82f0213..b3dafbc 100644
--- a/dts/src/arm/aspeed-g4.dtsi
+++ b/dts/src/arm/aspeed-g4.dtsi
@@ -192,6 +192,11 @@
status = "disabled";
};
+ silicon-id@7c {
+ compatible = "aspeed,ast2400-silicon-id", "aspeed,silicon-id";
+ reg = <0x7c 0x4>;
+ };
+
pinctrl: pinctrl@80 {
reg = <0x80 0x18>, <0xa0 0x10>;
compatible = "aspeed,ast2400-pinctrl";
diff --git a/dts/src/arm/aspeed-g5.dtsi b/dts/src/arm/aspeed-g5.dtsi
index a93009a..5bc0de0 100644
--- a/dts/src/arm/aspeed-g5.dtsi
+++ b/dts/src/arm/aspeed-g5.dtsi
@@ -239,6 +239,11 @@
status = "disabled";
};
+ silicon-id@7c {
+ compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
+ reg = <0x7c 0x4 0x150 0x8>;
+ };
+
pinctrl: pinctrl@80 {
compatible = "aspeed,ast2500-pinctrl";
reg = <0x80 0x18>, <0xa0 0x10>;
diff --git a/dts/src/arm/aspeed-g6.dtsi b/dts/src/arm/aspeed-g6.dtsi
index b58220a..810b067 100644
--- a/dts/src/arm/aspeed-g6.dtsi
+++ b/dts/src/arm/aspeed-g6.dtsi
@@ -69,6 +69,12 @@
always-on;
};
+ edac: sdram@1e6e0000 {
+ compatible = "aspeed,ast2600-sdram-edac", "syscon";
+ reg = <0x1e6e0000 0x174>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -311,6 +317,11 @@
compatible = "aspeed,ast2600-pinctrl";
};
+ silicon-id@14 {
+ compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
+ reg = <0x14 0x4 0x5b0 0x8>;
+ };
+
smp-memram@180 {
compatible = "aspeed,ast2600-smpmem";
reg = <0x180 0x40>;
@@ -357,7 +368,7 @@
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2600-gpio";
- reg = <0x1e780000 0x800>;
+ reg = <0x1e780000 0x400>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 0 208>;
ngpios = <208>;
diff --git a/dts/src/arm/ast2400-facebook-netbmc-common.dtsi b/dts/src/arm/ast2400-facebook-netbmc-common.dtsi
new file mode 100644
index 0000000..73a5503
--- /dev/null
+++ b/dts/src/arm/ast2400-facebook-netbmc-common.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2020 Facebook Inc.
+/dts-v1/;
+
+#include "aspeed-g4.dtsi"
+
+/ {
+ aliases {
+ /*
+ * Override the default uart aliases to avoid breaking
+ * the legacy applications.
+ */
+ serial0 = &uart5;
+ serial1 = &uart1;
+ serial2 = &uart3;
+ serial3 = &uart4;
+ };
+
+ memory@40000000 {
+ reg = <0x40000000 0x20000000>;
+ };
+};
+
+&wdt1 {
+ status = "okay";
+ aspeed,reset-type = "system";
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "spi0.0";
+#include "facebook-bmc-flash-layout.dtsi"
+ };
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd3_default
+ &pinctrl_rxd3_default>;
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd4_default
+ &pinctrl_rxd4_default
+ &pinctrl_ndts4_default>;
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&mac1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&vhub {
+ status = "okay";
+};
diff --git a/dts/src/arm/at91-kizbox.dts b/dts/src/arm/at91-kizbox.dts
index 7add151..3b8812f 100644
--- a/dts/src/arm/at91-kizbox.dts
+++ b/dts/src/arm/at91-kizbox.dts
@@ -48,48 +48,37 @@
};
};
- pwm_leds {
+ led-controller {
compatible = "pwm-leds";
- network_green {
+ led-1 {
label = "pwm:green:network";
- pwms = <&tcb_pwm 2 10000000 PWM_POLARITY_INVERTED>;
+ pwms = <&tcb1_pwm1 0 10000000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
linux,default-trigger = "default-on";
};
- network_red {
+ led-2 {
label = "pwm:red:network";
- pwms = <&tcb_pwm 4 10000000 PWM_POLARITY_INVERTED>;
+ pwms = <&tcb1_pwm2 0 10000000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
linux,default-trigger = "default-on";
};
- user_green {
+ led-3 {
label = "pwm:green:user";
- pwms = <&tcb_pwm 0 10000000 PWM_POLARITY_INVERTED>;
+ pwms = <&tcb1_pwm0 0 10000000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
linux,default-trigger = "default-on";
};
- user_red {
+ led-4 {
label = "pwm:red:user";
- pwms = <&tcb_pwm 1 10000000 PWM_POLARITY_INVERTED>;
+ pwms = <&tcb1_pwm0 1 10000000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
linux,default-trigger = "default-on";
};
};
-
- tcb_pwm: pwm {
- compatible = "atmel,tcb-pwm";
- #pwm-cells = <3>;
- tc-block = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_tcb1_tioa0
- &pinctrl_tcb1_tioa1
- &pinctrl_tcb1_tioa2
- &pinctrl_tcb1_tiob0>;
- };
};
&tcb0 {
@@ -104,6 +93,32 @@
};
};
+&tcb1 {
+ tcb1_pwm0: pwm@0 {
+ compatible = "atmel,tcb-pwm";
+ reg = <0>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tcb1_tioa0 &pinctrl_tcb1_tiob0>;
+ };
+
+ tcb1_pwm1: pwm@1 {
+ compatible = "atmel,tcb-pwm";
+ reg = <1>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tcb1_tioa1>;
+ };
+
+ tcb1_pwm2: pwm@2 {
+ compatible = "atmel,tcb-pwm";
+ reg = <2>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tcb1_tioa2>;
+ };
+};
+
&ebi {
status = "okay";
};
diff --git a/dts/src/arm/at91-kizbox2-common.dtsi b/dts/src/arm/at91-kizbox2-common.dtsi
index 25f7610..c08834d 100644
--- a/dts/src/arm/at91-kizbox2-common.dtsi
+++ b/dts/src/arm/at91-kizbox2-common.dtsi
@@ -58,24 +58,24 @@
};
};
- pwm_leds {
+ led-controller {
compatible = "pwm-leds";
- blue {
+ led-1 {
label = "pwm:blue:user";
pwms = <&pwm0 2 10000000 0>;
max-brightness = <255>;
linux,default-trigger = "none";
};
- green {
+ led-2 {
label = "pwm:green:user";
pwms = <&pwm0 1 10000000 0>;
max-brightness = <255>;
linux,default-trigger = "default-on";
};
- red {
+ led-3 {
label = "pwm:red:user";
pwms = <&pwm0 0 10000000 0>;
max-brightness = <255>;
diff --git a/dts/src/arm/at91-kizbox3-hs.dts b/dts/src/arm/at91-kizbox3-hs.dts
index 0da1f05..2799b2a 100644
--- a/dts/src/arm/at91-kizbox3-hs.dts
+++ b/dts/src/arm/at91-kizbox3-hs.dts
@@ -15,40 +15,40 @@
model = "Overkiz KIZBOX3-HS";
compatible = "overkiz,kizbox3-hs", "atmel,sama5d2", "atmel,sama5";
- pwm_leds {
+ led-controller-1 {
status = "okay";
- red {
+ led-1 {
status = "okay";
};
- green {
+ led-2 {
status = "okay";
};
- blue {
+ led-3 {
status = "okay";
};
- white {
+ led-4 {
status = "okay";
};
};
- leds {
+ led-controller-2 {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led_red
&pinctrl_led_white>;
status = "okay";
- red {
+ led-5 {
label = "pio:red:user";
gpios = <&pioA PIN_PB1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
- white {
+ led-6 {
label = "pio:white:user";
gpios = <&pioA PIN_PB8 GPIO_ACTIVE_HIGH>;
default-state = "off";
diff --git a/dts/src/arm/at91-kizbox3_common.dtsi b/dts/src/arm/at91-kizbox3_common.dtsi
index 7c3076e..9ce513d 100644
--- a/dts/src/arm/at91-kizbox3_common.dtsi
+++ b/dts/src/arm/at91-kizbox3_common.dtsi
@@ -62,7 +62,7 @@
regulator-always-on;
};
- pwm_leds {
+ led-controller-1 {
compatible = "pwm-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm_h0
@@ -71,7 +71,7 @@
&pinctrl_pwm0_pwm_h3>;
status = "disabled";
- red {
+ led-1 {
label = "pwm:red:user";
pwms = <&pwm0 0 10000000 0>;
max-brightness = <255>;
@@ -79,7 +79,7 @@
status = "disabled";
};
- green {
+ led-2 {
label = "pwm:green:user";
pwms = <&pwm0 1 10000000 0>;
max-brightness = <255>;
@@ -87,14 +87,14 @@
status = "disabled";
};
- blue {
+ led-3 {
label = "pwm:blue:user";
pwms = <&pwm0 2 10000000 0>;
max-brightness = <255>;
status = "disabled";
};
- white {
+ led-4 {
label = "pwm:white:user";
pwms = <&pwm0 3 10000000 0>;
max-brightness = <255>;
diff --git a/dts/src/arm/at91-kizboxmini-common.dtsi b/dts/src/arm/at91-kizboxmini-common.dtsi
index d37724c..9c62289 100644
--- a/dts/src/arm/at91-kizboxmini-common.dtsi
+++ b/dts/src/arm/at91-kizboxmini-common.dtsi
@@ -54,10 +54,10 @@
};
};
- leds: pwm_leds {
+ leds: led-controller-1 {
compatible = "pwm-leds";
- led_blue: pwm_blue {
+ led_blue: led-1 {
label = "pwm:blue:user";
pwms = <&pwm0 2 10000000 0>;
max-brightness = <255>;
@@ -65,14 +65,14 @@
status = "disabled";
};
- led_green: pwm_green {
+ led_green: led-2 {
label = "pwm:green:user";
pwms = <&pwm0 0 10000000 0>;
max-brightness = <255>;
linux,default-trigger = "default-on";
};
- led_red: pwm_red {
+ led_red: led-3 {
label = "pwm:red:user";
pwms = <&pwm0 1 10000000 0>;
max-brightness = <255>;
diff --git a/dts/src/arm/at91-sam9x60ek.dts b/dts/src/arm/at91-sam9x60ek.dts
index eae28b8..73b6b1f 100644
--- a/dts/src/arm/at91-sam9x60ek.dts
+++ b/dts/src/arm/at91-sam9x60ek.dts
@@ -569,11 +569,14 @@
atmel,pins = <AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
};
-}; /* pinctrl */
-&pmc {
- atmel,osc-bypass;
-};
+ usb1 {
+ pinctrl_usb_default: usb_default {
+ atmel,pins = <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOD 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ };
+}; /* pinctrl */
&pwm0 {
pinctrl-names = "default";
@@ -684,6 +687,8 @@
atmel,vbus-gpio = <0
&pioD 15 GPIO_ACTIVE_HIGH
&pioD 16 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
status = "okay";
};
diff --git a/dts/src/arm/at91-sama5d27_som1.dtsi b/dts/src/arm/at91-sama5d27_som1.dtsi
index b1f994c..1b11638 100644
--- a/dts/src/arm/at91-sama5d27_som1.dtsi
+++ b/dts/src/arm/at91-sama5d27_som1.dtsi
@@ -100,7 +100,7 @@
status = "okay";
at24@50 {
- compatible = "24c02";
+ compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <8>;
};
diff --git a/dts/src/arm/at91-sama5d3_xplained.dts b/dts/src/arm/at91-sama5d3_xplained.dts
index cf13632..5179258 100644
--- a/dts/src/arm/at91-sama5d3_xplained.dts
+++ b/dts/src/arm/at91-sama5d3_xplained.dts
@@ -242,6 +242,11 @@
atmel,pins =
<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */
};
+ pinctrl_usb_default: usb_default {
+ atmel,pins =
+ <AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
};
};
};
@@ -259,6 +264,8 @@
&pioE 3 GPIO_ACTIVE_LOW
&pioE 4 GPIO_ACTIVE_LOW
>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
status = "okay";
};
diff --git a/dts/src/arm/at91-sama5d4_xplained.dts b/dts/src/arm/at91-sama5d4_xplained.dts
index e5974a1..0b3ad1b 100644
--- a/dts/src/arm/at91-sama5d4_xplained.dts
+++ b/dts/src/arm/at91-sama5d4_xplained.dts
@@ -134,6 +134,11 @@
atmel,pins =
<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
+ pinctrl_usb_default: usb_default {
+ atmel,pins =
+ <AT91_PIOE 11 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
pinctrl_key_gpio: key_gpio_0 {
atmel,pins =
<AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
@@ -159,6 +164,8 @@
&pioE 11 GPIO_ACTIVE_HIGH
&pioE 14 GPIO_ACTIVE_HIGH
>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
status = "okay";
};
diff --git a/dts/src/arm/at91-smartkiz.dts b/dts/src/arm/at91-smartkiz.dts
index 106f23b..b76a6b5 100644
--- a/dts/src/arm/at91-smartkiz.dts
+++ b/dts/src/arm/at91-smartkiz.dts
@@ -84,10 +84,8 @@
status = "okay";
};
-&leds {
- blue {
- status = "okay";
- };
+&led_blue {
+ status = "okay";
};
&adc0 {
diff --git a/dts/src/arm/at91sam9260.dtsi b/dts/src/arm/at91sam9260.dtsi
index 82c5d7f..019f1c3 100644
--- a/dts/src/arm/at91sam9260.dtsi
+++ b/dts/src/arm/at91sam9260.dtsi
@@ -697,8 +697,6 @@
};
adc0: adc@fffe0000 {
- #address-cells = <1>;
- #size-cells = <0>;
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -708,29 +706,6 @@
atmel,adc-channels-used = <0xf>;
atmel,adc-vref = <3300>;
atmel,adc-startup-time = <15>;
- atmel,adc-res = <8 10>;
- atmel,adc-res-names = "lowres", "highres";
- atmel,adc-use-res = "highres";
-
- trigger0 {
- trigger-name = "timer-counter-0";
- trigger-value = <0x1>;
- };
- trigger1 {
- trigger-name = "timer-counter-1";
- trigger-value = <0x3>;
- };
-
- trigger2 {
- trigger-name = "timer-counter-2";
- trigger-value = <0x5>;
- };
-
- trigger3 {
- trigger-name = "external";
- trigger-value = <0xd>;
- trigger-external;
- };
};
rtc@fffffd20 {
diff --git a/dts/src/arm/at91sam9g45.dtsi b/dts/src/arm/at91sam9g45.dtsi
index 19fc748..2ab730f 100644
--- a/dts/src/arm/at91sam9g45.dtsi
+++ b/dts/src/arm/at91sam9g45.dtsi
@@ -812,8 +812,6 @@
};
adc0: adc@fffb0000 {
- #address-cells = <1>;
- #size-cells = <0>;
compatible = "atmel,at91sam9g45-adc";
reg = <0xfffb0000 0x100>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -822,31 +820,6 @@
atmel,adc-channels-used = <0xff>;
atmel,adc-vref = <3300>;
atmel,adc-startup-time = <40>;
- atmel,adc-res = <8 10>;
- atmel,adc-res-names = "lowres", "highres";
- atmel,adc-use-res = "highres";
-
- trigger0 {
- trigger-name = "external-rising";
- trigger-value = <0x1>;
- trigger-external;
- };
- trigger1 {
- trigger-name = "external-falling";
- trigger-value = <0x2>;
- trigger-external;
- };
-
- trigger2 {
- trigger-name = "external-any";
- trigger-value = <0x3>;
- trigger-external;
- };
-
- trigger3 {
- trigger-name = "continuous";
- trigger-value = <0x6>;
- };
};
isi@fffb4000 {
diff --git a/dts/src/arm/at91sam9m10g45ek.dts b/dts/src/arm/at91sam9m10g45ek.dts
index 9734667..b6256a2 100644
--- a/dts/src/arm/at91sam9m10g45ek.dts
+++ b/dts/src/arm/at91sam9m10g45ek.dts
@@ -315,27 +315,27 @@
};
};
- leds {
+ led-controller-1 {
compatible = "gpio-leds";
- d8 {
+ led-1 {
label = "d8";
gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
- pwmleds {
+ led-controller-2 {
compatible = "pwm-leds";
- d6 {
+ led-2 {
label = "d6";
pwms = <&pwm0 3 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
linux,default-trigger = "nand-disk";
};
- d7 {
+ led-3 {
label = "d7";
pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
diff --git a/dts/src/arm/at91sam9rl.dtsi b/dts/src/arm/at91sam9rl.dtsi
index 5653e70..730d118 100644
--- a/dts/src/arm/at91sam9rl.dtsi
+++ b/dts/src/arm/at91sam9rl.dtsi
@@ -266,8 +266,6 @@
};
adc0: adc@fffd0000 {
- #address-cells = <1>;
- #size-cells = <0>;
compatible = "atmel,at91sam9rl-adc";
reg = <0xfffd0000 0x100>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -277,29 +275,6 @@
atmel,adc-channels-used = <0x3f>;
atmel,adc-vref = <3300>;
atmel,adc-startup-time = <40>;
- atmel,adc-res = <8 10>;
- atmel,adc-res-names = "lowres", "highres";
- atmel,adc-use-res = "highres";
-
- trigger0 {
- trigger-name = "timer-counter-0";
- trigger-value = <0x1>;
- };
- trigger1 {
- trigger-name = "timer-counter-1";
- trigger-value = <0x3>;
- };
-
- trigger2 {
- trigger-name = "timer-counter-2";
- trigger-value = <0x5>;
- };
-
- trigger3 {
- trigger-name = "external";
- trigger-value = <0x13>;
- trigger-external;
- };
};
usb0: gadget@fffd4000 {
diff --git a/dts/src/arm/at91sam9rlek.dts b/dts/src/arm/at91sam9rlek.dts
index 1590862..62981b3 100644
--- a/dts/src/arm/at91sam9rlek.dts
+++ b/dts/src/arm/at91sam9rlek.dts
@@ -218,26 +218,26 @@
};
};
- pwmleds {
+ led-controller-1 {
compatible = "pwm-leds";
- ds1 {
+ led-1 {
label = "ds1";
pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
};
- ds2 {
+ led-2 {
label = "ds2";
pwms = <&pwm0 2 5000 PWM_POLARITY_INVERTED>;
max-brightness = <255>;
};
};
- leds {
+ led-controller-2 {
compatible = "gpio-leds";
- ds3 {
+ led-3 {
label = "ds3";
gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
diff --git a/dts/src/arm/at91sam9x5.dtsi b/dts/src/arm/at91sam9x5.dtsi
index 4cdb050..395e883 100644
--- a/dts/src/arm/at91sam9x5.dtsi
+++ b/dts/src/arm/at91sam9x5.dtsi
@@ -795,8 +795,6 @@
};
adc0: adc@f804c000 {
- #address-cells = <1>;
- #size-cells = <0>;
compatible = "atmel,at91sam9x5-adc";
reg = <0xf804c000 0x100>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -808,32 +806,6 @@
atmel,adc-vref = <3300>;
atmel,adc-startup-time = <40>;
atmel,adc-sample-hold-time = <11>;
- atmel,adc-res = <8 10>;
- atmel,adc-res-names = "lowres", "highres";
- atmel,adc-use-res = "highres";
-
- trigger0 {
- trigger-name = "external-rising";
- trigger-value = <0x1>;
- trigger-external;
- };
-
- trigger1 {
- trigger-name = "external-falling";
- trigger-value = <0x2>;
- trigger-external;
- };
-
- trigger2 {
- trigger-name = "external-any";
- trigger-value = <0x3>;
- trigger-external;
- };
-
- trigger3 {
- trigger-name = "continuous";
- trigger-value = <0x6>;
- };
};
spi0: spi@f0000000 {
diff --git a/dts/src/arm/bcm-cygnus.dtsi b/dts/src/arm/bcm-cygnus.dtsi
index dacaef2..0025c88 100644
--- a/dts/src/arm/bcm-cygnus.dtsi
+++ b/dts/src/arm/bcm-cygnus.dtsi
@@ -591,7 +591,6 @@
adc: adc@180a6000 {
compatible = "brcm,iproc-static-adc";
#io-channel-cells = <1>;
- io-channel-ranges;
adc-syscon = <&ts_adc_syscon>;
clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
clock-names = "tsc_clk";
diff --git a/dts/src/arm/bcm-nsp.dtsi b/dts/src/arm/bcm-nsp.dtsi
index e895f7c..b4d2cc7 100644
--- a/dts/src/arm/bcm-nsp.dtsi
+++ b/dts/src/arm/bcm-nsp.dtsi
@@ -385,12 +385,12 @@
clock-names = "apb_pclk";
};
- srab: srab@36000 {
+ srab: ethernet-switch@36000 {
compatible = "brcm,nsp-srab";
reg = <0x36000 0x1000>,
<0x3f308 0x8>,
<0x3f410 0xc>;
- reg-names = "srab", "mux_config", "sgmii";
+ reg-names = "srab", "mux_config", "sgmii_config";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
@@ -420,6 +420,10 @@
status = "disabled";
/* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
i2c0: i2c@38000 {
diff --git a/dts/src/arm/bcm2711-rpi-4-b.dts b/dts/src/arm/bcm2711-rpi-4-b.dts
index 09a1182..403bacf 100644
--- a/dts/src/arm/bcm2711-rpi-4-b.dts
+++ b/dts/src/arm/bcm2711-rpi-4-b.dts
@@ -181,12 +181,14 @@
&hdmi0 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
+ wifi-2.4ghz-coexistence;
status = "okay";
};
&hdmi1 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
+ wifi-2.4ghz-coexistence;
status = "okay";
};
diff --git a/dts/src/arm/bcm283x-rpi-usb-otg.dtsi b/dts/src/arm/bcm283x-rpi-usb-otg.dtsi
index e2fd961..20322de 100644
--- a/dts/src/arm/bcm283x-rpi-usb-otg.dtsi
+++ b/dts/src/arm/bcm283x-rpi-usb-otg.dtsi
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
&usb {
dr_mode = "otg";
- g-rx-fifo-size = <256>;
+ g-rx-fifo-size = <558>;
g-np-tx-fifo-size = <32>;
/*
* According to dwc2 the sum of all device EP
diff --git a/dts/src/arm/bcm283x-rpi-usb-peripheral.dtsi b/dts/src/arm/bcm283x-rpi-usb-peripheral.dtsi
index 0ff0e9e..1409d1b 100644
--- a/dts/src/arm/bcm283x-rpi-usb-peripheral.dtsi
+++ b/dts/src/arm/bcm283x-rpi-usb-peripheral.dtsi
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
&usb {
dr_mode = "peripheral";
- g-rx-fifo-size = <256>;
+ g-rx-fifo-size = <558>;
g-np-tx-fifo-size = <32>;
g-tx-fifo-size = <256 256 512 512 512 768 768>;
};
diff --git a/dts/src/arm/bcm4708-luxul-xap-1510.dts b/dts/src/arm/bcm4708-luxul-xap-1510.dts
index 810fc32..5b4a481 100644
--- a/dts/src/arm/bcm4708-luxul-xap-1510.dts
+++ b/dts/src/arm/bcm4708-luxul-xap-1510.dts
@@ -57,17 +57,10 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "poe";
diff --git a/dts/src/arm/bcm4708-luxul-xwc-1000.dts b/dts/src/arm/bcm4708-luxul-xwc-1000.dts
index 7604b44..8636600 100644
--- a/dts/src/arm/bcm4708-luxul-xwc-1000.dts
+++ b/dts/src/arm/bcm4708-luxul-xwc-1000.dts
@@ -64,17 +64,10 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@4 {
reg = <4>;
label = "lan";
diff --git a/dts/src/arm/bcm4708-smartrg-sr400ac.dts b/dts/src/arm/bcm4708-smartrg-sr400ac.dts
index abd35a5..51c64f0 100644
--- a/dts/src/arm/bcm4708-smartrg-sr400ac.dts
+++ b/dts/src/arm/bcm4708-smartrg-sr400ac.dts
@@ -122,9 +122,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
diff --git a/dts/src/arm/bcm47081-buffalo-wzr-600dhp2.dts b/dts/src/arm/bcm47081-buffalo-wzr-600dhp2.dts
index 4dcec68..2f2d2b0 100644
--- a/dts/src/arm/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/dts/src/arm/bcm47081-buffalo-wzr-600dhp2.dts
@@ -117,7 +117,3 @@
};
};
};
-
-&usb3_phy {
- status = "okay";
-};
diff --git a/dts/src/arm/bcm47081-luxul-xap-1410.dts b/dts/src/arm/bcm47081-luxul-xap-1410.dts
index 1ec6558..68aaf0a 100644
--- a/dts/src/arm/bcm47081-luxul-xap-1410.dts
+++ b/dts/src/arm/bcm47081-luxul-xap-1410.dts
@@ -57,17 +57,10 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@4 {
reg = <4>;
label = "poe";
diff --git a/dts/src/arm/bcm47081-luxul-xwr-1200.dts b/dts/src/arm/bcm47081-luxul-xwr-1200.dts
index 04bfd58..4322543 100644
--- a/dts/src/arm/bcm47081-luxul-xwr-1200.dts
+++ b/dts/src/arm/bcm47081-luxul-xwr-1200.dts
@@ -105,17 +105,10 @@
status = "okay";
};
-&usb3_phy {
- status = "okay";
-};
-
&srab {
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
diff --git a/dts/src/arm/bcm47081-tplink-archer-c5-v2.dts b/dts/src/arm/bcm47081-tplink-archer-c5-v2.dts
index 01c390e..12e34a0 100644
--- a/dts/src/arm/bcm47081-tplink-archer-c5-v2.dts
+++ b/dts/src/arm/bcm47081-tplink-archer-c5-v2.dts
@@ -126,7 +126,3 @@
&usb2 {
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
-
-&usb3_phy {
- status = "okay";
-};
diff --git a/dts/src/arm/bcm4709.dtsi b/dts/src/arm/bcm4709.dtsi
index e1bb866..cba3d91 100644
--- a/dts/src/arm/bcm4709.dtsi
+++ b/dts/src/arm/bcm4709.dtsi
@@ -9,3 +9,7 @@
clock-frequency = <125000000>;
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
+};
diff --git a/dts/src/arm/bcm47094-linksys-panamera.dts b/dts/src/arm/bcm47094-linksys-panamera.dts
index 0faae89..3725f2b 100644
--- a/dts/src/arm/bcm47094-linksys-panamera.dts
+++ b/dts/src/arm/bcm47094-linksys-panamera.dts
@@ -123,33 +123,13 @@
};
};
- mdio-bus-mux {
- #address-cells = <1>;
- #size-cells = <0>;
+ mdio-bus-mux@18003000 {
/* BIT(9) = 1 => external mdio */
- mdio_ext: mdio@200 {
+ mdio@200 {
reg = <0x200>;
#address-cells = <1>;
#size-cells = <0>;
- };
- };
-
- mdio-mii-mux {
- compatible = "mdio-mux-mmioreg";
- mdio-parent-bus = <&mdio_ext>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x1800c1c0 0x4>;
-
- /* BIT(6) = mdc, BIT(7) = mdio */
- mux-mask = <0xc0>;
-
- mdio-mii@0 {
- /* Enable MII function */
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
switch@0 {
compatible = "brcm,bcm53125";
@@ -159,6 +139,8 @@
reset-names = "robo_reset";
reg = <0>;
dsa,member = <1 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_mdio>;
ports {
#address-cells = <1>;
@@ -219,9 +201,6 @@
dsa,member = <0 0>;
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@1 {
reg = <1>;
label = "lan7";
@@ -242,6 +221,30 @@
label = "wan";
};
+ port@5 {
+ reg = <5>;
+ ethernet = <&gmac0>;
+ label = "cpu";
+ status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@7 {
+ reg = <7>;
+ ethernet = <&gmac1>;
+ label = "cpu";
+ status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
port@8 {
reg = <8>;
ethernet = <&gmac2>;
@@ -268,3 +271,44 @@
&usb3_phy {
status = "okay";
};
+
+&nandcs {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x0000000 0x0080000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "nvram";
+ reg = <0x080000 0x0100000>;
+ };
+
+ partition@180000{
+ label = "devinfo";
+ reg = <0x0180000 0x080000>;
+ };
+
+ partition@200000 {
+ label = "firmware";
+ reg = <0x0200000 0x01D00000>;
+ compatible = "brcm,trx";
+ };
+
+ partition@1F00000 {
+ label = "failsafe";
+ reg = <0x01F00000 0x01D00000>;
+ read-only;
+ };
+
+ partition@5200000 {
+ label = "system";
+ reg = <0x05200000 0x02E00000>;
+ };
+ };
+};
diff --git a/dts/src/arm/bcm47094-luxul-xap-1610.dts b/dts/src/arm/bcm47094-luxul-xap-1610.dts
index 068e384..6fa101f 100644
--- a/dts/src/arm/bcm47094-luxul-xap-1610.dts
+++ b/dts/src/arm/bcm47094-luxul-xap-1610.dts
@@ -59,9 +59,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "poe";
diff --git a/dts/src/arm/bcm47094-luxul-xwc-2000.dts b/dts/src/arm/bcm47094-luxul-xwc-2000.dts
index 9ae815d..4f8d777 100644
--- a/dts/src/arm/bcm47094-luxul-xwc-2000.dts
+++ b/dts/src/arm/bcm47094-luxul-xwc-2000.dts
@@ -57,9 +57,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan";
diff --git a/dts/src/arm/bcm47094-luxul-xwr-3100.dts b/dts/src/arm/bcm47094-luxul-xwr-3100.dts
index a21b2d1..e17e9a1 100644
--- a/dts/src/arm/bcm47094-luxul-xwr-3100.dts
+++ b/dts/src/arm/bcm47094-luxul-xwr-3100.dts
@@ -108,9 +108,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
diff --git a/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts b/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts
index 4d5c5aa..60cc87e 100644
--- a/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts
+++ b/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts
@@ -71,6 +71,10 @@
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
+&usb3_phy {
+ status = "okay";
+};
+
&spi_nor {
status = "okay";
};
@@ -79,9 +83,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "lan4";
diff --git a/dts/src/arm/bcm47094.dtsi b/dts/src/arm/bcm47094.dtsi
index cdc5ff5..2a8f731 100644
--- a/dts/src/arm/bcm47094.dtsi
+++ b/dts/src/arm/bcm47094.dtsi
@@ -8,6 +8,15 @@
/ {
};
+&pinctrl {
+ compatible = "brcm,bcm4709-pinmux";
+
+ pinmux_mdio: mdio {
+ groups = "mdio_grp";
+ function = "mdio";
+ };
+};
+
&usb3_phy {
compatible = "brcm,ns-bx-usb3-phy";
};
@@ -16,3 +25,7 @@
clock-frequency = <125000000>;
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
+};
diff --git a/dts/src/arm/bcm5301x.dtsi b/dts/src/arm/bcm5301x.dtsi
index ac3a99c..7db72a2 100644
--- a/dts/src/arm/bcm5301x.dtsi
+++ b/dts/src/arm/bcm5301x.dtsi
@@ -265,7 +265,7 @@
interrupt-parent = <&gic>;
- ehci: ehci@21000 {
+ ehci: usb@21000 {
#usb-cells = <0>;
compatible = "generic-ehci";
@@ -287,7 +287,7 @@
};
};
- ohci: ohci@22000 {
+ ohci: usb@22000 {
#usb-cells = <0>;
compatible = "generic-ohci";
@@ -318,7 +318,7 @@
interrupt-parent = <&gic>;
- xhci: xhci@23000 {
+ xhci: usb@23000 {
#usb-cells = <0>;
compatible = "generic-xhci";
@@ -428,7 +428,27 @@
#address-cells = <1>;
#size-cells = <1>;
- pin-controller@1c0 {
+ lcpll0: lcpll0@100 {
+ #clock-cells = <1>;
+ compatible = "brcm,nsp-lcpll0";
+ reg = <0x100 0x14>;
+ clocks = <&osc>;
+ clock-output-names = "lcpll0", "pcie_phy",
+ "sdio", "ddr_phy";
+ };
+
+ genpll: genpll@140 {
+ #clock-cells = <1>;
+ compatible = "brcm,nsp-genpll";
+ reg = <0x140 0x24>;
+ clocks = <&osc>;
+ clock-output-names = "genpll", "phy",
+ "ethernetclk",
+ "usbclk", "iprocfast",
+ "sata1", "sata2";
+ };
+
+ pinctrl: pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
reg-names = "cru_gpio_control";
@@ -454,41 +474,26 @@
function = "uart1";
};
};
- };
- };
-
- lcpll0: lcpll0@1800c100 {
- #clock-cells = <1>;
- compatible = "brcm,nsp-lcpll0";
- reg = <0x1800c100 0x14>;
- clocks = <&osc>;
- clock-output-names = "lcpll0", "pcie_phy", "sdio",
- "ddr_phy";
- };
- genpll: genpll@1800c140 {
- #clock-cells = <1>;
- compatible = "brcm,nsp-genpll";
- reg = <0x1800c140 0x24>;
- clocks = <&osc>;
- clock-output-names = "genpll", "phy", "ethernetclk",
- "usbclk", "iprocfast", "sata1",
- "sata2";
- };
-
- thermal: thermal@1800c2c0 {
- compatible = "brcm,ns-thermal";
- reg = <0x1800c2c0 0x10>;
- #thermal-sensor-cells = <0>;
+ thermal: thermal@2c0 {
+ compatible = "brcm,ns-thermal";
+ reg = <0x2c0 0x10>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
};
- srab: srab@18007000 {
- compatible = "brcm,bcm5301x-srab";
+ srab: ethernet-switch@18007000 {
+ compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
reg = <0x18007000 0x1000>;
status = "disabled";
/* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
rng: rng@18004000 {
diff --git a/dts/src/arm/bcm53573.dtsi b/dts/src/arm/bcm53573.dtsi
index 4af8e32..51546fc 100644
--- a/dts/src/arm/bcm53573.dtsi
+++ b/dts/src/arm/bcm53573.dtsi
@@ -135,7 +135,7 @@
#address-cells = <1>;
#size-cells = <1>;
- ehci: ehci@4000 {
+ ehci: usb@4000 {
compatible = "generic-ehci";
reg = <0x4000 0x1000>;
interrupt-parent = <&gic>;
@@ -155,7 +155,7 @@
};
};
- ohci: ohci@d000 {
+ ohci: usb@d000 {
#usb-cells = <0>;
compatible = "generic-ohci";
diff --git a/dts/src/arm/bcm953012er.dts b/dts/src/arm/bcm953012er.dts
index 9574682..52feca0 100644
--- a/dts/src/arm/bcm953012er.dts
+++ b/dts/src/arm/bcm953012er.dts
@@ -69,9 +69,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
reg = <0>;
label = "port0";
diff --git a/dts/src/arm/bcm958522er.dts b/dts/src/arm/bcm958522er.dts
index 7be4c4e..5443fc0 100644
--- a/dts/src/arm/bcm958522er.dts
+++ b/dts/src/arm/bcm958522er.dts
@@ -178,3 +178,7 @@
&xhci {
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm58522-srab", "brcm,nsp-srab";
+};
diff --git a/dts/src/arm/bcm958525er.dts b/dts/src/arm/bcm958525er.dts
index e58ed7e..e1e3c26 100644
--- a/dts/src/arm/bcm958525er.dts
+++ b/dts/src/arm/bcm958525er.dts
@@ -190,3 +190,7 @@
&xhci {
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
+};
diff --git a/dts/src/arm/bcm958525xmc.dts b/dts/src/arm/bcm958525xmc.dts
index 21f922d..f161ba2 100644
--- a/dts/src/arm/bcm958525xmc.dts
+++ b/dts/src/arm/bcm958525xmc.dts
@@ -210,3 +210,7 @@
&xhci {
status = "okay";
};
+
+&srab {
+ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab";
+};
diff --git a/dts/src/arm/bcm958622hr.dts b/dts/src/arm/bcm958622hr.dts
index a49c2fd..83cb877 100644
--- a/dts/src/arm/bcm958622hr.dts
+++ b/dts/src/arm/bcm958622hr.dts
@@ -176,9 +176,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
diff --git a/dts/src/arm/bcm958623hr.dts b/dts/src/arm/bcm958623hr.dts
index dd6dff6..4e106ce 100644
--- a/dts/src/arm/bcm958623hr.dts
+++ b/dts/src/arm/bcm958623hr.dts
@@ -180,9 +180,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
diff --git a/dts/src/arm/bcm958625hr.dts b/dts/src/arm/bcm958625hr.dts
index a71371b..cda6cc2 100644
--- a/dts/src/arm/bcm958625hr.dts
+++ b/dts/src/arm/bcm958625hr.dts
@@ -195,9 +195,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
diff --git a/dts/src/arm/bcm958625k.dts b/dts/src/arm/bcm958625k.dts
index 7782b61..ffbff00 100644
--- a/dts/src/arm/bcm958625k.dts
+++ b/dts/src/arm/bcm958625k.dts
@@ -216,9 +216,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
diff --git a/dts/src/arm/bcm988312hr.dts b/dts/src/arm/bcm988312hr.dts
index edd0f63..3fd39c4 100644
--- a/dts/src/arm/bcm988312hr.dts
+++ b/dts/src/arm/bcm988312hr.dts
@@ -184,9 +184,6 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
port@0 {
label = "port0";
reg = <0>;
diff --git a/dts/src/arm/dove-sbc-a510.dts b/dts/src/arm/dove-sbc-a510.dts
index 2bb85a9..df021f9 100644
--- a/dts/src/arm/dove-sbc-a510.dts
+++ b/dts/src/arm/dove-sbc-a510.dts
@@ -143,6 +143,7 @@
gpio_ext: gpio@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
+ gpio-controller;
#gpio-cells = <2>;
};
};
diff --git a/dts/src/arm/dra7.dtsi b/dts/src/arm/dra7.dtsi
index 4e1bbc0..ce11947 100644
--- a/dts/src/arm/dra7.dtsi
+++ b/dts/src/arm/dra7.dtsi
@@ -724,22 +724,40 @@
/* OCP2SCP1 */
/* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */
- gpmc: gpmc@50000000 {
- compatible = "ti,am3352-gpmc";
- ti,hwmods = "gpmc";
- reg = <0x50000000 0x37c>; /* device IO registers */
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma_xbar 4 0>;
- dma-names = "rxtx";
- gpmc,num-cs = <8>;
- gpmc,num-waitpins = <2>;
- #address-cells = <2>;
+
+ target-module@50000000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x50000000 4>,
+ <0x50000010 4>,
+ <0x50000014 4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&l3main1_clkctrl DRA7_L3MAIN1_GPMC_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
#size-cells = <1>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- status = "disabled";
+ ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
+ <0x00000000 0x00000000 0x40000000>; /* data */
+
+ gpmc: gpmc@50000000 {
+ compatible = "ti,am3352-gpmc";
+ reg = <0x50000000 0x37c>; /* device IO registers */
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma_xbar 4 0>;
+ dma-names = "rxtx";
+ gpmc,num-cs = <8>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "disabled";
+ };
};
target-module@56000000 {
@@ -932,7 +950,7 @@
};
};
- sham_target: target-module@4b101000 {
+ sham1_target: target-module@4b101000 {
compatible = "ti,sysc-omap3-sham", "ti,sysc";
reg = <0x4b101100 0x4>,
<0x4b101110 0x4>,
@@ -951,7 +969,7 @@
#size-cells = <1>;
ranges = <0x0 0x4b101000 0x1000>;
- sham: sham@0 {
+ sham1: sham@0 {
compatible = "ti,omap5-sham";
reg = <0 0x300>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
@@ -962,6 +980,62 @@
};
};
+ sham2_target: target-module@42701000 {
+ compatible = "ti,sysc-omap3-sham", "ti,sysc";
+ reg = <0x42701100 0x4>,
+ <0x42701110 0x4>,
+ <0x42701114 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+ clocks = <&l4sec_clkctrl DRA7_L4SEC_SHAM2_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x42701000 0x1000>;
+
+ sham2: sham@0 {
+ compatible = "ti,omap5-sham";
+ reg = <0 0x300>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma_xbar 165 0>;
+ dma-names = "rx";
+ clocks = <&l3_iclk_div>;
+ clock-names = "fck";
+ };
+ };
+
+ iva_hd_target: target-module@5a000000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x5a05a400 0x4>,
+ <0x5a05a410 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ power-domains = <&prm_iva>;
+ resets = <&prm_iva 2>;
+ reset-names = "rstctrl";
+ clocks = <&iva_clkctrl DRA7_IVA_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5a000000 0x5a000000 0x1000000>,
+ <0x5b000000 0x5b000000 0x1000000>;
+
+ iva {
+ compatible = "ti,ivahd";
+ };
+ };
+
opp_supply_mpu: opp-supply@4a003b20 {
compatible = "ti,omap5-opp-supply";
reg = <0x4a003b20 0xc>;
@@ -1031,53 +1105,130 @@
#include "dra7xx-clocks.dtsi"
&prm {
+ prm_mpu: prm@300 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x300 0x100>;
+ #power-domain-cells = <0>;
+ };
+
prm_dsp1: prm@400 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x400 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_ipu: prm@500 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x500 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_coreaon: prm@628 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x628 0xd8>;
+ #power-domain-cells = <0>;
};
prm_core: prm@700 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x700 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_iva: prm@f00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0xf00 0x100>;
+ #reset-cells = <1>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_cam: prm@1000 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1000 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_dss: prm@1100 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1100 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_gpu: prm@1200 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1200 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_l3init: prm@1300 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1300 0x100>;
+ #reset-cells = <1>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_l4per: prm@1400 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1400 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_custefuse: prm@1600 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1600 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_wkupaon: prm@1724 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1724 0x100>;
+ #power-domain-cells = <0>;
};
prm_dsp2: prm@1b00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1b00 0x40>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_eve1: prm@1b40 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1b40 0x40>;
+ #power-domain-cells = <0>;
};
prm_eve2: prm@1b80 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1b80 0x40>;
+ #power-domain-cells = <0>;
};
prm_eve3: prm@1bc0 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1bc0 0x40>;
+ #power-domain-cells = <0>;
};
prm_eve4: prm@1c00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1c00 0x60>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_rtc: prm@1c60 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1c60 0x20>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_vpe: prm@1c80 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1c80 0x80>;
+ #power-domain-cells = <0>;
};
};
diff --git a/dts/src/arm/dra7xx-clocks.dtsi b/dts/src/arm/dra7xx-clocks.dtsi
index dc0a93b..2365554 100644
--- a/dts/src/arm/dra7xx-clocks.dtsi
+++ b/dts/src/arm/dra7xx-clocks.dtsi
@@ -1726,6 +1726,20 @@
};
};
+ iva_cm: iva-cm@f00 {
+ compatible = "ti,omap4-cm";
+ reg = <0xf00 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xf00 0x100>;
+
+ iva_clkctrl: iva-clkctrl@20 {
+ compatible = "ti,clkctrl";
+ reg = <0x20 0xc>;
+ #clock-cells = <2>;
+ };
+ };
+
cam_cm: cam-cm@1000 {
compatible = "ti,omap4-cm";
reg = <0x1000 0x100>;
diff --git a/dts/src/arm/exynos-mfc-reserved-memory.dtsi b/dts/src/arm/exynos-mfc-reserved-memory.dtsi
index 1dbf3bb..597ade3 100644
--- a/dts/src/arm/exynos-mfc-reserved-memory.dtsi
+++ b/dts/src/arm/exynos-mfc-reserved-memory.dtsi
@@ -11,14 +11,14 @@
#size-cells = <1>;
ranges;
- mfc_left: region_mfc_left {
+ mfc_left: region-mfc-left {
compatible = "shared-dma-pool";
no-map;
size = <0x2400000>;
alignment = <0x100000>;
};
- mfc_right: region_mfc_right {
+ mfc_right: region-mfc-right {
compatible = "shared-dma-pool";
no-map;
size = <0x800000>;
diff --git a/dts/src/arm/exynos3250-artik5-eval.dts b/dts/src/arm/exynos3250-artik5-eval.dts
index 20446a8..a1e22f6 100644
--- a/dts/src/arm/exynos3250-artik5-eval.dts
+++ b/dts/src/arm/exynos3250-artik5-eval.dts
@@ -37,3 +37,29 @@
&serial_2 {
status = "okay";
};
+
+&spi_0 {
+ status = "okay";
+ cs-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>, <0>;
+
+ assigned-clocks = <&cmu CLK_MOUT_SPI0>, <&cmu CLK_DIV_SPI0>,
+ <&cmu CLK_DIV_SPI0_PRE>, <&cmu CLK_SCLK_SPI0>;
+ assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>, /* for: CLK_MOUT_SPI0 */
+ <&cmu CLK_MOUT_SPI0>, /* for: CLK_DIV_SPI0 */
+ <&cmu CLK_DIV_SPI0>, /* for: CLK_DIV_SPI0_PRE */
+ <&cmu CLK_DIV_SPI0_PRE>; /* for: CLK_SCLK_SPI0 */
+
+ ethernet@0 {
+ compatible = "asix,ax88796c";
+ reg = <0x0>;
+ local-mac-address = [00 00 00 00 00 00]; /* Filled in by a boot-loader */
+ interrupt-parent = <&gpx2>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ spi-max-frequency = <40000000>;
+ reset-gpios = <&gpe0 2 GPIO_ACTIVE_LOW>;
+
+ controller-data {
+ samsung,spi-feedback-delay = <2>;
+ };
+ };
+};
diff --git a/dts/src/arm/exynos3250-artik5.dtsi b/dts/src/arm/exynos3250-artik5.dtsi
index 12887b3..04290ec 100644
--- a/dts/src/arm/exynos3250-artik5.dtsi
+++ b/dts/src/arm/exynos3250-artik5.dtsi
@@ -76,7 +76,7 @@
samsung,i2c-max-bus-freq = <100000>;
status = "okay";
- s2mps14_pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps14-pmic";
interrupt-parent = <&gpx3>;
interrupts = <5 IRQ_TYPE_NONE>;
diff --git a/dts/src/arm/exynos3250-monk.dts b/dts/src/arm/exynos3250-monk.dts
index c1a68e6..6945156 100644
--- a/dts/src/arm/exynos3250-monk.dts
+++ b/dts/src/arm/exynos3250-monk.dts
@@ -34,10 +34,10 @@
reg = <0x0205F000 0x1000>;
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- power_key {
+ power-key {
gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "power key";
@@ -62,7 +62,7 @@
#address-cells = <1>;
#size-cells = <0>;
- max77836: subpmic@25 {
+ max77836: pmic@25 {
compatible = "maxim,max77836";
interrupt-parent = <&gpx1>;
interrupts = <5 IRQ_TYPE_NONE>;
@@ -197,7 +197,7 @@
samsung,i2c-max-bus-freq = <100000>;
status = "okay";
- s2mps14_pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps14-pmic";
interrupt-parent = <&gpx0>;
interrupts = <7 IRQ_TYPE_NONE>;
diff --git a/dts/src/arm/exynos3250-rinato.dts b/dts/src/arm/exynos3250-rinato.dts
index b55afaa..a26e3e5 100644
--- a/dts/src/arm/exynos3250-rinato.dts
+++ b/dts/src/arm/exynos3250-rinato.dts
@@ -38,10 +38,10 @@
reg = <0x0205F000 0x1000>;
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- power_key {
+ power-key {
gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "power key";
@@ -62,7 +62,7 @@
#address-cells = <1>;
#size-cells = <0>;
- max77836: subpmic@25 {
+ max77836: pmic@25 {
compatible = "maxim,max77836";
interrupt-parent = <&gpx1>;
interrupts = <5 IRQ_TYPE_NONE>;
@@ -267,7 +267,7 @@
samsung,i2c-max-bus-freq = <100000>;
status = "okay";
- s2mps14_pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps14-pmic";
interrupt-parent = <&gpx0>;
interrupts = <7 IRQ_TYPE_NONE>;
diff --git a/dts/src/arm/exynos3250.dtsi b/dts/src/arm/exynos3250.dtsi
index a1e93fb..77ab719 100644
--- a/dts/src/arm/exynos3250.dtsi
+++ b/dts/src/arm/exynos3250.dtsi
@@ -439,7 +439,6 @@
clock-names = "adc", "sclk";
clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
#io-channel-cells = <1>;
- io-channel-ranges;
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};
@@ -691,25 +690,25 @@
status = "disabled";
};
- ppmu_dmc0: ppmu_dmc0@106a0000 {
+ ppmu_dmc0: ppmu@106a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106a0000 0x2000>;
status = "disabled";
};
- ppmu_dmc1: ppmu_dmc1@106b0000 {
+ ppmu_dmc1: ppmu@106b0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106b0000 0x2000>;
status = "disabled";
};
- ppmu_cpu: ppmu_cpu@106c0000 {
+ ppmu_cpu: ppmu@106c0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106c0000 0x2000>;
status = "disabled";
};
- ppmu_rightbus: ppmu_rightbus@112a0000 {
+ ppmu_rightbus: ppmu@112a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x112a0000 0x2000>;
clocks = <&cmu CLK_PPMURIGHT>;
@@ -717,7 +716,7 @@
status = "disabled";
};
- ppmu_leftbus: ppmu_leftbus0@116a0000 {
+ ppmu_leftbus: ppmu@116a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x116a0000 0x2000>;
clocks = <&cmu CLK_PPMULEFT>;
@@ -725,7 +724,7 @@
status = "disabled";
};
- ppmu_camif: ppmu_camif@11ac0000 {
+ ppmu_camif: ppmu@11ac0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11ac0000 0x2000>;
clocks = <&cmu CLK_PPMUCAMIF>;
@@ -733,7 +732,7 @@
status = "disabled";
};
- ppmu_lcd0: ppmu_lcd0@11e40000 {
+ ppmu_lcd0: ppmu@11e40000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11e40000 0x2000>;
clocks = <&cmu CLK_PPMULCD0>;
@@ -741,7 +740,7 @@
status = "disabled";
};
- ppmu_fsys: ppmu_fsys@12630000 {
+ ppmu_fsys: ppmu@12630000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12630000 0x2000>;
clocks = <&cmu CLK_PPMUFILE>;
@@ -749,7 +748,7 @@
status = "disabled";
};
- ppmu_g3d: ppmu_g3d@13220000 {
+ ppmu_g3d: ppmu@13220000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13220000 0x2000>;
clocks = <&cmu CLK_PPMUG3D>;
@@ -757,7 +756,7 @@
status = "disabled";
};
- ppmu_mfc: ppmu_mfc@13660000 {
+ ppmu_mfc: ppmu@13660000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13660000 0x2000>;
clocks = <&cmu CLK_PPMUMFC_L>;
@@ -765,7 +764,7 @@
status = "disabled";
};
- bus_dmc: bus_dmc {
+ bus_dmc: bus-dmc {
compatible = "samsung,exynos-bus";
clocks = <&cmu_dmc CLK_DIV_DMC>;
clock-names = "bus";
@@ -773,9 +772,8 @@
status = "disabled";
};
- bus_dmc_opp_table: opp_table1 {
+ bus_dmc_opp_table: opp-table1 {
compatible = "operating-points-v2";
- opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
@@ -799,7 +797,7 @@
};
};
- bus_leftbus: bus_leftbus {
+ bus_leftbus: bus-leftbus {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_GDL>;
clock-names = "bus";
@@ -807,7 +805,7 @@
status = "disabled";
};
- bus_rightbus: bus_rightbus {
+ bus_rightbus: bus-rightbus {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_GDR>;
clock-names = "bus";
@@ -815,7 +813,7 @@
status = "disabled";
};
- bus_lcd0: bus_lcd0 {
+ bus_lcd0: bus-lcd0 {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_ACLK_160>;
clock-names = "bus";
@@ -823,7 +821,7 @@
status = "disabled";
};
- bus_fsys: bus_fsys {
+ bus_fsys: bus-fsys {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_ACLK_200>;
clock-names = "bus";
@@ -831,7 +829,7 @@
status = "disabled";
};
- bus_mcuisp: bus_mcuisp {
+ bus_mcuisp: bus-mcuisp {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
clock-names = "bus";
@@ -839,7 +837,7 @@
status = "disabled";
};
- bus_isp: bus_isp {
+ bus_isp: bus-isp {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_ACLK_266>;
clock-names = "bus";
@@ -847,7 +845,7 @@
status = "disabled";
};
- bus_peril: bus_peril {
+ bus_peril: bus-peril {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_ACLK_100>;
clock-names = "bus";
@@ -855,7 +853,7 @@
status = "disabled";
};
- bus_mfc: bus_mfc {
+ bus_mfc: bus-mfc {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_SCLK_MFC>;
clock-names = "bus";
@@ -863,9 +861,8 @@
status = "disabled";
};
- bus_leftbus_opp_table: opp_table2 {
+ bus_leftbus_opp_table: opp-table2 {
compatible = "operating-points-v2";
- opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
@@ -889,9 +886,8 @@
};
};
- bus_mcuisp_opp_table: opp_table3 {
+ bus_mcuisp_opp_table: opp-table3 {
compatible = "operating-points-v2";
- opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
@@ -910,9 +906,8 @@
};
};
- bus_isp_opp_table: opp_table4 {
+ bus_isp_opp_table: opp-table4 {
compatible = "operating-points-v2";
- opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
@@ -931,9 +926,8 @@
};
};
- bus_peril_opp_table: opp_table5 {
+ bus_peril_opp_table: opp-table5 {
compatible = "operating-points-v2";
- opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
diff --git a/dts/src/arm/exynos4.dtsi b/dts/src/arm/exynos4.dtsi
index a1e5444..eab77a6 100644
--- a/dts/src/arm/exynos4.dtsi
+++ b/dts/src/arm/exynos4.dtsi
@@ -782,7 +782,7 @@
status = "disabled";
};
- ppmu_dmc0: ppmu_dmc0@106a0000 {
+ ppmu_dmc0: ppmu@106a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106a0000 0x2000>;
clocks = <&clock CLK_PPMUDMC0>;
@@ -790,7 +790,7 @@
status = "disabled";
};
- ppmu_dmc1: ppmu_dmc1@106b0000 {
+ ppmu_dmc1: ppmu@106b0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106b0000 0x2000>;
clocks = <&clock CLK_PPMUDMC1>;
@@ -798,7 +798,7 @@
status = "disabled";
};
- ppmu_cpu: ppmu_cpu@106c0000 {
+ ppmu_cpu: ppmu@106c0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x106c0000 0x2000>;
clocks = <&clock CLK_PPMUCPU>;
@@ -806,7 +806,7 @@
status = "disabled";
};
- ppmu_rightbus: ppmu_rightbus@112a0000 {
+ ppmu_rightbus: ppmu@112a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x112a0000 0x2000>;
clocks = <&clock CLK_PPMURIGHT>;
@@ -814,7 +814,7 @@
status = "disabled";
};
- ppmu_leftbus: ppmu_leftbus0@116a0000 {
+ ppmu_leftbus: ppmu@116a0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x116a0000 0x2000>;
clocks = <&clock CLK_PPMULEFT>;
@@ -822,7 +822,7 @@
status = "disabled";
};
- ppmu_camif: ppmu_camif@11ac0000 {
+ ppmu_camif: ppmu@11ac0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11ac0000 0x2000>;
clocks = <&clock CLK_PPMUCAMIF>;
@@ -830,7 +830,7 @@
status = "disabled";
};
- ppmu_lcd0: ppmu_lcd0@11e40000 {
+ ppmu_lcd0: ppmu@11e40000 {
compatible = "samsung,exynos-ppmu";
reg = <0x11e40000 0x2000>;
clocks = <&clock CLK_PPMULCD0>;
@@ -838,13 +838,13 @@
status = "disabled";
};
- ppmu_fsys: ppmu_g3d@12630000 {
+ ppmu_fsys: ppmu@12630000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12630000 0x2000>;
status = "disabled";
};
- ppmu_image: ppmu_image@12aa0000 {
+ ppmu_image: ppmu@12aa0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12aa0000 0x2000>;
clocks = <&clock CLK_PPMUIMAGE>;
@@ -852,7 +852,7 @@
status = "disabled";
};
- ppmu_tv: ppmu_tv@12e40000 {
+ ppmu_tv: ppmu@12e40000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12e40000 0x2000>;
clocks = <&clock CLK_PPMUTV>;
@@ -860,7 +860,7 @@
status = "disabled";
};
- ppmu_g3d: ppmu_g3d@13220000 {
+ ppmu_g3d: ppmu@13220000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13220000 0x2000>;
clocks = <&clock CLK_PPMUG3D>;
@@ -868,7 +868,7 @@
status = "disabled";
};
- ppmu_mfc_left: ppmu_mfc_left@13660000 {
+ ppmu_mfc_left: ppmu@13660000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13660000 0x2000>;
clocks = <&clock CLK_PPMUMFC_L>;
@@ -876,7 +876,7 @@
status = "disabled";
};
- ppmu_mfc_right: ppmu_mfc_right@13670000 {
+ ppmu_mfc_right: ppmu@13670000 {
compatible = "samsung,exynos-ppmu";
reg = <0x13670000 0x2000>;
clocks = <&clock CLK_PPMUMFC_R>;
diff --git a/dts/src/arm/exynos4210-i9100.dts b/dts/src/arm/exynos4210-i9100.dts
index 5370ee4..a0c3bab 100644
--- a/dts/src/arm/exynos4210-i9100.dts
+++ b/dts/src/arm/exynos4210-i9100.dts
@@ -329,7 +329,7 @@
pinctrl-0 = <&i2c3_bus>;
pinctrl-names = "default";
- mxt224-touchscreen@4a {
+ touchscreen@4a {
compatible = "atmel,maxtouch";
reg = <0x4a>;
@@ -348,7 +348,7 @@
pinctrl-0 = <&i2c5_bus>;
pinctrl-names = "default";
- max8997_pmic@66 {
+ pmic@66 {
compatible = "maxim,max8997-pmic";
reg = <0x66>;
@@ -597,7 +597,7 @@
pinctrl-0 = <&i2c7_bus>;
pinctrl-names = "default";
- ak8975@c {
+ magnetometer@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
diff --git a/dts/src/arm/exynos4210-origen.dts b/dts/src/arm/exynos4210-origen.dts
index 7d2cfba..1c53941 100644
--- a/dts/src/arm/exynos4210-origen.dts
+++ b/dts/src/arm/exynos4210-origen.dts
@@ -43,7 +43,7 @@
enable-active-high;
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
up {
@@ -171,7 +171,7 @@
pinctrl-0 = <&i2c0_bus>;
pinctrl-names = "default";
- max8997_pmic@66 {
+ pmic@66 {
compatible = "maxim,max8997-pmic";
reg = <0x66>;
interrupt-parent = <&gpx0>;
diff --git a/dts/src/arm/exynos4210-smdkv310.dts b/dts/src/arm/exynos4210-smdkv310.dts
index c5609af..d5797a6 100644
--- a/dts/src/arm/exynos4210-smdkv310.dts
+++ b/dts/src/arm/exynos4210-smdkv310.dts
@@ -90,61 +90,61 @@
pinctrl-0 = <&keypad_rows &keypad_cols>;
status = "okay";
- key_1 {
+ key-1 {
keypad,row = <0>;
keypad,column = <3>;
linux,code = <2>;
};
- key_2 {
+ key-2 {
keypad,row = <0>;
keypad,column = <4>;
linux,code = <3>;
};
- key_3 {
+ key-3 {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <4>;
};
- key_4 {
+ key-4 {
keypad,row = <0>;
keypad,column = <6>;
linux,code = <5>;
};
- key_5 {
+ key-5 {
keypad,row = <0>;
keypad,column = <7>;
linux,code = <6>;
};
- key_a {
+ key-a {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <30>;
};
- key_b {
+ key-b {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <48>;
};
- key_c {
+ key-c {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <46>;
};
- key_d {
+ key-d {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <32>;
};
- key_e {
+ key-e {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <18>;
@@ -200,7 +200,7 @@
cs-gpios = <&gpc1 2 GPIO_ACTIVE_HIGH>;
status = "okay";
- w25x80@0 {
+ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "w25x80";
diff --git a/dts/src/arm/exynos4210-trats.dts b/dts/src/arm/exynos4210-trats.dts
index a226bec..d2406c9 100644
--- a/dts/src/arm/exynos4210-trats.dts
+++ b/dts/src/arm/exynos4210-trats.dts
@@ -263,7 +263,7 @@
pinctrl-names = "default";
status = "okay";
- mms114-touchscreen@48 {
+ touchscreen@48 {
compatible = "melfas,mms114";
reg = <0x48>;
interrupt-parent = <&gpx0>;
@@ -283,7 +283,7 @@
pinctrl-names = "default";
status = "okay";
- max8997_pmic@66 {
+ pmic@66 {
compatible = "maxim,max8997-pmic";
reg = <0x66>;
@@ -462,6 +462,26 @@
};
};
+&pinctrl_1 {
+ bt_shutdown: bt-shutdown {
+ samsung,pins = "gpl1-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_host_wakeup: bt-host-wakeup {
+ samsung,pins = "gpx2-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_device_wakeup: bt-device-wakeup {
+ samsung,pins = "gpx3-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+};
+
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
@@ -512,6 +532,17 @@
&serial_0 {
status = "okay";
+ pinctrl-0 = <&uart0_data &uart0_fctl>;
+ pinctrl-names = "default";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ pinctrl-0 = <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>;
+ pinctrl-names = "default";
+ shutdown-gpios = <&gpl1 0 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
+ };
};
&serial_1 {
diff --git a/dts/src/arm/exynos4210-universal_c210.dts b/dts/src/arm/exynos4210-universal_c210.dts
index 08284e8..dd44ad2 100644
--- a/dts/src/arm/exynos4210-universal_c210.dts
+++ b/dts/src/arm/exynos4210-universal_c210.dts
@@ -532,6 +532,24 @@
};
&pinctrl_1 {
+ bt_shutdown: bt-shutdown {
+ samsung,pins = "gpe1-4";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_host_wakeup: bt-host-wakeup {
+ samsung,pins = "gpx2-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_device_wakeup: bt-device-wakeup {
+ samsung,pins = "gpx3-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
lp3974_irq: lp3974-irq {
samsung,pins = "gpx0-7", "gpx2-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
@@ -608,6 +626,17 @@
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
+ pinctrl-0 = <&uart0_data &uart0_fctl>;
+ pinctrl-names = "default";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ pinctrl-0 = <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>;
+ pinctrl-names = "default";
+ shutdown-gpios = <&gpe1 4 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
+ };
};
&serial_1 {
diff --git a/dts/src/arm/exynos4210.dtsi b/dts/src/arm/exynos4210.dtsi
index fddc661..70baad9 100644
--- a/dts/src/arm/exynos4210.dtsi
+++ b/dts/src/arm/exynos4210.dtsi
@@ -168,13 +168,13 @@
iommus = <&sysmmu_g2d>;
};
- ppmu_acp: ppmu_acp@10ae0000 {
+ ppmu_acp: ppmu@10ae0000 {
compatible = "samsung,exynos-ppmu";
reg = <0x10ae0000 0x2000>;
status = "disabled";
};
- ppmu_lcd1: ppmu_lcd1@12240000 {
+ ppmu_lcd1: ppmu@12240000 {
compatible = "samsung,exynos-ppmu";
reg = <0x12240000 0x2000>;
clocks = <&clock CLK_PPMULCD1>;
@@ -204,7 +204,7 @@
#iommu-cells = <0>;
};
- bus_dmc: bus_dmc {
+ bus_dmc: bus-dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
@@ -212,7 +212,7 @@
status = "disabled";
};
- bus_acp: bus_acp {
+ bus_acp: bus-acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
@@ -220,7 +220,7 @@
status = "disabled";
};
- bus_peri: bus_peri {
+ bus_peri: bus-peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
@@ -228,7 +228,7 @@
status = "disabled";
};
- bus_fsys: bus_fsys {
+ bus_fsys: bus-fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
@@ -236,7 +236,7 @@
status = "disabled";
};
- bus_display: bus_display {
+ bus_display: bus-display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
@@ -244,7 +244,7 @@
status = "disabled";
};
- bus_lcd0: bus_lcd0 {
+ bus_lcd0: bus-lcd0 {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK200>;
clock-names = "bus";
@@ -252,7 +252,7 @@
status = "disabled";
};
- bus_leftbus: bus_leftbus {
+ bus_leftbus: bus-leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
@@ -260,7 +260,7 @@
status = "disabled";
};
- bus_rightbus: bus_rightbus {
+ bus_rightbus: bus-rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
@@ -268,7 +268,7 @@
status = "disabled";
};
- bus_mfc: bus_mfc {
+ bus_mfc: bus-mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
@@ -276,7 +276,7 @@
status = "disabled";
};
- bus_dmc_opp_table: opp_table1 {
+ bus_dmc_opp_table: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
@@ -295,7 +295,7 @@
};
};
- bus_acp_opp_table: opp_table2 {
+ bus_acp_opp_table: opp-table2 {
compatible = "operating-points-v2";
opp-shared;
@@ -310,7 +310,7 @@
};
};
- bus_peri_opp_table: opp_table3 {
+ bus_peri_opp_table: opp-table3 {
compatible = "operating-points-v2";
opp-shared;
@@ -322,7 +322,7 @@
};
};
- bus_fsys_opp_table: opp_table4 {
+ bus_fsys_opp_table: opp-table4 {
compatible = "operating-points-v2";
opp-shared;
@@ -334,7 +334,7 @@
};
};
- bus_display_opp_table: opp_table5 {
+ bus_display_opp_table: opp-table5 {
compatible = "operating-points-v2";
opp-shared;
@@ -349,7 +349,7 @@
};
};
- bus_leftbus_opp_table: opp_table6 {
+ bus_leftbus_opp_table: opp-table6 {
compatible = "operating-points-v2";
opp-shared;
@@ -463,7 +463,7 @@
"ppmmu3";
operating-points-v2 = <&gpu_opp_table>;
- gpu_opp_table: opp_table {
+ gpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-160000000 {
diff --git a/dts/src/arm/exynos4412-galaxy-s3.dtsi b/dts/src/arm/exynos4412-galaxy-s3.dtsi
index 89ed81f..c14e37d 100644
--- a/dts/src/arm/exynos4412-galaxy-s3.dtsi
+++ b/dts/src/arm/exynos4412-galaxy-s3.dtsi
@@ -15,7 +15,7 @@
i2c10 = &i2c_cm36651;
};
- aat1290 {
+ led-controller {
compatible = "skyworks,aat1290";
flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
@@ -58,9 +58,8 @@
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
- status = "okay";
- ak8975@c {
+ magnetometer@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>;
@@ -75,7 +74,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cm36651@18 {
+ light-sensor@18 {
compatible = "capella,cm36651";
reg = <0x18>;
interrupt-parent = <&gpx0>;
@@ -133,7 +132,7 @@
};
&i2c_3 {
- mms114-touchscreen@48 {
+ touchscreen@48 {
compatible = "melfas,mms114";
reg = <0x48>;
interrupt-parent = <&gpm2>;
diff --git a/dts/src/arm/exynos4412-itop-elite.dts b/dts/src/arm/exynos4412-itop-elite.dts
index f6d0a5f..4743130 100644
--- a/dts/src/arm/exynos4412-itop-elite.dts
+++ b/dts/src/arm/exynos4412-itop-elite.dts
@@ -175,7 +175,7 @@
pinctrl-names = "default";
status = "okay";
- codec: wm8960@1a {
+ codec: audio-codec@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&pmu_system_controller 0>;
diff --git a/dts/src/arm/exynos4412-itop-scp-core.dtsi b/dts/src/arm/exynos4412-itop-scp-core.dtsi
index dfceb15..4583d34 100644
--- a/dts/src/arm/exynos4412-itop-scp-core.dtsi
+++ b/dts/src/arm/exynos4412-itop-scp-core.dtsi
@@ -134,7 +134,7 @@
pinctrl-names = "default";
status = "okay";
- s5m8767: s5m8767-pmic@66 {
+ s5m8767: pmic@66 {
compatible = "samsung,s5m8767-pmic";
reg = <0x66>;
diff --git a/dts/src/arm/exynos4412-midas.dtsi b/dts/src/arm/exynos4412-midas.dtsi
index 7e7c243..111c32b 100644
--- a/dts/src/arm/exynos4412-midas.dtsi
+++ b/dts/src/arm/exynos4412-midas.dtsi
@@ -169,9 +169,8 @@
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
- status = "okay";
- max77693@66 {
+ pmic@66 {
compatible = "maxim,max77693";
interrupt-parent = <&gpx1>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
@@ -193,7 +192,7 @@
};
};
- max77693_haptic {
+ motor-driver {
compatible = "maxim,max77693-haptic";
haptic-supply = <&ldo26_reg>;
pwms = <&pwm 0 38022 0>;
@@ -218,9 +217,8 @@
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
- status = "okay";
- max77693-fuel-gauge@36 {
+ fuel-gauge@36 {
compatible = "maxim,max17047";
interrupt-parent = <&gpx2>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
@@ -262,7 +260,6 @@
pinctrl-0 = <&i2c_mhl_bus>;
pinctrl-names = "default";
- status = "okay";
sii9234: hdmi-bridge@39 {
compatible = "sil,sii9234";
@@ -550,7 +547,7 @@
pinctrl-names = "default";
status = "okay";
- s5c73m3: s5c73m3@3c {
+ s5c73m3: image-sensor@3c {
compatible = "samsung,s5c73m3";
reg = <0x3c>;
xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */
@@ -577,7 +574,7 @@
pinctrl-0 = <&fimc_is_i2c1>;
pinctrl-names = "default";
- s5k6a3@10 {
+ image-sensor@10 {
compatible = "samsung,s5k6a3";
reg = <0x10>;
svdda-supply = <&cam_io_reg>;
@@ -616,7 +613,7 @@
pinctrl-names = "default";
status = "okay";
- wm1811: wm1811@1a {
+ wm1811: audio-codec@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
clocks = <&pmu_system_controller 0>,
@@ -665,7 +662,7 @@
pinctrl-names = "default";
status = "okay";
- max77686: max77686_pmic@9 {
+ max77686: pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx0>;
interrupts = <7 IRQ_TYPE_NONE>;
@@ -1109,6 +1106,21 @@
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
+ bt_shutdown: bt-shutdown {
+ samsung,pins = "gpl0-6";
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_host_wakeup: bt-host-wakeup {
+ samsung,pins = "gpx2-6";
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_device_wakeup: bt-device-wakeup {
+ samsung,pins = "gpx3-1";
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
max77686_irq: max77686-irq {
samsung,pins = "gpx0-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
@@ -1386,7 +1398,20 @@
};
&serial_0 {
+ pinctrl-0 = <&uart0_data &uart0_fctl>;
+ pinctrl-names = "default";
status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ pinctrl-0 = <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>;
+ pinctrl-names = "default";
+ max-speed = <3000000>;
+ shutdown-gpios = <&gpl0 6 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
+ clocks = <&max77686 MAX77686_CLK_PMIC>;
+ };
};
&serial_1 {
@@ -1407,7 +1432,7 @@
cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
status = "okay";
- s5c73m3_spi: s5c73m3@0 {
+ s5c73m3_spi: image-sensor@0 {
compatible = "samsung,s5c73m3";
spi-max-frequency = <50000000>;
reg = <0>;
diff --git a/dts/src/arm/exynos4412-n710x.dts b/dts/src/arm/exynos4412-n710x.dts
index a47b7f3..c49dbb7 100644
--- a/dts/src/arm/exynos4412-n710x.dts
+++ b/dts/src/arm/exynos4412-n710x.dts
@@ -45,7 +45,7 @@
pinctrl-names = "default";
status = "okay";
- mms152-touchscreen@48 {
+ touchscreen@48 {
compatible = "melfas,mms152";
reg = <0x48>;
interrupt-parent = <&gpm2>;
diff --git a/dts/src/arm/exynos4412-odroid-common.dtsi b/dts/src/arm/exynos4412-odroid-common.dtsi
index 2983e91..2b20d90 100644
--- a/dts/src/arm/exynos4412-odroid-common.dtsi
+++ b/dts/src/arm/exynos4412-odroid-common.dtsi
@@ -22,12 +22,12 @@
reg = <0x0204F000 0x1000>;
};
- gpio_keys {
+ gpio_keys: gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_power_key>;
- power_key {
+ power-key {
gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "power key";
@@ -171,7 +171,7 @@
};
&pinctrl_1 {
- gpio_power_key: power_key {
+ gpio_power_key: power-key {
samsung,pins = "gpx1-3";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
@@ -255,7 +255,6 @@
};
&hsotg {
- dr_mode = "peripheral";
status = "okay";
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;
@@ -266,7 +265,7 @@
samsung,i2c-max-bus-freq = <400000>;
status = "okay";
- usb3503: usb3503@8 {
+ usb3503: usb-hub@8 {
compatible = "smsc,usb3503";
reg = <0x08>;
@@ -492,7 +491,7 @@
&i2c_1 {
status = "okay";
- max98090: max98090@10 {
+ max98090: audio-codec@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpx0>;
diff --git a/dts/src/arm/exynos4412-odroidu3.dts b/dts/src/arm/exynos4412-odroidu3.dts
index b8549d8..efaf753 100644
--- a/dts/src/arm/exynos4412-odroidu3.dts
+++ b/dts/src/arm/exynos4412-odroidu3.dts
@@ -16,11 +16,24 @@
model = "Hardkernel ODROID-U3 board based on Exynos4412";
compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4";
+ aliases {
+ ethernet = &ethernet;
+ };
+
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x7FF00000>;
};
+ vbus_otg_reg: regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "VBUS_VDD_5.0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpl2 0 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
leds {
compatible = "gpio-leds";
led1 {
@@ -101,8 +114,21 @@
};
&ehci {
+ #address-cells = <1>;
+ #size-cells = <0>;
phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
phy-names = "hsic0", "hsic1";
+
+ ethernet: usbether@2 {
+ compatible = "usb0424,9730";
+ reg = <2>;
+ local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
+ };
+};
+
+&hsotg {
+ dr_mode = "otg";
+ vbus-supply = <&vbus_otg_reg>;
};
&sound {
diff --git a/dts/src/arm/exynos4412-odroidx.dts b/dts/src/arm/exynos4412-odroidx.dts
index 3ea2a01..0e9d626 100644
--- a/dts/src/arm/exynos4412-odroidx.dts
+++ b/dts/src/arm/exynos4412-odroidx.dts
@@ -15,6 +15,10 @@
model = "Hardkernel ODROID-X board based on Exynos4412";
compatible = "hardkernel,odroid-x", "samsung,exynos4412", "samsung,exynos4";
+ aliases {
+ ethernet = &ethernet;
+ };
+
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x3FF00000>;
@@ -36,19 +40,7 @@
};
};
- gpio_keys {
- pinctrl-0 = <&gpio_power_key &gpio_home_key>;
-
- home_key {
- gpios = <&gpx2 2 GPIO_ACTIVE_HIGH>;
- linux,code = <KEY_HOME>;
- label = "home key";
- debounce-interval = <10>;
- wakeup-source;
- };
- };
-
- regulator_p3v3 {
+ regulator-1 {
compatible = "regulator-fixed";
regulator-name = "p3v3_en";
regulator-min-microvolt = <3300000>;
@@ -72,8 +64,46 @@
};
&ehci {
+ #address-cells = <1>;
+ #size-cells = <0>;
phys = <&exynos_usbphy 2>;
phy-names = "hsic0";
+
+ hub@2 {
+ compatible = "usb0424,3503";
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub@1 {
+ compatible = "usb0424,9514";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet: usbether@1 {
+ compatible = "usb0424,ec00";
+ reg = <1>;
+ local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
+ };
+ };
+ };
+};
+
+&gpio_keys {
+ pinctrl-0 = <&gpio_power_key &gpio_home_key>;
+
+ home-key {
+ gpios = <&gpx2 2 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_HOME>;
+ label = "home key";
+ debounce-interval = <10>;
+ wakeup-source;
+ };
+};
+
+&hsotg {
+ dr_mode = "peripheral";
};
&mshc_0 {
@@ -81,7 +111,7 @@
};
&pinctrl_1 {
- gpio_home_key: home_key {
+ gpio_home_key: home-key {
samsung,pins = "gpx2-2";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
diff --git a/dts/src/arm/exynos4412-origen.dts b/dts/src/arm/exynos4412-origen.dts
index c2e793b..e1f6de5 100644
--- a/dts/src/arm/exynos4412-origen.dts
+++ b/dts/src/arm/exynos4412-origen.dts
@@ -116,7 +116,7 @@
pinctrl-names = "default";
status = "okay";
- s5m8767_pmic@66 {
+ pmic@66 {
compatible = "samsung,s5m8767-pmic";
reg = <0x66>;
@@ -453,37 +453,37 @@
pinctrl-names = "default";
status = "okay";
- key_home {
+ key-home {
keypad,row = <0>;
keypad,column = <0>;
linux,code = <KEY_HOME>;
};
- key_down {
+ key-down {
keypad,row = <0>;
keypad,column = <1>;
linux,code = <KEY_DOWN>;
};
- key_up {
+ key-up {
keypad,row = <1>;
keypad,column = <0>;
linux,code = <KEY_UP>;
};
- key_menu {
+ key-menu {
keypad,row = <1>;
keypad,column = <1>;
linux,code = <KEY_MENU>;
};
- key_back {
+ key-back {
keypad,row = <2>;
keypad,column = <0>;
linux,code = <KEY_BACK>;
};
- key_enter {
+ key-enter {
keypad,row = <2>;
keypad,column = <1>;
linux,code = <KEY_ENTER>;
diff --git a/dts/src/arm/exynos4412-p4note-n8010.dts b/dts/src/arm/exynos4412-p4note-n8010.dts
new file mode 100644
index 0000000..9f55942
--- /dev/null
+++ b/dts/src/arm/exynos4412-p4note-n8010.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's Galaxy Note 10.1 - N801x (wifi only version)
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ */
+
+/dts-v1/;
+#include "exynos4412-p4note.dtsi"
+
+/ {
+ model = "Samsung Galaxy Note 10.1 (GT-N8010/N8013) based on Exynos4412";
+ compatible = "samsung,n8010", "samsung,p4note", "samsung,exynos4412", "samsung,exynos4";
+
+ /* this is the base variant without any kind of modem */
+};
diff --git a/dts/src/arm/exynos4412-p4note.dtsi b/dts/src/arm/exynos4412-p4note.dtsi
new file mode 100644
index 0000000..b2f9d54
--- /dev/null
+++ b/dts/src/arm/exynos4412-p4note.dtsi
@@ -0,0 +1,1132 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's Exynos4412 based p4note device family base DT.
+ * Based on exynos4412-midas.dtsi.
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ */
+
+/dts-v1/;
+#include "exynos4412.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
+
+#include <dt-bindings/clock/maxim,max77686.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/samsung.h>
+
+/ {
+ compatible = "samsung,p4note", "samsung,exynos4412", "samsung,exynos4";
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x80000000>;
+ };
+
+ chosen {
+ stdout-path = &serial_2;
+ };
+
+ firmware@204f000 {
+ compatible = "samsung,secure-firmware";
+ reg = <0x0204F000 0x1000>;
+ };
+
+ fixed-rate-clocks {
+ xxti {
+ compatible = "samsung,clock-xxti";
+ clock-frequency = <0>;
+ };
+
+ xusbxti {
+ compatible = "samsung,clock-xusbxti";
+ clock-frequency = <24000000>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_keys>;
+
+ key-down {
+ gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ label = "volume down";
+ debounce-interval = <10>;
+ };
+
+ key-up {
+ gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ label = "volume up";
+ debounce-interval = <10>;
+ };
+
+ key-power {
+ gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ label = "power";
+ debounce-interval = <10>;
+ wakeup-source;
+ };
+ };
+
+ voltage-regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "TSP_LDO1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&tsp_reg_gpio_1>;
+ gpios = <&gpm4 5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ voltage-regulator-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "TSP_LDO2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&tsp_reg_gpio_2>;
+ gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ voltage-regulator-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "TSP_LDO3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&tsp_reg_gpio_3>;
+ gpios = <&gpb 7 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <20000>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ wlan_pwrseq: sdhci3-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpm3 5 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&wifi_reset>;
+ pinctrl-names = "default";
+ clocks = <&max77686 MAX77686_CLK_PMIC>;
+ clock-names = "ext_clock";
+ };
+
+ i2c-gpio-1 {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ magnetometer@c {
+ compatible = "asahi-kasei,ak8975";
+ reg = <0x0c>;
+ pinctrl-0 = <&ak8975_irq>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpm4>;
+ interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+
+ i2c-gpio-2 {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpy0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpy0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fuel-gauge@36 {
+ compatible = "maxim,max17042";
+ reg = <0x36>;
+ pinctrl-0 = <&fuel_alert_irq>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpx2>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ maxim,rsns-microohm = <10000>;
+ maxim,over-heat-temp = <600>;
+ maxim,over-volt = <4300>;
+ };
+ };
+
+ i2c-gpio-3 {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpm4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpm4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@41 {
+ compatible = "st,stmpe811";
+ reg = <0x41>;
+ pinctrl-0 = <&stmpe_adc_irq>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpx0>;
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ irq-trigger = <0x1>;
+ st,adc-freq = <3>;
+ st,mod-12b = <1>;
+ st,ref-sel = <0>;
+ st,sample-time = <3>;
+
+ stmpe_adc {
+ compatible = "st,stmpe-adc";
+ #io-channel-cells = <1>;
+ st,norequest-mask = <0x2F>;
+ };
+ };
+ };
+};
+
+&adc {
+ vdd-supply = <&ldo3_reg>;
+ /* not verified */
+ status = "okay";
+};
+
+&bus_dmc {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-supply = <&buck1_reg>;
+ status = "okay";
+};
+
+&bus_acp {
+ devfreq = <&bus_dmc>;
+ status = "okay";
+};
+
+&bus_c2c {
+ devfreq = <&bus_dmc>;
+ status = "okay";
+};
+
+&bus_leftbus {
+ devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+ vdd-supply = <&buck3_reg>;
+ status = "okay";
+};
+
+&bus_rightbus {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_display {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_fsys {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_peri {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_mfc {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&cpu0 {
+ cpu0-supply = <&buck2_reg>;
+};
+
+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
+ <&cpu2 7 7>, <&cpu3 7 7>;
+ };
+ map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
+ <&cpu2 13 13>, <&cpu3 13 13>;
+ };
+ };
+};
+
+&exynos_usbphy {
+ status = "okay";
+};
+
+&fimd {
+ pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ display-timings {
+ timing0 {
+ clock-frequency = <66666666>;
+ hactive = <1280>;
+ vactive = <800>;
+ hfront-porch = <18>;
+ hback-porch = <36>;
+ hsync-len = <16>;
+ vback-porch = <16>;
+ vfront-porch = <4>;
+ vsync-len = <3>;
+ hsync-active = <1>;
+ };
+ };
+};
+
+&gpu {
+ mali-supply = <&buck4_reg>;
+ status = "okay";
+};
+
+&hsotg {
+ vusb_a-supply = <&ldo12_reg>;
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&i2c_3 {
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-slave-addr = <0x10>;
+ samsung,i2c-max-bus-freq = <400000>;
+ pinctrl-0 = <&i2c3_bus>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ touchscreen@4a {
+ compatible = "atmel,maxtouch";
+ reg = <0x4a>;
+ pinctrl-0 = <&tsp_rst &tsp_irq>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpm2>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpm0 4 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&i2c_7 {
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-slave-addr = <0x10>;
+ samsung,i2c-max-bus-freq = <400000>;
+ pinctrl-0 = <&i2c7_bus>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ max77686: pmic@9 {
+ compatible = "maxim,max77686";
+ interrupt-parent = <&gpx0>;
+ interrupts = <7 IRQ_TYPE_NONE>;
+ pinctrl-0 = <&max77686_irq>;
+ pinctrl-names = "default";
+ reg = <0x09>;
+ #clock-cells = <1>;
+
+ voltage-regulators {
+ ldo1_reg: LDO1 {
+ regulator-name = "ldo1";
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-name = "ldo2";
+ regulator-always-on;
+ };
+
+ /* WM8994 audio */
+ ldo3_reg: LDO3 {
+ regulator-name = "VCC_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-name = "ldo4";
+ regulator-always-on;
+ };
+
+ ldo5_reg: LDO5 {
+ regulator-name = "VCC_1.8V_IO";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "ldo6";
+ regulator-always-on;
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "ldo7";
+ regulator-always-on;
+ };
+
+ /* CSI IP block */
+ ldo8_reg: LDO8 {
+ regulator-name = "VMIPI_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /* IR LED on/off */
+ ldo9_reg: LDO9 {
+ regulator-name = "VLED_IC_1.9V";
+ regulator-min-microvolt = <1950000>;
+ regulator-max-microvolt = <1950000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /* CSI IP block */
+ ldo10_reg: LDO10 {
+ regulator-name = "VMIPI_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo11_reg: LDO11 {
+ regulator-name = "VABB1_1.9V";
+ regulator-min-microvolt = <1950000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /* USB OTG */
+ ldo12_reg: LDO12 {
+ regulator-name = "VUOTG_3.0V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ /* not connected */
+ ldo13_reg: LDO13 {
+ regulator-name = "ldo13";
+ };
+
+ ldo14_reg: LDO14 {
+ regulator-name = "VABB2_1.9V";
+ regulator-min-microvolt = <1950000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "ldo15";
+ regulator-always-on;
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "ldo16";
+ regulator-always-on;
+ };
+
+ /* not connected */
+ ldo17_reg: LDO17 {
+ regulator-name = "ldo17";
+ };
+
+ /* Camera ISX012 */
+ ldo18_reg: LDO18 {
+ regulator-name = "CAM_IO_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /* Camera S5K6A3 */
+ ldo19_reg: LDO19 {
+ regulator-name = "VT_CORE_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /* not connected */
+ ldo20_reg: LDO20 {
+ regulator-name = "ldo20";
+ };
+
+ /* MMC2 */
+ ldo21_reg: LDO21 {
+ regulator-name = "VTF_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ /* not connected */
+ ldo22_reg: LDO22 {
+ regulator-name = "ldo22";
+ };
+
+ /* ADC */
+ ldo23_reg: LDO23 {
+ regulator-name = "VDD_ADC_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /* Camera S5K6A3 */
+ ldo24_reg: LDO24 {
+ regulator-name = "CAM_A2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo25_reg: LDO25 {
+ regulator-name = "VLED_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /* Camera ISX012 */
+ ldo26_reg: LDO26 {
+ regulator-name = "3MP_AF_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck1_reg: BUCK1 {
+ regulator-name = "VDD_MIF";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "VDD_ARM";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "VDD_INT";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "VDD_G3D";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1075000>;
+ regulator-boot-on;
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = "buck5";
+ regulator-always-on;
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "buck6";
+ regulator-always-on;
+ };
+
+ buck7_reg: BUCK7 {
+ regulator-name = "buck7";
+ regulator-always-on;
+ };
+
+ /* not connected */
+ buck8_reg: BUCK8 {
+ regulator-name = "buck8";
+ };
+
+ buck9_reg: BUCK9 {
+ regulator-name = "3MP_CORE_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&mshc_0 {
+ broken-cd;
+ non-removable;
+ card-detect-delay = <200>;
+ clock-frequency = <400000000>;
+ samsung,dw-mshc-ciu-div = <0>;
+ samsung,dw-mshc-sdr-timing = <2 3>;
+ samsung,dw-mshc-ddr-timing = <1 2>;
+ pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
+ pinctrl-names = "default";
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ status = "okay";
+};
+
+&pinctrl_0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sleep0>;
+
+ tsp_reg_gpio_2: tsp-reg-gpio-2 {
+ samsung,pins = "gpb-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ tsp_reg_gpio_3: tsp-reg-gpio-3 {
+ samsung,pins = "gpb-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ sleep0: sleep-states {
+ PIN_SLP(gpa0-0, INPUT, NONE);
+ PIN_SLP(gpa0-1, OUT0, NONE);
+ PIN_SLP(gpa0-2, INPUT, NONE);
+ PIN_SLP(gpa0-3, INPUT, UP);
+ PIN_SLP(gpa0-4, INPUT, NONE);
+ PIN_SLP(gpa0-5, INPUT, DOWN);
+ PIN_SLP(gpa0-6, INPUT, DOWN);
+ PIN_SLP(gpa0-7, INPUT, UP);
+
+ PIN_SLP(gpa1-0, INPUT, DOWN);
+ PIN_SLP(gpa1-1, INPUT, DOWN);
+ PIN_SLP(gpa1-2, INPUT, DOWN);
+ PIN_SLP(gpa1-3, INPUT, DOWN);
+ PIN_SLP(gpa1-4, INPUT, DOWN);
+ PIN_SLP(gpa1-5, INPUT, DOWN);
+
+ PIN_SLP(gpb-0, INPUT, NONE);
+ PIN_SLP(gpb-1, INPUT, NONE);
+ PIN_SLP(gpb-2, INPUT, NONE);
+ PIN_SLP(gpb-3, INPUT, NONE);
+ PIN_SLP(gpb-4, INPUT, DOWN);
+ PIN_SLP(gpb-5, INPUT, DOWN);
+ PIN_SLP(gpb-6, INPUT, DOWN);
+ PIN_SLP(gpb-7, INPUT, DOWN);
+
+ PIN_SLP(gpc0-0, INPUT, DOWN);
+ PIN_SLP(gpc0-1, INPUT, DOWN);
+ PIN_SLP(gpc0-2, INPUT, DOWN);
+ PIN_SLP(gpc0-3, INPUT, DOWN);
+ PIN_SLP(gpc0-4, INPUT, DOWN);
+
+ PIN_SLP(gpc1-0, INPUT, UP);
+ PIN_SLP(gpc1-1, PREV, NONE);
+ PIN_SLP(gpc1-2, INPUT, UP);
+ PIN_SLP(gpc1-3, INPUT, UP);
+ PIN_SLP(gpc1-4, INPUT, UP);
+
+ PIN_SLP(gpd0-0, INPUT, DOWN);
+ PIN_SLP(gpd0-1, OUT0, NONE);
+ PIN_SLP(gpd0-2, INPUT, NONE);
+ PIN_SLP(gpd0-3, INPUT, NONE);
+
+ PIN_SLP(gpd1-0, INPUT, DOWN);
+ PIN_SLP(gpd1-1, INPUT, DOWN);
+ PIN_SLP(gpd1-2, INPUT, NONE);
+ PIN_SLP(gpd1-3, INPUT, NONE);
+
+ PIN_SLP(gpf0-0, OUT0, NONE);
+ PIN_SLP(gpf0-1, OUT0, NONE);
+ PIN_SLP(gpf0-2, OUT0, NONE);
+ PIN_SLP(gpf0-3, OUT0, NONE);
+ PIN_SLP(gpf0-4, OUT0, NONE);
+ PIN_SLP(gpf0-5, OUT0, NONE);
+ PIN_SLP(gpf0-6, OUT0, NONE);
+ PIN_SLP(gpf0-7, OUT0, NONE);
+
+ PIN_SLP(gpf1-0, OUT0, NONE);
+ PIN_SLP(gpf1-1, OUT0, NONE);
+ PIN_SLP(gpf1-2, OUT0, NONE);
+ PIN_SLP(gpf1-3, OUT0, NONE);
+ PIN_SLP(gpf1-4, OUT0, NONE);
+ PIN_SLP(gpf1-5, OUT0, NONE);
+ PIN_SLP(gpf1-6, OUT0, NONE);
+ PIN_SLP(gpf1-7, OUT0, NONE);
+
+ PIN_SLP(gpf2-0, OUT0, NONE);
+ PIN_SLP(gpf2-1, OUT0, NONE);
+ PIN_SLP(gpf2-2, OUT0, NONE);
+ PIN_SLP(gpf2-3, OUT0, NONE);
+ PIN_SLP(gpf2-4, OUT0, NONE);
+ PIN_SLP(gpf2-5, OUT0, NONE);
+ PIN_SLP(gpf2-6, OUT0, NONE);
+ PIN_SLP(gpf2-7, OUT0, NONE);
+
+ PIN_SLP(gpf3-0, OUT0, NONE);
+ PIN_SLP(gpf3-1, OUT0, NONE);
+ PIN_SLP(gpf3-2, OUT0, NONE);
+ PIN_SLP(gpf3-3, OUT0, NONE);
+ PIN_SLP(gpf3-4, OUT0, NONE);
+ PIN_SLP(gpf3-5, OUT0, NONE);
+
+ PIN_SLP(gpj0-0, INPUT, DOWN);
+ PIN_SLP(gpj0-1, INPUT, DOWN);
+ PIN_SLP(gpj0-2, INPUT, DOWN);
+ PIN_SLP(gpj0-3, PREV, NONE);
+ PIN_SLP(gpj0-4, PREV, NONE);
+ PIN_SLP(gpj0-5, OUT0, NONE);
+ PIN_SLP(gpj0-6, OUT0, NONE);
+ PIN_SLP(gpj0-7, OUT0, NONE);
+
+ PIN_SLP(gpj1-0, OUT0, NONE);
+ PIN_SLP(gpj1-1, INPUT, DOWN);
+ PIN_SLP(gpj1-2, PREV, NONE);
+ PIN_SLP(gpj1-3, OUT0, NONE);
+ };
+};
+
+&pinctrl_1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sleep1>;
+
+ sd3_wifi: sd3-wifi {
+ samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_shutdown: bt-shutdown {
+ samsung,pins = "gpl0-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ uart_sel: uart-sel {
+ samsung,pins = "gpl2-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-val = <1>;
+ /* 0 = CP, 1 = AP (serial output) */
+ };
+
+ tsp_rst: tsp-rst {
+ samsung,pins = "gpm0-4";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ tsp_irq: tsp-irq {
+ samsung,pins = "gpm2-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ wifi_reset: wifi-reset {
+ samsung,pins = "gpm3-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ tsp_reg_gpio_1: tsp-reg-gpio-1 {
+ samsung,pins = "gpm4-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ ak8975_irq: ak8975-irq {
+ samsung,pins = "gpm4-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ };
+
+ stmpe_adc_irq: stmpe-adc-irq {
+ samsung,pins = "gpx0-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ max77686_irq: max77686-irq {
+ samsung,pins = "gpx0-7";
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ gpio_keys: gpio-keys {
+ samsung,pins = "gpx2-2", "gpx2-7", "gpx3-3";
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ fuel_alert_irq: fuel-alert-irq {
+ samsung,pins = "gpx2-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ wifi_host_wake: wifi-host-wake {
+ samsung,pins = "gpx2-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ };
+
+ bt_host_wakeup: bt-host-wakeup {
+ samsung,pins = "gpx2-6";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ bt_device_wakeup: bt-device-wakeup {
+ samsung,pins = "gpx3-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ sdhci2_cd: sdhci2-cd {
+ samsung,pins = "gpx3-4";
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ sleep1: sleep-states {
+ PIN_SLP(gpk0-0, PREV, NONE);
+ PIN_SLP(gpk0-1, PREV, NONE);
+ PIN_SLP(gpk0-2, PREV, NONE);
+ PIN_SLP(gpk0-3, PREV, NONE);
+ PIN_SLP(gpk0-4, PREV, NONE);
+ PIN_SLP(gpk0-5, PREV, NONE);
+ PIN_SLP(gpk0-6, PREV, NONE);
+
+ PIN_SLP(gpk1-0, INPUT, DOWN);
+ PIN_SLP(gpk1-1, INPUT, DOWN);
+ PIN_SLP(gpk1-2, INPUT, DOWN);
+ PIN_SLP(gpk1-3, PREV, NONE);
+ PIN_SLP(gpk1-4, PREV, NONE);
+ PIN_SLP(gpk1-5, PREV, NONE);
+ PIN_SLP(gpk1-6, PREV, NONE);
+
+ PIN_SLP(gpk2-0, INPUT, DOWN);
+ PIN_SLP(gpk2-1, INPUT, DOWN);
+ PIN_SLP(gpk2-2, INPUT, DOWN);
+ PIN_SLP(gpk2-3, INPUT, DOWN);
+ PIN_SLP(gpk2-4, INPUT, DOWN);
+ PIN_SLP(gpk2-5, INPUT, DOWN);
+ PIN_SLP(gpk2-6, INPUT, DOWN);
+
+ PIN_SLP(gpk3-0, OUT0, NONE);
+ PIN_SLP(gpk3-1, INPUT, NONE);
+ PIN_SLP(gpk3-2, INPUT, DOWN);
+ PIN_SLP(gpk3-3, INPUT, NONE);
+ PIN_SLP(gpk3-4, INPUT, NONE);
+ PIN_SLP(gpk3-5, INPUT, NONE);
+ PIN_SLP(gpk3-6, INPUT, NONE);
+
+ PIN_SLP(gpl0-0, OUT0, NONE);
+ PIN_SLP(gpl0-1, INPUT, NONE);
+ PIN_SLP(gpl0-2, INPUT, NONE);
+ PIN_SLP(gpl0-3, INPUT, DOWN);
+ PIN_SLP(gpl0-4, PREV, NONE);
+ PIN_SLP(gpl0-6, PREV, NONE);
+
+ PIN_SLP(gpl1-0, OUT0, NONE);
+ PIN_SLP(gpl1-1, OUT0, NONE);
+
+ PIN_SLP(gpl2-0, INPUT, DOWN);
+ PIN_SLP(gpl2-1, INPUT, DOWN);
+ PIN_SLP(gpl2-2, INPUT, DOWN);
+ PIN_SLP(gpl2-3, INPUT, DOWN);
+ PIN_SLP(gpl2-4, OUT0, NONE);
+ PIN_SLP(gpl2-5, INPUT, DOWN);
+ PIN_SLP(gpl2-6, PREV, NONE);
+ PIN_SLP(gpl2-7, PREV, NONE);
+
+ PIN_SLP(gpm0-0, PREV, NONE);
+ PIN_SLP(gpm0-1, OUT0, NONE);
+ PIN_SLP(gpm0-2, INPUT, DOWN);
+ PIN_SLP(gpm0-3, INPUT, NONE);
+ PIN_SLP(gpm0-4, OUT0, NONE);
+ PIN_SLP(gpm0-5, OUT0, NONE);
+ PIN_SLP(gpm0-6, INPUT, DOWN);
+ PIN_SLP(gpm0-7, OUT0, NONE);
+
+ PIN_SLP(gpm1-0, INPUT, NONE);
+ PIN_SLP(gpm1-1, INPUT, NONE);
+ PIN_SLP(gpm1-2, INPUT, NONE);
+ PIN_SLP(gpm1-3, INPUT, NONE);
+ PIN_SLP(gpm1-4, INPUT, NONE);
+ PIN_SLP(gpm1-5, INPUT, NONE);
+ PIN_SLP(gpm1-6, INPUT, DOWN);
+
+ PIN_SLP(gpm2-0, INPUT, NONE);
+ PIN_SLP(gpm2-1, INPUT, NONE);
+ PIN_SLP(gpm2-2, OUT0, NONE);
+ PIN_SLP(gpm2-3, OUT0, DOWN);
+ PIN_SLP(gpm2-4, INPUT, DOWN);
+
+ PIN_SLP(gpm3-0, PREV, NONE);
+ PIN_SLP(gpm3-1, PREV, NONE);
+ PIN_SLP(gpm3-2, PREV, NONE);
+ PIN_SLP(gpm3-3, OUT1, NONE);
+ PIN_SLP(gpm3-4, OUT0, DOWN);
+ PIN_SLP(gpm3-5, PREV, NONE);
+ PIN_SLP(gpm3-6, PREV, NONE);
+ PIN_SLP(gpm3-7, OUT0, NONE);
+
+ PIN_SLP(gpm4-0, INPUT, NONE);
+ PIN_SLP(gpm4-1, INPUT, NONE);
+ PIN_SLP(gpm4-2, INPUT, DOWN);
+ PIN_SLP(gpm4-3, INPUT, DOWN);
+ PIN_SLP(gpm4-4, PREV, NONE);
+ PIN_SLP(gpm4-5, OUT0, NONE);
+ PIN_SLP(gpm4-6, OUT0, NONE);
+ PIN_SLP(gpm4-7, INPUT, DOWN);
+
+ PIN_SLP(gpy0-0, INPUT, DOWN);
+ PIN_SLP(gpy0-1, INPUT, DOWN);
+ PIN_SLP(gpy0-2, INPUT, NONE);
+ PIN_SLP(gpy0-3, INPUT, NONE);
+ PIN_SLP(gpy0-4, INPUT, NONE);
+ PIN_SLP(gpy0-5, INPUT, NONE);
+
+ PIN_SLP(gpy1-0, INPUT, DOWN);
+ PIN_SLP(gpy1-1, INPUT, DOWN);
+ PIN_SLP(gpy1-2, INPUT, DOWN);
+ PIN_SLP(gpy1-3, INPUT, DOWN);
+
+ PIN_SLP(gpy2-0, PREV, NONE);
+ PIN_SLP(gpy2-1, INPUT, DOWN);
+ PIN_SLP(gpy2-2, INPUT, NONE);
+ PIN_SLP(gpy2-3, INPUT, NONE);
+ PIN_SLP(gpy2-4, INPUT, NONE);
+ PIN_SLP(gpy2-5, INPUT, NONE);
+
+ PIN_SLP(gpy3-0, INPUT, DOWN);
+ PIN_SLP(gpy3-1, INPUT, DOWN);
+ PIN_SLP(gpy3-2, INPUT, DOWN);
+ PIN_SLP(gpy3-3, INPUT, DOWN);
+ PIN_SLP(gpy3-4, INPUT, DOWN);
+ PIN_SLP(gpy3-5, INPUT, DOWN);
+ PIN_SLP(gpy3-6, INPUT, DOWN);
+ PIN_SLP(gpy3-7, INPUT, DOWN);
+
+ PIN_SLP(gpy4-0, INPUT, DOWN);
+ PIN_SLP(gpy4-1, INPUT, DOWN);
+ PIN_SLP(gpy4-2, INPUT, DOWN);
+ PIN_SLP(gpy4-3, INPUT, DOWN);
+ PIN_SLP(gpy4-4, INPUT, DOWN);
+ PIN_SLP(gpy4-5, INPUT, DOWN);
+ PIN_SLP(gpy4-6, INPUT, DOWN);
+ PIN_SLP(gpy4-7, INPUT, DOWN);
+
+ PIN_SLP(gpy5-0, INPUT, DOWN);
+ PIN_SLP(gpy5-1, INPUT, DOWN);
+ PIN_SLP(gpy5-2, INPUT, DOWN);
+ PIN_SLP(gpy5-3, INPUT, DOWN);
+ PIN_SLP(gpy5-4, INPUT, DOWN);
+ PIN_SLP(gpy5-5, INPUT, DOWN);
+ PIN_SLP(gpy5-6, INPUT, DOWN);
+ PIN_SLP(gpy5-7, INPUT, DOWN);
+
+ PIN_SLP(gpy6-0, INPUT, DOWN);
+ PIN_SLP(gpy6-1, INPUT, DOWN);
+ PIN_SLP(gpy6-2, INPUT, DOWN);
+ PIN_SLP(gpy6-3, INPUT, DOWN);
+ PIN_SLP(gpy6-4, INPUT, DOWN);
+ PIN_SLP(gpy6-5, INPUT, DOWN);
+ PIN_SLP(gpy6-6, INPUT, DOWN);
+ PIN_SLP(gpy6-7, INPUT, DOWN);
+ };
+};
+
+&pinctrl_2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sleep2>;
+
+ sleep2: sleep-states {
+ PIN_SLP(gpz-0, INPUT, DOWN);
+ PIN_SLP(gpz-1, INPUT, DOWN);
+ PIN_SLP(gpz-2, INPUT, DOWN);
+ PIN_SLP(gpz-3, INPUT, DOWN);
+ PIN_SLP(gpz-4, INPUT, DOWN);
+ PIN_SLP(gpz-5, INPUT, DOWN);
+ PIN_SLP(gpz-6, INPUT, DOWN);
+ };
+};
+
+&pinctrl_3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sleep3>;
+
+ sleep3: sleep-states {
+ PIN_SLP(gpv0-0, INPUT, DOWN);
+ PIN_SLP(gpv0-1, INPUT, DOWN);
+ PIN_SLP(gpv0-2, INPUT, DOWN);
+ PIN_SLP(gpv0-3, INPUT, DOWN);
+ PIN_SLP(gpv0-4, INPUT, DOWN);
+ PIN_SLP(gpv0-5, INPUT, DOWN);
+ PIN_SLP(gpv0-6, INPUT, DOWN);
+ PIN_SLP(gpv0-7, INPUT, DOWN);
+
+ PIN_SLP(gpv1-0, INPUT, DOWN);
+ PIN_SLP(gpv1-1, INPUT, DOWN);
+ PIN_SLP(gpv1-2, INPUT, DOWN);
+ PIN_SLP(gpv1-3, INPUT, DOWN);
+ PIN_SLP(gpv1-4, INPUT, DOWN);
+ PIN_SLP(gpv1-5, INPUT, DOWN);
+ PIN_SLP(gpv1-6, INPUT, DOWN);
+ PIN_SLP(gpv1-7, INPUT, DOWN);
+
+ PIN_SLP(gpv2-0, INPUT, DOWN);
+ PIN_SLP(gpv2-1, INPUT, DOWN);
+ PIN_SLP(gpv2-2, INPUT, DOWN);
+ PIN_SLP(gpv2-3, INPUT, DOWN);
+ PIN_SLP(gpv2-4, INPUT, DOWN);
+ PIN_SLP(gpv2-5, INPUT, DOWN);
+ PIN_SLP(gpv2-6, INPUT, DOWN);
+ PIN_SLP(gpv2-7, INPUT, DOWN);
+
+ PIN_SLP(gpv3-0, INPUT, DOWN);
+ PIN_SLP(gpv3-1, INPUT, DOWN);
+ PIN_SLP(gpv3-2, INPUT, DOWN);
+ PIN_SLP(gpv3-3, INPUT, DOWN);
+ PIN_SLP(gpv3-4, INPUT, DOWN);
+ PIN_SLP(gpv3-5, INPUT, DOWN);
+ PIN_SLP(gpv3-6, INPUT, DOWN);
+ PIN_SLP(gpv3-7, INPUT, DOWN);
+
+ PIN_SLP(gpv4-0, INPUT, DOWN);
+ PIN_SLP(gpv4-1, INPUT, DOWN);
+ };
+};
+
+&pmu_system_controller {
+ assigned-clocks = <&pmu_system_controller 0>;
+ assigned-clock-parents = <&clock CLK_XUSBXTI>;
+};
+
+&rtc {
+ clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
+ status = "okay";
+};
+
+&sdhci_2 {
+ bus-width = <4>;
+ cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>;
+ pinctrl-names = "default";
+ vmmc-supply = <&ldo21_reg>;
+ status = "okay";
+};
+
+&sdhci_3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ non-removable;
+ bus-width = <4>;
+ mmc-pwrseq = <&wlan_pwrseq>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_wifi>;
+ status = "okay";
+
+ wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake>;
+ interrupt-parent = <&gpx2>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&serial_0 {
+ pinctrl-0 = <&uart0_data &uart0_fctl>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ pinctrl-0 = <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>;
+ pinctrl-names = "default";
+
+ max-speed = <2000000>;
+ shutdown-gpios = <&gpl0 6 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
+ clocks = <&max77686 MAX77686_CLK_PMIC>;
+ clock-names = "lpo";
+ };
+};
+
+&serial_2 {
+ pinctrl-0 = <&uart_sel>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&tmu {
+ status = "okay";
+};
diff --git a/dts/src/arm/exynos4412-smdk4412.dts b/dts/src/arm/exynos4412-smdk4412.dts
index 4997120..cc99b95 100644
--- a/dts/src/arm/exynos4412-smdk4412.dts
+++ b/dts/src/arm/exynos4412-smdk4412.dts
@@ -71,61 +71,61 @@
pinctrl-names = "default";
status = "okay";
- key_1 {
+ key-1 {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <2>;
};
- key_2 {
+ key-2 {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <3>;
};
- key_3 {
+ key-3 {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <4>;
};
- key_4 {
+ key-4 {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <5>;
};
- key_5 {
+ key-5 {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <6>;
};
- key_A {
+ key-A {
keypad,row = <2>;
keypad,column = <6>;
linux,code = <30>;
};
- key_B {
+ key-B {
keypad,row = <2>;
keypad,column = <7>;
linux,code = <48>;
};
- key_C {
+ key-C {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <46>;
};
- key_D {
+ key-D {
keypad,row = <2>;
keypad,column = <5>;
linux,code = <32>;
};
- key_E {
+ key-E {
keypad,row = <0>;
keypad,column = <7>;
linux,code = <18>;
diff --git a/dts/src/arm/exynos4412.dtsi b/dts/src/arm/exynos4412.dtsi
index e76881d..a142fe8 100644
--- a/dts/src/arm/exynos4412.dtsi
+++ b/dts/src/arm/exynos4412.dtsi
@@ -274,7 +274,6 @@
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
#io-channel-cells = <1>;
- io-channel-ranges;
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};
@@ -378,15 +377,17 @@
#iommu-cells = <0>;
};
- bus_dmc: bus_dmc {
+ bus_dmc: bus-dmc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
+ samsung,data-clock-ratio = <4>;
+ #interconnect-cells = <0>;
status = "disabled";
};
- bus_acp: bus_acp {
+ bus_acp: bus-acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_ACP>;
clock-names = "bus";
@@ -394,7 +395,7 @@
status = "disabled";
};
- bus_c2c: bus_c2c {
+ bus_c2c: bus-c2c {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_C2C>;
clock-names = "bus";
@@ -404,7 +405,6 @@
bus_dmc_opp_table: opp-table1 {
compatible = "operating-points-v2";
- opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
@@ -431,7 +431,6 @@
bus_acp_opp_table: opp-table2 {
compatible = "operating-points-v2";
- opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
@@ -447,15 +446,17 @@
};
};
- bus_leftbus: bus_leftbus {
+ bus_leftbus: bus-leftbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
+ interconnects = <&bus_dmc>;
+ #interconnect-cells = <0>;
status = "disabled";
};
- bus_rightbus: bus_rightbus {
+ bus_rightbus: bus-rightbus {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DIV_GDR>;
clock-names = "bus";
@@ -463,15 +464,17 @@
status = "disabled";
};
- bus_display: bus_display {
+ bus_display: bus-display {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK160>;
clock-names = "bus";
operating-points-v2 = <&bus_display_opp_table>;
+ interconnects = <&bus_leftbus &bus_dmc>;
+ #interconnect-cells = <0>;
status = "disabled";
};
- bus_fsys: bus_fsys {
+ bus_fsys: bus-fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK133>;
clock-names = "bus";
@@ -479,7 +482,7 @@
status = "disabled";
};
- bus_peri: bus_peri {
+ bus_peri: bus-peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_ACLK100>;
clock-names = "bus";
@@ -487,7 +490,7 @@
status = "disabled";
};
- bus_mfc: bus_mfc {
+ bus_mfc: bus-mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_SCLK_MFC>;
clock-names = "bus";
@@ -497,7 +500,6 @@
bus_leftbus_opp_table: opp-table3 {
compatible = "operating-points-v2";
- opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
@@ -520,7 +522,6 @@
bus_display_opp_table: opp-table4 {
compatible = "operating-points-v2";
- opp-shared;
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
@@ -532,7 +533,6 @@
bus_fsys_opp_table: opp-table5 {
compatible = "operating-points-v2";
- opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
@@ -544,7 +544,6 @@
bus_peri_opp_table: opp-table6 {
compatible = "operating-points-v2";
- opp-shared;
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
@@ -773,6 +772,7 @@
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
+ interconnects = <&bus_display &bus_dmc>;
};
&pmu {
diff --git a/dts/src/arm/exynos5250-arndale.dts b/dts/src/arm/exynos5250-arndale.dts
index 79546f1..a161f62 100644
--- a/dts/src/arm/exynos5250-arndale.dts
+++ b/dts/src/arm/exynos5250-arndale.dts
@@ -27,7 +27,7 @@
stdout-path = "serial2:115200n8";
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
menu {
@@ -211,7 +211,7 @@
samsung,i2c-max-bus-freq = <20000>;
samsung,i2c-slave-addr = <0x66>;
- s5m8767_pmic@66 {
+ pmic@66 {
compatible = "samsung,s5m8767-pmic";
reg = <0x66>;
interrupt-parent = <&gpx3>;
@@ -511,7 +511,7 @@
&i2c_3 {
status = "okay";
- wm1811: codec@1a {
+ wm1811: audio-codec@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
clocks = <&i2s0 CLK_I2S_CDCLK>;
diff --git a/dts/src/arm/exynos5250-smdk5250.dts b/dts/src/arm/exynos5250-smdk5250.dts
index 186790f..8b5a79a 100644
--- a/dts/src/arm/exynos5250-smdk5250.dts
+++ b/dts/src/arm/exynos5250-smdk5250.dts
@@ -290,7 +290,7 @@
reg = <0x51>;
};
- wm8994: wm8994@1a {
+ wm8994: audio-codec@1a {
compatible = "wlf,wm8994";
reg = <0x1a>;
@@ -385,7 +385,7 @@
status = "okay";
cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;
- w25q80bw@0 {
+ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "w25x80";
diff --git a/dts/src/arm/exynos5250-snow-common.dtsi b/dts/src/arm/exynos5250-snow-common.dtsi
index c952a61..6635f61 100644
--- a/dts/src/arm/exynos5250-snow-common.dtsi
+++ b/dts/src/arm/exynos5250-snow-common.dtsi
@@ -217,7 +217,7 @@
};
};
- mmc3_pwrseq: mmc3_pwrseq {
+ mmc3_pwrseq: mmc3-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpx0 2 GPIO_ACTIVE_LOW>, /* WIFI_RSTn */
<&gpx0 1 GPIO_ACTIVE_LOW>; /* WIFI_EN */
@@ -289,7 +289,7 @@
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
- max77686: max77686@9 {
+ max77686: pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_NONE>;
diff --git a/dts/src/arm/exynos5250-snow-rev5.dts b/dts/src/arm/exynos5250-snow-rev5.dts
index 7cbfc6f..0822b77 100644
--- a/dts/src/arm/exynos5250-snow-rev5.dts
+++ b/dts/src/arm/exynos5250-snow-rev5.dts
@@ -32,7 +32,7 @@
};
&i2c_7 {
- max98090: codec@10 {
+ max98090: audio-codec@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupts = <4 IRQ_TYPE_NONE>;
diff --git a/dts/src/arm/exynos5250-snow.dts b/dts/src/arm/exynos5250-snow.dts
index 75fdc5e..9946dce 100644
--- a/dts/src/arm/exynos5250-snow.dts
+++ b/dts/src/arm/exynos5250-snow.dts
@@ -30,7 +30,7 @@
};
&i2c_7 {
- max98095: codec@11 {
+ max98095: audio-codec@11 {
compatible = "maxim,max98095";
reg = <0x11>;
pinctrl-names = "default";
diff --git a/dts/src/arm/exynos5250-spring.dts b/dts/src/arm/exynos5250-spring.dts
index a92ade3..9d2baea 100644
--- a/dts/src/arm/exynos5250-spring.dts
+++ b/dts/src/arm/exynos5250-spring.dts
@@ -105,7 +105,7 @@
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
- s5m8767-pmic@66 {
+ pmic@66 {
compatible = "samsung,s5m8767-pmic";
reg = <0x66>;
interrupt-parent = <&gpx3>;
diff --git a/dts/src/arm/exynos5250.dtsi b/dts/src/arm/exynos5250.dtsi
index bd2d883..2ea2caa 100644
--- a/dts/src/arm/exynos5250.dtsi
+++ b/dts/src/arm/exynos5250.dtsi
@@ -70,7 +70,7 @@
};
};
- cpu0_opp_table: opp_table0 {
+ cpu0_opp_table: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -635,8 +635,8 @@
#size-cells = <1>;
ranges;
- usbdrd_dwc3: dwc3@12000000 {
- compatible = "synopsys,dwc3";
+ usbdrd_dwc3: usb@12000000 {
+ compatible = "snps,dwc3";
reg = <0x12000000 0x10000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>;
@@ -844,7 +844,6 @@
clocks = <&clock CLK_ADC>;
clock-names = "adc";
#io-channel-cells = <1>;
- io-channel-ranges;
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};
diff --git a/dts/src/arm/exynos5410-odroidxu.dts b/dts/src/arm/exynos5410-odroidxu.dts
index 75b4150..949c072 100644
--- a/dts/src/arm/exynos5410-odroidxu.dts
+++ b/dts/src/arm/exynos5410-odroidxu.dts
@@ -19,6 +19,10 @@
model = "Hardkernel Odroid XU";
compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
+ aliases {
+ ethernet = &ethernet;
+ };
+
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x7ea00000>;
@@ -327,6 +331,8 @@
regulator-name = "vddq_lcd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
+ /* Supplies also GPK and GPJ */
+ regulator-always-on;
};
ldo8_reg: LDO8 {
@@ -498,7 +504,7 @@
&i2c_1 {
status = "okay";
- max98090: max98090@10 {
+ max98090: audio-codec@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpj3>;
@@ -636,12 +642,22 @@
vtmu-supply = <&ldo10_reg>;
};
+&usb3_0_oc {
+ /* External pull up */
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+};
+
+&usb3_1_oc {
+ /* External pull up */
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+};
+
&usbdrd_dwc3_0 {
- dr_mode = "host";
+ dr_mode = "peripheral";
};
&usbdrd_dwc3_1 {
- dr_mode = "peripheral";
+ dr_mode = "host";
};
&usbdrd3_0 {
@@ -653,3 +669,14 @@
vdd33-supply = <&ldo12_reg>;
vdd10-supply = <&ldo15_reg>;
};
+
+&usbhost2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet: usbether@2 {
+ compatible = "usb0424,9730";
+ reg = <2>;
+ local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
+ };
+};
diff --git a/dts/src/arm/exynos5410-pinctrl.dtsi b/dts/src/arm/exynos5410-pinctrl.dtsi
index e5d0a2a..d0aa184 100644
--- a/dts/src/arm/exynos5410-pinctrl.dtsi
+++ b/dts/src/arm/exynos5410-pinctrl.dtsi
@@ -560,6 +560,34 @@
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ usb3_1_oc: usb3-1-oc {
+ samsung,pins = "gpk2-4", "gpk2-5";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
+
+ usb3_1_vbusctrl: usb3-1-vbusctrl {
+ samsung,pins = "gpk2-6", "gpk2-7";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
+
+ usb3_0_oc: usb3-0-oc {
+ samsung,pins = "gpk3-0", "gpk3-1";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
+
+ usb3_0_vbusctrl: usb3-0-vbusctrl {
+ samsung,pins = "gpk3-2", "gpk3-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
};
&pinctrl_2 {
diff --git a/dts/src/arm/exynos5410.dtsi b/dts/src/arm/exynos5410.dtsi
index 60a8768..584ce62 100644
--- a/dts/src/arm/exynos5410.dtsi
+++ b/dts/src/arm/exynos5410.dtsi
@@ -390,6 +390,8 @@
&usbdrd3_0 {
clocks = <&clock CLK_USBD300>;
clock-names = "usbdrd30";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb3_0_oc>, <&usb3_0_vbusctrl>;
};
&usbdrd_phy0 {
@@ -401,6 +403,8 @@
&usbdrd3_1 {
clocks = <&clock CLK_USBD301>;
clock-names = "usbdrd30";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb3_1_oc>, <&usb3_1_vbusctrl>;
};
&usbdrd_dwc3_1 {
diff --git a/dts/src/arm/exynos5420-arndale-octa.dts b/dts/src/arm/exynos5420-arndale-octa.dts
index dd7f838..bf457d0 100644
--- a/dts/src/arm/exynos5420-arndale-octa.dts
+++ b/dts/src/arm/exynos5420-arndale-octa.dts
@@ -39,7 +39,7 @@
};
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
wakeup {
@@ -344,7 +344,7 @@
&hsi2c_4 {
status = "okay";
- s2mps11_pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps11-pmic";
reg = <0x66>;
diff --git a/dts/src/arm/exynos5420-peach-pit.dts b/dts/src/arm/exynos5420-peach-pit.dts
index 2bcbdf8..315b3dc 100644
--- a/dts/src/arm/exynos5420-peach-pit.dts
+++ b/dts/src/arm/exynos5420-peach-pit.dts
@@ -138,7 +138,7 @@
};
};
- mmc1_pwrseq: mmc1_pwrseq {
+ mmc1_pwrseq: mmc1-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpx0 0 GPIO_ACTIVE_LOW>; /* WIFI_EN */
clocks = <&max77802 MAX77802_CLK_32K_CP>;
@@ -205,7 +205,7 @@
status = "okay";
clock-frequency = <400000>;
- max77802: max77802-pmic@9 {
+ max77802: pmic@9 {
compatible = "maxim,max77802";
interrupt-parent = <&gpx3>;
interrupts = <1 IRQ_TYPE_NONE>;
@@ -615,7 +615,7 @@
status = "okay";
clock-frequency = <400000>;
- max98090: codec@10 {
+ max98090: audio-codec@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupts = <2 IRQ_TYPE_NONE>;
diff --git a/dts/src/arm/exynos5420-smdk5420.dts b/dts/src/arm/exynos5420-smdk5420.dts
index 4e49d80..d506da9 100644
--- a/dts/src/arm/exynos5420-smdk5420.dts
+++ b/dts/src/arm/exynos5420-smdk5420.dts
@@ -129,7 +129,7 @@
&hsi2c_4 {
status = "okay";
- s2mps11_pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps11-pmic";
reg = <0x66>;
diff --git a/dts/src/arm/exynos5420.dtsi b/dts/src/arm/exynos5420.dtsi
index 83580f0..e23e8ff 100644
--- a/dts/src/arm/exynos5420.dtsi
+++ b/dts/src/arm/exynos5420.dtsi
@@ -42,7 +42,7 @@
* by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
*/
- cluster_a15_opp_table: opp_table0 {
+ cluster_a15_opp_table: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -108,7 +108,7 @@
};
};
- cluster_a7_opp_table: opp_table1 {
+ cluster_a7_opp_table: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
@@ -240,9 +240,6 @@
dmc: memory-controller@10c20000 {
compatible = "samsung,exynos5422-dmc";
reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
- interrupt-parent = <&combiner>;
- interrupts = <16 0>, <16 1>;
- interrupt-names = "drex_0", "drex_1";
clocks = <&clock CLK_FOUT_SPLL>,
<&clock CLK_MOUT_SCLK_SPLL>,
<&clock CLK_FF_DOUT_SPLL2>,
@@ -1080,112 +1077,112 @@
#iommu-cells = <0>;
};
- bus_wcore: bus_wcore {
+ bus_wcore: bus-wcore {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK400_WCORE>;
clock-names = "bus";
status = "disabled";
};
- bus_noc: bus_noc {
+ bus_noc: bus-noc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK100_NOC>;
clock-names = "bus";
status = "disabled";
};
- bus_fsys_apb: bus_fsys_apb {
+ bus_fsys_apb: bus-fsys-apb {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_PCLK200_FSYS>;
clock-names = "bus";
status = "disabled";
};
- bus_fsys: bus_fsys {
+ bus_fsys: bus-fsys {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK200_FSYS>;
clock-names = "bus";
status = "disabled";
};
- bus_fsys2: bus_fsys2 {
+ bus_fsys2: bus-fsys2 {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK200_FSYS2>;
clock-names = "bus";
status = "disabled";
};
- bus_mfc: bus_mfc {
+ bus_mfc: bus-mfc {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK333>;
clock-names = "bus";
status = "disabled";
};
- bus_gen: bus_gen {
+ bus_gen: bus-gen {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK266>;
clock-names = "bus";
status = "disabled";
};
- bus_peri: bus_peri {
+ bus_peri: bus-peri {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK66>;
clock-names = "bus";
status = "disabled";
};
- bus_g2d: bus_g2d {
+ bus_g2d: bus-g2d {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK333_G2D>;
clock-names = "bus";
status = "disabled";
};
- bus_g2d_acp: bus_g2d_acp {
+ bus_g2d_acp: bus-g2d-acp {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK266_G2D>;
clock-names = "bus";
status = "disabled";
};
- bus_jpeg: bus_jpeg {
+ bus_jpeg: bus-jpeg {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK300_JPEG>;
clock-names = "bus";
status = "disabled";
};
- bus_jpeg_apb: bus_jpeg_apb {
+ bus_jpeg_apb: bus-jpeg-apb {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK166>;
clock-names = "bus";
status = "disabled";
};
- bus_disp1_fimd: bus_disp1_fimd {
+ bus_disp1_fimd: bus-disp1-fimd {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK300_DISP1>;
clock-names = "bus";
status = "disabled";
};
- bus_disp1: bus_disp1 {
+ bus_disp1: bus-disp1 {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK400_DISP1>;
clock-names = "bus";
status = "disabled";
};
- bus_gscl_scaler: bus_gscl_scaler {
+ bus_gscl_scaler: bus-gscl-scaler {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK300_GSCL>;
clock-names = "bus";
status = "disabled";
};
- bus_mscl: bus_mscl {
+ bus_mscl: bus-mscl {
compatible = "samsung,exynos-bus";
clocks = <&clock CLK_DOUT_ACLK400_MSCL>;
clock-names = "bus";
diff --git a/dts/src/arm/exynos5422-odroid-core.dtsi b/dts/src/arm/exynos5422-odroid-core.dtsi
index b1cf941..d0df560 100644
--- a/dts/src/arm/exynos5422-odroid-core.dtsi
+++ b/dts/src/arm/exynos5422-odroid-core.dtsi
@@ -35,7 +35,7 @@
};
};
- bus_wcore_opp_table: opp_table2 {
+ bus_wcore_opp_table: opp-table2 {
compatible = "operating-points-v2";
/* derived from 532MHz MPLL */
@@ -61,7 +61,7 @@
};
};
- bus_noc_opp_table: opp_table3 {
+ bus_noc_opp_table: opp-table3 {
compatible = "operating-points-v2";
/* derived from 666MHz CPLL */
@@ -79,7 +79,7 @@
};
};
- bus_fsys_apb_opp_table: opp_table4 {
+ bus_fsys_apb_opp_table: opp-table4 {
compatible = "operating-points-v2";
/* derived from 666MHz CPLL */
@@ -91,7 +91,7 @@
};
};
- bus_fsys2_opp_table: opp_table5 {
+ bus_fsys2_opp_table: opp-table5 {
compatible = "operating-points-v2";
/* derived from 600MHz DPLL */
@@ -106,7 +106,7 @@
};
};
- bus_mfc_opp_table: opp_table6 {
+ bus_mfc_opp_table: opp-table6 {
compatible = "operating-points-v2";
/* derived from 666MHz CPLL */
@@ -127,7 +127,7 @@
};
};
- bus_gen_opp_table: opp_table7 {
+ bus_gen_opp_table: opp-table7 {
compatible = "operating-points-v2";
/* derived from 532MHz MPLL */
@@ -145,7 +145,7 @@
};
};
- bus_peri_opp_table: opp_table8 {
+ bus_peri_opp_table: opp-table8 {
compatible = "operating-points-v2";
/* derived from 666MHz CPLL */
@@ -154,7 +154,7 @@
};
};
- bus_g2d_opp_table: opp_table9 {
+ bus_g2d_opp_table: opp-table9 {
compatible = "operating-points-v2";
/* derived from 666MHz CPLL */
@@ -175,7 +175,7 @@
};
};
- bus_g2d_acp_opp_table: opp_table10 {
+ bus_g2d_acp_opp_table: opp-table10 {
compatible = "operating-points-v2";
/* derived from 532MHz MPLL */
@@ -193,7 +193,7 @@
};
};
- bus_jpeg_opp_table: opp_table11 {
+ bus_jpeg_opp_table: opp-table11 {
compatible = "operating-points-v2";
/* derived from 600MHz DPLL */
@@ -211,7 +211,7 @@
};
};
- bus_jpeg_apb_opp_table: opp_table12 {
+ bus_jpeg_apb_opp_table: opp-table12 {
compatible = "operating-points-v2";
/* derived from 666MHz CPLL */
@@ -229,7 +229,7 @@
};
};
- bus_disp1_fimd_opp_table: opp_table13 {
+ bus_disp1_fimd_opp_table: opp-table13 {
compatible = "operating-points-v2";
/* derived from 600MHz DPLL */
@@ -241,7 +241,7 @@
};
};
- bus_disp1_opp_table: opp_table14 {
+ bus_disp1_opp_table: opp-table14 {
compatible = "operating-points-v2";
/* derived from 600MHz DPLL */
@@ -256,7 +256,7 @@
};
};
- bus_gscl_opp_table: opp_table15 {
+ bus_gscl_opp_table: opp-table15 {
compatible = "operating-points-v2";
/* derived from 600MHz DPLL */
@@ -271,7 +271,7 @@
};
};
- bus_mscl_opp_table: opp_table16 {
+ bus_mscl_opp_table: opp-table16 {
compatible = "operating-points-v2";
/* derived from 666MHz CPLL */
@@ -292,7 +292,7 @@
};
};
- dmc_opp_table: opp_table17 {
+ dmc_opp_table: opp-table17 {
compatible = "operating-points-v2";
opp00 {
@@ -503,7 +503,7 @@
&hsi2c_4 {
status = "okay";
- s2mps11_pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps11-pmic";
reg = <0x66>;
samsung,s2mps11-acokb-ground;
diff --git a/dts/src/arm/exynos5422-odroidhc1.dts b/dts/src/arm/exynos5422-odroidhc1.dts
index 8126592..20c222b 100644
--- a/dts/src/arm/exynos5422-odroidhc1.dts
+++ b/dts/src/arm/exynos5422-odroidhc1.dts
@@ -15,10 +15,10 @@
compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
"samsung,exynos5";
- pwmleds {
+ led-controller {
compatible = "pwm-leds";
- blueled {
+ led-1 {
label = "blue:heartbeat";
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
diff --git a/dts/src/arm/exynos5422-odroidxu3-audio.dtsi b/dts/src/arm/exynos5422-odroidxu3-audio.dtsi
index b5ec4f4..86b96f9 100644
--- a/dts/src/arm/exynos5422-odroidxu3-audio.dtsi
+++ b/dts/src/arm/exynos5422-odroidxu3-audio.dtsi
@@ -40,7 +40,7 @@
&hsi2c_5 {
status = "okay";
- max98090: max98090@10 {
+ max98090: audio-codec@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpx3>;
diff --git a/dts/src/arm/exynos5422-odroidxu3-common.dtsi b/dts/src/arm/exynos5422-odroidxu3-common.dtsi
index 5da2d81..e35af40 100644
--- a/dts/src/arm/exynos5422-odroidxu3-common.dtsi
+++ b/dts/src/arm/exynos5422-odroidxu3-common.dtsi
@@ -13,12 +13,12 @@
#include "exynos5422-odroid-core.dtsi"
/ {
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&power_key>;
- power_key {
+ power-key {
/*
* The power button (SW2) is connected to the PWRON
* pin (active high) of the S2MPS11 PMIC, which acts
diff --git a/dts/src/arm/exynos5422-odroidxu3-lite.dts b/dts/src/arm/exynos5422-odroidxu3-lite.dts
index 98feeca..62c5928 100644
--- a/dts/src/arm/exynos5422-odroidxu3-lite.dts
+++ b/dts/src/arm/exynos5422-odroidxu3-lite.dts
@@ -16,6 +16,10 @@
/ {
model = "Hardkernel Odroid XU3 Lite";
compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
+
+ aliases {
+ ethernet = &ethernet;
+ };
};
&arm_a7_pmu {
@@ -103,3 +107,21 @@
&usbdrd_dwc3_1 {
dr_mode = "peripheral";
};
+
+&usbhost2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub@1 {
+ compatible = "usb0424,9514";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet: usbether@1 {
+ compatible = "usb0424,ec00";
+ reg = <1>;
+ local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
+ };
+ };
+};
diff --git a/dts/src/arm/exynos5422-odroidxu3.dts b/dts/src/arm/exynos5422-odroidxu3.dts
index db0bc17..cecaeb6 100644
--- a/dts/src/arm/exynos5422-odroidxu3.dts
+++ b/dts/src/arm/exynos5422-odroidxu3.dts
@@ -15,34 +15,38 @@
/ {
model = "Hardkernel Odroid XU3";
compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
+
+ aliases {
+ ethernet = &ethernet;
+ };
};
&i2c_0 {
status = "okay";
/* A15 cluster: VDD_ARM */
- ina231@40 {
+ power-sensor@40 {
compatible = "ti,ina231";
reg = <0x40>;
shunt-resistor = <10000>;
};
/* memory: VDD_MEM */
- ina231@41 {
+ power-sensor@41 {
compatible = "ti,ina231";
reg = <0x41>;
shunt-resistor = <10000>;
};
/* GPU: VDD_G3D */
- ina231@44 {
+ power-sensor@44 {
compatible = "ti,ina231";
reg = <0x44>;
shunt-resistor = <10000>;
};
/* A7 cluster: VDD_KFC */
- ina231@45 {
+ power-sensor@45 {
compatible = "ti,ina231";
reg = <0x45>;
shunt-resistor = <10000>;
@@ -70,3 +74,21 @@
&usbdrd_dwc3_1 {
dr_mode = "peripheral";
};
+
+&usbhost2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub@1 {
+ compatible = "usb0424,9514";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet: usbether@1 {
+ compatible = "usb0424,ec00";
+ reg = <1>;
+ local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
+ };
+ };
+};
diff --git a/dts/src/arm/exynos5422-odroidxu4.dts b/dts/src/arm/exynos5422-odroidxu4.dts
index ddd55d3..ede7822 100644
--- a/dts/src/arm/exynos5422-odroidxu4.dts
+++ b/dts/src/arm/exynos5422-odroidxu4.dts
@@ -17,10 +17,10 @@
compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \
"samsung,exynos5";
- pwmleds {
+ led-controller {
compatible = "pwm-leds";
- blueled {
+ led-1 {
label = "blue:heartbeat";
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
diff --git a/dts/src/arm/exynos54xx-odroidxu-leds.dtsi b/dts/src/arm/exynos54xx-odroidxu-leds.dtsi
index 56acd83..2fc3e86 100644
--- a/dts/src/arm/exynos54xx-odroidxu-leds.dtsi
+++ b/dts/src/arm/exynos54xx-odroidxu-leds.dtsi
@@ -11,10 +11,10 @@
#include <dt-bindings/gpio/gpio.h>
/ {
- pwmleds {
+ led-controller-1 {
compatible = "pwm-leds";
- greenled {
+ led-1 {
label = "green:mmc0";
pwms = <&pwm 1 2000000 0>;
pwm-names = "pwm1";
@@ -26,7 +26,7 @@
linux,default-trigger = "mmc0";
};
- blueled {
+ led-2 {
label = "blue:heartbeat";
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
@@ -35,9 +35,10 @@
};
};
- gpioleds {
+ led-controller-2 {
compatible = "gpio-leds";
- redled {
+
+ led-3 {
label = "red:microSD";
gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
diff --git a/dts/src/arm/exynos54xx.dtsi b/dts/src/arm/exynos54xx.dtsi
index 8aa5117..fe9d34c 100644
--- a/dts/src/arm/exynos54xx.dtsi
+++ b/dts/src/arm/exynos54xx.dtsi
@@ -101,7 +101,6 @@
reg = <0x12d10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
- io-channel-ranges;
status = "disabled";
};
@@ -148,7 +147,7 @@
#size-cells = <1>;
ranges;
- usbdrd_dwc3_0: dwc3@12000000 {
+ usbdrd_dwc3_0: usb@12000000 {
compatible = "snps,dwc3";
reg = <0x12000000 0x10000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
@@ -170,7 +169,7 @@
#size-cells = <1>;
ranges;
- usbdrd_dwc3_1: dwc3@12400000 {
+ usbdrd_dwc3_1: usb@12400000 {
compatible = "snps,dwc3";
reg = <0x12400000 0x10000>;
phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
diff --git a/dts/src/arm/exynos5800-peach-pi.dts b/dts/src/arm/exynos5800-peach-pi.dts
index 60ab0ef..0ce3443 100644
--- a/dts/src/arm/exynos5800-peach-pi.dts
+++ b/dts/src/arm/exynos5800-peach-pi.dts
@@ -138,7 +138,7 @@
};
};
- mmc1_pwrseq: mmc1_pwrseq {
+ mmc1_pwrseq: mmc1-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpx0 0 GPIO_ACTIVE_LOW>; /* WIFI_EN */
clocks = <&max77802 MAX77802_CLK_32K_CP>;
@@ -214,7 +214,7 @@
status = "okay";
clock-frequency = <400000>;
- max77802: max77802-pmic@9 {
+ max77802: pmic@9 {
compatible = "maxim,max77802";
interrupt-parent = <&gpx3>;
interrupts = <1 IRQ_TYPE_NONE>;
diff --git a/dts/src/arm/hi3519-demb.dts b/dts/src/arm/hi3519-demb.dts
index 64f8ed1..f473fa2 100644
--- a/dts/src/arm/hi3519-demb.dts
+++ b/dts/src/arm/hi3519-demb.dts
@@ -14,7 +14,7 @@
serial0 = &uart0;
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
diff --git a/dts/src/arm/hi3519.dtsi b/dts/src/arm/hi3519.dtsi
index 410409a..c524c85 100644
--- a/dts/src/arm/hi3519.dtsi
+++ b/dts/src/arm/hi3519.dtsi
@@ -52,8 +52,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12100000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART0_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -61,8 +61,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12101000 0x1000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART1_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -70,8 +70,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12102000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART2_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -79,8 +79,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12103000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART3_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -88,8 +88,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12104000 0x1000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART4_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -127,8 +127,8 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x12120000 0x1000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_SPI0_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>;
+ clock-names = "sspclk", "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -139,8 +139,8 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x12121000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_SPI1_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>;
+ clock-names = "sspclk", "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -151,8 +151,8 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x12122000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_SPI2_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>;
+ clock-names = "sspclk", "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/dts/src/arm/hi3620-hi4511.dts b/dts/src/arm/hi3620-hi4511.dts
index 8c703c3..ce356c4 100644
--- a/dts/src/arm/hi3620-hi4511.dts
+++ b/dts/src/arm/hi3620-hi4511.dts
@@ -17,46 +17,46 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
- amba {
+ amba-bus {
dual_timer0: dual_timer@800000 {
status = "ok";
};
- uart0: uart@b00000 { /* console */
- pinctrl-names = "default", "idle";
+ uart0: serial@b00000 { /* console */
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
status = "ok";
};
- uart1: uart@b01000 { /* modem */
- pinctrl-names = "default", "idle";
+ uart1: serial@b01000 { /* modem */
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
status = "ok";
};
- uart2: uart@b02000 { /* audience */
- pinctrl-names = "default", "idle";
+ uart2: serial@b02000 { /* audience */
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
status = "ok";
};
- uart3: uart@b03000 {
- pinctrl-names = "default", "idle";
+ uart3: serial@b03000 {
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
status = "ok";
};
- uart4: uart@b04000 {
- pinctrl-names = "default", "idle";
+ uart4: serial@b04000 {
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
status = "ok";
diff --git a/dts/src/arm/hi3620.dtsi b/dts/src/arm/hi3620.dtsi
index f683440..905900b 100644
--- a/dts/src/arm/hi3620.dtsi
+++ b/dts/src/arm/hi3620.dtsi
@@ -63,7 +63,7 @@
};
};
- amba {
+ amba-bus {
#address-cells = <1>;
#size-cells = <1>;
@@ -172,48 +172,48 @@
interrupts = <1 13 0xf01>;
};
- uart0: uart@b00000 {
+ uart0: serial@b00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb00000 0x1000>;
interrupts = <0 20 4>;
- clocks = <&clock HI3620_UARTCLK0>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK0>, <&clock HI3620_UARTCLK0>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart1: uart@b01000 {
+ uart1: serial@b01000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb01000 0x1000>;
interrupts = <0 21 4>;
- clocks = <&clock HI3620_UARTCLK1>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK1>, <&clock HI3620_UARTCLK1>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart2: uart@b02000 {
+ uart2: serial@b02000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb02000 0x1000>;
interrupts = <0 22 4>;
- clocks = <&clock HI3620_UARTCLK2>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK2>, <&clock HI3620_UARTCLK2>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart3: uart@b03000 {
+ uart3: serial@b03000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb03000 0x1000>;
interrupts = <0 23 4>;
- clocks = <&clock HI3620_UARTCLK3>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK3>, <&clock HI3620_UARTCLK3>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart4: uart@b04000 {
+ uart4: serial@b04000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb04000 0x1000>;
interrupts = <0 24 4>;
- clocks = <&clock HI3620_UARTCLK4>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK4>, <&clock HI3620_UARTCLK4>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
diff --git a/dts/src/arm/hip01-ca9x2.dts b/dts/src/arm/hip01-ca9x2.dts
index f05e74e..0314763 100644
--- a/dts/src/arm/hip01-ca9x2.dts
+++ b/dts/src/arm/hip01-ca9x2.dts
@@ -37,7 +37,7 @@
};
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
diff --git a/dts/src/arm/hip01.dtsi b/dts/src/arm/hip01.dtsi
index 975d398..2a79636 100644
--- a/dts/src/arm/hip01.dtsi
+++ b/dts/src/arm/hip01.dtsi
@@ -35,47 +35,47 @@
interrupt-parent = <&gic>;
ranges = <0 0x10000000 0x20000000>;
- amba {
+ amba-bus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
- uart0: uart@10001000 {
+ uart0: serial@10001000 {
compatible = "snps,dw-apb-uart";
reg = <0x10001000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 32 4>;
status = "disabled";
};
- uart1: uart@10002000 {
+ uart1: serial@10002000 {
compatible = "snps,dw-apb-uart";
reg = <0x10002000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 33 4>;
status = "disabled";
};
- uart2: uart@10003000 {
+ uart2: serial@10003000 {
compatible = "snps,dw-apb-uart";
reg = <0x10003000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 34 4>;
status = "disabled";
};
- uart3: uart@10006000 {
+ uart3: serial@10006000 {
compatible = "snps,dw-apb-uart";
reg = <0x10006000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 4 4>;
status = "disabled";
diff --git a/dts/src/arm/hip04-d01.dts b/dts/src/arm/hip04-d01.dts
index 9019e0d..f5691db 100644
--- a/dts/src/arm/hip04-d01.dts
+++ b/dts/src/arm/hip04-d01.dts
@@ -22,7 +22,7 @@
};
soc {
- uart0: uart@4007000 {
+ uart0: serial@4007000 {
status = "ok";
};
};
diff --git a/dts/src/arm/hip04.dtsi b/dts/src/arm/hip04.dtsi
index 555bc6b..bccf5ba 100644
--- a/dts/src/arm/hip04.dtsi
+++ b/dts/src/arm/hip04.dtsi
@@ -250,12 +250,12 @@
<0 79 4>;
};
- uart0: uart@4007000 {
+ uart0: serial@4007000 {
compatible = "snps,dw-apb-uart";
reg = <0x4007000 0x1000>;
interrupts = <0 381 4>;
- clocks = <&clk_168m>;
- clock-names = "uartclk";
+ clocks = <&clk_168m>, <&clk_168m>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
status = "disabled";
};
diff --git a/dts/src/arm/hisi-x5hd2-dkb.dts b/dts/src/arm/hisi-x5hd2-dkb.dts
index d55e9cd..22b122d 100644
--- a/dts/src/arm/hisi-x5hd2-dkb.dts
+++ b/dts/src/arm/hisi-x5hd2-dkb.dts
@@ -35,7 +35,7 @@
};
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x80000000>;
};
diff --git a/dts/src/arm/hisi-x5hd2.dtsi b/dts/src/arm/hisi-x5hd2.dtsi
index e2dbf1d..9721138 100644
--- a/dts/src/arm/hisi-x5hd2.dtsi
+++ b/dts/src/arm/hisi-x5hd2.dtsi
@@ -30,7 +30,7 @@
interrupt-parent = <&gic>;
ranges = <0 0xf8000000 0x8000000>;
- amba {
+ amba-bus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
@@ -86,48 +86,48 @@
status = "disabled";
};
- uart0: uart@b00000 {
+ uart0: serial@b00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b00000 0x1000>;
interrupts = <0 49 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart1: uart@6000 {
+ uart1: serial@6000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00006000 0x1000>;
interrupts = <0 50 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart2: uart@b02000 {
+ uart2: serial@b02000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b02000 0x1000>;
interrupts = <0 51 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart3: uart@b03000 {
+ uart3: serial@b03000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b03000 0x1000>;
interrupts = <0 52 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart4: uart@b04000 {
+ uart4: serial@b04000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb04000 0x1000>;
interrupts = <0 53 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
@@ -423,7 +423,7 @@
interrupts = <0 35 4>;
clocks = <&clock HIX5HD2_MMC_CIU_RST>,
<&clock HIX5HD2_MMC_BIU_CLK>;
- clock-names = "ciu", "biu";
+ clock-names = "biu", "ciu";
};
sd: mmc@1820000 {
@@ -432,7 +432,7 @@
interrupts = <0 34 4>;
clocks = <&clock HIX5HD2_SD_CIU_RST>,
<&clock HIX5HD2_SD_BIU_CLK>;
- clock-names = "ciu","biu";
+ clock-names = "biu", "ciu";
};
gmac0: ethernet@1840000 {
@@ -453,14 +453,14 @@
status = "disabled";
};
- usb0: ehci@1890000 {
+ usb0: usb@1890000 {
compatible = "generic-ehci";
reg = <0x1890000 0x1000>;
interrupts = <0 66 4>;
clocks = <&clock HIX5HD2_USB_CLK>;
};
- usb1: ohci@1880000 {
+ usb1: usb@1880000 {
compatible = "generic-ohci";
reg = <0x1880000 0x1000>;
interrupts = <0 67 4>;
@@ -468,7 +468,7 @@
};
peripheral_ctrl: syscon@a20000 {
- compatible = "syscon";
+ compatible = "hisilicon,peri-subctrl", "syscon";
reg = <0xa20000 0x1000>;
};
diff --git a/dts/src/arm/imx25.dtsi b/dts/src/arm/imx25.dtsi
index 1ab19f1..fdcca82 100644
--- a/dts/src/arm/imx25.dtsi
+++ b/dts/src/arm/imx25.dtsi
@@ -525,7 +525,7 @@
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
};
- wdog@53fdc000 {
+ watchdog@53fdc000 {
compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
reg = <0x53fdc000 0x4000>;
clocks = <&clks 126>;
diff --git a/dts/src/arm/imx27.dtsi b/dts/src/arm/imx27.dtsi
index 7bc1327..fd525c3 100644
--- a/dts/src/arm/imx27.dtsi
+++ b/dts/src/arm/imx27.dtsi
@@ -99,7 +99,7 @@
#dma-channels = <16>;
};
- wdog: wdog@10002000 {
+ wdog: watchdog@10002000 {
compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
reg = <0x10002000 0x1000>;
interrupts = <27>;
diff --git a/dts/src/arm/imx28.dtsi b/dts/src/arm/imx28.dtsi
index 94dfbf5..bbe5215 100644
--- a/dts/src/arm/imx28.dtsi
+++ b/dts/src/arm/imx28.dtsi
@@ -1317,7 +1317,7 @@
status = "disabled";
};
- etn_switch: switch@800f8000 {
+ eth_switch: switch@800f8000 {
reg = <0x800f8000 0x8000>;
status = "disabled";
};
diff --git a/dts/src/arm/imx31.dtsi b/dts/src/arm/imx31.dtsi
index 45333f7..948d2a5 100644
--- a/dts/src/arm/imx31.dtsi
+++ b/dts/src/arm/imx31.dtsi
@@ -315,10 +315,11 @@
clock-names = "ref", "ipg";
};
- wdog: wdog@53fdc000 {
+ wdog: watchdog@53fdc000 {
compatible = "fsl,imx31-wdt", "fsl,imx21-wdt";
reg = <0x53fdc000 0x4000>;
clocks = <&clks 41>;
+ interrupts = <55>;
};
pwm: pwm@53fe0000 {
diff --git a/dts/src/arm/imx35.dtsi b/dts/src/arm/imx35.dtsi
index aba1625..98ccc81 100644
--- a/dts/src/arm/imx35.dtsi
+++ b/dts/src/arm/imx35.dtsi
@@ -294,7 +294,7 @@
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
};
- wdog: wdog@53fdc000 {
+ wdog: watchdog@53fdc000 {
compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
reg = <0x53fdc000 0x4000>;
clocks = <&clks 74>;
diff --git a/dts/src/arm/imx50-kobo-aura.dts b/dts/src/arm/imx50-kobo-aura.dts
index a0eaf86..97cfd97 100644
--- a/dts/src/arm/imx50-kobo-aura.dts
+++ b/dts/src/arm/imx50-kobo-aura.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "imx50.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Kobo Aura (N514)";
@@ -119,7 +120,14 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
- /* TODO: ektf2132 touch controller at 0x15 */
+ touchscreen@15 {
+ reg = <0x15>;
+ compatible = "elan,ektf2132";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ts>;
+ power-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
+ interrupts-extended = <&gpio5 13 IRQ_TYPE_EDGE_FALLING>;
+ };
};
&i2c2 {
@@ -139,7 +147,7 @@
};
&iomuxc {
- pinctrl_gpiokeys: gpiokeys {
+ pinctrl_gpiokeys: gpiokeysgrp {
fsl,pins = <
MX50_PAD_CSPI_MISO__GPIO4_10 0x0
MX50_PAD_SD2_D7__GPIO5_15 0x0
@@ -147,34 +155,34 @@
>;
};
- pinctrl_i2c1: i2c1 {
+ pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX50_PAD_I2C1_SCL__I2C1_SCL 0x400001fd
MX50_PAD_I2C1_SDA__I2C1_SDA 0x400001fd
>;
};
- pinctrl_i2c2: i2c2 {
+ pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX50_PAD_I2C2_SCL__I2C2_SCL 0x400001fd
MX50_PAD_I2C2_SDA__I2C2_SDA 0x400001fd
>;
};
- pinctrl_i2c3: i2c3 {
+ pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX50_PAD_I2C3_SCL__I2C3_SCL 0x400001fd
MX50_PAD_I2C3_SDA__I2C3_SDA 0x400001fd
>;
};
- pinctrl_leds: leds {
+ pinctrl_leds: ledsgrp {
fsl,pins = <
MX50_PAD_PWM1__GPIO6_24 0x0
>;
};
- pinctrl_sd1: sd1 {
+ pinctrl_sd1: sd1grp {
fsl,pins = <
MX50_PAD_SD1_CMD__ESDHC1_CMD 0x1e4
MX50_PAD_SD1_CLK__ESDHC1_CLK 0xd4
@@ -187,7 +195,7 @@
>;
};
- pinctrl_sd2: sd2 {
+ pinctrl_sd2: sd2grp {
fsl,pins = <
MX50_PAD_SD2_CMD__ESDHC2_CMD 0x1e4
MX50_PAD_SD2_CLK__ESDHC2_CLK 0xd4
@@ -198,19 +206,19 @@
>;
};
- pinctrl_sd2_reset: sd2-reset {
+ pinctrl_sd2_reset: sd2-resetgrp {
fsl,pins = <
MX50_PAD_ECSPI2_MOSI__GPIO4_17 0x0
>;
};
- pinctrl_sd2_vmmc: sd2-vmmc {
+ pinctrl_sd2_vmmc: sd2-vmmcgrp {
fsl,pins = <
MX50_PAD_ECSPI1_SCLK__GPIO4_12 0x0
>;
};
- pinctrl_sd3: sd3 {
+ pinctrl_sd3: sd3grp {
fsl,pins = <
MX50_PAD_SD3_CMD__ESDHC3_CMD 0x1e4
MX50_PAD_SD3_CLK__ESDHC3_CLK 0xd4
@@ -225,14 +233,21 @@
>;
};
- pinctrl_uart2: uart2 {
+ pinctrl_ts: tsgrp {
+ fsl,pins = <
+ MX50_PAD_CSPI_MOSI__GPIO4_9 0x0
+ MX50_PAD_SD2_D5__GPIO5_13 0x0
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
fsl,pins = <
MX50_PAD_UART2_TXD__UART2_TXD_MUX 0x1e4
MX50_PAD_UART2_RXD__UART2_RXD_MUX 0x1e4
>;
};
- pinctrl_usbphy: usbphy {
+ pinctrl_usbphy: usbphygrp {
fsl,pins = <
MX50_PAD_ECSPI2_SS0__GPIO4_19 0x0
>;
diff --git a/dts/src/arm/imx50.dtsi b/dts/src/arm/imx50.dtsi
index b6b2e6a..a969f33 100644
--- a/dts/src/arm/imx50.dtsi
+++ b/dts/src/arm/imx50.dtsi
@@ -267,7 +267,7 @@
<&iomuxc 20 140 11>;
};
- wdog1: wdog@53f98000 {
+ wdog1: watchdog@53f98000 {
compatible = "fsl,imx50-wdt", "fsl,imx21-wdt";
reg = <0x53f98000 0x4000>;
interrupts = <58>;
diff --git a/dts/src/arm/imx51-zii-rdu1.dts b/dts/src/arm/imx51-zii-rdu1.dts
index e559ab0..ec8ca3a 100644
--- a/dts/src/arm/imx51-zii-rdu1.dts
+++ b/dts/src/arm/imx51-zii-rdu1.dts
@@ -451,7 +451,7 @@
"", "", "", "",
"", "", "", "";
- unused-sd3-wp-gpio {
+ unused-sd3-wp-hog {
/*
* See pinctrl_esdhc1 below for more details on this
*/
diff --git a/dts/src/arm/imx51.dtsi b/dts/src/arm/imx51.dtsi
index 985e1be..7ebb46c 100644
--- a/dts/src/arm/imx51.dtsi
+++ b/dts/src/arm/imx51.dtsi
@@ -370,14 +370,14 @@
status = "disabled";
};
- wdog1: wdog@73f98000 {
+ wdog1: watchdog@73f98000 {
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f98000 0x4000>;
interrupts = <58>;
clocks = <&clks IMX5_CLK_DUMMY>;
};
- wdog2: wdog@73f9c000 {
+ wdog2: watchdog@73f9c000 {
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f9c000 0x4000>;
interrupts = <59>;
diff --git a/dts/src/arm/imx53-ppd.dts b/dts/src/arm/imx53-ppd.dts
index f7dcdf9..be040b6 100644
--- a/dts/src/arm/imx53-ppd.dts
+++ b/dts/src/arm/imx53-ppd.dts
@@ -176,36 +176,37 @@
power-supply = <&reg_3v3_lcd>;
};
- leds-brightness {
+ led-controller-1 {
compatible = "pwm-leds";
- alarm-brightness {
+ led-1 {
+ label = "alarm-brightness";
pwms = <&pwm1 0 100000>;
max-brightness = <255>;
};
};
- leds {
+ led-controller-2 {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_alarmled_pins>;
- alarm1 {
+ led-2 {
label = "alarm:red";
gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
};
- alarm2 {
+ led-3 {
label = "alarm:yellow";
gpios = <&gpio7 7 GPIO_ACTIVE_HIGH>;
};
- alarm3 {
+ led-4 {
label = "alarm:blue";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
};
- alarm4 {
+ led-5 {
label = "alarm:silenced";
gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>;
};
@@ -589,7 +590,7 @@
touchscreen@4b {
compatible = "atmel,maxtouch";
- reset-gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+ reset-gpio = <&gpio5 19 GPIO_ACTIVE_LOW>;
reg = <0x4b>;
interrupt-parent = <&gpio5>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
diff --git a/dts/src/arm/imx53.dtsi b/dts/src/arm/imx53.dtsi
index 500eeaa..000050a 100644
--- a/dts/src/arm/imx53.dtsi
+++ b/dts/src/arm/imx53.dtsi
@@ -427,14 +427,14 @@
status = "disabled";
};
- wdog1: wdog@53f98000 {
+ wdog1: watchdog@53f98000 {
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f98000 0x4000>;
interrupts = <58>;
clocks = <&clks IMX5_CLK_DUMMY>;
};
- wdog2: wdog@53f9c000 {
+ wdog2: watchdog@53f9c000 {
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f9c000 0x4000>;
interrupts = <59>;
diff --git a/dts/src/arm/imx6dl-alti6p.dts b/dts/src/arm/imx6dl-alti6p.dts
new file mode 100644
index 0000000..4329b37
--- /dev/null
+++ b/dts/src/arm/imx6dl-alti6p.dts
@@ -0,0 +1,564 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2016 Protonic Holland
+ * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/sound/fsl-imx-audmux.h>
+#include "imx6dl.dtsi"
+
+/ {
+ model = "Altesco I6P Board";
+ compatible = "alt,alti6p", "fsl,imx6dl";
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ clock_ksz8081: clock-ksz8081 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+
+ i2c2-mux {
+ compatible = "i2c-mux";
+ i2c-parent = <&i2c2>;
+ mux-controls = <&i2c_mux>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2c4-mux {
+ compatible = "i2c-mux";
+ i2c-parent = <&i2c4>;
+ mux-controls = <&i2c_mux>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds>;
+
+ led-debug0 {
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-debug1 {
+ function = LED_FUNCTION_SD;
+ gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "disk-activity";
+ };
+ };
+
+ i2c_mux: mux-controller {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2cmux>;
+
+ mux-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>,
+ <&gpio5 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_1v8: regulator-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_h1_vbus: regulator-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "h1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_otg_vbus: regulator-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "otg-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "prti6q-sgtl5000";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Line", "Line In Jack",
+ "Headphone", "Headphone Jack",
+ "Speaker", "External Speaker";
+ simple-audio-card,routing =
+ "MIC_IN", "Microphone Jack",
+ "LINE_IN", "Line In Jack",
+ "Headphone Jack", "HP_OUT",
+ "External Speaker", "LINE_OUT";
+
+ simple-audio-card,cpu {
+ sound-dai = <&ssi1>;
+ system-clock-frequency = <0>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&sgtl5000>;
+ bitclock-master;
+ frame-master;
+ };
+ };
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+
+ mux-ssi1 {
+ fsl,audmux-port = <0>;
+ fsl,port-config = <
+ IMX_AUDMUX_V2_PTCR_SYN 0
+ IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
+ IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
+ IMX_AUDMUX_V2_PTCR_TFSDIR 0
+ IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
+ >;
+ };
+
+ mux-pins3 {
+ fsl,audmux-port = <2>;
+ fsl,port-config = <
+ IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
+ 0 IMX_AUDMUX_V2_PDCR_TXRXEN
+ >;
+ };
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1>;
+ xceiver-supply = <&reg_5v0>;
+ status = "okay";
+};
+
+&ecspi1 {
+ cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rmii";
+ clocks = <&clks IMX6QDL_CLK_ENET>,
+ <&clks IMX6QDL_CLK_ENET>,
+ <&clock_ksz8081>;
+ clock-names = "ipg", "ahb", "ptp";
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Microchip KSZ8081RNA PHY */
+ rgmii_phy: ethernet-phy@0 {
+ reg = <0>;
+ interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <300>;
+ };
+ };
+};
+
+&gpio1 {
+ gpio-line-names =
+ "", "SD1_CD", "", "USB_H1_OC", "", "", "", "",
+ "DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "ECSPI1_SS1", "", "USB_EXT1_OC", "USB_EXT1_PWR", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "ETH_RESET", "", "", "BUZZER", "ETH_INTRP", "";
+};
+
+&gpio5 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "I2C_EN13", "I2C_EN24", "", "", "", "",
+ "", "", "", "", "", "AUDIO_RESET", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hdmi>;
+ ddc-i2c-bus = <&i2c1>;
+ status = "okay";
+};
+
+/* DDC */
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ sgtl5000: audio-codec@a {
+ compatible = "fsl,sgtl5000";
+ reg = <0xa>;
+ #sound-dai-cells = <0>;
+ clocks = <&clks 201>;
+ VDDA-supply = <&reg_3v3>;
+ VDDIO-supply = <&reg_3v3>;
+ VDDD-supply = <&reg_1v8>;
+ };
+
+ /* additional i2c devices are added automatically by the boot loader */
+};
+
+&i2c2 {
+ clock-frequency = <50000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ /* external interface, device are configured from user space */
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+
+ temperature-sensor@70 {
+ compatible = "ti,tmp103";
+ reg = <0x70>;
+ };
+};
+
+&i2c4 {
+ clock-frequency = <50000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&ssi1 {
+ #sound-dai-cells = <0>;
+ fsl,mode = "ac97-slave";
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <&reg_h1_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1>;
+ phy_type = "utmi";
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <&reg_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ phy_type = "utmi";
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ disable-wp;
+ cap-sd-highspeed;
+ no-mmc;
+ no-sdio;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ bus-width = <8>;
+ no-1-8-v;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmuxgrp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
+ MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
+ MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
+ MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
+ MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
+ >;
+ };
+
+ pinctrl_can1: can1grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
+ >;
+ };
+
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000
+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008
+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008
+ /* CS */
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ /* MX6QDL_ENET_PINGRP4 */
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
+
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
+ /* Phy reset */
+ MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0
+ /* nINTRP */
+ MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
+ >;
+ };
+
+ pinctrl_hdmi: hdmigrp {
+ fsl,pins = <
+ /* NOTE: DDC is done via I2C2, so DON'T configure DDC
+ * pins for HDMI!
+ */
+ MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_CS3__I2C4_SDA 0x4001f8b1
+ MX6QDL_PAD_NANDF_WP_B__I2C4_SCL 0x4001f8b1
+ >;
+ };
+
+ pinctrl_i2cmux: i2cmuxgrp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b0
+ >;
+ };
+
+ pinctrl_leds: ledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
+ >;
+ };
+
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x8
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbh1: usbh1grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1B058
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1B058
+
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
+ MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
+ >;
+ };
+};
diff --git a/dts/src/arm/imx6dl-aristainetos2_4.dts b/dts/src/arm/imx6dl-aristainetos2_4.dts
index b16603f..dfa6f64 100644
--- a/dts/src/arm/imx6dl-aristainetos2_4.dts
+++ b/dts/src/arm/imx6dl-aristainetos2_4.dts
@@ -46,7 +46,7 @@
/ {
model = "aristainetos2 i.MX6 Dual Lite Board 4";
- compatible = "fsl,imx6dl";
+ compatible = "abb,aristainetos2-imx6dl-4", "fsl,imx6dl";
memory@10000000 {
device_type = "memory";
diff --git a/dts/src/arm/imx6dl-aristainetos2_7.dts b/dts/src/arm/imx6dl-aristainetos2_7.dts
index abb2a1b..5e15212 100644
--- a/dts/src/arm/imx6dl-aristainetos2_7.dts
+++ b/dts/src/arm/imx6dl-aristainetos2_7.dts
@@ -46,7 +46,7 @@
/ {
model = "aristainetos2 i.MX6 Dual Lite Board 7";
- compatible = "fsl,imx6dl";
+ compatible = "abb,aristainetos2-imx6dl-7", "fsl,imx6dl";
memory@10000000 {
device_type = "memory";
diff --git a/dts/src/arm/imx6dl-aristainetos_4.dts b/dts/src/arm/imx6dl-aristainetos_4.dts
index 5c7e853..cc861a4 100644
--- a/dts/src/arm/imx6dl-aristainetos_4.dts
+++ b/dts/src/arm/imx6dl-aristainetos_4.dts
@@ -10,7 +10,7 @@
/ {
model = "aristainetos i.MX6 Dual Lite Board 4";
- compatible = "fsl,imx6dl";
+ compatible = "abb,aristainetos-imx6dl-4", "fsl,imx6dl";
backlight {
compatible = "pwm-backlight";
diff --git a/dts/src/arm/imx6dl-aristainetos_7.dts b/dts/src/arm/imx6dl-aristainetos_7.dts
index 4d58cb4..b6cb788 100644
--- a/dts/src/arm/imx6dl-aristainetos_7.dts
+++ b/dts/src/arm/imx6dl-aristainetos_7.dts
@@ -10,7 +10,7 @@
/ {
model = "aristainetos i.MX6 Dual Lite Board 7";
- compatible = "fsl,imx6dl";
+ compatible = "abb,aristainetos-imx6dl-7", "fsl,imx6dl";
memory@10000000 {
device_type = "memory";
diff --git a/dts/src/arm/imx6dl-colibri-eval-v3.dts b/dts/src/arm/imx6dl-colibri-eval-v3.dts
index 65359ae..7da74e6 100644
--- a/dts/src/arm/imx6dl-colibri-eval-v3.dts
+++ b/dts/src/arm/imx6dl-colibri-eval-v3.dts
@@ -143,7 +143,7 @@
reg = <0x4a>;
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
- reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */
+ reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */
status = "disabled";
};
diff --git a/dts/src/arm/imx6dl-lanmcu.dts b/dts/src/arm/imx6dl-lanmcu.dts
new file mode 100644
index 0000000..6b6e6fc
--- /dev/null
+++ b/dts/src/arm/imx6dl-lanmcu.dts
@@ -0,0 +1,470 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2019 Protonic Holland
+ * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include "imx6dl.dtsi"
+
+/ {
+ model = "Van der Laan LANMCU";
+ compatible = "vdl,lanmcu", "fsl,imx6dl";
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ clock_ksz8081: clock-ksz8081 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 5000000 0>;
+ brightness-levels = <0 1000>;
+ num-interpolated-steps = <20>;
+ default-brightness-level = <19>;
+ };
+
+ display {
+ compatible = "fsl,imx-parallel-display";
+ pinctrl-0 = <&pinctrl_ipu1_disp>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ display_in: endpoint {
+ remote-endpoint = <&ipu1_di0_disp0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ display_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds>;
+
+ led-0 {
+ label = "debug0";
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ panel {
+ compatible = "edt,etm0700g0bdh6";
+ backlight = <&backlight>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&display_out>;
+ };
+ };
+ };
+
+ reg_otg_vbus: regulator-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "otg-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wifi_npd>;
+ reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
+ };
+
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1>;
+ status = "okay";
+};
+
+&can2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can2>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rmii";
+ clocks = <&clks IMX6QDL_CLK_ENET>,
+ <&clks IMX6QDL_CLK_ENET>,
+ <&clock_ksz8081>;
+ clock-names = "ipg", "ahb", "ptp";
+ phy-handle = <&rgmii_phy>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Microchip KSZ8081RNA PHY */
+ rgmii_phy: ethernet-phy@0 {
+ reg = <0>;
+ interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <300>;
+ };
+ };
+};
+
+&gpio1 {
+ gpio-line-names =
+ "", "SD1_CD", "", "", "", "", "", "",
+ "DEBUG_0", "BL_PWM", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "ENET_LED_GREEN",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "TS_INT", "USB_OTG1_OC", "USB_OTG1_PWR", "",
+ "", "", "", "", "UART2_CTS", "", "UART3_CTS", "";
+};
+
+&gpio5 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "ENET_RST", "ENET_INT",
+ "", "", "I2C1_SDA", "I2C1_SCL", "", "", "", "";
+};
+
+&gpio6 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "WLAN_REG_ON", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio7 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "EMMC_RST", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ /* additional i2c devices are added automatically by the boot loader */
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+
+ touchscreen@38 {
+ compatible = "edt,edt-ft5406";
+ reg = <0x38>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ts_edt>;
+ interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
+
+ touchscreen-size-x = <1792>;
+ touchscreen-size-y = <1024>;
+
+ touchscreen-fuzz-x = <0>;
+ touchscreen-fuzz-y = <0>;
+
+ /* Touch screen calibration */
+ threshold = <50>;
+ gain = <5>;
+ offset = <10>;
+ };
+
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+};
+
+&ipu1_di0_disp0 {
+ remote-endpoint = <&display_in>;
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ linux,rs485-enabled-at-boot-time;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ linux,rs485-enabled-at-boot-time;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <&reg_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ phy_type = "utmi";
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ disable-wp;
+ cap-sd-highspeed;
+ no-mmc;
+ no-sdio;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ no-1-8-v;
+ non-removable;
+ mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ bus-width = <8>;
+ no-1-8-v;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_can1: can1grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
+ >;
+ };
+
+ pinctrl_can2: can2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
+ MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ /* MX6QDL_ENET_PINGRP4 */
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
+
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
+ /* Phy reset */
+ MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
+ /* nINTRP */
+ MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_ipu1_disp: ipudisp1grp {
+ fsl,pins = <
+ /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
+ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
+ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
+ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
+ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
+ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
+ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
+ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
+ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
+ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
+ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
+ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
+ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
+ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
+ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
+ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
+ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
+ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
+ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
+ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
+ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
+ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
+ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
+ >;
+ };
+
+ pinctrl_leds: ledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
+ >;
+ };
+
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
+ >;
+ };
+
+ pinctrl_ts_edt: ts1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x130b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x130b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
+ /* power enable, high active */
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
+ MX6QDL_PAD_GPIO_1__SD1_CD_B 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
+ MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
+ >;
+ };
+
+ pinctrl_wifi_npd: wifigrp {
+ fsl,pins = <
+ /* WL_REG_ON */
+ MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069
+ >;
+ };
+};
diff --git a/dts/src/arm/imx6dl-pico-dwarf.dts b/dts/src/arm/imx6dl-pico-dwarf.dts
index 659a8e8..d85b15a 100644
--- a/dts/src/arm/imx6dl-pico-dwarf.dts
+++ b/dts/src/arm/imx6dl-pico-dwarf.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and Dwarf baseboard";
- compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
+ compatible = "technexion,imx6dl-pico-dwarf", "fsl,imx6dl";
};
diff --git a/dts/src/arm/imx6dl-pico-hobbit.dts b/dts/src/arm/imx6dl-pico-hobbit.dts
index d7403c5..08fedcb 100644
--- a/dts/src/arm/imx6dl-pico-hobbit.dts
+++ b/dts/src/arm/imx6dl-pico-hobbit.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and Hobbit baseboard";
- compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
+ compatible = "technexion,imx6dl-pico-hobbit", "fsl,imx6dl";
};
diff --git a/dts/src/arm/imx6dl-pico-nymph.dts b/dts/src/arm/imx6dl-pico-nymph.dts
index b282dbf..32ccfc5 100644
--- a/dts/src/arm/imx6dl-pico-nymph.dts
+++ b/dts/src/arm/imx6dl-pico-nymph.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and Nymph baseboard";
- compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
+ compatible = "technexion,imx6dl-pico-nymph", "fsl,imx6dl";
};
diff --git a/dts/src/arm/imx6dl-pico-pi.dts b/dts/src/arm/imx6dl-pico-pi.dts
index b7b1c07..4590e8a 100644
--- a/dts/src/arm/imx6dl-pico-pi.dts
+++ b/dts/src/arm/imx6dl-pico-pi.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and PI baseboard";
- compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
+ compatible = "technexion,imx6dl-pico-pi", "fsl,imx6dl";
};
diff --git a/dts/src/arm/imx6q-apalis-eval.dts b/dts/src/arm/imx6q-apalis-eval.dts
index fab83ab..a0683b4 100644
--- a/dts/src/arm/imx6q-apalis-eval.dts
+++ b/dts/src/arm/imx6q-apalis-eval.dts
@@ -140,7 +140,7 @@
reg = <0x4a>;
interrupt-parent = <&gpio6>;
interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
- reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13 */
+ reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */
status = "disabled";
};
diff --git a/dts/src/arm/imx6q-apalis-ixora-v1.1.dts b/dts/src/arm/imx6q-apalis-ixora-v1.1.dts
index 1614b1a..86e8478 100644
--- a/dts/src/arm/imx6q-apalis-ixora-v1.1.dts
+++ b/dts/src/arm/imx6q-apalis-ixora-v1.1.dts
@@ -145,7 +145,7 @@
reg = <0x4a>;
interrupt-parent = <&gpio6>;
interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
- reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13 */
+ reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */
status = "disabled";
};
diff --git a/dts/src/arm/imx6q-apalis-ixora.dts b/dts/src/arm/imx6q-apalis-ixora.dts
index fa9f98d..62e7277 100644
--- a/dts/src/arm/imx6q-apalis-ixora.dts
+++ b/dts/src/arm/imx6q-apalis-ixora.dts
@@ -144,7 +144,7 @@
reg = <0x4a>;
interrupt-parent = <&gpio6>;
interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
- reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13 */
+ reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */
status = "disabled";
};
diff --git a/dts/src/arm/imx6q-icore-ofcap10.dts b/dts/src/arm/imx6q-icore-ofcap10.dts
index 81cc346..02aca1e 100644
--- a/dts/src/arm/imx6q-icore-ofcap10.dts
+++ b/dts/src/arm/imx6q-icore-ofcap10.dts
@@ -12,6 +12,17 @@
/ {
model = "Engicam i.CoreM6 Quad/Dual OpenFrame Capacitive touch 10.1 Kit";
compatible = "engicam,imx6-icore", "fsl,imx6q";
+
+ panel {
+ compatible = "ampire,am-1280800n3tzqw-t00h";
+ backlight = <&backlight_lvds>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+ };
};
&ldb {
@@ -22,18 +33,11 @@
fsl,data-width = <24>;
status = "okay";
- display-timings {
- native-mode = <&timing0>;
- timing0: timing0 {
- clock-frequency = <60000000>;
- hactive = <1280>;
- vactive = <800>;
- hback-porch = <40>;
- hfront-porch = <40>;
- vback-porch = <10>;
- vfront-porch = <3>;
- hsync-len = <80>;
- vsync-len = <10>;
+ port@4 {
+ reg = <4>;
+
+ lvds0_out: endpoint {
+ remote-endpoint = <&panel_in>;
};
};
};
diff --git a/dts/src/arm/imx6q-pico-dwarf.dts b/dts/src/arm/imx6q-pico-dwarf.dts
index 618d274..479a63e 100644
--- a/dts/src/arm/imx6q-pico-dwarf.dts
+++ b/dts/src/arm/imx6q-pico-dwarf.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and Dwarf baseboard";
- compatible = "technexion,imx6q-pico", "fsl,imx6q";
+ compatible = "technexion,imx6q-pico-dwarf", "fsl,imx6q";
};
diff --git a/dts/src/arm/imx6q-pico-hobbit.dts b/dts/src/arm/imx6q-pico-hobbit.dts
index 7a66650..b767131 100644
--- a/dts/src/arm/imx6q-pico-hobbit.dts
+++ b/dts/src/arm/imx6q-pico-hobbit.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and Hobbit baseboard";
- compatible = "technexion,imx6q-pico", "fsl,imx6q";
+ compatible = "technexion,imx6q-pico-hobbit", "fsl,imx6q";
};
diff --git a/dts/src/arm/imx6q-pico-nymph.dts b/dts/src/arm/imx6q-pico-nymph.dts
index fe5a7be..e8ad4c1 100644
--- a/dts/src/arm/imx6q-pico-nymph.dts
+++ b/dts/src/arm/imx6q-pico-nymph.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and Nymph baseboard";
- compatible = "technexion,imx6q-pico", "fsl,imx6q";
+ compatible = "technexion,imx6q-pico-nymph", "fsl,imx6q";
};
diff --git a/dts/src/arm/imx6q-pico-pi.dts b/dts/src/arm/imx6q-pico-pi.dts
index 9413f0a..cc2394d 100644
--- a/dts/src/arm/imx6q-pico-pi.dts
+++ b/dts/src/arm/imx6q-pico-pi.dts
@@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and PI baseboard";
- compatible = "technexion,imx6q-pico", "fsl,imx6q";
+ compatible = "technexion,imx6q-pico-pi", "fsl,imx6q";
};
diff --git a/dts/src/arm/imx6qdl-cubox-i.dtsi b/dts/src/arm/imx6qdl-cubox-i.dtsi
index 6704279..1e530d8 100644
--- a/dts/src/arm/imx6qdl-cubox-i.dtsi
+++ b/dts/src/arm/imx6qdl-cubox-i.dtsi
@@ -55,12 +55,12 @@
pinctrl-0 = <&pinctrl_cubox_i_ir>;
};
- pwmleds {
+ led-controller {
compatible = "pwm-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
- front {
+ led-1 {
active-low;
label = "imx6:red:front";
max-brightness = <248>;
diff --git a/dts/src/arm/imx6qdl-kontron-samx6i.dtsi b/dts/src/arm/imx6qdl-kontron-samx6i.dtsi
index 24f793c..d6df598 100644
--- a/dts/src/arm/imx6qdl-kontron-samx6i.dtsi
+++ b/dts/src/arm/imx6qdl-kontron-samx6i.dtsi
@@ -390,21 +390,21 @@
/* I2C_GP */
&i2c1 {
- clock-frequency = <100000>;
+ clock-frequency = <375000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
};
/* HDMI_CTRL */
&i2c2 {
- clock-frequency = <100000>;
+ clock-frequency = <375000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
};
/* I2C_PM */
&i2c3 {
- clock-frequency = <100000>;
+ clock-frequency = <375000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
diff --git a/dts/src/arm/imx6qdl-phytec-pfla02.dtsi b/dts/src/arm/imx6qdl-phytec-pfla02.dtsi
index e361df2..7a1e531 100644
--- a/dts/src/arm/imx6qdl-phytec-pfla02.dtsi
+++ b/dts/src/arm/imx6qdl-phytec-pfla02.dtsi
@@ -116,7 +116,8 @@
status = "okay";
som_eeprom: eeprom@50 {
- compatible = "atmel,24c32";
+ compatible = "catalyst,24c32", "atmel,24c32";
+ pagesize = <32>;
reg = <0x50>;
};
diff --git a/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi b/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi
index 41ebe45..a80aa08 100644
--- a/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi
+++ b/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi
@@ -84,7 +84,8 @@
status = "okay";
eeprom@50 {
- compatible = "atmel,24c32";
+ compatible = "st,24c32", "atmel,24c32";
+ pagesize = <32>;
reg = <0x50>;
};
diff --git a/dts/src/arm/imx6qdl-zii-rdu2.dtsi b/dts/src/arm/imx6qdl-zii-rdu2.dtsi
index 66b1574..c0a7620 100644
--- a/dts/src/arm/imx6qdl-zii-rdu2.dtsi
+++ b/dts/src/arm/imx6qdl-zii-rdu2.dtsi
@@ -330,28 +330,28 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio3_hog>;
- usb-emulation {
+ usb-emulation-hog {
gpio-hog;
gpios = <19 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "usb-emulation";
};
- usb-mode1 {
+ usb-mode1-hog {
gpio-hog;
gpios = <20 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb-mode1";
};
- usb-pwr {
+ usb-pwr-hog {
gpio-hog;
gpios = <22 GPIO_ACTIVE_LOW>;
output-high;
line-name = "usb-pwr-ctrl-en-n";
};
- usb-mode2 {
+ usb-mode2-hog {
gpio-hog;
gpios = <23 GPIO_ACTIVE_HIGH>;
output-high;
diff --git a/dts/src/arm/imx6qdl.dtsi b/dts/src/arm/imx6qdl.dtsi
index 7a8837c..6f59a99 100644
--- a/dts/src/arm/imx6qdl.dtsi
+++ b/dts/src/arm/imx6qdl.dtsi
@@ -45,6 +45,10 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
+ usb0 = &usbotg;
+ usb1 = &usbh1;
+ usb2 = &usbh2;
+ usb3 = &usbh3;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@@ -542,25 +546,25 @@
status = "disabled";
};
- can1: flexcan@2090000 {
+ can1: can@2090000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_CAN1_IPG>,
<&clks IMX6QDL_CLK_CAN1_SERIAL>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x34 28 0x10 17>;
+ fsl,stop-mode = <&gpr 0x34 28>;
status = "disabled";
};
- can2: flexcan@2094000 {
+ can2: can@2094000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x02094000 0x4000>;
interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_CAN2_IPG>,
<&clks IMX6QDL_CLK_CAN2_SERIAL>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x34 29 0x10 18>;
+ fsl,stop-mode = <&gpr 0x34 29>;
status = "disabled";
};
diff --git a/dts/src/arm/imx6qp-prtwd3.dts b/dts/src/arm/imx6qp-prtwd3.dts
new file mode 100644
index 0000000..c427239
--- /dev/null
+++ b/dts/src/arm/imx6qp-prtwd3.dts
@@ -0,0 +1,553 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2018 Protonic Holland
+ * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include "imx6qp.dtsi"
+
+/ {
+ model = "Protonic WD3 board";
+ compatible = "prt,prtwd3", "fsl,imx6qp";
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ memory@10000000 {
+ device_type = "memory";
+ reg = <0x10000000 0x20000000>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>;
+ };
+
+ clock_ksz8081: clock-ksz8081 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+
+ clock_ksz9031: clock-ksz9031 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ clock_mcp251xfd: clock-mcp251xfd {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <20000000>;
+ };
+
+ clock_sja1105: clock-sja1105 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ mdio {
+ compatible = "virtual,mdio-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&gpio5 6 GPIO_ACTIVE_HIGH
+ &gpio5 7 GPIO_ACTIVE_HIGH>;
+
+ /* Microchip KSZ8081 */
+ usbeth_phy: ethernet-phy@3 {
+ reg = <0x3>;
+
+ interrupts-extended = <&gpio5 12 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <500>;
+ reset-deassert-us = <1000>;
+ clocks = <&clock_ksz8081>;
+ clock-names = "rmii-ref";
+ micrel,led-mode = <0>;
+ };
+
+ tja1102_phy0: ethernet-phy@4 {
+ reg = <0x4>;
+
+ interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <20>;
+ reset-deassert-us = <2000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tja1102_phy1: ethernet-phy@5 {
+ reg = <0x5>;
+
+ interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>;
+ };
+ };
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_otg_vbus: regulator-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "otg-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wifi_npd>;
+ reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1>;
+ xceiver-supply = <&reg_5v0>;
+ status = "okay";
+};
+
+&ecspi2 {
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ status = "okay";
+
+ switch@0 {
+ compatible = "nxp,sja1105q";
+ reg = <0>;
+ spi-max-frequency = <4000000>;
+ spi-rx-delay-us = <1>;
+ spi-tx-delay-us = <1>;
+ spi-cpha;
+
+ reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
+
+ clocks = <&clock_sja1105>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "usb";
+ phy-handle = <&usbeth_phy>;
+ phy-mode = "rmii";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "t1slave";
+ phy-handle = <&tja1102_phy1>;
+ phy-mode = "rmii";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "t1master";
+ phy-handle = <&tja1102_phy0>;
+ phy-mode = "rmii";
+
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "rj45";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-id";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "cpu";
+ ethernet = <&fec>;
+ phy-mode = "rgmii-id";
+
+ fixed-link {
+ speed = <100>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&ecspi3 {
+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi3>;
+ status = "okay";
+
+ can@0 {
+ compatible = "microchip,mcp251xfd";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can2>;
+ reg = <0>;
+ clocks = <&clock_mcp251xfd>;
+ spi-max-frequency = <10000000>;
+ interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ status = "okay";
+
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <100>;
+ full-duplex;
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Microchip KSZ9031 */
+ rgmii_phy: ethernet-phy@2 {
+ reg = <2>;
+
+ interrupts-extended = <&gpio1 28 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <1000>;
+
+ clocks = <&clock_ksz9031>;
+ };
+ };
+};
+
+&gpio1 {
+ gpio-line-names =
+ "", "SD1_CD", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "PHY3_RESET", "", "", "PHY3_INT", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "BOARD_ID3",
+ "BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
+ "", "", "", "", "", "", "", "",
+ "", "", "ECSPI2_SS0", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "USB_OTG_OC", "USB_OTG_PWR", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "CAN1_SR", "CAN2_SR", "", "",
+ "", "", "", "", "", "", "", "",
+ "ECSPI3_SS0", "CANFD_INT", "USB_ETH_RESET", "", "", "", "", "";
+};
+
+&gpio5 {
+ gpio-line-names =
+ "", "", "", "", "", "SW_RESET", "", "",
+ "PHY12_INT", "PHY12_RESET", "PHY12_EN", "PHY0_RESET",
+ "PHY0_INT", "", "", "",
+ "", "", "DISP1_EN", "DISP1_LR", "DISP1_TS_IRQ", "LVDS1_PD",
+ "", "",
+ "", "LVDS1_INT", "", "", "DISP0_LR", "DISP0_TS_IRQ",
+ "DISP0_EN", "CAM_GPIO0";
+};
+
+&gpio6 {
+ gpio-line-names =
+ "LVDS0_INT", "LVDS0_PD", "CAM_INT", "CAM_GPIO1", "CAM_PD",
+ "CAM_LOCK", "", "POWER_TG",
+ "POWER_VSEL", "", "WLAN_REG_ON", "USB_ETH_CHG", "", "",
+ "USB_ETH_CHG_ID0", "USB_ETH_CHG_ID1",
+ "USB_ETH_CHG_ID2", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ /* additional i2c devices are added automatically by the boot loader */
+};
+
+&i2c3 {
+ adc@49 {
+ compatible = "ti,ads1015";
+ reg = <0x49>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* VIN */
+ channel@4 {
+ reg = <4>;
+ ti,gain = <1>;
+ ti,datarate = <3>;
+ };
+
+ /* VBUS */
+ channel@5 {
+ reg = <5>;
+ ti,gain = <1>;
+ ti,datarate = <3>;
+ };
+
+ /* ICHG */
+ channel@6 {
+ reg = <6>;
+ ti,gain = <1>;
+ ti,datarate = <3>;
+ };
+
+ channel@7 {
+ reg = <7>;
+ ti,gain = <1>;
+ ti,datarate = <3>;
+ };
+ };
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <&reg_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ phy_type = "utmi";
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usbphynop1 {
+ status = "disabled";
+};
+
+&usbphynop2 {
+ status = "disabled";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ disable-wp;
+ cap-sd-highspeed;
+ no-mmc;
+ no-sdio;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ no-1-8-v;
+ non-removable;
+ mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ bus-width = <8>;
+ no-1-8-v;
+ non-removable;
+ no-sd;
+ no-sdio;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_can1: can1grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
+ /* CAN1_SR */
+ MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
+ >;
+ };
+
+ pinctrl_can2: can2grp {
+ fsl,pins = <
+ /* CAN2_nINT */
+ MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b1
+ /* CAN2_SR */
+ MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13070
+ >;
+ };
+
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
+ >;
+ };
+
+ pinctrl_ecspi3: ecspi3grp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
+ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
+ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
+ /* CS */
+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
+
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
+
+ /* Configure clock provider for RGMII ref clock */
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0
+ /* Configure clock consumer for RGMII ref clock */
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030
+
+ /* SJA1105Q switch reset */
+ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x10030
+
+ /* phy3/rgmii_phy reset */
+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x10030
+ /* phy3/rgmii_phy int */
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x40010000
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
+ >;
+ };
+
+ pinctrl_mdio: mdiogrp {
+ fsl,pins = <
+ /* phy0/usbeth_phy reset */
+ MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x10030
+ /* phy0/usbeth_phy int */
+ MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
+
+ /* phy12/tja1102_phy0 reset */
+ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x10030
+ /* phy12/tja1102_phy0 int */
+ MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x100b1
+ /* phy12/tja1102_phy0 enable. Set 100K pull-up */
+ MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1f030
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
+ MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
+ >;
+ };
+
+ pinctrl_wifi_npd: wifinpd {
+ fsl,pins = <
+ /* WL_REG_ON */
+ MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069
+ >;
+ };
+};
diff --git a/dts/src/arm/imx6sl-warp.dts b/dts/src/arm/imx6sl-warp.dts
index 408da70..9d7c888 100644
--- a/dts/src/arm/imx6sl-warp.dts
+++ b/dts/src/arm/imx6sl-warp.dts
@@ -51,8 +51,8 @@
#include "imx6sl.dtsi"
/ {
- model = "WaRP Board";
- compatible = "warp,imx6sl-warp", "fsl,imx6sl";
+ model = "Revotics WaRP Board";
+ compatible = "revotics,imx6sl-warp", "fsl,imx6sl";
memory@80000000 {
device_type = "memory";
diff --git a/dts/src/arm/imx6sl.dtsi b/dts/src/arm/imx6sl.dtsi
index 91a8c54..997b96c 100644
--- a/dts/src/arm/imx6sl.dtsi
+++ b/dts/src/arm/imx6sl.dtsi
@@ -39,6 +39,9 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
+ usb0 = &usbotg1;
+ usb1 = &usbotg2;
+ usb2 = &usbh;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
diff --git a/dts/src/arm/imx6sll.dtsi b/dts/src/arm/imx6sll.dtsi
index 0b62220..04f8d63 100644
--- a/dts/src/arm/imx6sll.dtsi
+++ b/dts/src/arm/imx6sll.dtsi
@@ -36,6 +36,8 @@
spi1 = &ecspi2;
spi3 = &ecspi3;
spi4 = &ecspi4;
+ usb0 = &usbotg1;
+ usb1 = &usbotg2;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
diff --git a/dts/src/arm/imx6sx-softing-vining-2000.dts b/dts/src/arm/imx6sx-softing-vining-2000.dts
index 5547916..b9a1401 100644
--- a/dts/src/arm/imx6sx-softing-vining-2000.dts
+++ b/dts/src/arm/imx6sx-softing-vining-2000.dts
@@ -40,22 +40,22 @@
regulator-max-microvolt = <3300000>;
};
- pwmleds {
+ led-controller {
compatible = "pwm-leds";
- red {
+ led-1 {
label = "red";
max-brightness = <255>;
pwms = <&pwm6 0 50000>;
};
- green {
+ led-2 {
label = "green";
max-brightness = <255>;
pwms = <&pwm2 0 50000>;
};
- blue {
+ led-3 {
label = "blue";
max-brightness = <255>;
pwms = <&pwm1 0 50000>;
diff --git a/dts/src/arm/imx6sx.dtsi b/dts/src/arm/imx6sx.dtsi
index dfdca18..8516730 100644
--- a/dts/src/arm/imx6sx.dtsi
+++ b/dts/src/arm/imx6sx.dtsi
@@ -49,6 +49,9 @@
spi2 = &ecspi3;
spi3 = &ecspi4;
spi4 = &ecspi5;
+ usb0 = &usbotg1;
+ usb1 = &usbotg2;
+ usb2 = &usbh;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@@ -463,7 +466,7 @@
clocks = <&clks IMX6SX_CLK_CAN1_IPG>,
<&clks IMX6SX_CLK_CAN1_SERIAL>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
+ fsl,stop-mode = <&gpr 0x10 1>;
status = "disabled";
};
@@ -474,7 +477,7 @@
clocks = <&clks IMX6SX_CLK_CAN2_IPG>,
<&clks IMX6SX_CLK_CAN2_SERIAL>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
+ fsl,stop-mode = <&gpr 0x10 2>;
status = "disabled";
};
diff --git a/dts/src/arm/imx6ul-ccimx6ulsbcpro.dts b/dts/src/arm/imx6ul-ccimx6ulsbcpro.dts
index a0bbec5..3ec042b 100644
--- a/dts/src/arm/imx6ul-ccimx6ulsbcpro.dts
+++ b/dts/src/arm/imx6ul-ccimx6ulsbcpro.dts
@@ -110,7 +110,7 @@
};
&gpio5 {
- emmc-usd-mux {
+ emmc-usd-mux-hog {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-high;
diff --git a/dts/src/arm/imx6ul-phytec-phycore-som.dtsi b/dts/src/arm/imx6ul-phytec-phycore-som.dtsi
index 88f631c..19a0626 100644
--- a/dts/src/arm/imx6ul-phytec-phycore-som.dtsi
+++ b/dts/src/arm/imx6ul-phytec-phycore-som.dtsi
@@ -75,6 +75,7 @@
eeprom@52 {
compatible = "catalyst,24c32", "atmel,24c32";
+ pagesize = <32>;
reg = <0x52>;
};
};
diff --git a/dts/src/arm/imx6ul-phytec-segin-ff-rdk-emmc.dts b/dts/src/arm/imx6ul-phytec-segin-ff-rdk-emmc.dts
new file mode 100644
index 0000000..cfc744f
--- /dev/null
+++ b/dts/src/arm/imx6ul-phytec-segin-ff-rdk-emmc.dts
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2020 PHYTEC Messtechnik GmbH
+ * Author: Yunus Bas <y.bas@phytec.de>
+ */
+
+/dts-v1/;
+#include "imx6ul.dtsi"
+#include "imx6ul-phytec-phycore-som.dtsi"
+#include "imx6ul-phytec-segin.dtsi"
+#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
+#include "imx6ul-phytec-segin-peb-av-02.dtsi"
+
+/ {
+ model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with eMMC";
+ compatible = "phytec,imx6ul-pbacd10-emmc", "phytec,imx6ul-pbacd10",
+ "phytec,imx6ul-pcl063","fsl,imx6ul";
+};
+
+&adc1 {
+ status = "okay";
+};
+
+&can1 {
+ status = "okay";
+};
+
+&ecspi3 {
+ status = "okay";
+};
+
+&ethphy1 {
+ status = "okay";
+};
+
+&ethphy2 {
+ status = "okay";
+};
+
+&fec1 {
+ status = "okay";
+};
+
+&fec2 {
+ status = "okay";
+};
+
+&i2c_rtc {
+ status = "okay";
+};
+
+&reg_can1_en {
+ status = "okay";
+};
+
+&reg_sound_1v8 {
+ status = "okay";
+};
+
+&reg_sound_3v3 {
+ status = "okay";
+};
+
+&sai2 {
+ status = "okay";
+};
+
+&sound {
+ status = "okay";
+};
+
+&tlv320 {
+ status = "okay";
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&usbotg1 {
+ status = "okay";
+};
+
+&usbotg2 {
+ status = "okay";
+};
+
+&usdhc1 {
+ status = "okay";
+};
+
+&usdhc2 {
+ status = "okay";
+};
diff --git a/dts/src/arm/imx6ul-phytec-segin-ff-rdk-nand.dts b/dts/src/arm/imx6ul-phytec-segin-ff-rdk-nand.dts
index 699dfcb..bff98e6 100644
--- a/dts/src/arm/imx6ul-phytec-segin-ff-rdk-nand.dts
+++ b/dts/src/arm/imx6ul-phytec-segin-ff-rdk-nand.dts
@@ -9,6 +9,7 @@
#include "imx6ul-phytec-phycore-som.dtsi"
#include "imx6ul-phytec-segin.dtsi"
#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
+#include "imx6ul-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";
diff --git a/dts/src/arm/imx6ul-phytec-segin-peb-av-02.dtsi b/dts/src/arm/imx6ul-phytec-segin-peb-av-02.dtsi
new file mode 100644
index 0000000..7cda694
--- /dev/null
+++ b/dts/src/arm/imx6ul-phytec-segin-peb-av-02.dtsi
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2016, 2020 PHYTEC Messtechnik
+ * Author: Christian Hemp <c.hemp@phytec.de>
+ * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
+ */
+
+/ {
+ backlight_lcd: backlight-lcd {
+ compatible = "pwm-backlight";
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <5>;
+ power-supply = <&reg_backlight_en>;
+ pwms = <&pwm3 0 5000000>;
+ status = "disabled";
+ };
+
+ lcd_panel: lcd-panel {
+ compatible = "edt,etm0700g0edh6";
+ backlight = <&backlight_lcd>;
+ status = "disabled";
+
+ port {
+ lcd_panel_in: endpoint {
+ remote-endpoint = <&lcdif_parallel_out>;
+ };
+ };
+ };
+
+ reg_backlight_en: regulator-backlight-en {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_backlight_en>;
+ regulator-name = "backlight-lcd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&i2c1 {
+ edt_ft5406: touchscreen@38 {
+ compatible = "edt,edt-ft5406";
+ reg = <0x38>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_edt_ft5406>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
+ wakeup-source;
+ status = "disabled";
+ };
+
+ stmpe: touchscreen@44 {
+ compatible = "st,stmpe811";
+ reg = <0x44>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_stmpe>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio5>;
+ wakeup-source;
+ status = "disabled";
+
+ stmpe_touchscreen {
+ compatible = "st,stmpe-ts";
+ st,sample-time = <4>;
+ st,mod-12b = <1>;
+ st,ref-sel = <0>;
+ st,adc-freq = <1>;
+ st,ave-ctrl = <1>;
+ st,touch-det-delay = <2>;
+ st,settling = <2>;
+ st,fraction-z = <7>;
+ st,i-drive = <1>;
+ touchscreen-inverted-x = <1>;
+ touchscreen-inverted-y = <1>;
+ };
+ };
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat>;
+ status = "disabled";
+
+ port {
+ lcdif_parallel_out: endpoint {
+ remote-endpoint = <&lcd_panel_in>;
+ };
+ };
+};
+
+&pwm3 {
+ #pwm-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm3>;
+ status = "disabled";
+};
+
+&iomuxc {
+ pinctrl_edt_ft5406: edtft5406grp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
+ >;
+ };
+
+ pinctrl_backlight_en: bachlightengrp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0
+ >;
+ };
+
+ pinctrl_lcdif_dat: lcdifdatgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x59
+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x59
+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x59
+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x59
+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x59
+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x59
+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x59
+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x59
+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x59
+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x59
+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x59
+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x59
+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x59
+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x59
+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x59
+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x59
+ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x59
+ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x59
+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x59
+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x59
+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x59
+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x59
+ >;
+ };
+
+ pinctrl_pwm3: pwm3grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
+ >;
+ };
+
+ pinctrl_stmpe: stmpegrp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
+ >;
+ };
+};
diff --git a/dts/src/arm/imx6ul-phytec-segin.dtsi b/dts/src/arm/imx6ul-phytec-segin.dtsi
index f1513e6..95e4080 100644
--- a/dts/src/arm/imx6ul-phytec-segin.dtsi
+++ b/dts/src/arm/imx6ul-phytec-segin.dtsi
@@ -130,31 +130,6 @@
status = "disabled";
};
- stmpe: touchscreen@44 {
- compatible = "st,stmpe811";
- reg = <0x44>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- interrupt-parent = <&gpio5>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_stmpe>;
- status = "disabled";
-
- touchscreen {
- compatible = "st,stmpe-ts";
- st,sample-time = <4>;
- st,mod-12b = <1>;
- st,ref-sel = <0>;
- st,adc-freq = <1>;
- st,ave-ctrl = <1>;
- st,touch-det-delay = <2>;
- st,settling = <2>;
- st,fraction-z = <7>;
- st,i-drive = <1>;
- touchscreen-inverted-x = <1>;
- touchscreen-inverted-y = <1>;
- };
- };
-
i2c_rtc: rtc@68 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_int>;
@@ -176,12 +151,6 @@
};
};
-&pwm3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm3>;
- status = "disabled";
-};
-
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
@@ -267,12 +236,6 @@
>;
};
- pinctrl_pwm3: pwm3grp {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
- >;
- };
-
pinctrl_rtc_int: rtcintgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
@@ -289,12 +252,6 @@
>;
};
- pinctrl_stmpe: stmpegrp {
- fsl,pins = <
- MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
- >;
- };
-
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
diff --git a/dts/src/arm/imx6ul.dtsi b/dts/src/arm/imx6ul.dtsi
index d7d9f3e..9d3411c 100644
--- a/dts/src/arm/imx6ul.dtsi
+++ b/dts/src/arm/imx6ul.dtsi
@@ -47,6 +47,8 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
+ usb0 = &usbotg1;
+ usb1 = &usbotg2;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@@ -423,25 +425,25 @@
status = "disabled";
};
- can1: flexcan@2090000 {
+ can1: can@2090000 {
compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
<&clks IMX6UL_CLK_CAN1_SERIAL>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
+ fsl,stop-mode = <&gpr 0x10 1>;
status = "disabled";
};
- can2: flexcan@2094000 {
+ can2: can@2094000 {
compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
reg = <0x02094000 0x4000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
<&clks IMX6UL_CLK_CAN2_SERIAL>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
+ fsl,stop-mode = <&gpr 0x10 2>;
status = "disabled";
};
diff --git a/dts/src/arm/imx6ull-phytec-segin-ff-rdk-emmc.dts b/dts/src/arm/imx6ull-phytec-segin-ff-rdk-emmc.dts
index 9648d4e..8e2a4c5 100644
--- a/dts/src/arm/imx6ull-phytec-segin-ff-rdk-emmc.dts
+++ b/dts/src/arm/imx6ull-phytec-segin-ff-rdk-emmc.dts
@@ -9,6 +9,7 @@
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
+#include "imx6ull-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with eMMC";
diff --git a/dts/src/arm/imx6ull-phytec-segin-ff-rdk-nand.dts b/dts/src/arm/imx6ull-phytec-segin-ff-rdk-nand.dts
index 656baf8..c8d3eff 100644
--- a/dts/src/arm/imx6ull-phytec-segin-ff-rdk-nand.dts
+++ b/dts/src/arm/imx6ull-phytec-segin-ff-rdk-nand.dts
@@ -9,6 +9,7 @@
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
+#include "imx6ull-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
diff --git a/dts/src/arm/imx6ull-phytec-segin-peb-av-02.dtsi b/dts/src/arm/imx6ull-phytec-segin-peb-av-02.dtsi
new file mode 100644
index 0000000..06bb7f3
--- /dev/null
+++ b/dts/src/arm/imx6ull-phytec-segin-peb-av-02.dtsi
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2018 PHYTEC Messtechnik GmbH
+ * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
+ */
+
+#include "imx6ul-phytec-segin-peb-av-02.dtsi"
+
+&iomuxc {
+ /delete-node/ edtft5406grp;
+ /delete-node/ stmpegrp;
+};
+
+&iomuxc_snvs {
+ pinctrl_edt_ft5406: edtft5406grp {
+ fsl,pins = <
+ MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
+ >;
+ };
+
+ pinctrl_stmpe: stmpegrp {
+ fsl,pins = <
+ MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
+ >;
+ };
+};
diff --git a/dts/src/arm/imx6ull-phytec-segin.dtsi b/dts/src/arm/imx6ull-phytec-segin.dtsi
index c1595fc..e287a04 100644
--- a/dts/src/arm/imx6ull-phytec-segin.dtsi
+++ b/dts/src/arm/imx6ull-phytec-segin.dtsi
@@ -14,7 +14,6 @@
&iomuxc {
/delete-node/ flexcan1engrp;
/delete-node/ rtcintgrp;
- /delete-node/ stmpegrp;
};
&iomuxc_snvs {
@@ -29,10 +28,4 @@
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
>;
};
-
- pinctrl_stmpe: stmpegrp {
- fsl,pins = <
- MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
- >;
- };
};
diff --git a/dts/src/arm/imx7-colibri-aster.dtsi b/dts/src/arm/imx7-colibri-aster.dtsi
index 9fa701b..139188e 100644
--- a/dts/src/arm/imx7-colibri-aster.dtsi
+++ b/dts/src/arm/imx7-colibri-aster.dtsi
@@ -99,7 +99,7 @@
reg = <0x4a>;
interrupt-parent = <&gpio2>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */
- reset-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */
+ reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 */
};
/* M41T0M6 real time clock on carrier board */
diff --git a/dts/src/arm/imx7-colibri-eval-v3.dtsi b/dts/src/arm/imx7-colibri-eval-v3.dtsi
index 9760137..3caf450 100644
--- a/dts/src/arm/imx7-colibri-eval-v3.dtsi
+++ b/dts/src/arm/imx7-colibri-eval-v3.dtsi
@@ -124,7 +124,7 @@
reg = <0x4a>;
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
- reset-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */
+ reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */
status = "disabled";
};
diff --git a/dts/src/arm/imx7-mba7.dtsi b/dts/src/arm/imx7-mba7.dtsi
index 50abf18..c6d1c63 100644
--- a/dts/src/arm/imx7-mba7.dtsi
+++ b/dts/src/arm/imx7-mba7.dtsi
@@ -14,6 +14,12 @@
#include <dt-bindings/net/ti-dp83867.h>
/ {
+ aliases {
+ mmc0 = &usdhc3;
+ mmc1 = &usdhc1;
+ /delete-property/ mmc2;
+ };
+
beeper {
compatible = "gpio-beeper";
gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
@@ -164,6 +170,20 @@
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
+
+ sound {
+ compatible = "fsl,imx-audio-tlv320aic32x4";
+ model = "imx-audio-tlv320aic32x4";
+ ssi-controller = <&sai1>;
+ audio-codec = <&tlv320aic32x4>;
+ audio-routing =
+ "IN3_L", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "IN1_L", "Line In Jack",
+ "IN1_R", "Line In Jack",
+ "Line Out Jack", "LOL",
+ "Line Out Jack", "LOR";
+ };
};
&adc1 {
@@ -179,7 +199,6 @@
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
- num-chipselects = <3>;
cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
<&gpio4 2 GPIO_ACTIVE_LOW>;
status = "okay";
@@ -188,7 +207,6 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
- num-chipselects = <1>;
status = "okay";
};
@@ -214,10 +232,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- /* LED1: Link/Activity, LED2: Error */
- ti,led-function = <0x0db0>;
- /* Active low, LED1 and LED2 driven by phy */
- ti,led-ctrl = <0x1001>;
+ ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};
@@ -362,13 +377,25 @@
>;
};
-
pinctrl_pca9555: pca95550grp {
fsl,pins = <
MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78
>;
};
+ pinctrl_sai1: sai1grp {
+ fsl,pins = <
+ MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11
+ MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c
+ MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c
+ MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c
+
+ MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c
+ MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14
+ MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14
+ >;
+ };
+
pinctrl_uart3: uart3grp {
fsl,pins = <
MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e
@@ -472,6 +499,12 @@
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59
>;
};
+
+ pinctrl_wdog1: wdog1grp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30
+ >;
+ };
};
&pwm1 {
@@ -480,6 +513,16 @@
status = "okay";
};
+&sai1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai1>;
+ assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
+ <&clks IMX7D_SAI1_ROOT_CLK>;
+ assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
+ assigned-clock-rates = <0>, <36864000>;
+ status = "okay";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
@@ -518,6 +561,9 @@
assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
uart-has-rtscts;
+ linux,rs485-enabled-at-boot-time;
+ rs485-rts-active-low;
+ rs485-rx-during-tx;
status = "okay";
};
@@ -532,7 +578,8 @@
srp-disable;
hnp-disable;
adp-disable;
- dr_mode = "host";
+ over-current-active-low;
+ dr_mode = "otg";
status = "okay";
};
@@ -548,3 +595,9 @@
no-1-8-v;
status = "okay";
};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog1>;
+ fsl,ext-reset-output;
+};
diff --git a/dts/src/arm/imx7d-flex-concentrator-mfg.dts b/dts/src/arm/imx7d-flex-concentrator-mfg.dts
new file mode 100644
index 0000000..a6d6816
--- /dev/null
+++ b/dts/src/arm/imx7d-flex-concentrator-mfg.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for Kamstrup OMNIA Flex Concentrator in
+ * manufacturing/debugging mode.
+ *
+ * Copyright (C) 2020 Kamstrup A/S
+ * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "imx7d-flex-concentrator.dts"
+
+/ {
+ model = "Kamstrup OMNIA Flex Concentrator - Manufacturing";
+ compatible = "kam,imx7d-flex-concentrator-mfg", "fsl,imx7d";
+
+ chosen {
+ stdout-path = &uart4;
+ };
+};
+
+&uart4 {
+ status = "okay";
+};
diff --git a/dts/src/arm/imx7d-flex-concentrator.dts b/dts/src/arm/imx7d-flex-concentrator.dts
new file mode 100644
index 0000000..84b0952
--- /dev/null
+++ b/dts/src/arm/imx7d-flex-concentrator.dts
@@ -0,0 +1,314 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for Kamstrup OMNIA Flex Concentrator.
+ *
+ * Copyright (C) 2020 Kamstrup A/S
+ * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "imx7d-tqma7.dtsi"
+
+/* One I2C device on TQMa7 SoM is not mounted */
+/delete-node/ &ds1339;
+
+/ {
+ model = "Kamstrup OMNIA Flex Concentrator";
+ compatible = "kam,imx7d-flex-concentrator", "fsl,imx7d";
+
+ memory@80000000 {
+ device_type = "memory";
+ /* 1024 MB - TQMa7D board configuration */
+ reg = <0x80000000 0x40000000>;
+ };
+
+ reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "VBUS_USBOTG2";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_vref_1v8: regulator-vref-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC1V8_REF";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&sw2_reg>;
+ };
+
+ /*
+ * Human Machine Interface consists of 4 dual red/green LEDs.
+ * hmi-a:green is controlled directly by the switch-mode power supply.
+ * hmi-a:red is not used.
+ */
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds>;
+
+ led-0 {
+ label = "hmi-b:red:heartbeat-degraded";
+ gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-1 {
+ label = "hmi-b:green:heartbeat-running";
+ gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-2 {
+ label = "hmi-c:red:mesh-error";
+ gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-3 {
+ label = "hmi-c:green:mesh-activity";
+ gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-4 {
+ label = "hmi-d:red:omnia-error";
+ gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-5 {
+ label = "hmi-d:green:omnia-activity";
+ gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ /*
+ * Errata e10574 board restart workaround.
+ */
+ gpio-restart {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_restart>;
+ compatible = "gpio-restart";
+ gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ priority = <200>;
+ };
+};
+
+/*
+ * Analog signals
+ * ADC1_IN0: SMPS - 5V output monitor (voltage divider: 1/0.2806)
+ */
+&adc1 {
+ vref-supply = <&reg_vref_1v8>;
+ status = "okay";
+};
+
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ pcf2127: rtc@0 {
+ compatible = "nxp,pcf2127";
+ reg = <0>;
+ spi-max-frequency = <2000000>;
+ };
+};
+
+&ecspi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi4>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ /*
+ * ST chip maximum SPI clock frequency is 33 MHz.
+ *
+ * TCG specification - Section 6.4.1 Clocking:
+ * TPM shall support a SPI clock frequency range of 10-24 MHz.
+ */
+ st33htph: tpm-tis@0 {
+ compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-handle = <&ethphy>;
+ status = "okay";
+
+ /*
+ * MDIO bus reset is used to generate PHY device reset before
+ * Ethernet PHY type ID auto-detection. Otherwise this communication
+ * fails as device does not answer when recommended reset circuit
+ * is used.
+ */
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reset-delay-us = <100000>;
+ reset-post-delay-us = <500000>;
+ reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
+
+ /* Microchip/Micrel KSZ8081RNB */
+ ethphy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ interrupt-parent = <&gpio1>;
+ interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
+ reg = <1>;
+ };
+ };
+};
+
+/*
+ * Detection signals for internal USB modules.
+ * Used for robust USB plug and play handling such as USB downstream port
+ * power-cycle and USB hub reset in case of misbehaving or crashed modules.
+ *
+ * SMPS - AC input monitor based on zero crossing.
+ * Used for last gasp notification.
+ */
+&gpio3 {
+ gpio-line-names = "", "", "", "", "", "", "", "",
+ "", "", "", "", "smps-ac-monitor", "", "usb-hub-reset", "",
+ "", "", "", "", "", "", "", "",
+ "", "module-b-detection", "", "module-a-detection", "", "", "", "";
+};
+
+/*
+ * Tamper IRQ trigger timestamp reading.
+ * Used for sealed cover opened/closed notification.
+ */
+&gpio5 {
+ gpio-line-names = "", "", "", "", "", "", "", "",
+ "", "", "", "", "rtc-tamper-irq", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_misc>;
+
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c /* X2-15 */
+ MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74 /* X2-18 */
+ MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74 /* X2-13 */
+ MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x74 /* X2-20 */
+ /* RTC - Tamper IRQ */
+ MX7D_PAD_SD2_CLK__GPIO5_IO12 0x3c /* X1-92 */
+ >;
+ };
+
+ pinctrl_ecspi4: ecspi4grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_CLK__ECSPI4_MISO 0x7c /* X2-72 */
+ MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI 0x74 /* X2-68 */
+ MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK 0x74 /* X2-76 */
+ MX7D_PAD_LCD_VSYNC__GPIO3_IO3 0x74 /* X2-78 */
+ >;
+ };
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x03 /* X2-48 */
+ MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x03 /* X2-46 */
+ MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71 /* X2-53 */
+ MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71 /* X2-55 */
+ MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71 /* X2-61 */
+ MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79 /* X2-56 */
+ MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79 /* X2-58 */
+ MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79 /* X2-64 */
+ MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 /* X2-52 */
+ /* PHY reset: SRE_FAST, DSE_X1 */
+ MX7D_PAD_ENET1_COL__GPIO7_IO15 0x00 /* X1-96 */
+ /* Clock from PHY to MAC: 100kPU */
+ MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x70 /* X3-4 */
+ /* PHY interrupt: 100kPU, HYS */
+ MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x78 /* X1-80 */
+ >;
+ };
+
+ pinctrl_leds: ledsgrp {
+ fsl,pins = <
+ MX7D_PAD_LCD_DATA01__GPIO3_IO6 0x14 /* X2-82 */
+ MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* X1-82 */
+ MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* X1-84 */
+ MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* X1-86 */
+ MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* X1-88 */
+ MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x14 /* X1-90 */
+ >;
+ };
+
+ pinctrl_misc: miscgrp {
+ fsl,pins = <
+ /* Module A detection (low = present) */
+ MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x7c /* X2-105 */
+ /* Module B detection (low = present) */
+ MX7D_PAD_LCD_DATA20__GPIO3_IO25 0x7c /* X2-103 */
+ /* SMPS - AC input monitor (high = failure) */
+ MX7D_PAD_LCD_DATA07__GPIO3_IO12 0x7c /* X2-88 */
+ /* USB - Hub reset */
+ MX7D_PAD_LCD_DATA09__GPIO3_IO14 0x74 /* X2-92 */
+ >;
+ };
+
+ pinctrl_restart: restartgrp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x74 /* X1-94 */
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e /* X3-14 */
+ MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76 /* X3-16 */
+ >;
+ };
+};
+
+&iomuxc_lpsr {
+ pinctrl_usbotg2: usbotg2grp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC 0x5c /* X3-11 */
+ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x59 /* X3-9 */
+ >;
+ };
+
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
+};
+
+&usbotg2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg2>;
+ vbus-supply = <&reg_usb_otg2_vbus>;
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ over-current-active-low;
+ dr_mode = "host";
+ status = "okay";
+};
+
+/*
+ * External watchdog feature provided by pcf2127.
+ */
+&wdog1 {
+ status = "disabled";
+};
diff --git a/dts/src/arm/imx7d-mba7.dts b/dts/src/arm/imx7d-mba7.dts
index 221274c..5ef86de 100644
--- a/dts/src/arm/imx7d-mba7.dts
+++ b/dts/src/arm/imx7d-mba7.dts
@@ -14,7 +14,7 @@
/ {
model = "TQ Systems TQMa7D board on MBa7 carrier board";
- compatible = "tq,imx7d-mba7", "fsl,imx7d";
+ compatible = "tq,imx7d-mba7", "tq,imx7d-tqma7", "fsl,imx7d";
};
&fec2 {
@@ -39,10 +39,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- /* LED1: Link/Activity, LED2: error */
- ti,led-function = <0x0db0>;
- /* active low, LED1/2 driven by phy */
- ti,led-ctrl = <0x1001>;
+ ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};
diff --git a/dts/src/arm/imx7d.dtsi b/dts/src/arm/imx7d.dtsi
index cff875b..b0bcfa9 100644
--- a/dts/src/arm/imx7d.dtsi
+++ b/dts/src/arm/imx7d.dtsi
@@ -7,6 +7,12 @@
#include <dt-bindings/reset/imx7-reset.h>
/ {
+ aliases {
+ usb0 = &usbotg1;
+ usb1 = &usbotg2;
+ usb2 = &usbh;
+ };
+
cpus {
cpu0: cpu@0 {
clock-frequency = <996000000>;
diff --git a/dts/src/arm/imx7s-mba7.dts b/dts/src/arm/imx7s-mba7.dts
index a143d56..d7d3f53 100644
--- a/dts/src/arm/imx7s-mba7.dts
+++ b/dts/src/arm/imx7s-mba7.dts
@@ -14,5 +14,5 @@
/ {
model = "TQ Systems TQMa7S board on MBa7 carrier board";
- compatible = "tq,imx7s-mba7", "fsl,imx7s";
+ compatible = "tq,imx7s-mba7", "tq,imx7s-tqma7", "fsl,imx7s";
};
diff --git a/dts/src/arm/imx7s-warp.dts b/dts/src/arm/imx7s-warp.dts
index d6b4888..569bbd8 100644
--- a/dts/src/arm/imx7s-warp.dts
+++ b/dts/src/arm/imx7s-warp.dts
@@ -10,8 +10,8 @@
#include "imx7s.dtsi"
/ {
- model = "Warp i.MX7 Board";
- compatible = "warp,imx7s-warp", "fsl,imx7s";
+ model = "Element14 Warp i.MX7 Board";
+ compatible = "element14,imx7s-warp", "fsl,imx7s";
memory@80000000 {
device_type = "memory";
diff --git a/dts/src/arm/imx7s.dtsi b/dts/src/arm/imx7s.dtsi
index 84d9cc1..251007a 100644
--- a/dts/src/arm/imx7s.dtsi
+++ b/dts/src/arm/imx7s.dtsi
@@ -47,6 +47,8 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
+ usb0 = &usbotg1;
+ usb1 = &usbh;
};
cpus {
@@ -971,7 +973,7 @@
clocks = <&clks IMX7D_CLK_DUMMY>,
<&clks IMX7D_CAN1_ROOT_CLK>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
+ fsl,stop-mode = <&gpr 0x10 1>;
status = "disabled";
};
@@ -982,7 +984,7 @@
clocks = <&clks IMX7D_CLK_DUMMY>,
<&clks IMX7D_CAN2_ROOT_CLK>;
clock-names = "ipg", "per";
- fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
+ fsl,stop-mode = <&gpr 0x10 2>;
status = "disabled";
};
diff --git a/dts/src/arm/keystone-k2g-evm.dts b/dts/src/arm/keystone-k2g-evm.dts
index 8b3d64c..14e26a4 100644
--- a/dts/src/arm/keystone-k2g-evm.dts
+++ b/dts/src/arm/keystone-k2g-evm.dts
@@ -46,6 +46,14 @@
regulator-always-on;
};
+ vcc1v8_ldo2_reg: fixedregulator-vcc1v8-ldo2 {
+ compatible = "regulator-fixed";
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
hdmi: connector {
compatible = "hdmi-connector";
label = "hdmi";
@@ -58,6 +66,57 @@
};
};
};
+
+ aud_mclk: aud_mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <12288000>;
+ };
+
+ sound0: sound@0 {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "K2G-EVM";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Line", "Line In";
+ simple-audio-card,routing =
+ "Headphone Jack", "HPLOUT",
+ "Headphone Jack", "HPROUT",
+ "LINE1L", "Line In",
+ "LINE1R", "Line In";
+
+ simple-audio-card,dai-link@0 {
+ format = "i2s";
+ bitclock-master = <&sound0_0_master>;
+ frame-master = <&sound0_0_master>;
+ sound0_0_master: cpu {
+ sound-dai = <&mcasp2>;
+ clocks = <&k2g_clks 0x6 1>;
+ system-clock-direction-out;
+ };
+
+ codec {
+ sound-dai = <&tlv320aic3106>;
+ clocks = <&aud_mclk>;
+ };
+ };
+
+ simple-audio-card,dai-link@1 {
+ format = "i2s";
+ bitclock-master = <&sound0_1_master>;
+ frame-master = <&sound0_1_master>;
+ sound0_1_master: cpu {
+ sound-dai = <&mcasp2>;
+ clocks = <&k2g_clks 0x6 1>;
+ system-clock-direction-out;
+ };
+
+ codec {
+ sound-dai = <&sii9022>;
+ clocks = <&aud_mclk>;
+ };
+ };
+ };
};
&k2g_pinctrl {
@@ -214,6 +273,15 @@
K2G_CORE_IOPAD(0x10e8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssfid.dssfid */
>;
};
+
+ mcasp2_pins: pinmux_mcasp2_pins {
+ pinctrl-single,pins = <
+ K2G_CORE_IOPAD(0x1234) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo2.mcasp2_axr2 */
+ K2G_CORE_IOPAD(0x1238) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo3.mcasp2_axr3 */
+ K2G_CORE_IOPAD(0x1254) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo10.mcasp2_afsx */
+ K2G_CORE_IOPAD(0x125c) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo12.mcasp2_aclkx */
+ >;
+ };
};
&uart0 {
@@ -423,6 +491,10 @@
compatible = "sil,sii9022";
reg = <0x3b>;
+ sil,i2s-data-lanes = < 0 >;
+ clocks = <&aud_mclk>;
+ clock-names = "mclk";
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -444,6 +516,19 @@
};
};
};
+
+ tlv320aic3106: tlv320aic3106@1b {
+ #sound-dai-cells = <0>;
+ compatible = "ti,tlv320aic3106";
+ reg = <0x1b>;
+ status = "okay";
+
+ /* Regulators */
+ AVDD-supply = <&vcc3v3_dcin_reg>;
+ IOVDD-supply = <&vcc3v3_dcin_reg>;
+ DRVDD-supply = <&vcc3v3_dcin_reg>;
+ DVDD-supply = <&vcc1v8_ldo2_reg>;
+ };
};
&dss {
@@ -458,3 +543,30 @@
};
};
};
+
+&k2g_clks {
+ /* on the board 22.5792MHz is connected to AUDOSC_IN */
+ assigned-clocks = <&k2g_clks 0x4c 2>;
+ assigned-clock-rates = <22579200>;
+};
+
+&mcasp2 {
+ #sound-dai-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp2_pins>;
+
+ assigned-clocks = <&k2g_clks 0x6 1>;
+ assigned-clock-parents = <&k2g_clks 0x6 2>;
+
+ status = "okay";
+
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ /* 6 serializer */
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 0 0 1 2 0 0 // AXR2: TX, AXR3: rx
+ >;
+ tx-num-evt = <32>;
+ rx-num-evt = <32>;
+};
diff --git a/dts/src/arm/kirkwood-dockstar.dts b/dts/src/arm/kirkwood-dockstar.dts
index 6a3f1bf..264938d 100644
--- a/dts/src/arm/kirkwood-dockstar.dts
+++ b/dts/src/arm/kirkwood-dockstar.dts
@@ -34,7 +34,7 @@
};
};
serial@12000 {
- status = "ok";
+ status = "okay";
};
};
gpio-leds {
diff --git a/dts/src/arm/kirkwood-dreamplug.dts b/dts/src/arm/kirkwood-dreamplug.dts
index 7f326e2..3285163 100644
--- a/dts/src/arm/kirkwood-dreamplug.dts
+++ b/dts/src/arm/kirkwood-dreamplug.dts
@@ -34,7 +34,7 @@
};
};
serial@12000 {
- status = "ok";
+ status = "okay";
};
spi@10600 {
diff --git a/dts/src/arm/kirkwood-goflexnet.dts b/dts/src/arm/kirkwood-goflexnet.dts
index 02d87e0..d4cb3cd 100644
--- a/dts/src/arm/kirkwood-goflexnet.dts
+++ b/dts/src/arm/kirkwood-goflexnet.dts
@@ -66,7 +66,7 @@
};
};
serial@12000 {
- status = "ok";
+ status = "okay";
};
sata@80000 {
diff --git a/dts/src/arm/kirkwood-guruplug-server-plus.dts b/dts/src/arm/kirkwood-guruplug-server-plus.dts
index ff1260e..dfb4139 100644
--- a/dts/src/arm/kirkwood-guruplug-server-plus.dts
+++ b/dts/src/arm/kirkwood-guruplug-server-plus.dts
@@ -38,7 +38,7 @@
};
};
serial@12000 {
- status = "ok";
+ status = "okay";
};
sata@80000 {
diff --git a/dts/src/arm/kirkwood-iconnect.dts b/dts/src/arm/kirkwood-iconnect.dts
index 4a512d8..95af7aa 100644
--- a/dts/src/arm/kirkwood-iconnect.dts
+++ b/dts/src/arm/kirkwood-iconnect.dts
@@ -72,7 +72,7 @@
};
};
serial@12000 {
- status = "ok";
+ status = "okay";
};
};
diff --git a/dts/src/arm/kirkwood-iomega_ix2_200.dts b/dts/src/arm/kirkwood-iomega_ix2_200.dts
index 62272d5..2338f49 100644
--- a/dts/src/arm/kirkwood-iomega_ix2_200.dts
+++ b/dts/src/arm/kirkwood-iomega_ix2_200.dts
@@ -112,7 +112,7 @@
};
serial@12000 {
- status = "ok";
+ status = "okay";
};
sata@80000 {
diff --git a/dts/src/arm/kirkwood-nsa3x0-common.dtsi b/dts/src/arm/kirkwood-nsa3x0-common.dtsi
index 2c4037b..8f73197 100644
--- a/dts/src/arm/kirkwood-nsa3x0-common.dtsi
+++ b/dts/src/arm/kirkwood-nsa3x0-common.dtsi
@@ -45,7 +45,7 @@
};
serial@12000 {
- status = "ok";
+ status = "okay";
};
sata@80000 {
diff --git a/dts/src/arm/kirkwood.dtsi b/dts/src/arm/kirkwood.dtsi
index 6c8d94b..fca31a5 100644
--- a/dts/src/arm/kirkwood.dtsi
+++ b/dts/src/arm/kirkwood.dtsi
@@ -369,7 +369,7 @@
clocks = <&gate_clk 14>;
clock-names = "sata";
#phy-cells = <0>;
- status = "ok";
+ status = "okay";
};
sata_phy1: sata-phy@84000 {
@@ -378,7 +378,7 @@
clocks = <&gate_clk 15>;
clock-names = "sata";
#phy-cells = <0>;
- status = "ok";
+ status = "okay";
};
audio0: audio-controller@a0000 {
diff --git a/dts/src/arm/lpc32xx.dtsi b/dts/src/arm/lpc32xx.dtsi
index 7b7ec7b..3a5cfb0 100644
--- a/dts/src/arm/lpc32xx.dtsi
+++ b/dts/src/arm/lpc32xx.dtsi
@@ -123,7 +123,6 @@
clocks = <&usbclk LPC32XX_USB_CLK_I2C>;
#address-cells = <1>;
#size-cells = <0>;
- pnx,timeout = <0x64>;
};
usbclk: clock-controller@f00 {
@@ -286,7 +285,6 @@
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
#address-cells = <1>;
#size-cells = <0>;
- pnx,timeout = <0x64>;
clocks = <&clk LPC32XX_CLK_I2C1>;
};
@@ -297,7 +295,6 @@
interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
#address-cells = <1>;
#size-cells = <0>;
- pnx,timeout = <0x64>;
clocks = <&clk LPC32XX_CLK_I2C2>;
};
diff --git a/dts/src/arm/ls1021a.dtsi b/dts/src/arm/ls1021a.dtsi
index 827373e..007dd2b 100644
--- a/dts/src/arm/ls1021a.dtsi
+++ b/dts/src/arm/ls1021a.dtsi
@@ -173,7 +173,7 @@
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1021a-dcfg", "syscon";
- reg = <0x0 0x1ee0000 0x0 0x10000>;
+ reg = <0x0 0x1ee0000 0x0 0x1000>;
big-endian;
};
@@ -288,46 +288,43 @@
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f00000 0x0 0x10000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
- fsl,tmu-calibration = <0x00000000 0x0000000f
- 0x00000001 0x00000017
- 0x00000002 0x0000001e
- 0x00000003 0x00000026
- 0x00000004 0x0000002e
- 0x00000005 0x00000035
- 0x00000006 0x0000003d
- 0x00000007 0x00000044
- 0x00000008 0x0000004c
- 0x00000009 0x00000053
- 0x0000000a 0x0000005b
- 0x0000000b 0x00000064
-
- 0x00010000 0x00000011
- 0x00010001 0x0000001c
- 0x00010002 0x00000024
- 0x00010003 0x0000002b
- 0x00010004 0x00000034
- 0x00010005 0x00000039
- 0x00010006 0x00000042
- 0x00010007 0x0000004c
- 0x00010008 0x00000051
- 0x00010009 0x0000005a
- 0x0001000a 0x00000063
-
- 0x00020000 0x00000013
- 0x00020001 0x00000019
- 0x00020002 0x00000024
- 0x00020003 0x0000002c
- 0x00020004 0x00000035
- 0x00020005 0x0000003d
- 0x00020006 0x00000046
- 0x00020007 0x00000050
- 0x00020008 0x00000059
-
- 0x00030000 0x00000002
- 0x00030001 0x0000000d
- 0x00030002 0x00000019
- 0x00030003 0x00000024>;
+ fsl,tmu-range = <0xb0000 0x9002c 0x6004e 0x30066>;
+ fsl,tmu-calibration = <0x00000000 0x00000020
+ 0x00000001 0x00000024
+ 0x00000002 0x0000002a
+ 0x00000003 0x00000032
+ 0x00000004 0x00000038
+ 0x00000005 0x0000003e
+ 0x00000006 0x00000043
+ 0x00000007 0x0000004a
+ 0x00000008 0x00000050
+ 0x00000009 0x00000059
+ 0x0000000a 0x0000005f
+ 0x0000000b 0x00000066
+
+ 0x00010000 0x00000023
+ 0x00010001 0x0000002b
+ 0x00010002 0x00000033
+ 0x00010003 0x0000003a
+ 0x00010004 0x00000042
+ 0x00010005 0x0000004a
+ 0x00010006 0x00000054
+ 0x00010007 0x0000005c
+ 0x00010008 0x00000065
+ 0x00010009 0x0000006f
+
+ 0x00020000 0x00000029
+ 0x00020001 0x00000033
+ 0x00020002 0x0000003d
+ 0x00020003 0x00000048
+ 0x00020004 0x00000054
+ 0x00020005 0x00000060
+ 0x00020006 0x0000006c
+
+ 0x00030000 0x00000025
+ 0x00030001 0x00000033
+ 0x00030002 0x00000043
+ 0x00030003 0x00000055>;
#thermal-sensor-cells = <1>;
};
@@ -1013,7 +1010,7 @@
compatible = "fsl,ls1021a-ftm-alarm";
reg = <0x0 0x29d0000 0x0 0x10000>;
reg-names = "ftm";
- fsl,rcpm-wakeup = <&rcpm 0x20000 0x0>;
+ fsl,rcpm-wakeup = <&rcpm 0x0 0x20000000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
big-endian;
};
diff --git a/dts/src/arm/meson8b-odroidc1.dts b/dts/src/arm/meson8b-odroidc1.dts
index 0c26467..5963566 100644
--- a/dts/src/arm/meson8b-odroidc1.dts
+++ b/dts/src/arm/meson8b-odroidc1.dts
@@ -224,7 +224,7 @@
reg = <0>;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
diff --git a/dts/src/arm/meson8m2-mxiii-plus.dts b/dts/src/arm/meson8m2-mxiii-plus.dts
index cc49819..8f4eb1e 100644
--- a/dts/src/arm/meson8m2-mxiii-plus.dts
+++ b/dts/src/arm/meson8m2-mxiii-plus.dts
@@ -81,7 +81,7 @@
reg = <0>;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
};
};
diff --git a/dts/src/arm/motorola-mapphone-common.dtsi b/dts/src/arm/motorola-mapphone-common.dtsi
index d5ded4f..f75806d 100644
--- a/dts/src/arm/motorola-mapphone-common.dtsi
+++ b/dts/src/arm/motorola-mapphone-common.dtsi
@@ -113,32 +113,9 @@
enable-active-high;
};
- gpio_keys {
- compatible = "gpio-keys";
-
- volume_down {
- label = "Volume Down";
- gpios = <&gpio5 26 GPIO_ACTIVE_LOW>; /* gpio154 */
- linux,code = <KEY_VOLUMEDOWN>;
- linux,can-disable;
- /* Value above 7.95ms for no GPIO hardware debounce */
- debounce-interval = <10>;
- };
-
- slider {
- label = "Keypad Slide";
- gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio122 */
- linux,input-type = <EV_SW>;
- linux,code = <SW_KEYPAD_SLIDE>;
- linux,can-disable;
- /* Value above 7.95ms for no GPIO hardware debounce */
- debounce-interval = <10>;
- };
- };
-
soundcard {
compatible = "audio-graph-card";
- label = "Droid 4 Audio";
+ label = "Mapphone Audio";
widgets =
"Speaker", "Earpiece",
@@ -282,80 +259,6 @@
};
};
-&keypad {
- keypad,num-rows = <8>;
- keypad,num-columns = <8>;
- linux,keymap = <
-
- /* Row 1 */
- MATRIX_KEY(0, 2, KEY_1)
- MATRIX_KEY(0, 6, KEY_2)
- MATRIX_KEY(2, 3, KEY_3)
- MATRIX_KEY(0, 7, KEY_4)
- MATRIX_KEY(0, 4, KEY_5)
- MATRIX_KEY(5, 5, KEY_6)
- MATRIX_KEY(0, 1, KEY_7)
- MATRIX_KEY(0, 5, KEY_8)
- MATRIX_KEY(0, 0, KEY_9)
- MATRIX_KEY(1, 6, KEY_0)
-
- /* Row 2 */
- MATRIX_KEY(3, 4, KEY_APOSTROPHE)
- MATRIX_KEY(7, 6, KEY_Q)
- MATRIX_KEY(7, 7, KEY_W)
- MATRIX_KEY(7, 2, KEY_E)
- MATRIX_KEY(1, 0, KEY_R)
- MATRIX_KEY(4, 4, KEY_T)
- MATRIX_KEY(1, 2, KEY_Y)
- MATRIX_KEY(6, 7, KEY_U)
- MATRIX_KEY(2, 2, KEY_I)
- MATRIX_KEY(5, 6, KEY_O)
- MATRIX_KEY(3, 7, KEY_P)
- MATRIX_KEY(6, 5, KEY_BACKSPACE)
-
- /* Row 3 */
- MATRIX_KEY(5, 4, KEY_TAB)
- MATRIX_KEY(5, 7, KEY_A)
- MATRIX_KEY(2, 7, KEY_S)
- MATRIX_KEY(7, 0, KEY_D)
- MATRIX_KEY(2, 6, KEY_F)
- MATRIX_KEY(6, 2, KEY_G)
- MATRIX_KEY(6, 6, KEY_H)
- MATRIX_KEY(1, 4, KEY_J)
- MATRIX_KEY(3, 1, KEY_K)
- MATRIX_KEY(2, 1, KEY_L)
- MATRIX_KEY(4, 6, KEY_ENTER)
-
- /* Row 4 */
- MATRIX_KEY(3, 6, KEY_LEFTSHIFT) /* KEY_CAPSLOCK */
- MATRIX_KEY(6, 1, KEY_Z)
- MATRIX_KEY(7, 4, KEY_X)
- MATRIX_KEY(5, 1, KEY_C)
- MATRIX_KEY(1, 7, KEY_V)
- MATRIX_KEY(2, 4, KEY_B)
- MATRIX_KEY(4, 1, KEY_N)
- MATRIX_KEY(1, 1, KEY_M)
- MATRIX_KEY(3, 5, KEY_COMMA)
- MATRIX_KEY(5, 2, KEY_DOT)
- MATRIX_KEY(6, 3, KEY_UP)
- MATRIX_KEY(7, 3, KEY_OK)
-
- /* Row 5 */
- MATRIX_KEY(2, 5, KEY_LEFTCTRL) /* KEY_LEFTSHIFT */
- MATRIX_KEY(4, 5, KEY_LEFTALT) /* SYM */
- MATRIX_KEY(6, 0, KEY_MINUS)
- MATRIX_KEY(4, 7, KEY_EQUAL)
- MATRIX_KEY(1, 5, KEY_SPACE)
- MATRIX_KEY(3, 2, KEY_SLASH)
- MATRIX_KEY(4, 3, KEY_LEFT)
- MATRIX_KEY(5, 3, KEY_DOWN)
- MATRIX_KEY(3, 3, KEY_RIGHT)
-
- /* Side buttons, KEY_VOLUMEDOWN and KEY_PWER are on CPCAP? */
- MATRIX_KEY(5, 0, KEY_VOLUMEUP)
- >;
-};
-
&mmc1 {
vmmc-supply = <&vwlan2>;
bus-width = <4>;
@@ -395,34 +298,6 @@
};
};
-&i2c1 {
- led-controller@38 {
- compatible = "ti,lm3532";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x38>;
-
- enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
-
- ramp-up-us = <1024>;
- ramp-down-us = <8193>;
-
- backlight_led: led@0 {
- reg = <0>;
- led-sources = <2>;
- ti,led-mode = <0>;
- label = ":backlight";
- };
-
- led@1 {
- reg = <1>;
- led-sources = <1>;
- ti,led-mode = <0>;
- label = ":kbd_backlight";
- };
- };
-};
-
&i2c2 {
touchscreen@4a {
compatible = "atmel,maxtouch";
@@ -430,7 +305,7 @@
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
- reset-gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; /* gpio173 */
+ reset-gpios = <&gpio6 13 GPIO_ACTIVE_LOW>; /* gpio173 */
/* gpio_183 with sys_nirq2 pad as wakeup */
interrupts-extended = <&gpio6 23 IRQ_TYPE_LEVEL_LOW>,
@@ -796,20 +671,6 @@
"0", "0", "-1";
};
-
- lis3dh: accelerometer@18 {
- compatible = "st,lis3dh-accel";
- reg = <0x18>;
-
- vdd-supply = <&vhvio>;
-
- interrupt-parent = <&gpio2>;
- interrupts = <2 IRQ_TYPE_EDGE_BOTH>; /* gpio34 */
-
- rotation-matrix = "0", "-1", "0",
- "1", "0", "0",
- "0", "0", "1";
- };
};
&mcbsp2 {
diff --git a/dts/src/arm/mstar-infinity.dtsi b/dts/src/arm/mstar-infinity.dtsi
index cd911ad..0bee517 100644
--- a/dts/src/arm/mstar-infinity.dtsi
+++ b/dts/src/arm/mstar-infinity.dtsi
@@ -6,6 +6,13 @@
#include "mstar-v7.dtsi"
+#include <dt-bindings/gpio/msc313-gpio.h>
+
&imi {
reg = <0xa0000000 0x16000>;
};
+
+&gpio {
+ compatible = "mstar,msc313-gpio";
+ status = "okay";
+};
diff --git a/dts/src/arm/mstar-infinity2m-ssd202d-ssd201htv2.dts b/dts/src/arm/mstar-infinity2m-ssd202d-ssd201htv2.dts
new file mode 100644
index 0000000..5d81641
--- /dev/null
+++ b/dts/src/arm/mstar-infinity2m-ssd202d-ssd201htv2.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 thingy.jp.
+ * Author: Daniel Palmer <daniel@thingy.jp>
+ */
+
+/dts-v1/;
+#include "mstar-infinity2m-ssd202d.dtsi"
+
+/ {
+ model = "SSD201_HT_V2";
+ compatible = "honestar,ssd201htv2", "mstar,infinity2m";
+
+ aliases {
+ serial0 = &pm_uart;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&pm_uart {
+ status = "okay";
+};
diff --git a/dts/src/arm/mstar-infinity2m-ssd202d.dtsi b/dts/src/arm/mstar-infinity2m-ssd202d.dtsi
new file mode 100644
index 0000000..176e10a
--- /dev/null
+++ b/dts/src/arm/mstar-infinity2m-ssd202d.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 thingy.jp.
+ * Author: Daniel Palmer <daniel@thingy.jp>
+ */
+
+#include "mstar-infinity2m-ssd20xd.dtsi"
+
+/ {
+ memory {
+ device_type = "memory";
+ reg = <0x20000000 0x8000000>;
+ };
+};
diff --git a/dts/src/arm/mstar-infinity2m-ssd20xd.dtsi b/dts/src/arm/mstar-infinity2m-ssd20xd.dtsi
new file mode 100644
index 0000000..7a5e28b
--- /dev/null
+++ b/dts/src/arm/mstar-infinity2m-ssd20xd.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 thingy.jp.
+ * Author: Daniel Palmer <daniel@thingy.jp>
+ */
+
+#include "mstar-infinity2m.dtsi"
+
+&smpctrl {
+ compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl";
+ status = "okay";
+};
diff --git a/dts/src/arm/mstar-infinity2m.dtsi b/dts/src/arm/mstar-infinity2m.dtsi
new file mode 100644
index 0000000..6d4d1d2
--- /dev/null
+++ b/dts/src/arm/mstar-infinity2m.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 thingy.jp.
+ * Author: Daniel Palmer <daniel@thingy.jp>
+ */
+
+#include "mstar-infinity.dtsi"
+
+&cpus {
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x1>;
+ };
+};
+
+&riu {
+ smpctrl: smpctrl@204000 {
+ reg = <0x204000 0x200>;
+ status = "disabled";
+ };
+};
diff --git a/dts/src/arm/mstar-v7.dtsi b/dts/src/arm/mstar-v7.dtsi
index f078805..b0a21b0 100644
--- a/dts/src/arm/mstar-v7.dtsi
+++ b/dts/src/arm/mstar-v7.dtsi
@@ -12,7 +12,7 @@
#size-cells = <1>;
interrupt-parent = <&gic>;
- cpus {
+ cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -109,6 +109,16 @@
reg = <0x204400 0x200>;
};
+ gpio: gpio@207800 {
+ #gpio-cells = <2>;
+ reg = <0x207800 0x200>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&intc_fiq>;
+ status = "disabled";
+ };
+
pm_uart: uart@221000 {
compatible = "ns16550a";
reg = <0x221000 0x100>;
diff --git a/dts/src/arm/nuvoton-common-npcm7xx.dtsi b/dts/src/arm/nuvoton-common-npcm7xx.dtsi
index d2d0761..3696980 100644
--- a/dts/src/arm/nuvoton-common-npcm7xx.dtsi
+++ b/dts/src/arm/nuvoton-common-npcm7xx.dtsi
@@ -3,6 +3,8 @@
// Copyright 2018 Google, Inc.
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
+#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
/ {
#address-cells = <1>;
@@ -63,12 +65,6 @@
interrupt-parent = <&gic>;
ranges = <0x0 0xf0000000 0x00900000>;
- gcr: gcr@800000 {
- compatible = "nuvoton,npcm750-gcr", "syscon",
- "simple-mfd";
- reg = <0x800000 0x1000>;
- };
-
scu: scu@3fe000 {
compatible = "arm,cortex-a9-scu";
reg = <0x3fe000 0x1000>;
@@ -80,7 +76,7 @@
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
cache-unified;
cache-level = <2>;
- clocks = <&clk 10>;
+ clocks = <&clk NPCM7XX_CLK_AXI>;
arm,shared-override;
};
@@ -91,6 +87,16 @@
reg = <0x3ff000 0x1000>,
<0x3fe100 0x100>;
};
+
+ gcr: gcr@800000 {
+ compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
+ reg = <0x800000 0x1000>;
+ };
+
+ rst: rst@801000 {
+ compatible = "nuvoton,npcm750-rst", "syscon", "simple-mfd";
+ reg = <0x801000 0x6C>;
+ };
};
ahb {
@@ -100,6 +106,12 @@
interrupt-parent = <&gic>;
ranges;
+ rstc: rstc@f0801000 {
+ compatible = "nuvoton,npcm750-reset";
+ reg = <0xf0801000 0x70>;
+ #reset-cells = <2>;
+ };
+
clk: clock-controller@f0801000 {
compatible = "nuvoton,npcm750-clk", "syscon";
#clock-cells = <1>;
@@ -109,6 +121,63 @@
clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>;
};
+ gmac0: eth@f0802000 {
+ device_type = "network";
+ compatible = "snps,dwmac";
+ reg = <0xf0802000 0x2000>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ ethernet = <0>;
+ clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>;
+ clock-names = "stmmaceth", "clk_gmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rg1_pins
+ &rg1mdio_pins>;
+ status = "disabled";
+ };
+
+ ehci1: usb@f0806000 {
+ compatible = "nuvoton,npcm750-ehci";
+ reg = <0xf0806000 0x1000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ fiu0: spi@fb000000 {
+ compatible = "nuvoton,npcm750-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfb000000 0x1000>;
+ reg-names = "control", "memory";
+ clocks = <&clk NPCM7XX_CLK_SPI0>;
+ clock-names = "clk_spi0";
+ status = "disabled";
+ };
+
+ fiu3: spi@c0000000 {
+ compatible = "nuvoton,npcm750-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xc0000000 0x1000>;
+ reg-names = "control", "memory";
+ clocks = <&clk NPCM7XX_CLK_SPI3>;
+ clock-names = "clk_spi3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins>;
+ status = "disabled";
+ };
+
+ fiux: spi@fb001000 {
+ compatible = "nuvoton,npcm750-fiu";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfb001000 0x1000>;
+ reg-names = "control", "memory";
+ clocks = <&clk NPCM7XX_CLK_SPIX>;
+ clock-names = "clk_spix";
+ status = "disabled";
+ };
+
apb {
#address-cells = <1>;
#size-cells = <1>;
@@ -116,11 +185,73 @@
interrupt-parent = <&gic>;
ranges = <0x0 0xf0000000 0x00300000>;
+ lpc_kcs: lpc_kcs@7000 {
+ compatible = "nuvoton,npcm750-lpc-kcs", "simple-mfd", "syscon";
+ reg = <0x7000 0x40>;
+ reg-io-width = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x7000 0x40>;
+
+ kcs1: kcs1@0 {
+ compatible = "nuvoton,npcm750-kcs-bmc";
+ reg = <0x0 0x40>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <1>;
+ status = "disabled";
+ };
+
+ kcs2: kcs2@0 {
+ compatible = "nuvoton,npcm750-kcs-bmc";
+ reg = <0x0 0x40>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <2>;
+ status = "disabled";
+ };
+
+ kcs3: kcs3@0 {
+ compatible = "nuvoton,npcm750-kcs-bmc";
+ reg = <0x0 0x40>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ kcs_chan = <3>;
+ status = "disabled";
+ };
+ };
+
+ spi0: spi@200000 {
+ compatible = "nuvoton,npcm750-pspi";
+ reg = <0x200000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pspi1_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_APB5>;
+ clock-names = "clk_apb5";
+ resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
+ status = "disabled";
+ };
+
+ spi1: spi@201000 {
+ compatible = "nuvoton,npcm750-pspi";
+ reg = <0x201000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pspi2_pins>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_APB5>;
+ clock-names = "clk_apb5";
+ resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI2>;
+ status = "disabled";
+ };
+
timer0: timer@8000 {
compatible = "nuvoton,npcm750-timer";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x8000 0x50>;
- clocks = <&clk 5>;
+ reg = <0x8000 0x1C>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog0: watchdog@801C {
@@ -128,7 +259,7 @@
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x801C 0x4>;
status = "disabled";
- clocks = <&clk 5>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog1: watchdog@901C {
@@ -136,7 +267,7 @@
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x901C 0x4>;
status = "disabled";
- clocks = <&clk 5>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
watchdog2: watchdog@a01C {
@@ -144,13 +275,13 @@
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xa01C 0x4>;
status = "disabled";
- clocks = <&clk 5>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
};
serial0: serial@1000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x1000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
@@ -159,7 +290,7 @@
serial1: serial@2000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x2000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
@@ -168,7 +299,7 @@
serial2: serial@3000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x3000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
@@ -177,11 +308,815 @@
serial3: serial@4000 {
compatible = "nuvoton,npcm750-uart";
reg = <0x4000 0x1000>;
- clocks = <&clk 6>;
+ clocks = <&clk NPCM7XX_CLK_UART>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
status = "disabled";
};
+
+ rng: rng@b000 {
+ compatible = "nuvoton,npcm750-rng";
+ reg = <0xb000 0x8>;
+ status = "disabled";
+ };
+
+ adc: adc@c000 {
+ compatible = "nuvoton,npcm750-adc";
+ reg = <0xc000 0x8>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_ADC>;
+ resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
+ status = "disabled";
+ };
+
+ pwm_fan: pwm-fan-controller@103000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nuvoton,npcm750-pwm-fan";
+ reg = <0x103000 0x2000>, <0x180000 0x8000>;
+ reg-names = "pwm", "fan";
+ clocks = <&clk NPCM7XX_CLK_APB3>,
+ <&clk NPCM7XX_CLK_APB4>;
+ clock-names = "pwm","fan";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pins &pwm1_pins
+ &pwm2_pins &pwm3_pins
+ &pwm4_pins &pwm5_pins
+ &pwm6_pins &pwm7_pins
+ &fanin0_pins &fanin1_pins
+ &fanin2_pins &fanin3_pins
+ &fanin4_pins &fanin5_pins
+ &fanin6_pins &fanin7_pins
+ &fanin8_pins &fanin9_pins
+ &fanin10_pins &fanin11_pins
+ &fanin12_pins &fanin13_pins
+ &fanin14_pins &fanin15_pins>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@80000 {
+ reg = <0x80000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb0_pins>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@81000 {
+ reg = <0x81000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb1_pins>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@82000 {
+ reg = <0x82000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb2_pins>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@83000 {
+ reg = <0x83000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb3_pins>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@84000 {
+ reg = <0x84000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb4_pins>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@85000 {
+ reg = <0x85000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb5_pins>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@86000 {
+ reg = <0x86000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb6_pins>;
+ status = "disabled";
+ };
+
+ i2c7: i2c@87000 {
+ reg = <0x87000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb7_pins>;
+ status = "disabled";
+ };
+
+ i2c8: i2c@88000 {
+ reg = <0x88000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb8_pins>;
+ status = "disabled";
+ };
+
+ i2c9: i2c@89000 {
+ reg = <0x89000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb9_pins>;
+ status = "disabled";
+ };
+
+ i2c10: i2c@8a000 {
+ reg = <0x8a000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb10_pins>;
+ status = "disabled";
+ };
+
+ i2c11: i2c@8b000 {
+ reg = <0x8b000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb11_pins>;
+ status = "disabled";
+ };
+
+ i2c12: i2c@8c000 {
+ reg = <0x8c000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb12_pins>;
+ status = "disabled";
+ };
+
+ i2c13: i2c@8d000 {
+ reg = <0x8d000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb13_pins>;
+ status = "disabled";
+ };
+
+ i2c14: i2c@8e000 {
+ reg = <0x8e000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb14_pins>;
+ status = "disabled";
+ };
+
+ i2c15: i2c@8f000 {
+ reg = <0x8f000 0x1000>;
+ compatible = "nuvoton,npcm750-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk NPCM7XX_CLK_APB2>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb15_pins>;
+ status = "disabled";
+ };
+ };
+ };
+
+ pinctrl: pinctrl@f0800000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nuvoton,npcm750-pinctrl", "syscon", "simple-mfd";
+ ranges = <0 0xf0010000 0x8000>;
+ gpio0: gpio@f0010000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x0 0x80>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 0 32>;
+ };
+ gpio1: gpio@f0011000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x1000 0x80>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 32 32>;
+ };
+ gpio2: gpio@f0012000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x2000 0x80>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 64 32>;
+ };
+ gpio3: gpio@f0013000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x3000 0x80>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 96 32>;
+ };
+ gpio4: gpio@f0014000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x4000 0x80>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 128 32>;
+ };
+ gpio5: gpio@f0015000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x5000 0x80>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 160 32>;
+ };
+ gpio6: gpio@f0016000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x6000 0x80>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 192 32>;
+ };
+ gpio7: gpio@f0017000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x7000 0x80>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 224 32>;
+ };
+
+ iox1_pins: iox1-pins {
+ groups = "iox1";
+ function = "iox1";
+ };
+ iox2_pins: iox2-pins {
+ groups = "iox2";
+ function = "iox2";
+ };
+ smb1d_pins: smb1d-pins {
+ groups = "smb1d";
+ function = "smb1d";
+ };
+ smb2d_pins: smb2d-pins {
+ groups = "smb2d";
+ function = "smb2d";
+ };
+ lkgpo1_pins: lkgpo1-pins {
+ groups = "lkgpo1";
+ function = "lkgpo1";
+ };
+ lkgpo2_pins: lkgpo2-pins {
+ groups = "lkgpo2";
+ function = "lkgpo2";
+ };
+ ioxh_pins: ioxh-pins {
+ groups = "ioxh";
+ function = "ioxh";
+ };
+ gspi_pins: gspi-pins {
+ groups = "gspi";
+ function = "gspi";
+ };
+ smb5b_pins: smb5b-pins {
+ groups = "smb5b";
+ function = "smb5b";
+ };
+ smb5c_pins: smb5c-pins {
+ groups = "smb5c";
+ function = "smb5c";
+ };
+ lkgpo0_pins: lkgpo0-pins {
+ groups = "lkgpo0";
+ function = "lkgpo0";
+ };
+ pspi2_pins: pspi2-pins {
+ groups = "pspi2";
+ function = "pspi2";
+ };
+ smb4den_pins: smb4den-pins {
+ groups = "smb4den";
+ function = "smb4den";
+ };
+ smb4b_pins: smb4b-pins {
+ groups = "smb4b";
+ function = "smb4b";
+ };
+ smb4c_pins: smb4c-pins {
+ groups = "smb4c";
+ function = "smb4c";
+ };
+ smb15_pins: smb15-pins {
+ groups = "smb15";
+ function = "smb15";
+ };
+ smb4d_pins: smb4d-pins {
+ groups = "smb4d";
+ function = "smb4d";
+ };
+ smb14_pins: smb14-pins {
+ groups = "smb14";
+ function = "smb14";
+ };
+ smb5_pins: smb5-pins {
+ groups = "smb5";
+ function = "smb5";
+ };
+ smb4_pins: smb4-pins {
+ groups = "smb4";
+ function = "smb4";
+ };
+ smb3_pins: smb3-pins {
+ groups = "smb3";
+ function = "smb3";
+ };
+ spi0cs1_pins: spi0cs1-pins {
+ groups = "spi0cs1";
+ function = "spi0cs1";
+ };
+ spi0cs2_pins: spi0cs2-pins {
+ groups = "spi0cs2";
+ function = "spi0cs2";
+ };
+ spi0cs3_pins: spi0cs3-pins {
+ groups = "spi0cs3";
+ function = "spi0cs3";
+ };
+ smb3c_pins: smb3c-pins {
+ groups = "smb3c";
+ function = "smb3c";
+ };
+ smb3b_pins: smb3b-pins {
+ groups = "smb3b";
+ function = "smb3b";
+ };
+ bmcuart0a_pins: bmcuart0a-pins {
+ groups = "bmcuart0a";
+ function = "bmcuart0a";
+ };
+ uart1_pins: uart1-pins {
+ groups = "uart1";
+ function = "uart1";
+ };
+ jtag2_pins: jtag2-pins {
+ groups = "jtag2";
+ function = "jtag2";
+ };
+ bmcuart1_pins: bmcuart1-pins {
+ groups = "bmcuart1";
+ function = "bmcuart1";
+ };
+ uart2_pins: uart2-pins {
+ groups = "uart2";
+ function = "uart2";
+ };
+ bmcuart0b_pins: bmcuart0b-pins {
+ groups = "bmcuart0b";
+ function = "bmcuart0b";
+ };
+ r1err_pins: r1err-pins {
+ groups = "r1err";
+ function = "r1err";
+ };
+ r1md_pins: r1md-pins {
+ groups = "r1md";
+ function = "r1md";
+ };
+ smb3d_pins: smb3d-pins {
+ groups = "smb3d";
+ function = "smb3d";
+ };
+ fanin0_pins: fanin0-pins {
+ groups = "fanin0";
+ function = "fanin0";
+ };
+ fanin1_pins: fanin1-pins {
+ groups = "fanin1";
+ function = "fanin1";
+ };
+ fanin2_pins: fanin2-pins {
+ groups = "fanin2";
+ function = "fanin2";
+ };
+ fanin3_pins: fanin3-pins {
+ groups = "fanin3";
+ function = "fanin3";
+ };
+ fanin4_pins: fanin4-pins {
+ groups = "fanin4";
+ function = "fanin4";
+ };
+ fanin5_pins: fanin5-pins {
+ groups = "fanin5";
+ function = "fanin5";
+ };
+ fanin6_pins: fanin6-pins {
+ groups = "fanin6";
+ function = "fanin6";
+ };
+ fanin7_pins: fanin7-pins {
+ groups = "fanin7";
+ function = "fanin7";
+ };
+ fanin8_pins: fanin8-pins {
+ groups = "fanin8";
+ function = "fanin8";
+ };
+ fanin9_pins: fanin9-pins {
+ groups = "fanin9";
+ function = "fanin9";
+ };
+ fanin10_pins: fanin10-pins {
+ groups = "fanin10";
+ function = "fanin10";
+ };
+ fanin11_pins: fanin11-pins {
+ groups = "fanin11";
+ function = "fanin11";
+ };
+ fanin12_pins: fanin12-pins {
+ groups = "fanin12";
+ function = "fanin12";
+ };
+ fanin13_pins: fanin13-pins {
+ groups = "fanin13";
+ function = "fanin13";
+ };
+ fanin14_pins: fanin14-pins {
+ groups = "fanin14";
+ function = "fanin14";
+ };
+ fanin15_pins: fanin15-pins {
+ groups = "fanin15";
+ function = "fanin15";
+ };
+ pwm0_pins: pwm0-pins {
+ groups = "pwm0";
+ function = "pwm0";
+ };
+ pwm1_pins: pwm1-pins {
+ groups = "pwm1";
+ function = "pwm1";
+ };
+ pwm2_pins: pwm2-pins {
+ groups = "pwm2";
+ function = "pwm2";
+ };
+ pwm3_pins: pwm3-pins {
+ groups = "pwm3";
+ function = "pwm3";
+ };
+ r2_pins: r2-pins {
+ groups = "r2";
+ function = "r2";
+ };
+ r2err_pins: r2err-pins {
+ groups = "r2err";
+ function = "r2err";
+ };
+ r2md_pins: r2md-pins {
+ groups = "r2md";
+ function = "r2md";
+ };
+ ga20kbc_pins: ga20kbc-pins {
+ groups = "ga20kbc";
+ function = "ga20kbc";
+ };
+ smb5d_pins: smb5d-pins {
+ groups = "smb5d";
+ function = "smb5d";
+ };
+ lpc_pins: lpc-pins {
+ groups = "lpc";
+ function = "lpc";
+ };
+ espi_pins: espi-pins {
+ groups = "espi";
+ function = "espi";
+ };
+ rg1_pins: rg1-pins {
+ groups = "rg1";
+ function = "rg1";
+ };
+ rg1mdio_pins: rg1mdio-pins {
+ groups = "rg1mdio";
+ function = "rg1mdio";
+ };
+ rg2_pins: rg2-pins {
+ groups = "rg2";
+ function = "rg2";
+ };
+ ddr_pins: ddr-pins {
+ groups = "ddr";
+ function = "ddr";
+ };
+ smb0_pins: smb0-pins {
+ groups = "smb0";
+ function = "smb0";
+ };
+ smb1_pins: smb1-pins {
+ groups = "smb1";
+ function = "smb1";
+ };
+ smb2_pins: smb2-pins {
+ groups = "smb2";
+ function = "smb2";
+ };
+ smb2c_pins: smb2c-pins {
+ groups = "smb2c";
+ function = "smb2c";
+ };
+ smb2b_pins: smb2b-pins {
+ groups = "smb2b";
+ function = "smb2b";
+ };
+ smb1c_pins: smb1c-pins {
+ groups = "smb1c";
+ function = "smb1c";
+ };
+ smb1b_pins: smb1b-pins {
+ groups = "smb1b";
+ function = "smb1b";
+ };
+ smb8_pins: smb8-pins {
+ groups = "smb8";
+ function = "smb8";
+ };
+ smb9_pins: smb9-pins {
+ groups = "smb9";
+ function = "smb9";
+ };
+ smb10_pins: smb10-pins {
+ groups = "smb10";
+ function = "smb10";
+ };
+ smb11_pins: smb11-pins {
+ groups = "smb11";
+ function = "smb11";
+ };
+ sd1_pins: sd1-pins {
+ groups = "sd1";
+ function = "sd1";
+ };
+ sd1pwr_pins: sd1pwr-pins {
+ groups = "sd1pwr";
+ function = "sd1pwr";
+ };
+ pwm4_pins: pwm4-pins {
+ groups = "pwm4";
+ function = "pwm4";
+ };
+ pwm5_pins: pwm5-pins {
+ groups = "pwm5";
+ function = "pwm5";
+ };
+ pwm6_pins: pwm6-pins {
+ groups = "pwm6";
+ function = "pwm6";
+ };
+ pwm7_pins: pwm7-pins {
+ groups = "pwm7";
+ function = "pwm7";
+ };
+ mmc8_pins: mmc8-pins {
+ groups = "mmc8";
+ function = "mmc8";
+ };
+ mmc_pins: mmc-pins {
+ groups = "mmc";
+ function = "mmc";
+ };
+ mmcwp_pins: mmcwp-pins {
+ groups = "mmcwp";
+ function = "mmcwp";
+ };
+ mmccd_pins: mmccd-pins {
+ groups = "mmccd";
+ function = "mmccd";
+ };
+ mmcrst_pins: mmcrst-pins {
+ groups = "mmcrst";
+ function = "mmcrst";
+ };
+ clkout_pins: clkout-pins {
+ groups = "clkout";
+ function = "clkout";
+ };
+ serirq_pins: serirq-pins {
+ groups = "serirq";
+ function = "serirq";
+ };
+ lpcclk_pins: lpcclk-pins {
+ groups = "lpcclk";
+ function = "lpcclk";
+ };
+ scipme_pins: scipme-pins {
+ groups = "scipme";
+ function = "scipme";
+ };
+ sci_pins: sci-pins {
+ groups = "sci";
+ function = "sci";
+ };
+ smb6_pins: smb6-pins {
+ groups = "smb6";
+ function = "smb6";
+ };
+ smb7_pins: smb7-pins {
+ groups = "smb7";
+ function = "smb7";
+ };
+ pspi1_pins: pspi1-pins {
+ groups = "pspi1";
+ function = "pspi1";
+ };
+ faninx_pins: faninx-pins {
+ groups = "faninx";
+ function = "faninx";
+ };
+ r1_pins: r1-pins {
+ groups = "r1";
+ function = "r1";
+ };
+ spi3_pins: spi3-pins {
+ groups = "spi3";
+ function = "spi3";
+ };
+ spi3cs1_pins: spi3cs1-pins {
+ groups = "spi3cs1";
+ function = "spi3cs1";
+ };
+ spi3quad_pins: spi3quad-pins {
+ groups = "spi3quad";
+ function = "spi3quad";
+ };
+ spi3cs2_pins: spi3cs2-pins {
+ groups = "spi3cs2";
+ function = "spi3cs2";
+ };
+ spi3cs3_pins: spi3cs3-pins {
+ groups = "spi3cs3";
+ function = "spi3cs3";
+ };
+ nprd_smi_pins: nprd-smi-pins {
+ groups = "nprd_smi";
+ function = "nprd_smi";
+ };
+ smb0b_pins: smb0b-pins {
+ groups = "smb0b";
+ function = "smb0b";
+ };
+ smb0c_pins: smb0c-pins {
+ groups = "smb0c";
+ function = "smb0c";
+ };
+ smb0den_pins: smb0den-pins {
+ groups = "smb0den";
+ function = "smb0den";
+ };
+ smb0d_pins: smb0d-pins {
+ groups = "smb0d";
+ function = "smb0d";
+ };
+ ddc_pins: ddc-pins {
+ groups = "ddc";
+ function = "ddc";
+ };
+ rg2mdio_pins: rg2mdio-pins {
+ groups = "rg2mdio";
+ function = "rg2mdio";
+ };
+ wdog1_pins: wdog1-pins {
+ groups = "wdog1";
+ function = "wdog1";
+ };
+ wdog2_pins: wdog2-pins {
+ groups = "wdog2";
+ function = "wdog2";
+ };
+ smb12_pins: smb12-pins {
+ groups = "smb12";
+ function = "smb12";
+ };
+ smb13_pins: smb13-pins {
+ groups = "smb13";
+ function = "smb13";
+ };
+ spix_pins: spix-pins {
+ groups = "spix";
+ function = "spix";
+ };
+ spixcs1_pins: spixcs1-pins {
+ groups = "spixcs1";
+ function = "spixcs1";
+ };
+ clkreq_pins: clkreq-pins {
+ groups = "clkreq";
+ function = "clkreq";
+ };
+ hgpio0_pins: hgpio0-pins {
+ groups = "hgpio0";
+ function = "hgpio0";
+ };
+ hgpio1_pins: hgpio1-pins {
+ groups = "hgpio1";
+ function = "hgpio1";
+ };
+ hgpio2_pins: hgpio2-pins {
+ groups = "hgpio2";
+ function = "hgpio2";
+ };
+ hgpio3_pins: hgpio3-pins {
+ groups = "hgpio3";
+ function = "hgpio3";
+ };
+ hgpio4_pins: hgpio4-pins {
+ groups = "hgpio4";
+ function = "hgpio4";
+ };
+ hgpio5_pins: hgpio5-pins {
+ groups = "hgpio5";
+ function = "hgpio5";
+ };
+ hgpio6_pins: hgpio6-pins {
+ groups = "hgpio6";
+ function = "hgpio6";
+ };
+ hgpio7_pins: hgpio7-pins {
+ groups = "hgpio7";
+ function = "hgpio7";
};
};
};
diff --git a/dts/src/arm/nuvoton-npcm730-gsj-gpio.dtsi b/dts/src/arm/nuvoton-npcm730-gsj-gpio.dtsi
new file mode 100644
index 0000000..53cfd15
--- /dev/null
+++ b/dts/src/arm/nuvoton-npcm730-gsj-gpio.dtsi
@@ -0,0 +1,477 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com
+
+/ {
+ pinctrl: pinctrl@f0800000 {
+ gpio0pp_pins: gpio0pp-pins {
+ pins = "GPIO0/IOX1DI";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio1pp_pins: gpio1pp-pins {
+ pins = "GPIO1/IOX1LD";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio2pp_pins: gpio2pp-pins {
+ pins = "GPIO2/IOX1CK";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio3pp_pins: gpio3pp-pins {
+ pins = "GPIO3/IOX1D0";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio4pp_pins: gpio4pp-pins {
+ pins = "GPIO4/IOX2DI/SMB1DSDA";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio5pp_pins: gpio5pp-pins {
+ pins = "GPIO5/IOX2LD/SMB1DSCL";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio6pp_pins: gpio6pp-pins {
+ pins = "GPIO6/IOX2CK/SMB2DSDA";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio7pp_pins: gpio7pp-pins {
+ pins = "GPIO7/IOX2D0/SMB2DSCL";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio8_pins: gpio8-pins {
+ pins = "GPIO8/LKGPO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio9_pins: gpio9-pins {
+ pins = "GPIO9/LKGPO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio10pp_pins: gpio10pp-pins {
+ pins = "GPIO10/IOXHLD";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio11pp_pins: gpio11pp-pins {
+ pins = "GPIO11/IOXHCK";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio12_pins: gpio12-pins {
+ pins = "GPIO12/GSPICK/SMB5BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio13_pins: gpio13-pins {
+ pins = "GPIO13/GSPIDO/SMB5BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio14_pins: gpio14-pins {
+ pins = "GPIO14/GSPIDI/SMB5CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio15od_pins: gpio15od-pins {
+ pins = "GPIO15/GSPICS/SMB5CSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio17pp_pins: gpio17pp-pins {
+ pins = "GPIO17/PSPI2DI/SMB4DEN";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio18pp_pins: gpio18pp-pins {
+ pins = "GPIO18/PSPI2D0/SMB4BSDA";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio19pp_pins: gpio19pp-pins {
+ pins = "GPIO19/PSPI2CK/SMB4BSCL";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio24pp_pins: gpio24pp-pins {
+ pins = "GPIO24/IOXHDO";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio25pp_pins: gpio25pp-pins {
+ pins = "GPIO25/IOXHDI";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio37od_pins: gpio37od-pins {
+ pins = "GPIO37/SMB3CSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio59pp_pins: gpio59pp-pins {
+ pins = "GPIO59/SMB3DSDA";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio60_pins: gpio60-pins {
+ pins = "GPIO60/SMB3DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio72od_pins: gpio72od-pins {
+ pins = "GPIO72/FANIN8";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio73od_pins: gpio73od-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio74od_pins: gpio74od-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio75od_pins: gpio75od-pins {
+ pins = "GPIO75/FANIN11";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio76od_pins: gpio76od-pins {
+ pins = "GPIO76/FANIN12";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio77od_pins: gpio77od-pins {
+ pins = "GPIO77/FANIN13";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio78od_pins: gpio78od-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio79od_pins: gpio79od-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio83_pins: gpio83-pins {
+ pins = "GPIO83/PWM3";
+ bias-disable;
+ input-enable;
+ };
+ gpio84pp_pins: gpio84pp-pins {
+ pins = "GPIO84/R2TXD0";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio85pp_pins: gpio85pp-pins {
+ pins = "GPIO85/R2TXD1";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio86pp_pins: gpio86pp-pins {
+ pins = "GPIO86/R2TXEN";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio87pp_pins: gpio87pp-pins {
+ pins = "GPIO87/R2RXD0";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio88pp_pins: gpio88pp-pins {
+ pins = "GPIO88/R2RXD1";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio89pp_pins: gpio89pp-pins {
+ pins = "GPIO89/R2CRSDV";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio90pp_pins: gpio90pp-pins {
+ pins = "GPIO90/R2RXERR";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio91_pins: gpio91-pins {
+ pins = "GPIO91/R2MDC";
+ bias-disable;
+ input-enable;
+ };
+ gpio92_pins: gpio92-pins {
+ pins = "GPIO92/R2MDIO";
+ bias-disable;
+ input-enable;
+ };
+ gpio93pp_pins: gpio93pp-pins {
+ pins = "GPIO93/GA20/SMB5DSCL";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio94pp_pins: gpio94pp-pins {
+ pins = "GPIO94/nKBRST/SMB5DSDA";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio95_pins: gpio95-pins {
+ pins = "GPIO95/nLRESET/nESPIRST";
+ bias-disable;
+ input-enable;
+ };
+ gpio125pp_pins: gpio125pp-pins {
+ pins = "GPIO125/SMB1CSCL";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio126od_pins: gpio126od-pins {
+ pins = "GPIO126/SMB1BSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio127od_pins: gpio127od-pins {
+ pins = "GPIO127/SMB1BSCL";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio136_pins: gpio136-pins {
+ pins = "GPIO136/SD1DT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio137_pins: gpio137-pins {
+ pins = "GPIO137/SD1DT1";
+ bias-disable;
+ input-enable;
+ };
+ gpio141_pins: gpio141-pins {
+ pins = "GPIO141/SD1WP";
+ bias-disable;
+ input-enable;
+ };
+ gpio142od_pins: gpio142od-pins {
+ pins = "GPIO142/SD1CMD";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio143ol_pins: gpio143ol-pins {
+ pins = "GPIO143/SD1CD/SD1PWR";
+ bias-disable;
+ output-low;
+ };
+ gpio144_pins: gpio144-pins {
+ pins = "GPIO144/PWM4";
+ bias-disable;
+ input-enable;
+ };
+ gpio145_pins: gpio145-pins {
+ pins = "GPIO145/PWM5";
+ bias-disable;
+ input-enable;
+ };
+ gpio146_pins: gpio146-pins {
+ pins = "GPIO146/PWM6";
+ bias-disable;
+ input-enable;
+ };
+ gpio147_pins: gpio147-pins {
+ pins = "GPIO147/PWM7";
+ bias-disable;
+ input-enable;
+ };
+ gpio148_pins: gpio148-pins {
+ pins = "GPIO148/MMCDT4";
+ bias-disable;
+ input-enable;
+ };
+ gpio149_pins: gpio149-pins {
+ pins = "GPIO149/MMCDT5";
+ bias-disable;
+ input-enable;
+ };
+ gpio150_pins: gpio150-pins {
+ pins = "GPIO150/MMCDT6";
+ bias-disable;
+ input-enable;
+ };
+ gpio151_pins: gpio151-pins {
+ pins = "GPIO151/MMCDT7";
+ bias-disable;
+ input-enable;
+ };
+ gpio152_pins: gpio152-pins {
+ pins = "GPIO152/MMCCLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio153_pins: gpio153-pins {
+ pins = "GPIO153/MMCWP";
+ bias-disable;
+ input-enable;
+ };
+ gpio154_pins: gpio154-pins {
+ pins = "GPIO154/MMCCMD";
+ bias-disable;
+ input-enable;
+ };
+ gpio155_pins: gpio155-pins {
+ pins = "GPIO155/nMMCCD/nMMCRST";
+ bias-disable;
+ input-enable;
+ };
+ gpio156_pins: gpio156-pins {
+ pins = "GPIO156/MMCDT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio157_pins: gpio157-pins {
+ pins = "GPIO157/MMCDT1";
+ bias-disable;
+ input-enable;
+ };
+ gpio158_pins: gpio158-pins {
+ pins = "GPIO158/MMCDT2";
+ bias-disable;
+ input-enable;
+ };
+ gpio159_pins: gpio159-pins {
+ pins = "GPIO159/MMCDT3";
+ bias-disable;
+ input-enable;
+ };
+ gpio161_pins: gpio161-pins {
+ pins = "GPIO161/nLFRAME/nESPICS";
+ bias-disable;
+ input-enable;
+ };
+ gpio162_pins: gpio162-pins {
+ pins = "GPIO162/SERIRQ";
+ bias-disable;
+ input-enable;
+ };
+ gpio163_pins: gpio163-pins {
+ pins = "GPIO163/LCLK/ESPICLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio164_pins: gpio164-pins {
+ pins = "GPIO164/LAD0/ESPI_IO0";
+ bias-disable;
+ input-enable;
+ };
+ gpio165_pins: gpio165-pins {
+ pins = "GPIO165/LAD1/ESPI_IO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio166_pins: gpio166-pins {
+ pins = "GPIO166/LAD2/ESPI_IO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio167_pins: gpio167-pins {
+ pins = "GPIO167/LAD3/ESPI_IO3";
+ bias-disable;
+ input-enable;
+ };
+ gpio168_pins: gpio168-pins {
+ pins = "GPIO168/nCLKRUN/nESPIALERT";
+ bias-disable;
+ input-enable;
+ };
+ gpio169_pins: gpio169-pins {
+ pins = "GPIO169/nSCIPME";
+ bias-disable;
+ input-enable;
+ };
+ gpio170_pins: gpio170-pins {
+ pins = "GPIO170/nSMI";
+ bias-disable;
+ input-enable;
+ };
+ gpio175od_pins: gpio175od-pins {
+ pins = "GPIO175/PSPI1CK/FANIN19";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio176od_pins: gpio176od-pins {
+ pins = "GPIO176/PSPI1DO/FANIN18";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio177_pins: gpio177-pins {
+ pins = "GPIO177/PSPI1DI/FANIN17";
+ bias-disable;
+ input-enable;
+ };
+ gpio190od_pins: gpio190od-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio191_pins: gpio191-pins {
+ pins = "GPIO191";
+ bias-disable;
+ input-enable;
+ };
+ gpio192_pins: gpio192-pins {
+ pins = "GPIO192";
+ bias-disable;
+ input-enable;
+ };
+ gpio194pp_pins: gpio194pp-pins {
+ pins = "GPIO194/SMB0BSCL";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio195od_pins: gpio195od-pins {
+ pins = "GPIO195/SMB0BSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio196od_pins: gpio196od-pins {
+ pins = "GPIO196/SMB0CSCL";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio197od_pins: gpio197od-pins {
+ pins = "GPIO197/SMB0DEN";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio198od_pins: gpio198od-pins {
+ pins = "GPIO198/SMB0DSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio199od_pins: gpio199od-pins {
+ pins = "GPIO199/SMB0DSCL";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio200pp_pins: gpio200pp-pins {
+ pins = "GPIO200/R2CK";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio202od_pins: gpio202od-pins {
+ pins = "GPIO202/SMB0CSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio203_pins: gpio203-pins {
+ pins = "GPIO203/FANIN16";
+ bias-disable;
+ input-enable;
+ };
+ };
+};
diff --git a/dts/src/arm/nuvoton-npcm730-gsj.dts b/dts/src/arm/nuvoton-npcm730-gsj.dts
new file mode 100644
index 0000000..d4ff499
--- /dev/null
+++ b/dts/src/arm/nuvoton-npcm730-gsj.dts
@@ -0,0 +1,490 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2019 Quanta Computer lnc. Fran.Hsu@quantatw.com
+
+/dts-v1/;
+#include "nuvoton-npcm730.dtsi"
+#include "nuvoton-npcm730-gsj-gpio.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Quanta GSJ Board (Device Tree v12)";
+ compatible = "nuvoton,npcm750";
+
+ aliases {
+ ethernet1 = &gmac0;
+ serial3 = &serial3;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c8 = &i2c8;
+ i2c9 = &i2c9;
+ i2c10 = &i2c10;
+ i2c11 = &i2c11;
+ i2c12 = &i2c12;
+ i2c15 = &i2c15;
+ fiu0 = &fiu0;
+ };
+
+ chosen {
+ stdout-path = &serial3;
+ };
+
+ memory {
+ reg = <0 0x40000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-bmc-live {
+ gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ LED_U2_0_LOCATE {
+ gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_1_LOCATE {
+ gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_2_LOCATE {
+ gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_3_LOCATE {
+ gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_4_LOCATE {
+ gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_5_LOCATE {
+ gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_BMC_TRAY_PWRGD {
+ gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_7_FAULT {
+ gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_6_LOCATE {
+ gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_7_LOCATE {
+ gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_0_FAULT {
+ gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_1_FAULT {
+ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_2_FAULT {
+ gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_3_FAULT {
+ gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_4_FAULT {
+ gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_5_FAULT {
+ gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_U2_6_FAULT {
+ gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+};
+
+&fiu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0cs1_pins>;
+ status = "okay";
+
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-rx-bus-width = <2>;
+
+ partitions@80000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bmc@0{
+ label = "bmc";
+ reg = <0x000000 0x2000000>;
+ };
+ u-boot@0 {
+ label = "u-boot";
+ reg = <0x0000000 0x80000>;
+ read-only;
+ };
+ u-boot-env@100000{
+ label = "u-boot-env";
+ reg = <0x00100000 0x40000>;
+ };
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x0200000 0x600000>;
+ };
+ rofs@800000 {
+ label = "rofs";
+ reg = <0x800000 0x1400000>;
+ };
+ rwfs@1c00000 {
+ label = "rwfs";
+ reg = <0x1c00000 0x300000>;
+ };
+ reserved@1f00000 {
+ label = "reserved";
+ reg = <0x1f00000 0x100000>;
+ };
+ };
+ };
+};
+
+&gmac0 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&watchdog1 {
+ status = "okay";
+};
+
+&rng {
+ status = "okay";
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&serial3 {
+ status = "okay";
+};
+
+&adc {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+};
+
+&i2c3 {
+ status = "okay";
+
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ };
+};
+
+&i2c4 {
+ status = "okay";
+
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ };
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c9 {
+ status = "okay";
+
+ eeprom@55 {
+ compatible = "atmel,24c64";
+ reg = <0x55>;
+ };
+};
+
+&i2c10 {
+ status = "okay";
+
+ eeprom@55 {
+ compatible = "atmel,24c64";
+ reg = <0x55>;
+ };
+};
+
+&i2c11 {
+ status = "okay";
+
+ /* P12V Quarter Brick DC/DC Power Module Q54SH12050 @60 */
+ power-brick@36 {
+ compatible = "delta,dps800";
+ reg = <0x36>;
+ };
+
+ hotswap@15 {
+ compatible = "ti,lm5066i";
+ reg = <0x15>;
+ };
+};
+
+&i2c12 {
+ status = "okay";
+
+ ucd90160@6b {
+ compatible = "ti,ucd90160";
+ reg = <0x6b>;
+ };
+};
+
+&i2c15 {
+ status = "okay";
+
+ i2c-switch@75 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x75>;
+ i2c-mux-idle-disconnect;
+
+ i2c_u20: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_u21: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_u22: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_u23: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ i2c_u24: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ i2c_u25: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ i2c_u26: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ i2c_u27: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
+};
+
+&pwm_fan {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
+ &fanin0_pins &fanin1_pins
+ &fanin2_pins &fanin3_pins
+ &fanin4_pins &fanin5_pins>;
+ status = "okay";
+
+ fan@0 {
+ reg = <0x00>;
+ fan-tach-ch = /bits/ 8 <0x00 0x01>;
+ cooling-levels = <127 255>;
+ };
+
+ fan@1 {
+ reg = <0x01>;
+ fan-tach-ch = /bits/ 8 <0x02 0x03>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+
+ fan@2 {
+ reg = <0x02>;
+ fan-tach-ch = /bits/ 8 <0x04 0x05>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ /* GPI pins*/
+ &gpio8_pins
+ &gpio9_pins
+ &gpio12_pins
+ &gpio13_pins
+ &gpio14_pins
+ &gpio60_pins
+ &gpio83_pins
+ &gpio91_pins
+ &gpio92_pins
+ &gpio95_pins
+ &gpio136_pins
+ &gpio137_pins
+ &gpio141_pins
+ &gpio144_pins
+ &gpio145_pins
+ &gpio146_pins
+ &gpio147_pins
+ &gpio148_pins
+ &gpio149_pins
+ &gpio150_pins
+ &gpio151_pins
+ &gpio152_pins
+ &gpio153_pins
+ &gpio154_pins
+ &gpio155_pins
+ &gpio156_pins
+ &gpio157_pins
+ &gpio158_pins
+ &gpio159_pins
+ &gpio161_pins
+ &gpio162_pins
+ &gpio163_pins
+ &gpio164_pins
+ &gpio165_pins
+ &gpio166_pins
+ &gpio167_pins
+ &gpio168_pins
+ &gpio169_pins
+ &gpio170_pins
+ &gpio177_pins
+ &gpio191_pins
+ &gpio192_pins
+ &gpio203_pins
+ /* GPO pins*/
+ &gpio0pp_pins
+ &gpio1pp_pins
+ &gpio2pp_pins
+ &gpio3pp_pins
+ &gpio4pp_pins
+ &gpio5pp_pins
+ &gpio6pp_pins
+ &gpio7pp_pins
+ &gpio10pp_pins
+ &gpio11pp_pins
+ &gpio15od_pins
+ &gpio17pp_pins
+ &gpio18pp_pins
+ &gpio19pp_pins
+ &gpio24pp_pins
+ &gpio25pp_pins
+ &gpio37od_pins
+ &gpio59pp_pins
+ &gpio72od_pins
+ &gpio73od_pins
+ &gpio74od_pins
+ &gpio75od_pins
+ &gpio76od_pins
+ &gpio77od_pins
+ &gpio78od_pins
+ &gpio79od_pins
+ &gpio84pp_pins
+ &gpio85pp_pins
+ &gpio86pp_pins
+ &gpio87pp_pins
+ &gpio88pp_pins
+ &gpio89pp_pins
+ &gpio90pp_pins
+ &gpio93pp_pins
+ &gpio94pp_pins
+ &gpio125pp_pins
+ &gpio126od_pins
+ &gpio127od_pins
+ &gpio142od_pins
+ &gpio143ol_pins
+ &gpio175od_pins
+ &gpio176od_pins
+ &gpio190od_pins
+ &gpio194pp_pins
+ &gpio195od_pins
+ &gpio196od_pins
+ &gpio197od_pins
+ &gpio198od_pins
+ &gpio199od_pins
+ &gpio200pp_pins
+ &gpio202od_pins
+ >;
+};
diff --git a/dts/src/arm/nuvoton-npcm730-kudo.dts b/dts/src/arm/nuvoton-npcm730-kudo.dts
new file mode 100644
index 0000000..82a104b
--- /dev/null
+++ b/dts/src/arm/nuvoton-npcm730-kudo.dts
@@ -0,0 +1,826 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020 Fii USA Inc.
+
+/dts-v1/;
+#include "nuvoton-npcm730.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Fii Kudo Board";
+ compatible = "fii,kudo", "nuvoton,npcm730";
+
+ aliases {
+ ethernet1 = &gmac0;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c7;
+ i2c8 = &i2c8;
+ i2c9 = &i2c9;
+ i2c10 = &i2c10;
+ i2c11 = &i2c11;
+ i2c12 = &i2c12;
+ i2c13 = &i2c13;
+ i2c14 = &i2c14;
+ i2c15 = &i2c15;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ fiu0 = &fiu0;
+ fiu1 = &fiu3;
+ };
+
+ chosen {
+ stdout-path = &serial3;
+ };
+
+ memory {
+ reg = <0 0x40000000>;
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
+ };
+
+ jtag_master {
+ compatible = "nuvoton,npcm750-jtag-master";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ // dev/jtag0
+ dev-num = <0>;
+ // pspi or gpio
+ mode = "pspi";
+
+ // pspi2
+ pspi-controller = <2>;
+ reg = <0xf0201000 0x1000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM7XX_CLK_APB5>;
+
+ // TCK, TDI, TDO, TMS
+ jtag-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>,
+ <&gpio0 18 GPIO_ACTIVE_HIGH>,
+ <&gpio0 17 GPIO_ACTIVE_HIGH>,
+ <&gpio0 16 GPIO_ACTIVE_HIGH>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ heartbeat {
+ label = "heartbeat";
+ gpios = <&gpio0 14 1>;
+ };
+ };
+
+ pinctrl: pinctrl@f0800000 {
+ gpio61oh_pins: gpio61oh-pins {
+ pins = "GPO61/nDTR1_BOUT1/STRAP6";
+ bias-disable;
+ output-high;
+ };
+ gpio62oh_pins: gpio62oh-pins {
+ pins = "GPO62/nRTST1/STRAP5";
+ bias-disable;
+ output-high;
+ };
+ gpio161ol_pins: gpio161ol-pins {
+ pins = "GPIO161/nLFRAME/nESPICS";
+ bias-disable;
+ output-low;
+ };
+ gpio163i_pins: gpio163i-pins {
+ pins = "GPIO163/LCLK/ESPICLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio167ol_pins: gpio167ol-pins {
+ pins = "GPIO167/LAD3/ESPI_IO3";
+ bias-disable;
+ output-low;
+ };
+ gpio95i_pins: gpio95i-pins {
+ pins = "GPIO95/nLRESET/nESPIRST";
+ bias-disable;
+ input-enable;
+ };
+ gpio65ol_pins: gpio65ol-pins {
+ pins = "GPIO65/FANIN1";
+ bias-disable;
+ output-low;
+ };
+ gpio66oh_pins: gpio66oh-pins {
+ pins = "GPIO66/FANIN2";
+ bias-disable;
+ output-high;
+ };
+ gpio67oh_pins: gpio67oh-pins {
+ pins = "GPIO67/FANIN3";
+ bias-disable;
+ output-high;
+ };
+ gpio68ol_pins: gpio68ol-pins {
+ pins = "GPIO68/FANIN4";
+ bias-disable;
+ output-low;
+ };
+ gpio69i_pins: gpio69i-pins {
+ pins = "GPIO69/FANIN5";
+ bias-disable;
+ input-enable;
+ };
+ gpio70ol_pins: gpio70ol-pins {
+ pins = "GPIO70/FANIN6";
+ bias-disable;
+ output-low;
+ };
+ gpio71i_pins: gpio71i-pins {
+ pins = "GPIO71/FANIN7";
+ bias-disable;
+ input-enable;
+ };
+ gpio72i_pins: gpio72i-pins {
+ pins = "GPIO72/FANIN8";
+ bias-disable;
+ input-enable;
+ };
+ gpio73i_pins: gpio73i-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ input-enable;
+ };
+ gpio74i_pins: gpio74i-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ input-enable;
+ };
+ gpio75i_pins: gpio75i-pins {
+ pins = "GPIO75/FANIN11";
+ bias-disable;
+ input-enable;
+ };
+ gpio76i_pins: gpio76i-pins {
+ pins = "GPIO76/FANIN12";
+ bias-disable;
+ input-enable;
+ };
+ gpio77i_pins: gpio77i-pins {
+ pins = "GPIO77/FANIN13";
+ bias-disable;
+ input-enable;
+ };
+ gpio78i_pins: gpio78i-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ input-enable;
+ };
+ gpio79ol_pins: gpio79ol-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ output-low;
+ };
+ gpio80oh_pins: gpio80oh-pins {
+ pins = "GPIO80/PWM0";
+ bias-disable;
+ output-high;
+ };
+ gpio81i_pins: gpio81i-pins {
+ pins = "GPIO81/PWM1";
+ bias-disable;
+ input-enable;
+ };
+ gpio82i_pins: gpio82i-pins {
+ pins = "GPIO82/PWM2";
+ bias-disable;
+ input-enable;
+ };
+ gpio83i_pins: gpio83i-pins {
+ pins = "GPIO83/PWM3";
+ bias-disable;
+ input-enable;
+ };
+ gpio144i_pins: gpio144i-pins {
+ pins = "GPIO144/PWM4";
+ bias-disable;
+ input-enable;
+ };
+ gpio145i_pins: gpio145i-pins {
+ pins = "GPIO145/PWM5";
+ bias-disable;
+ input-enable;
+ };
+ gpio146i_pins: gpio146i-pins {
+ pins = "GPIO146/PWM6";
+ bias-disable;
+ input-enable;
+ };
+ gpio147oh_pins: gpio147oh-pins {
+ pins = "GPIO147/PWM7";
+ bias-disable;
+ output-high;
+ };
+ gpio168ol_pins: gpio168ol-pins {
+ pins = "GPIO168/nCLKRUN/nESPIALERT";
+ bias-disable;
+ output-low;
+ };
+ gpio169oh_pins: gpio169oh-pins {
+ pins = "GPIO169/nSCIPME";
+ bias-disable;
+ output-high;
+ };
+ gpio170ol_pins: gpio170ol-pins {
+ pins = "GPIO170/nSMI";
+ bias-disable;
+ output-low;
+ };
+ gpio218oh_pins: gpio218oh-pins {
+ pins = "GPIO218/nWDO1";
+ bias-disable;
+ output-high;
+ };
+ gpio37i_pins: gpio37i-pins {
+ pins = "GPIO37/SMB3CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio38i_pins: gpio38i-pins {
+ pins = "GPIO38/SMB3CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio39i_pins: gpio39i-pins {
+ pins = "GPIO39/SMB3BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio40i_pins: gpio40i-pins {
+ pins = "GPIO40/SMB3BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio121i_pins: gpio121i-pins {
+ pins = "GPIO121/SMB2CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio122i_pins: gpio122i-pins {
+ pins = "GPIO122/SMB2BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio123i_pins: gpio123i-pins {
+ pins = "GPIO123/SMB2BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio124i_pins: gpio124i-pins {
+ pins = "GPIO124/SMB1CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio125i_pins: gpio125i-pins {
+ pins = "GPIO125/SMB1CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio126i_pins: gpio126i-pins {
+ pins = "GPIO126/SMB1BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio127i_pins: gpio127i-pins {
+ pins = "GPIO127/SMB1BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio136i_pins: gpio136i-pins {
+ pins = "GPIO136/SD1DT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio137oh_pins: gpio137oh-pins {
+ pins = "GPIO137/SD1DT1";
+ bias-disable;
+ output-high;
+ };
+ gpio138i_pins: gpio138i-pins {
+ pins = "GPIO138/SD1DT2";
+ bias-disable;
+ input-enable;
+ };
+ gpio139i_pins: gpio139i-pins {
+ pins = "GPIO139/SD1DT3";
+ bias-disable;
+ input-enable;
+ };
+ gpio140i_pins: gpio140i-pins {
+ pins = "GPIO140/SD1CLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio141i_pins: gpio141i-pins {
+ pins = "GPIO141/SD1WP";
+ bias-disable;
+ input-enable;
+ };
+ gpio190oh_pins: gpio190oh-pins {
+ pins = "GPIO190/nPRD_SMI";
+ bias-disable;
+ output-high;
+ };
+ gpio191oh_pins: gpio191oh-pins {
+ pins = "GPIO191";
+ bias-disable;
+ output-high;
+ };
+ gpio195ol_pins: gpio195ol-pins {
+ pins = "GPIO195/SMB0BSDA";
+ bias-disable;
+ output-low;
+ };
+ gpio196ol_pins: gpio196ol-pins {
+ pins = "GPIO196/SMB0CSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio199i_pins: gpio199i-pins {
+ pins = "GPIO199/SMB0DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio202ol_pins: gpio202ol-pins {
+ pins = "GPIO202/SMB0CSDA";
+ bias-disable;
+ output-low;
+ };
+ };
+};
+
+&gmac0 {
+ phy-mode = "rgmii-id";
+ snps,eee-force-disable;
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&fiu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0cs1_pins>;
+ status = "okay";
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ spi-rx-bus-width = <2>;
+ label = "bmc";
+ partitions@80000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot@0 {
+ label = "u-boot";
+ reg = <0x0000000 0xC0000>;
+ read-only;
+ };
+ u-boot-env@100000{
+ label = "u-boot-env";
+ reg = <0x00100000 0x40000>;
+ };
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x0200000 0x600000>;
+ };
+ rofs@800000 {
+ label = "rofs";
+ reg = <0x800000 0x3500000>;
+ };
+ rwfs@3d00000 {
+ label = "rwfs";
+ reg = <0x3d00000 0x300000>;
+ };
+ };
+ };
+ spi-nor@1 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <1>;
+ spi-max-frequency = <5000000>;
+ spi-rx-bus-width = <2>;
+ partitions@88000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spare1@0 {
+ label = "spi0-cs1-spare1";
+ reg = <0x0 0x800000>;
+ };
+ spare2@800000 {
+ label = "spi0-cs1-spare2";
+ reg = <0x800000 0x0>;
+ };
+ };
+ };
+};
+
+&fiu3 {
+ pinctrl-0 = <&spi3_pins>;
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ spi-rx-bus-width = <2>;
+ partitions@A0000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ system1@0 {
+ label = "bios";
+ reg = <0x0 0x0>;
+ };
+ system2@800000 {
+ label = "spi3-system2";
+ reg = <0x800000 0x0>;
+ };
+ };
+ };
+};
+
+&watchdog1 {
+ status = "okay";
+};
+
+&rng {
+ status = "okay";
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&serial3 {
+ status = "okay";
+};
+
+&adc {
+ #io-channel-cells = <1>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ i2c-switch@75 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x75>;
+ i2c-mux-idle-disconnect;
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ // Rear-Fan
+ max31790@58 {
+ compatible = "maxim,max31790";
+ reg = <0x58>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ // Mid-Fan
+ max31790@58 {
+ compatible = "maxim,max31790";
+ reg = <0x58>;
+ };
+ };
+
+ i2c-bus@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+
+ // INLET1_T
+ lm75@5c {
+ compatible = "ti,lm75";
+ reg = <0x5c>;
+ };
+ };
+
+ i2c-bus@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+
+ // OUTLET1_T
+ lm75@5c {
+ compatible = "ti,lm75";
+ reg = <0x5c>;
+ };
+ };
+
+ i2c-bus@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+
+ // OUTLET2_T
+ lm75@5c {
+ compatible = "ti,lm75";
+ reg = <0x5c>;
+ };
+ };
+
+ i2c-bus@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+
+ // OUTLET3_T
+ lm75@5c {
+ compatible = "ti,lm75";
+ reg = <0x5c>;
+ };
+ };
+ };
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+
+ i2c-bus@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ // STB-T
+ pmbus@74 {
+ compatible = "pmbus";
+ reg = <0x74>;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ smpro@4f {
+ compatible = "ampere,smpro";
+ reg = <0x4f>;
+ };
+
+ smpro@4e {
+ compatible = "ampere,smpro";
+ reg = <0x4e>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+
+ i2c-bus@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ // ADC sensors
+ adm1266@40 {
+ compatible = "adi,adm1266";
+ reg = <0x40>;
+ };
+ };
+
+ i2c-bus@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ // ADC sensors
+ adm1266@41 {
+ compatible = "adi,adm1266";
+ reg = <0x41>;
+ };
+ };
+ };
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+};
+
+&i2c9 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+ ssif-bmc@10 {
+ compatible = "ssif-bmc";
+ reg = <0x10>;
+ };
+};
+
+&i2c13 {
+ status = "okay";
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+
+ i2c-bus@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ // M2_ZONE_T
+ lm75@28 {
+ compatible = "ti,lm75";
+ reg = <0x28>;
+ };
+ };
+
+ i2c-bus@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+
+ // BATT_ZONE_T
+ lm75@29 {
+ compatible = "ti,lm75";
+ reg = <0x29>;
+ };
+ };
+
+ i2c-bus@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+
+ // NBM1_ZONE_T
+ lm75@28 {
+ compatible = "ti,lm75";
+ reg = <0x28>;
+ };
+ };
+ i2c-bus@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+
+ // NBM2_ZONE_T
+ lm75@29 {
+ compatible = "ti,lm75";
+ reg = <0x29>;
+ };
+ };
+ };
+};
+
+&i2c14 {
+ status = "okay";
+};
+
+&i2c15 {
+ status = "okay";
+};
+
+&spi0 {
+ cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &gpio61oh_pins
+ &gpio62oh_pins
+ &gpio161ol_pins
+ &gpio163i_pins
+ &gpio167ol_pins
+ &gpio95i_pins
+ &gpio65ol_pins
+ &gpio66oh_pins
+ &gpio67oh_pins
+ &gpio68ol_pins
+ &gpio69i_pins
+ &gpio70ol_pins
+ &gpio71i_pins
+ &gpio72i_pins
+ &gpio73i_pins
+ &gpio74i_pins
+ &gpio75i_pins
+ &gpio76i_pins
+ &gpio77i_pins
+ &gpio78i_pins
+ &gpio79ol_pins
+ &gpio80oh_pins
+ &gpio81i_pins
+ &gpio82i_pins
+ &gpio83i_pins
+ &gpio144i_pins
+ &gpio145i_pins
+ &gpio146i_pins
+ &gpio147oh_pins
+ &gpio168ol_pins
+ &gpio169oh_pins
+ &gpio170ol_pins
+ &gpio218oh_pins
+ &gpio37i_pins
+ &gpio38i_pins
+ &gpio39i_pins
+ &gpio40i_pins
+ &gpio121i_pins
+ &gpio122i_pins
+ &gpio123i_pins
+ &gpio124i_pins
+ &gpio125i_pins
+ &gpio126i_pins
+ &gpio127i_pins
+ &gpio136i_pins
+ &gpio137oh_pins
+ &gpio138i_pins
+ &gpio139i_pins
+ &gpio140i_pins
+ &gpio141i_pins
+ &gpio190oh_pins
+ &gpio191oh_pins
+ &gpio195ol_pins
+ &gpio196ol_pins
+ &gpio199i_pins
+ &gpio202ol_pins
+ >;
+};
+
+&gcr {
+ serial_port_mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+
+ mux-reg-masks = <0x38 0x07>;
+ idle-states = <2>;
+ };
+};
diff --git a/dts/src/arm/nuvoton-npcm730.dtsi b/dts/src/arm/nuvoton-npcm730.dtsi
new file mode 100644
index 0000000..86ec12e
--- /dev/null
+++ b/dts/src/arm/nuvoton-npcm730.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2020 Nuvoton Technology
+
+#include "nuvoton-common-npcm7xx.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "nuvoton,npcm750-smp";
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ clocks = <&clk NPCM7XX_CLK_CPU>;
+ clock-names = "clk_cpu";
+ reg = <0>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ clocks = <&clk NPCM7XX_CLK_CPU>;
+ clock-names = "clk_cpu";
+ reg = <1>;
+ next-level-cache = <&l2>;
+ };
+ };
+
+ soc {
+ timer@3fe600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x3fe600 0x20>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&clk NPCM7XX_CLK_AHB>;
+ };
+ };
+};
diff --git a/dts/src/arm/nuvoton-npcm750-evb.dts b/dts/src/arm/nuvoton-npcm750-evb.dts
index 15f744f..9f13d08 100644
--- a/dts/src/arm/nuvoton-npcm750-evb.dts
+++ b/dts/src/arm/nuvoton-npcm750-evb.dts
@@ -4,24 +4,161 @@
/dts-v1/;
#include "nuvoton-npcm750.dtsi"
+#include "dt-bindings/gpio/gpio.h"
+#include "nuvoton-npcm750-pincfg-evb.dtsi"
/ {
model = "Nuvoton npcm750 Development Board (Device Tree)";
compatible = "nuvoton,npcm750";
+ aliases {
+ ethernet2 = &gmac0;
+ ethernet3 = &gmac1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c7;
+ i2c8 = &i2c8;
+ i2c9 = &i2c9;
+ i2c10 = &i2c10;
+ i2c11 = &i2c11;
+ i2c12 = &i2c12;
+ i2c13 = &i2c13;
+ i2c14 = &i2c14;
+ i2c15 = &i2c15;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ fiu0 = &fiu0;
+ fiu1 = &fiu3;
+ fiu2 = &fiux;
+ };
+
chosen {
stdout-path = &serial3;
};
memory {
- reg = <0 0x40000000>;
+ device_type = "memory";
+ reg = <0x0 0x20000000>;
+ };
+};
+
+&gmac0 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&gmac1 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&fiu0 {
+ status = "okay";
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ partitions@80000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bbuboot1@0 {
+ label = "bb-uboot-1";
+ reg = <0x0000000 0x80000>;
+ read-only;
+ };
+ bbuboot2@80000 {
+ label = "bb-uboot-2";
+ reg = <0x0080000 0x80000>;
+ read-only;
+ };
+ envparam@100000 {
+ label = "env-param";
+ reg = <0x0100000 0x40000>;
+ read-only;
+ };
+ spare@140000 {
+ label = "spare";
+ reg = <0x0140000 0xC0000>;
+ };
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x0200000 0x400000>;
+ };
+ rootfs@600000 {
+ label = "rootfs";
+ reg = <0x0600000 0x700000>;
+ };
+ spare1@D00000 {
+ label = "spare1";
+ reg = <0x0D00000 0x200000>;
+ };
+ spare2@0F00000 {
+ label = "spare2";
+ reg = <0x0F00000 0x200000>;
+ };
+ spare3@1100000 {
+ label = "spare3";
+ reg = <0x1100000 0x200000>;
+ };
+ spare4@1300000 {
+ label = "spare4";
+ reg = <0x1300000 0x0>;
+ };
+ };
+ };
+};
+
+&fiu3 {
+ pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
+ status = "okay";
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ partitions@A0000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ system1@0 {
+ label = "spi3-system1";
+ reg = <0x0 0x0>;
+ };
+ };
};
};
+&fiux {
+ spix-mode;
+};
+
&watchdog1 {
status = "okay";
};
+&rng {
+ status = "okay";
+};
+
&serial0 {
status = "okay";
};
@@ -37,3 +174,231 @@
&serial3 {
status = "okay";
};
+
+&adc {
+ status = "okay";
+};
+
+&lpc_kcs {
+ kcs1: kcs1@0 {
+ status = "okay";
+ };
+
+ kcs2: kcs2@0 {
+ status = "okay";
+ };
+
+ kcs3: kcs3@0 {
+ status = "okay";
+ };
+};
+
+/* lm75 on SVB */
+&i2c0 {
+ clock-frequency = <100000>;
+ status = "okay";
+ lm75@48 {
+ compatible = "lm75";
+ reg = <0x48>;
+ status = "okay";
+ };
+};
+
+/* lm75 on EB */
+&i2c1 {
+ clock-frequency = <100000>;
+ status = "okay";
+ lm75@48 {
+ compatible = "lm75";
+ reg = <0x48>;
+ status = "okay";
+ };
+};
+
+/* tmp100 on EB */
+&i2c2 {
+ clock-frequency = <100000>;
+ status = "okay";
+ tmp100@48 {
+ compatible = "tmp100";
+ reg = <0x48>;
+ status = "okay";
+ };
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c5 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+/* tmp100 on SVB */
+&i2c6 {
+ clock-frequency = <100000>;
+ status = "okay";
+ tmp100@48 {
+ compatible = "tmp100";
+ reg = <0x48>;
+ status = "okay";
+ };
+};
+
+&i2c7 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c8 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c9 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c10 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c11 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c14 {
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&pwm_fan {
+ status = "okay";
+ fan@0 {
+ reg = <0x00>;
+ fan-tach-ch = /bits/ 8 <0x00 0x01>;
+ cooling-levels = <127 255>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ fan-tach-ch = /bits/ 8 <0x02 0x03>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@2 {
+ reg = <0x02>;
+ fan-tach-ch = /bits/ 8 <0x04 0x05>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@3 {
+ reg = <0x03>;
+ fan-tach-ch = /bits/ 8 <0x06 0x07>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@4 {
+ reg = <0x04>;
+ fan-tach-ch = /bits/ 8 <0x08 0x09>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@5 {
+ reg = <0x05>;
+ fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@6 {
+ reg = <0x06>;
+ fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+ fan@7 {
+ reg = <0x07>;
+ fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
+ cooling-levels = /bits/ 8 <127 255>;
+ };
+};
+
+&spi0 {
+ cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ Flash@0 {
+ compatible = "winbond,w25q128",
+ "jedec,spi-nor";
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <5000000>;
+ partition@0 {
+ label = "spi0_spare1";