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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 12:38:26 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 13:42:10 +0100 |
commit | 119c632f12509eab4bc58daf629c4b16fffcedca (patch) | |
tree | 34366b3095d957178b46be47f628a3926ad35ac3 /dts/src/mips/ingenic/jz4780.dtsi | |
parent | 89b766c63f94b5fe94db75a6f197c9e6c0f9da7e (diff) | |
download | barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.gz barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.xz |
dts: update to v5.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/mips/ingenic/jz4780.dtsi')
-rw-r--r-- | dts/src/mips/ingenic/jz4780.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/dts/src/mips/ingenic/jz4780.dtsi b/dts/src/mips/ingenic/jz4780.dtsi index b7f409a7cf..dfb5a7e1bb 100644 --- a/dts/src/mips/ingenic/jz4780.dtsi +++ b/dts/src/mips/ingenic/jz4780.dtsi @@ -8,6 +8,29 @@ #size-cells = <1>; compatible = "ingenic,jz4780"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; + reg = <0>; + + clocks = <&cgu JZ4780_CLK_CPU>; + clock-names = "cpu"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "ingenic,xburst-fpu1.0-mxu1.1"; + reg = <1>; + + clocks = <&cgu JZ4780_CLK_CORE1>; + clock-names = "cpu"; + }; + }; + cpuintc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; |