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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-08 07:35:17 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-10 08:48:40 +0100 |
commit | 6e6d9a2ff045f09d5a03e876becea5e6a1dabe90 (patch) | |
tree | bcf5e71df4472e374d03cc15ca22b4f841d9c73d /dts/src/mips/xilfpga | |
parent | 8e2fd5380a4fd7cee428513dc8eab068912b49f1 (diff) | |
download | barebox-6e6d9a2ff045f09d5a03e876becea5e6a1dabe90.tar.gz barebox-6e6d9a2ff045f09d5a03e876becea5e6a1dabe90.tar.xz |
dts: update to v4.4-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/mips/xilfpga')
-rw-r--r-- | dts/src/mips/xilfpga/microAptiv.dtsi | 21 | ||||
-rw-r--r-- | dts/src/mips/xilfpga/nexys4ddr.dts | 46 |
2 files changed, 67 insertions, 0 deletions
diff --git a/dts/src/mips/xilfpga/microAptiv.dtsi b/dts/src/mips/xilfpga/microAptiv.dtsi new file mode 100644 index 0000000000..81d518e757 --- /dev/null +++ b/dts/src/mips/xilfpga/microAptiv.dtsi @@ -0,0 +1,21 @@ +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "img,xilfpga"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "mips,m14Kc"; + clocks = <&ext>; + reg = <0>; + }; + }; + + ext: ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; +}; diff --git a/dts/src/mips/xilfpga/nexys4ddr.dts b/dts/src/mips/xilfpga/nexys4ddr.dts new file mode 100644 index 0000000000..686ebd1138 --- /dev/null +++ b/dts/src/mips/xilfpga/nexys4ddr.dts @@ -0,0 +1,46 @@ +/dts-v1/; + +#include "microAptiv.dtsi" + +/ { + compatible = "digilent,nexys4ddr"; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; + + cpuintc: interrupt-controller@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + axi_gpio: gpio@10600000 { + #gpio-cells = <1>; + compatible = "xlnx,xps-gpio-1.00.a"; + gpio-controller; + reg = <0x10600000 0x10000>; + xlnx,all-inputs = <0x0>; + xlnx,dout-default = <0x0>; + xlnx,gpio-width = <0x16>; + xlnx,interrupt-present = <0x0>; + xlnx,is-dual = <0x0>; + xlnx,tri-default = <0xffffffff>; + } ; + + axi_uart16550: serial@10400000 { + compatible = "ns16550a"; + reg = <0x10400000 0x10000>; + + reg-shift = <2>; + reg-offset = <0x1000>; + + clocks = <&ext>; + }; +}; + +&ext { + clock-frequency = <50000000>; +}; |