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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-01-14 09:09:57 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-01-14 09:09:57 +0100 |
| commit | 33fdc89d4cbd74aa54c28dc61d62972ab164e64d (patch) | |
| tree | da5ceff551dc1fdf2f2cc40e97a08035f9ef84fb /dts/src/powerpc/fsl/p5040si-pre.dtsi | |
| parent | 13a52906ce67ed2ce67bfc10714934ffa6c5d646 (diff) | |
| download | barebox-33fdc89d4cbd74aa54c28dc61d62972ab164e64d.tar.gz barebox-33fdc89d4cbd74aa54c28dc61d62972ab164e64d.tar.xz | |
dts: update to v5.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/powerpc/fsl/p5040si-pre.dtsi')
| -rw-r--r-- | dts/src/powerpc/fsl/p5040si-pre.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/dts/src/powerpc/fsl/p5040si-pre.dtsi b/dts/src/powerpc/fsl/p5040si-pre.dtsi index dbd57750fc..ed89dbbdac 100644 --- a/dts/src/powerpc/fsl/p5040si-pre.dtsi +++ b/dts/src/powerpc/fsl/p5040si-pre.dtsi @@ -102,7 +102,7 @@ cpu0: PowerPC,e5500@0 { device_type = "cpu"; reg = <0>; - clocks = <&mux0>; + clocks = <&clockgen 1 0>; next-level-cache = <&L2_0>; fsl,portid-mapping = <0x80000000>; L2_0: l2-cache { @@ -112,7 +112,7 @@ cpu1: PowerPC,e5500@1 { device_type = "cpu"; reg = <1>; - clocks = <&mux1>; + clocks = <&clockgen 1 1>; next-level-cache = <&L2_1>; fsl,portid-mapping = <0x40000000>; L2_1: l2-cache { @@ -122,7 +122,7 @@ cpu2: PowerPC,e5500@2 { device_type = "cpu"; reg = <2>; - clocks = <&mux2>; + clocks = <&clockgen 1 2>; next-level-cache = <&L2_2>; fsl,portid-mapping = <0x20000000>; L2_2: l2-cache { @@ -132,7 +132,7 @@ cpu3: PowerPC,e5500@3 { device_type = "cpu"; reg = <3>; - clocks = <&mux3>; + clocks = <&clockgen 1 3>; next-level-cache = <&L2_3>; fsl,portid-mapping = <0x10000000>; L2_3: l2-cache { |