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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-05-05 10:26:19 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-05-05 10:26:19 +0200 |
| commit | 7d72033412f8dc9e5a31a1f87f469d9627897fe6 (patch) | |
| tree | 34577e6eafb0a257653c2c9e399a9f32cc9cd338 /dts/src/riscv/microchip/microchip-mpfs.dtsi | |
| parent | 30d9267f2e7cb9f25968084f15d1ae117c7fa7a2 (diff) | |
| download | barebox-7d72033412f8dc9e5a31a1f87f469d9627897fe6.tar.gz barebox-7d72033412f8dc9e5a31a1f87f469d9627897fe6.tar.xz | |
dts: update to v5.18-rc5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/riscv/microchip/microchip-mpfs.dtsi')
| -rw-r--r-- | dts/src/riscv/microchip/microchip-mpfs.dtsi | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/dts/src/riscv/microchip/microchip-mpfs.dtsi b/dts/src/riscv/microchip/microchip-mpfs.dtsi index c5c9d1360d..746c4d4e76 100644 --- a/dts/src/riscv/microchip/microchip-mpfs.dtsi +++ b/dts/src/riscv/microchip/microchip-mpfs.dtsi @@ -141,7 +141,7 @@ }; }; - refclk: msspllclk { + refclk: mssrefclk { compatible = "fixed-clock"; #clock-cells = <0>; }; @@ -190,7 +190,7 @@ clkcfg: clkcfg@20002000 { compatible = "microchip,mpfs-clkcfg"; - reg = <0x0 0x20002000 0x0 0x1000>; + reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; clocks = <&refclk>; #clock-cells = <1>; }; @@ -393,8 +393,8 @@ reg = <0x0 0x20124000 0x0 0x1000>; interrupt-parent = <&plic>; interrupts = <80>, <81>; - clocks = <&clkcfg CLK_RTC>; - clock-names = "rtc"; + clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>; + clock-names = "rtc", "rtcref"; status = "disabled"; }; @@ -424,7 +424,7 @@ <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; interrupt-map-mask = <0 0 0 7>; - clocks = <&clkcfg CLK_FIC0>, <&clkcfg CLK_FIC1>, <&clkcfg CLK_FIC3>; + clocks = <&fabric_clk1>, <&fabric_clk1>, <&fabric_clk3>; clock-names = "fic0", "fic1", "fic3"; ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>; msi-parent = <&pcie>; |