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authorSascha Hauer <s.hauer@pengutronix.de>2015-02-09 08:42:21 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2015-02-11 09:50:08 +0100
commit66b7b55c090590e8308ffd44f267824fd7dbda85 (patch)
tree7e140d63549a53227f5239443774759ea4b05269 /dts
parente85ff327c2aeaa7ea5d53e308b4b4d0aef8dddd4 (diff)
downloadbarebox-66b7b55c090590e8308ffd44f267824fd7dbda85.tar.gz
dts: update to v3.18-rc6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts')
-rw-r--r--dts/Bindings/interrupt-controller/interrupts.txt4
-rw-r--r--dts/Bindings/pci/pci.txt11
-rw-r--r--dts/Bindings/pinctrl/img,tz1090-pdc-pinctrl.txt2
-rw-r--r--dts/Bindings/pinctrl/img,tz1090-pinctrl.txt2
-rw-r--r--dts/Bindings/pinctrl/lantiq,falcon-pinumx.txt2
-rw-r--r--dts/Bindings/pinctrl/lantiq,xway-pinumx.txt2
-rw-r--r--dts/Bindings/pinctrl/nvidia,tegra20-pinmux.txt2
-rw-r--r--dts/Bindings/pinctrl/pinctrl-sirf.txt2
-rw-r--r--dts/Bindings/pinctrl/pinctrl_spear.txt2
-rw-r--r--dts/Bindings/pinctrl/qcom,apq8064-pinctrl.txt2
-rw-r--r--dts/Bindings/pinctrl/qcom,apq8084-pinctrl.txt2
-rw-r--r--dts/Bindings/pinctrl/qcom,ipq8064-pinctrl.txt2
-rw-r--r--dts/Bindings/pinctrl/qcom,msm8960-pinctrl.txt2
-rw-r--r--dts/Bindings/pinctrl/qcom,msm8974-pinctrl.txt2
-rw-r--r--dts/Bindings/vendor-prefixes.txt5
-rw-r--r--dts/src/arm/r8a7740.dtsi2
-rw-r--r--dts/src/arm/r8a7790.dtsi4
-rw-r--r--dts/src/arm/sun6i-a31.dtsi4
-rw-r--r--dts/src/arm/tegra114-dalmore.dts1
-rw-r--r--dts/src/arm/tegra114-roth.dts9
-rw-r--r--dts/src/arm/tegra114-tn7.dts5
-rw-r--r--dts/src/arm/tegra114.dtsi7
-rw-r--r--dts/src/arm/tegra124-jetson-tk1.dts1
-rw-r--r--dts/src/arm/tegra124-nyan-big.dts1
-rw-r--r--dts/src/arm/tegra124-venice2.dts1
-rw-r--r--dts/src/arm/tegra124.dtsi8
-rw-r--r--dts/src/arm/tegra20-harmony.dts1
-rw-r--r--dts/src/arm/tegra20-iris-512.dts5
-rw-r--r--dts/src/arm/tegra20-medcom-wide.dts4
-rw-r--r--dts/src/arm/tegra20-paz00.dts2
-rw-r--r--dts/src/arm/tegra20-seaboard.dts1
-rw-r--r--dts/src/arm/tegra20-tamonten.dtsi1
-rw-r--r--dts/src/arm/tegra20-trimslice.dts1
-rw-r--r--dts/src/arm/tegra20-ventana.dts1
-rw-r--r--dts/src/arm/tegra20-whistler.dts1
-rw-r--r--dts/src/arm/tegra20.dtsi8
-rw-r--r--dts/src/arm/tegra30-apalis-eval.dts4
-rw-r--r--dts/src/arm/tegra30-beaver.dts1
-rw-r--r--dts/src/arm/tegra30-cardhu.dtsi2
-rw-r--r--dts/src/arm/tegra30-colibri-eval-v3.dts3
-rw-r--r--dts/src/arm/tegra30.dtsi8
41 files changed, 78 insertions, 52 deletions
diff --git a/dts/Bindings/interrupt-controller/interrupts.txt b/dts/Bindings/interrupt-controller/interrupts.txt
index ce6a1a0..8a3c408 100644
--- a/dts/Bindings/interrupt-controller/interrupts.txt
+++ b/dts/Bindings/interrupt-controller/interrupts.txt
@@ -30,10 +30,6 @@ should only be used when a device has multiple interrupt parents.
Example:
interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
-A device node may contain either "interrupts" or "interrupts-extended", but not
-both. If both properties are present, then the operating system should log an
-error and use only the data in "interrupts".
-
2) Interrupt controller nodes
-----------------------------
diff --git a/dts/Bindings/pci/pci.txt b/dts/Bindings/pci/pci.txt
index 41aeed3..f8fbe9a 100644
--- a/dts/Bindings/pci/pci.txt
+++ b/dts/Bindings/pci/pci.txt
@@ -7,3 +7,14 @@ And for the interrupt mapping part:
Open Firmware Recommended Practice: Interrupt Mapping
http://www.openfirmware.org/1275/practice/imap/imap0_9d.pdf
+
+Additionally to the properties specified in the above standards a host bridge
+driver implementation may support the following properties:
+
+- linux,pci-domain:
+ If present this property assigns a fixed PCI domain number to a host bridge,
+ otherwise an unstable (across boots) unique number will be assigned.
+ It is required to either not set this property at all or set it for all
+ host bridges in the system, otherwise potentially conflicting domain numbers
+ may be assigned to root buses behind different host bridges. The domain
+ number for each host bridge in the system must be unique.
diff --git a/dts/Bindings/pinctrl/img,tz1090-pdc-pinctrl.txt b/dts/Bindings/pinctrl/img,tz1090-pdc-pinctrl.txt
index a186181..51b943c 100644
--- a/dts/Bindings/pinctrl/img,tz1090-pdc-pinctrl.txt
+++ b/dts/Bindings/pinctrl/img,tz1090-pdc-pinctrl.txt
@@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-TZ1090-PDC's pin configuration nodes act as a container for an abitrary number
+TZ1090-PDC's pin configuration nodes act as a container for an arbitrary number
of subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/pinctrl/img,tz1090-pinctrl.txt b/dts/Bindings/pinctrl/img,tz1090-pinctrl.txt
index 4b27c99..49d0e60 100644
--- a/dts/Bindings/pinctrl/img,tz1090-pinctrl.txt
+++ b/dts/Bindings/pinctrl/img,tz1090-pinctrl.txt
@@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-TZ1090's pin configuration nodes act as a container for an abitrary number of
+TZ1090's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/pinctrl/lantiq,falcon-pinumx.txt b/dts/Bindings/pinctrl/lantiq,falcon-pinumx.txt
index daa7689..ac4da9f 100644
--- a/dts/Bindings/pinctrl/lantiq,falcon-pinumx.txt
+++ b/dts/Bindings/pinctrl/lantiq,falcon-pinumx.txt
@@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-Lantiq's pin configuration nodes act as a container for an abitrary number of
+Lantiq's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those group(s), and two pin configuration parameters:
diff --git a/dts/Bindings/pinctrl/lantiq,xway-pinumx.txt b/dts/Bindings/pinctrl/lantiq,xway-pinumx.txt
index b5469db..e89b467 100644
--- a/dts/Bindings/pinctrl/lantiq,xway-pinumx.txt
+++ b/dts/Bindings/pinctrl/lantiq,xway-pinumx.txt
@@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-Lantiq's pin configuration nodes act as a container for an abitrary number of
+Lantiq's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those group(s), and two pin configuration parameters:
diff --git a/dts/Bindings/pinctrl/nvidia,tegra20-pinmux.txt b/dts/Bindings/pinctrl/nvidia,tegra20-pinmux.txt
index 61e73cd..3c8ce28 100644
--- a/dts/Bindings/pinctrl/nvidia,tegra20-pinmux.txt
+++ b/dts/Bindings/pinctrl/nvidia,tegra20-pinmux.txt
@@ -9,7 +9,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-Tegra's pin configuration nodes act as a container for an abitrary number of
+Tegra's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/pinctrl/pinctrl-sirf.txt b/dts/Bindings/pinctrl/pinctrl-sirf.txt
index c596a6a..5f55be5 100644
--- a/dts/Bindings/pinctrl/pinctrl-sirf.txt
+++ b/dts/Bindings/pinctrl/pinctrl-sirf.txt
@@ -13,7 +13,7 @@ Optional properties:
Please refer to pinctrl-bindings.txt in this directory for details of the common
pinctrl bindings used by client devices.
-SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
+SiRFprimaII's pinmux nodes act as a container for an arbitrary number of subnodes.
Each of these subnodes represents some desired configuration for a group of pins.
Required subnode-properties:
diff --git a/dts/Bindings/pinctrl/pinctrl_spear.txt b/dts/Bindings/pinctrl/pinctrl_spear.txt
index b4480d5..4586155 100644
--- a/dts/Bindings/pinctrl/pinctrl_spear.txt
+++ b/dts/Bindings/pinctrl/pinctrl_spear.txt
@@ -32,7 +32,7 @@ Required properties:
Please refer to pinctrl-bindings.txt in this directory for details of the common
pinctrl bindings used by client devices.
-SPEAr's pinmux nodes act as a container for an abitrary number of subnodes. Each
+SPEAr's pinmux nodes act as a container for an arbitrary number of subnodes. Each
of these subnodes represents muxing for a pin, a group, or a list of pins or
groups.
diff --git a/dts/Bindings/pinctrl/qcom,apq8064-pinctrl.txt b/dts/Bindings/pinctrl/qcom,apq8064-pinctrl.txt
index 2fb90b3..a7bde64 100644
--- a/dts/Bindings/pinctrl/qcom,apq8064-pinctrl.txt
+++ b/dts/Bindings/pinctrl/qcom,apq8064-pinctrl.txt
@@ -18,7 +18,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-Qualcomm's pin configuration nodes act as a container for an abitrary number of
+Qualcomm's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/pinctrl/qcom,apq8084-pinctrl.txt b/dts/Bindings/pinctrl/qcom,apq8084-pinctrl.txt
index ffafa19..c4ea61a 100644
--- a/dts/Bindings/pinctrl/qcom,apq8084-pinctrl.txt
+++ b/dts/Bindings/pinctrl/qcom,apq8084-pinctrl.txt
@@ -47,7 +47,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-The pin configuration nodes act as a container for an abitrary number of
+The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/pinctrl/qcom,ipq8064-pinctrl.txt b/dts/Bindings/pinctrl/qcom,ipq8064-pinctrl.txt
index e33e4dc..6e88e91 100644
--- a/dts/Bindings/pinctrl/qcom,ipq8064-pinctrl.txt
+++ b/dts/Bindings/pinctrl/qcom,ipq8064-pinctrl.txt
@@ -18,7 +18,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-Qualcomm's pin configuration nodes act as a container for an abitrary number of
+Qualcomm's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/pinctrl/qcom,msm8960-pinctrl.txt b/dts/Bindings/pinctrl/qcom,msm8960-pinctrl.txt
index 93b7de9..eb8d8aa 100644
--- a/dts/Bindings/pinctrl/qcom,msm8960-pinctrl.txt
+++ b/dts/Bindings/pinctrl/qcom,msm8960-pinctrl.txt
@@ -47,7 +47,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-The pin configuration nodes act as a container for an abitrary number of
+The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/pinctrl/qcom,msm8974-pinctrl.txt b/dts/Bindings/pinctrl/qcom,msm8974-pinctrl.txt
index d2ea80d..e4d6a9d 100644
--- a/dts/Bindings/pinctrl/qcom,msm8974-pinctrl.txt
+++ b/dts/Bindings/pinctrl/qcom,msm8974-pinctrl.txt
@@ -18,7 +18,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
-Qualcomm's pin configuration nodes act as a container for an abitrary number of
+Qualcomm's pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
diff --git a/dts/Bindings/vendor-prefixes.txt b/dts/Bindings/vendor-prefixes.txt
index 723999d..a344ec2 100644
--- a/dts/Bindings/vendor-prefixes.txt
+++ b/dts/Bindings/vendor-prefixes.txt
@@ -34,6 +34,7 @@ chipidea Chipidea, Inc
chrp Common Hardware Reference Platform
chunghwa Chunghwa Picture Tubes Ltd.
cirrus Cirrus Logic, Inc.
+cnm Chips&Media, Inc.
cortina Cortina Systems, Inc.
crystalfontz Crystalfontz America, Inc.
dallas Maxim Integrated Products (formerly Dallas Semiconductor)
@@ -92,6 +93,7 @@ maxim Maxim Integrated Products
mediatek MediaTek Inc.
micrel Micrel Inc.
microchip Microchip Technology Inc.
+micron Micron Technology Inc.
mitsubishi Mitsubishi Electric Corporation
mosaixtech Mosaix Technologies, Inc.
moxa Moxa
@@ -127,6 +129,7 @@ renesas Renesas Electronics Corporation
ricoh Ricoh Co. Ltd.
rockchip Fuzhou Rockchip Electronics Co., Ltd
samsung Samsung Semiconductor
+sandisk Sandisk Corporation
sbs Smart Battery System
schindler Schindler
seagate Seagate Technology PLC
@@ -138,7 +141,7 @@ silergy Silergy Corp.
sirf SiRF Technology, Inc.
sitronix Sitronix Technology Corporation
smsc Standard Microsystems Corporation
-snps Synopsys, Inc.
+snps Synopsys, Inc.
solidrun SolidRun
sony Sony Corporation
spansion Spansion Inc.
diff --git a/dts/src/arm/r8a7740.dtsi b/dts/src/arm/r8a7740.dtsi
index d46c213..eed697a 100644
--- a/dts/src/arm/r8a7740.dtsi
+++ b/dts/src/arm/r8a7740.dtsi
@@ -433,7 +433,7 @@
clocks = <&cpg_clocks R8A7740_CLK_S>,
<&cpg_clocks R8A7740_CLK_S>, <&sub_clk>,
<&cpg_clocks R8A7740_CLK_B>,
- <&sub_clk>, <&sub_clk>,
+ <&cpg_clocks R8A7740_CLK_HPP>, <&sub_clk>,
<&cpg_clocks R8A7740_CLK_B>;
#clock-cells = <1>;
renesas,clock-indices = <
diff --git a/dts/src/arm/r8a7790.dtsi b/dts/src/arm/r8a7790.dtsi
index d0e1773..e20affe 100644
--- a/dts/src/arm/r8a7790.dtsi
+++ b/dts/src/arm/r8a7790.dtsi
@@ -666,9 +666,9 @@
#clock-cells = <0>;
clock-output-names = "sd2";
};
- sd3_clk: sd3_clk@e615007c {
+ sd3_clk: sd3_clk@e615026c {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
- reg = <0 0xe615007c 0 4>;
+ reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-output-names = "sd3";
diff --git a/dts/src/arm/sun6i-a31.dtsi b/dts/src/arm/sun6i-a31.dtsi
index 543f895..2e652e2 100644
--- a/dts/src/arm/sun6i-a31.dtsi
+++ b/dts/src/arm/sun6i-a31.dtsi
@@ -361,6 +361,10 @@
clocks = <&ahb1_gates 6>;
resets = <&ahb1_rst 6>;
#dma-cells = <1>;
+
+ /* DMA controller requires AHB1 clocked from PLL6 */
+ assigned-clocks = <&ahb1_mux>;
+ assigned-clock-parents = <&pll6>;
};
mmc0: mmc@01c0f000 {
diff --git a/dts/src/arm/tegra114-dalmore.dts b/dts/src/arm/tegra114-dalmore.dts
index 5c21d21..8b7aa0d 100644
--- a/dts/src/arm/tegra114-dalmore.dts
+++ b/dts/src/arm/tegra114-dalmore.dts
@@ -15,6 +15,7 @@
aliases {
rtc0 = "/i2c@7000d000/tps65913@58";
rtc1 = "/rtc@7000e000";
+ serial0 = &uartd;
};
memory {
diff --git a/dts/src/arm/tegra114-roth.dts b/dts/src/arm/tegra114-roth.dts
index c7c6825..38acf78 100644
--- a/dts/src/arm/tegra114-roth.dts
+++ b/dts/src/arm/tegra114-roth.dts
@@ -15,6 +15,10 @@
linux,initrd-end = <0x82800000>;
};
+ aliases {
+ serial0 = &uartd;
+ };
+
firmware {
trusted-foundations {
compatible = "tlm,trusted-foundations";
@@ -916,8 +920,6 @@
regulator-name = "vddio-sdmmc3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
};
ldousb {
@@ -962,7 +964,7 @@
sdhci@78000400 {
status = "okay";
bus-width = <4>;
- vmmc-supply = <&vddio_sdmmc3>;
+ vqmmc-supply = <&vddio_sdmmc3>;
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
};
@@ -971,7 +973,6 @@
sdhci@78000600 {
status = "okay";
bus-width = <8>;
- vmmc-supply = <&vdd_1v8>;
non-removable;
};
diff --git a/dts/src/arm/tegra114-tn7.dts b/dts/src/arm/tegra114-tn7.dts
index 9636621..f91c2c9 100644
--- a/dts/src/arm/tegra114-tn7.dts
+++ b/dts/src/arm/tegra114-tn7.dts
@@ -15,6 +15,10 @@
linux,initrd-end = <0x82800000>;
};
+ aliases {
+ serial0 = &uartd;
+ };
+
firmware {
trusted-foundations {
compatible = "tlm,trusted-foundations";
@@ -240,7 +244,6 @@
sdhci@78000600 {
status = "okay";
bus-width = <8>;
- vmmc-supply = <&vdd_1v8>;
non-removable;
};
diff --git a/dts/src/arm/tegra114.dtsi b/dts/src/arm/tegra114.dtsi
index 2ca9c18..222f3b3 100644
--- a/dts/src/arm/tegra114.dtsi
+++ b/dts/src/arm/tegra114.dtsi
@@ -9,13 +9,6 @@
compatible = "nvidia,tegra114";
interrupt-parent = <&gic>;
- aliases {
- serial0 = &uarta;
- serial1 = &uartb;
- serial2 = &uartc;
- serial3 = &uartd;
- };
-
host1x@50000000 {
compatible = "nvidia,tegra114-host1x", "simple-bus";
reg = <0x50000000 0x00028000>;
diff --git a/dts/src/arm/tegra124-jetson-tk1.dts b/dts/src/arm/tegra124-jetson-tk1.dts
index 029c9a0..51b373f 100644
--- a/dts/src/arm/tegra124-jetson-tk1.dts
+++ b/dts/src/arm/tegra124-jetson-tk1.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@0,7000d000/pmic@40";
rtc1 = "/rtc@0,7000e000";
+ serial0 = &uartd;
};
memory {
diff --git a/dts/src/arm/tegra124-nyan-big.dts b/dts/src/arm/tegra124-nyan-big.dts
index 7d0784c..53181d3 100644
--- a/dts/src/arm/tegra124-nyan-big.dts
+++ b/dts/src/arm/tegra124-nyan-big.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@0,7000d000/pmic@40";
rtc1 = "/rtc@0,7000e000";
+ serial0 = &uarta;
};
memory {
diff --git a/dts/src/arm/tegra124-venice2.dts b/dts/src/arm/tegra124-venice2.dts
index 1300885..5c3f781 100644
--- a/dts/src/arm/tegra124-venice2.dts
+++ b/dts/src/arm/tegra124-venice2.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@0,7000d000/pmic@40";
rtc1 = "/rtc@0,7000e000";
+ serial0 = &uarta;
};
memory {
diff --git a/dts/src/arm/tegra124.dtsi b/dts/src/arm/tegra124.dtsi
index 478c555..df2b06b 100644
--- a/dts/src/arm/tegra124.dtsi
+++ b/dts/src/arm/tegra124.dtsi
@@ -286,7 +286,7 @@
* the APB DMA based serial driver, the comptible is
* "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
*/
- serial@0,70006000 {
+ uarta: serial@0,70006000 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006000 0x0 0x40>;
reg-shift = <2>;
@@ -299,7 +299,7 @@
status = "disabled";
};
- serial@0,70006040 {
+ uartb: serial@0,70006040 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006040 0x0 0x40>;
reg-shift = <2>;
@@ -312,7 +312,7 @@
status = "disabled";
};
- serial@0,70006200 {
+ uartc: serial@0,70006200 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006200 0x0 0x40>;
reg-shift = <2>;
@@ -325,7 +325,7 @@
status = "disabled";
};
- serial@0,70006300 {
+ uartd: serial@0,70006300 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006300 0x0 0x40>;
reg-shift = <2>;
diff --git a/dts/src/arm/tegra20-harmony.dts b/dts/src/arm/tegra20-harmony.dts
index a37279a..b926a07 100644
--- a/dts/src/arm/tegra20-harmony.dts
+++ b/dts/src/arm/tegra20-harmony.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
+ serial0 = &uartd;
};
memory {
diff --git a/dts/src/arm/tegra20-iris-512.dts b/dts/src/arm/tegra20-iris-512.dts
index 8cfb83f..1dd7d7b 100644
--- a/dts/src/arm/tegra20-iris-512.dts
+++ b/dts/src/arm/tegra20-iris-512.dts
@@ -6,6 +6,11 @@
model = "Toradex Colibri T20 512MB on Iris";
compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
+ aliases {
+ serial0 = &uarta;
+ serial1 = &uartd;
+ };
+
host1x@50000000 {
hdmi@54280000 {
status = "okay";
diff --git a/dts/src/arm/tegra20-medcom-wide.dts b/dts/src/arm/tegra20-medcom-wide.dts
index 1b7c56b..9b87526 100644
--- a/dts/src/arm/tegra20-medcom-wide.dts
+++ b/dts/src/arm/tegra20-medcom-wide.dts
@@ -6,6 +6,10 @@
model = "Avionic Design Medcom-Wide board";
compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
+ aliases {
+ serial0 = &uartd;
+ };
+
pwm@7000a000 {
status = "okay";
};
diff --git a/dts/src/arm/tegra20-paz00.dts b/dts/src/arm/tegra20-paz00.dts
index d4438e3..ed7e100 100644
--- a/dts/src/arm/tegra20-paz00.dts
+++ b/dts/src/arm/tegra20-paz00.dts
@@ -10,6 +10,8 @@
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
+ serial0 = &uarta;
+ serial1 = &uartc;
};
memory {
diff --git a/dts/src/arm/tegra20-seaboard.dts b/dts/src/arm/tegra20-seaboard.dts
index a1d4bf9..ea282c7 100644
--- a/dts/src/arm/tegra20-seaboard.dts
+++ b/dts/src/arm/tegra20-seaboard.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
+ serial0 = &uartd;
};
memory {
diff --git a/dts/src/arm/tegra20-tamonten.dtsi b/dts/src/arm/tegra20-tamonten.dtsi
index 80e7d38..13d4e61 100644
--- a/dts/src/arm/tegra20-tamonten.dtsi
+++ b/dts/src/arm/tegra20-tamonten.dtsi
@@ -7,6 +7,7 @@
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
+ serial0 = &uartd;
};
memory {
diff --git a/dts/src/arm/tegra20-trimslice.dts b/dts/src/arm/tegra20-trimslice.dts
index 5ad8797..d99af4e 100644
--- a/dts/src/arm/tegra20-trimslice.dts
+++ b/dts/src/arm/tegra20-trimslice.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@7000c500/rtc@56";
rtc1 = "/rtc@7000e000";
+ serial0 = &uarta;
};
memory {
diff --git a/dts/src/arm/tegra20-ventana.dts b/dts/src/arm/tegra20-ventana.dts
index ca8484c..04c58e9 100644
--- a/dts/src/arm/tegra20-ventana.dts
+++ b/dts/src/arm/tegra20-ventana.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
+ serial0 = &uartd;
};
memory {
diff --git a/dts/src/arm/tegra20-whistler.dts b/dts/src/arm/tegra20-whistler.dts
index 1843725..340d811 100644
--- a/dts/src/arm/tegra20-whistler.dts
+++ b/dts/src/arm/tegra20-whistler.dts
@@ -10,6 +10,7 @@
aliases {
rtc0 = "/i2c@7000d000/max8907@3c";
rtc1 = "/rtc@7000e000";
+ serial0 = &uarta;
};
memory {
diff --git a/dts/src/arm/tegra20.dtsi b/dts/src/arm/tegra20.dtsi
index 3b374c4..8acf5d8 100644
--- a/dts/src/arm/tegra20.dtsi
+++ b/dts/src/arm/tegra20.dtsi
@@ -9,14 +9,6 @@
compatible = "nvidia,tegra20";
interrupt-parent = <&intc>;
- aliases {
- serial0 = &uarta;
- serial1 = &uartb;
- serial2 = &uartc;
- serial3 = &uartd;
- serial4 = &uarte;
- };
-
host1x@50000000 {
compatible = "nvidia,tegra20-host1x", "simple-bus";
reg = <0x50000000 0x00024000>;
diff --git a/dts/src/arm/tegra30-apalis-eval.dts b/dts/src/arm/tegra30-apalis-eval.dts
index 45d40f0..6236bde 100644
--- a/dts/src/arm/tegra30-apalis-eval.dts
+++ b/dts/src/arm/tegra30-apalis-eval.dts
@@ -11,6 +11,10 @@
rtc0 = "/i2c@7000c000/rtc@68";
rtc1 = "/i2c@7000d000/tps65911@2d";
rtc2 = "/rtc@7000e000";
+ serial0 = &uarta;
+ serial1 = &uartb;
+ serial2 = &uartc;
+ serial3 = &uartd;
};
pcie-controller@00003000 {
diff --git a/dts/src/arm/tegra30-beaver.dts b/dts/src/arm/tegra30-beaver.dts
index cee8f22..6b157ee 100644
--- a/dts/src/arm/tegra30-beaver.dts
+++ b/dts/src/arm/tegra30-beaver.dts
@@ -9,6 +9,7 @@
aliases {
rtc0 = "/i2c@7000d000/tps65911@2d";
rtc1 = "/rtc@7000e000";
+ serial0 = &uarta;
};
memory {
diff --git a/dts/src/arm/tegra30-cardhu.dtsi b/dts/src/arm/tegra30-cardhu.dtsi
index 2063795..a1b682e 100644
--- a/dts/src/arm/tegra30-cardhu.dtsi
+++ b/dts/src/arm/tegra30-cardhu.dtsi
@@ -30,6 +30,8 @@
aliases {
rtc0 = "/i2c@7000d000/tps65911@2d";
rtc1 = "/rtc@7000e000";
+ serial0 = &uarta;
+ serial1 = &uartc;
};
memory {
diff --git a/dts/src/arm/tegra30-colibri-eval-v3.dts b/dts/src/arm/tegra30-colibri-eval-v3.dts
index 7793abd..4d3ddc5 100644
--- a/dts/src/arm/tegra30-colibri-eval-v3.dts
+++ b/dts/src/arm/tegra30-colibri-eval-v3.dts
@@ -10,6 +10,9 @@
rtc0 = "/i2c@7000c000/rtc@68";
rtc1 = "/i2c@7000d000/tps65911@2d";
rtc2 = "/rtc@7000e000";
+ serial0 = &uarta;
+ serial1 = &uartb;
+ serial2 = &uartd;
};
host1x@50000000 {
diff --git a/dts/src/arm/tegra30.dtsi b/dts/src/arm/tegra30.dtsi
index aa6ccea..b270b9e 100644
--- a/dts/src/arm/tegra30.dtsi
+++ b/dts/src/arm/tegra30.dtsi
@@ -9,14 +9,6 @@
compatible = "nvidia,tegra30";
interrupt-parent = <&intc>;
- aliases {
- serial0 = &uarta;
- serial1 = &uartb;
- serial2 = &uartc;
- serial3 = &uartd;
- serial4 = &uarte;
- };
-
pcie-controller@00003000 {
compatible = "nvidia,tegra30-pcie";
device_type = "pci";