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authorLucas Stach <l.stach@pengutronix.de>2018-07-25 16:44:37 +0200
committerLucas Stach <l.stach@pengutronix.de>2018-07-27 10:44:26 +0200
commitc52b0baf0f69420b9fd1b88cdb2dd321bdd9c4be (patch)
treef00866cfc20de8332753c893a2a3dadd36dc9ca0 /images
parent4996ed5efbb2d7cd38a17fe456f8da820f1a1ef3 (diff)
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ARM: mmu: fix cache flushing when replacing a section with a PTE
When replacing a section with a PTE, we must make sure that the newly initialized PTE entries are flushed from the cache before changing the entry in the TTB. Otherwise a L1 TLB miss causes the hardware pagetable walker to walk into a PTE with undefined content, causing exactly that behaviour. Move all the necessary cache flushing to arm_create_pte(), to avoid any caller getting this wrong in the future. Fixes: e3e54c644180 (ARM: mmu: Implement on-demand PTE allocation) Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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