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| author | marc <marc@susedev1.rulztime> | 2010-04-08 17:21:25 +1000 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-04-12 12:13:25 +0200 |
| commit | 74a895b9232c7ae0350c9292098de6d657664c20 (patch) | |
| tree | b53094fac77aa610c3460fe58d9367287e66ba8f /include/i2c | |
| parent | 52784a27087a3cb132bf8554e297d8efdd884866 (diff) | |
| download | barebox-74a895b9232c7ae0350c9292098de6d657664c20.tar.gz barebox-74a895b9232c7ae0350c9292098de6d657664c20.tar.xz | |
mc9s08dz60: Fixed incorrect register offsets.
These values dervied from Freescale source code for the mc9s08dz60
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/i2c')
| -rw-r--r-- | include/i2c/mc9sdz60.h | 82 |
1 files changed, 48 insertions, 34 deletions
diff --git a/include/i2c/mc9sdz60.h b/include/i2c/mc9sdz60.h index 4cc233e058..3882cea1a0 100644 --- a/include/i2c/mc9sdz60.h +++ b/include/i2c/mc9sdz60.h @@ -12,42 +12,56 @@ #ifndef __ASM_ARCH_MC9SDZ60_H #define __ASM_ARCH_MC9SDZ60_H +/** + * Register addresses for the MC9SDZ60 + * + * @note: these match those in the kernel drivers/mxc/mcu_pmic/mc9s08dz60.h + * but not include/linux/mfd/mc9s08dz60/pmic.h + * + */ enum mc9sdz60_reg { MC9SDZ60_REG_VERSION = 0x00, - MC9SDZ60_REG_SECS = 0x01, - MC9SDZ60_REG_MINS = 0x02, - MC9SDZ60_REG_HRS = 0x03, - MC9SDZ60_REG_DAY = 0x04, - MC9SDZ60_REG_DATE = 0x05, - MC9SDZ60_REG_MONTH = 0x06, - MC9SDZ60_REG_YEAR = 0x07, - MC9SDZ60_REG_ALARM_SECS = 0x08, - MC9SDZ60_REG_ALARM_MINS = 0x09, - MC9SDZ60_REG_ALARM_HRS = 0x0a, - MC9SDZ60_REG_TS_CONTROL = 0x0b, - MC9SDZ60_REG_X_LOW = 0x0c, - MC9SDZ60_REG_Y_LOW = 0x0d, - MC9SDZ60_REG_XY_HIGH = 0x0e, - MC9SDZ60_REG_X_LEFT_LOW = 0x0f, - MC9SDZ60_REG_X_LEFT_HIGH = 0x10, - MC9SDZ60_REG_X_RIGHT = 0x11, - MC9SDZ60_REG_Y_TOP_LOW = 0x12, - MC9SDZ60_REG_Y_TOP_HIGH = 0x13, - MC9SDZ60_REG_Y_BOTTOM = 0x14, - MC9SDZ60_REG_RESET_1 = 0x15, - MC9SDZ60_REG_RESET_2 = 0x16, - MC9SDZ60_REG_POWER_CTL = 0x17, - MC9SDZ60_REG_DELAY_CONFIG = 0x18, - MC9SDZ60_REG_GPIO_1 = 0x19, - MC9SDZ60_REG_GPIO_2 = 0x1a, - MC9SDZ60_REG_KPD_1 = 0x1b, - MC9SDZ60_REG_KPD_2 = 0x1c, - MC9SDZ60_REG_KPD_CONTROL = 0x1d, - MC9SDZ60_REG_INT_ENABLE_1 = 0x1e, - MC9SDZ60_REG_INT_ENABLE_2 = 0x1f, - MC9SDZ60_REG_INT_FLAG_1 = 0x20, - MC9SDZ60_REG_INT_FLAG_2 = 0x21, - MC9SDZ60_REG_DES_FLAG = 0x22, + /* reserved 0x01 */ + MC9SDZ60_REG_SECS = 0x02, + MC9SDZ60_REG_MINS = 0x03, + MC9SDZ60_REG_HRS = 0x04, + MC9SDZ60_REG_DAY = 0x05, + MC9SDZ60_REG_DATE = 0x06, + MC9SDZ60_REG_MONTH = 0x07, + MC9SDZ60_REG_YEAR = 0x08, + MC9SDZ60_REG_ALARM_SECS = 0x09, + MC9SDZ60_REG_ALARM_MINS = 0x0a, + MC9SDZ60_REG_ALARM_HRS = 0x0b, + /* reserved 0x0c */ + /* reserved 0x0d */ + MC9SDZ60_REG_TS_CONTROL = 0x0e, + MC9SDZ60_REG_X_LOW = 0x0f, + MC9SDZ60_REG_Y_LOW = 0x10, + MC9SDZ60_REG_XY_HIGH = 0x11, + MC9SDZ60_REG_X_LEFT_LOW = 0x12, + MC9SDZ60_REG_X_LEFT_HIGH = 0x13, + MC9SDZ60_REG_X_RIGHT = 0x14, + MC9SDZ60_REG_Y_TOP_LOW = 0x15, + MC9SDZ60_REG_Y_TOP_HIGH = 0x16, + MC9SDZ60_REG_Y_BOTTOM = 0x17, + /* reserved 0x18 */ + /* reserved 0x19 */ + MC9SDZ60_REG_RESET_1 = 0x1a, + MC9SDZ60_REG_RESET_2 = 0x1b, + MC9SDZ60_REG_POWER_CTL = 0x1c, + MC9SDZ60_REG_DELAY_CONFIG = 0x1d, + /* reserved 0x1e */ + /* reserved 0x1f */ + MC9SDZ60_REG_GPIO_1 = 0x20, + MC9SDZ60_REG_GPIO_2 = 0x21, + MC9SDZ60_REG_KPD_1 = 0x22, + MC9SDZ60_REG_KPD_2 = 0x23, + MC9SDZ60_REG_KPD_CONTROL = 0x24, + MC9SDZ60_REG_INT_ENABLE_1 = 0x25, + MC9SDZ60_REG_INT_ENABLE_2 = 0x26, + MC9SDZ60_REG_INT_FLAG_1 = 0x27, + MC9SDZ60_REG_INT_FLAG_2 = 0x28, + MC9SDZ60_REG_DES_FLAG = 0x29, }; struct mc9sdz60 { |