Merge branch 'for-next/clps711x'

2 files changed, 84 insertions, 0 deletions

diff --git a/include/linux/basic_mmio_gpio.h b/include/linux/basic_mmio_gpio.h
new file mode 100644
index 0000000000..e927194b51
--- /dev/null
+++ b/include/linux/basic_mmio_gpio.h
@@ -0,0 +1,69 @@
+/*
+ * Basic memory-mapped GPIO controllers.
+ *
+ * Based on linux driver by:
+ *  Copyright 2008 MontaVista Software, Inc.
+ *  Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __BASIC_MMIO_GPIO_H
+#define __BASIC_MMIO_GPIO_H
+
+#include <common.h>
+#include <gpio.h>
+#include <io.h>
+
+struct bgpio_pdata {
+	int base;
+	int ngpio;
+};
+
+struct bgpio_chip {
+	struct gpio_chip gc;
+	struct gpio_ops ops;
+
+	unsigned int (*read_reg)(void __iomem *reg);
+	void (*write_reg)(void __iomem *reg, unsigned int data);
+
+	void __iomem *reg_dat;
+	void __iomem *reg_set;
+	void __iomem *reg_clr;
+	void __iomem *reg_dir;
+
+	/* Number of bits (GPIOs): <register width> * 8. */
+	int bits;
+
+	/*
+	 * Some GPIO controllers work with the big-endian bits notation,
+	 * e.g. in a 8-bits register, GPIO7 is the least significant bit.
+	 */
+	unsigned int (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
+
+	/* Shadowed data register to clear/set bits safely. */
+	unsigned int data;
+
+	/* Shadowed direction registers to clear/set direction safely. */
+	unsigned int dir;
+};
+
+static inline struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
+{
+	return container_of(gc, struct bgpio_chip, gc);
+}
+
+int bgpio_init(struct bgpio_chip *bgc, struct device_d *dev,
+	       unsigned int sz, void __iomem *dat, void __iomem *set,
+	       void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
+	       unsigned long flags);
+void bgpio_remove(struct bgpio_chip *bgc);
+
+#define BGPIOF_BIG_ENDIAN		BIT(0)
+#define BGPIOF_UNREADABLE_REG_SET	BIT(1) /* reg_set is unreadable */
+#define BGPIOF_UNREADABLE_REG_DIR	BIT(2) /* reg_dir is unreadable */
+
+#endif /* __BASIC_MMIO_GPIO_H */
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index 6d6cd68de6..ff0cba0707 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -111,10 +111,25 @@ struct resource {
 /* PCI control bits.  Shares IORESOURCE_BITS with above PCI ROM.  */
 #define IORESOURCE_PCI_FIXED		(1<<4)	/* Do not move resource */
 
+/* Helpers to define resources */
+#define DEFINE_RES_NAMED(_start, _size, _name, _flags)	\
+	{						\
+		.start	= (_start),			\
+		.end	= (_start) + (_size) - 1,	\
+		.name	= (_name),			\
+		.flags	= (_flags),			\
+	}
+
+#define DEFINE_RES_MEM_NAMED(_start, _size, _name)	\
+	DEFINE_RES_NAMED((_start), (_size), (_name), IORESOURCE_MEM)
+#define DEFINE_RES_MEM(_start, _size)			\
+	DEFINE_RES_MEM_NAMED((_start), (_size), NULL)
+
 static inline resource_size_t resource_size(const struct resource *res)
 {
 	return res->end - res->start + 1;
 }
+
 static inline unsigned long resource_type(const struct resource *res)
 {
 	return res->flags & IORESOURCE_TYPE_BITS;