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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-12-19 13:56:28 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2024-01-02 12:34:48 +0100 |
| commit | d98b522b922d1447826e7678be17096d81ec44a2 (patch) | |
| tree | 013da535400eed74c429ddb6752b88e561a7daa6 /include/linux | |
| parent | 0961d62364cdbe627769c42c208d8f38ec00d72e (diff) | |
| download | barebox-d98b522b922d1447826e7678be17096d81ec44a2.tar.gz barebox-d98b522b922d1447826e7678be17096d81ec44a2.tar.xz | |
pci: fix __pci_bus_find_cap_start
BIT(7) of dev->hdr_type has unrelated information. Mask out the upper
bit so that the capabilities can properly be found.
Link: https://lore.barebox.org/20231219125630.3684-5-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/pci_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 2c335f5835..631f218229 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -69,6 +69,7 @@ #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ #define PCI_LATENCY_TIMER 0x0d /* 8 bits */ #define PCI_HEADER_TYPE 0x0e /* 8 bits */ +#define PCI_HEADER_TYPE_MASK 0x7f #define PCI_HEADER_TYPE_NORMAL 0 #define PCI_HEADER_TYPE_BRIDGE 1 #define PCI_HEADER_TYPE_CARDBUS 2 |