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| author | Alexander Shiyan <shc_work@mail.ru> | 2018-12-24 09:24:56 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-01-03 10:31:17 +0100 |
| commit | b73f43c5e93e5fb22a010d00eae6044904a1d2aa (patch) | |
| tree | f9d410b57a0131b0587073f333359ca770d3bcd3 /include/mfd | |
| parent | ff0af6d04eca0fbd941ee0c21d9d39c9d3ebbe94 (diff) | |
| download | barebox-b73f43c5e93e5fb22a010d00eae6044904a1d2aa.tar.gz barebox-b73f43c5e93e5fb22a010d00eae6044904a1d2aa.tar.xz | |
mfd: mc13892: MC13892_POWER_MISC bits revision
This patch revises the bits for register MC13892_POWER_MISC.
- Added definition for one missing bit (0).
- Changed the name for bit 21 for accordance with the datasheet.
- Updated affected board that uses these definitions.
- Replaced spaces with tabs for the remaining bits.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/mfd')
| -rw-r--r-- | include/mfd/mc13892.h | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/include/mfd/mc13892.h b/include/mfd/mc13892.h index 8b522391b0..e9a41ba214 100644 --- a/include/mfd/mc13892.h +++ b/include/mfd/mc13892.h @@ -182,17 +182,18 @@ #define MC13892_MODE_1_VSDMODE (1 << 20) /* Reg Power misc */ -#define MC13892_POWER_MISC_GPO1EN (1 << 6) -#define MC13892_POWER_MISC_GPO1STBY (1 << 7) -#define MC13892_POWER_MISC_GPO2EN (1 << 8) -#define MC13892_POWER_MISC_GPO2STBY (1 << 9) -#define MC13892_POWER_MISC_GPO3EN (1 << 10) -#define MC13892_POWER_MISC_GPO3STBY (1 << 11) -#define MC13892_POWER_MISC_GPO4EN (1 << 12) -#define MC13892_POWER_MISC_GPO4STBY (1 << 13) -#define MC13892_POWER_MISC_PWGT1SPIEN (1 << 15) -#define MC13892_POWER_MISC_PWGT2SPIEN (1 << 16) -#define MC13892_POWER_MISC_PWUP (1 << 21) +#define MC13892_POWER_MISC_REGSCPEN (1 << 0) +#define MC13892_POWER_MISC_GPO1EN (1 << 6) +#define MC13892_POWER_MISC_GPO1STBY (1 << 7) +#define MC13892_POWER_MISC_GPO2EN (1 << 8) +#define MC13892_POWER_MISC_GPO2STBY (1 << 9) +#define MC13892_POWER_MISC_GPO3EN (1 << 10) +#define MC13892_POWER_MISC_GPO3STBY (1 << 11) +#define MC13892_POWER_MISC_GPO4EN (1 << 12) +#define MC13892_POWER_MISC_GPO4STBY (1 << 13) +#define MC13892_POWER_MISC_PWGT1SPIEN (1 << 15) +#define MC13892_POWER_MISC_PWGT2SPIEN (1 << 16) +#define MC13892_POWER_MISC_GPO4ADIN (1 << 21) /* Reg Power Control 2*/ #define MC13892_POWER_CONTROL_2_WDIRESET (1 << 12) |