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author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-02-07 18:41:56 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-02-10 09:08:51 +0100 |
commit | 695060fb1a27dbad407a3be5fc63d5f2d791aaee (patch) | |
tree | 8a46aeaa36df44218c30da60402304d45f3f857a /include | |
parent | 29af281cb1bc1d8b9d098fa6b550af9b019a2512 (diff) | |
download | barebox-695060fb1a27dbad407a3be5fc63d5f2d791aaee.tar.gz barebox-695060fb1a27dbad407a3be5fc63d5f2d791aaee.tar.xz |
bus: mvebu: add mbus driver
This imports the Marvell mbus driver from Linux. The mbus is the
main downstream bus found on all Marvell Orion SoCs. The driver
deals with re-configurable address windows which are currently
parsed from DT. Also enable the driver as default on all MVEBU
SoCs. While at it, also reorder drivers/bus/{Kconfig,Makefile}
alphabetically.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mbus.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/include/linux/mbus.h b/include/linux/mbus.h new file mode 100644 index 0000000000..578ff33146 --- /dev/null +++ b/include/linux/mbus.h @@ -0,0 +1,61 @@ +/* + * Marvell MBUS common definitions. + * + * Copyright (C) 2008 Marvell Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __LINUX_MBUS_H +#define __LINUX_MBUS_H + +struct resource; + +struct mbus_dram_target_info { + /* + * The 4-bit MBUS target ID of the DRAM controller. + */ + u8 mbus_dram_target_id; + + /* + * The base address, size, and MBUS attribute ID for each + * of the possible DRAM chip selects. Peripherals are + * required to support at least 4 decode windows. + */ + int num_cs; + struct mbus_dram_window { + u8 cs_index; + u8 mbus_attr; + u32 base; + u32 size; + } cs[4]; +}; + +/* Flags for PCI/PCIe address decoding regions */ +#define MVEBU_MBUS_PCI_IO 0x1 +#define MVEBU_MBUS_PCI_MEM 0x2 +#define MVEBU_MBUS_PCI_WA 0x3 + +/* + * Magic value that explicits that we don't need a remapping-capable + * address decoding window. + */ +#define MVEBU_MBUS_NO_REMAP (0xffffffff) + +/* Maximum size of a mbus window name */ +#define MVEBU_MBUS_MAX_WINNAME_SZ 32 + +const struct mbus_dram_target_info *mvebu_mbus_dram_info(void); +void mvebu_mbus_get_pcie_mem_aperture(struct resource *res); +void mvebu_mbus_get_pcie_io_aperture(struct resource *res); +int mvebu_mbus_add_window_remap_by_id(unsigned int target, + unsigned int attribute, + phys_addr_t base, size_t size, + phys_addr_t remap); +int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute, + phys_addr_t base, size_t size); +int mvebu_mbus_del_window(phys_addr_t base, size_t size); + +#endif /* __LINUX_MBUS_H */ |