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| author | Daniel Brát <danek.brat@gmail.com> | 2022-06-17 23:58:11 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-06-27 08:53:30 +0200 |
| commit | 6f4f30b9c1fbd20ebf1b05843cf344fa2bb35f65 (patch) | |
| tree | e0f1cd0d7e4d2d306358b15bc198c77db9b2472b /include | |
| parent | 8be7c4fc8087ec7578632865bfc0a414e315f558 (diff) | |
| download | barebox-6f4f30b9c1fbd20ebf1b05843cf344fa2bb35f65.tar.gz barebox-6f4f30b9c1fbd20ebf1b05843cf344fa2bb35f65.tar.xz | |
ARM: rpi: parse useful data from vc fdt
Videocore first-stage loader on rpi passes us many useful information
inside the vc fdt, including the real value of PM_RSTS register, not
easily available by other means and which we can use to determine
the reset cause.
Also make the relevant funtions just print error/warning and continue
in case of some errors, since the fdt from vc is now optional for
barebox's basic function.
Signed-off-by: Daniel Brát <danek.brat@gmail.com>
Link: https://lore.barebox.org/20220617215811.5687-1-danek.brat@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/bcm283x/wdt.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/include/soc/bcm283x/wdt.h b/include/soc/bcm283x/wdt.h new file mode 100644 index 0000000000..ce97b1eb5d --- /dev/null +++ b/include/soc/bcm283x/wdt.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2017 Pengutronix, Lucas Stach <l.stach@pengutronix.de> + * + * Based on code from Carlo Caione <carlo@carlocaione.org> + */ + +#ifndef __BCM2835_WDT_H +#define __BCM2835_WDT_H + +#define PM_RSTC 0x1c +#define PM_RSTS 0x20 +#define PM_WDOG 0x24 + +#define PM_WDOG_RESET 0000000000 +#define PM_PASSWORD 0x5a000000 +#define PM_WDOG_TIME_SET 0x000fffff +#define PM_RSTC_WRCFG_CLR 0xffffffcf +#define PM_RSTC_WRCFG_SET 0x00000030 +#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 +#define PM_RSTC_RESET 0x00000102 + +#define PM_RSTS_HADPOR_SET 0x00001000 +#define PM_RSTS_HADSRH_SET 0x00000400 +#define PM_RSTS_HADSRF_SET 0x00000200 +#define PM_RSTS_HADSRQ_SET 0x00000100 +#define PM_RSTS_HADWRH_SET 0x00000040 +#define PM_RSTS_HADWRF_SET 0x00000020 +#define PM_RSTS_HADWRQ_SET 0x00000010 +#define PM_RSTS_HADDRH_SET 0x00000004 +#define PM_RSTS_HADDRF_SET 0x00000002 +#define PM_RSTS_HADDRQ_SET 0x00000001 + +#define PM_RSTS_HADDR_SET \ + (PM_RSTS_HADDRQ_SET | PM_RSTS_HADDRF_SET | PM_RSTS_HADDRH_SET) +#define PM_RSTS_HADWR_SET \ + (PM_RSTS_HADWRQ_SET | PM_RSTS_HADWRF_SET | PM_RSTS_HADWRH_SET) +#define PM_RSTS_HADSR_SET \ + (PM_RSTS_HADSRQ_SET | PM_RSTS_HADSRF_SET | PM_RSTS_HADSRH_SET) + +#endif |