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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2021-04-27 22:23:06 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-05-10 09:18:40 +0200 |
| commit | 8f9ef2d9ab22f4d9e1047661994bc608e98fd467 (patch) | |
| tree | fb98e012ce03f8e36f639271172a917b904d162e /include | |
| parent | 01c1a0e8088da6ca464cfc0950669222a246d5a0 (diff) | |
| download | barebox-8f9ef2d9ab22f4d9e1047661994bc608e98fd467.tar.gz barebox-8f9ef2d9ab22f4d9e1047661994bc608e98fd467.tar.xz | |
gpio: generic: sync with upstream Linux gpio-mmio driver
The gpio-mmio driver in Linux v5.12 has evolved quite a bit since the
last sync. It now supports big endian byte order, 64-bit registers as
well as controllers that have both a dirin and dirout register.
The latter is particularly interesting, because it's required for the
SiFive GPIO controller ported in a later patch.
This commit also touches gpio-mpc8xxx used on the LS1046A.
Because bit and byte endianness can now be configured separately,
the driver needs adjustment. We don't seem to support any boards
that have the peripheral as little-endian, but this is fixed by this
commit. Comparing other bgpio_init users with Linux shows no need for
further fixups.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210427202309.32077-9-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/io.h | 2 | ||||
| -rw-r--r-- | include/linux/basic_mmio_gpio.h | 14 |
2 files changed, 13 insertions, 3 deletions
diff --git a/include/io.h b/include/io.h index 9130020722..79d8b56c4e 100644 --- a/include/io.h +++ b/include/io.h @@ -4,4 +4,6 @@ #include <asm/io.h> +#define IOMEM_ERR_PTR(err) (__force void __iomem *)ERR_PTR(err) + #endif /* __IO_H */ diff --git a/include/linux/basic_mmio_gpio.h b/include/linux/basic_mmio_gpio.h index e927194b51..34e2f470fb 100644 --- a/include/linux/basic_mmio_gpio.h +++ b/include/linux/basic_mmio_gpio.h @@ -27,13 +27,17 @@ struct bgpio_chip { struct gpio_chip gc; struct gpio_ops ops; - unsigned int (*read_reg)(void __iomem *reg); - void (*write_reg)(void __iomem *reg, unsigned int data); + unsigned long (*read_reg)(void __iomem *reg); + void (*write_reg)(void __iomem *reg, unsigned long data); void __iomem *reg_dat; void __iomem *reg_set; void __iomem *reg_clr; - void __iomem *reg_dir; + void __iomem *reg_dir_out; + void __iomem *reg_dir_in; + + bool dir_unreadable; + bool be_bits; /* Number of bits (GPIOs): <register width> * 8. */ int bits; @@ -65,5 +69,9 @@ void bgpio_remove(struct bgpio_chip *bgc); #define BGPIOF_BIG_ENDIAN BIT(0) #define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ #define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ +#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) +#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ +#define BGPIOF_NO_OUTPUT BIT(5) /* only input */ +#define BGPIOF_NO_SET_ON_INPUT BIT(6) #endif /* __BASIC_MMIO_GPIO_H */ |