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authorAhmad Fatoum <ahmad@a3f.at>2021-02-28 20:08:32 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2021-03-04 12:11:24 +0100
commit96c3abf61567e9e3e031591cff2bb9738feedbfc (patch)
tree5c41fe699187c56132865e5e42d39f72dbaabab2 /include
parent3f975f810bd34c56cfafd88d1d4e6eb669e74561 (diff)
downloadbarebox-96c3abf61567e9e3e031591cff2bb9738feedbfc.tar.gz
barebox-96c3abf61567e9e3e031591cff2bb9738feedbfc.tar.xz
virtio: ring: fix erroneous behavior around caches and MMU
The U-Boot code assumes 1:1 phys2virt mapping and either disabled caches or a lot of luck. Use the DMA API to get appropriate addresses for DMA and use coherent/streaming DMA mappings where appropriate. This is required for proper operation on MIPS. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/linux/virtio_ring.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/virtio_ring.h b/include/linux/virtio_ring.h
index 3c11592b09..c349af90ce 100644
--- a/include/linux/virtio_ring.h
+++ b/include/linux/virtio_ring.h
@@ -108,6 +108,8 @@ struct virtqueue {
u16 last_used_idx;
u16 avail_flags_shadow;
u16 avail_idx_shadow;
+ dma_addr_t queue_dma_addr;
+ size_t queue_size_in_bytes;
};
/*