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author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-10-09 11:58:32 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-10-09 11:58:32 +0200 |
commit | b71685e1f415e50c7a462bb3049187d082aa09e3 (patch) | |
tree | 252cbf86376508c511bc3ddab540ba8fa2ff96f7 /include | |
parent | 67551e7a76b620ce3a2375bdda6dd5f294d5d084 (diff) | |
download | barebox-b71685e1f415e50c7a462bb3049187d082aa09e3.tar.gz barebox-b71685e1f415e50c7a462bb3049187d082aa09e3.tar.xz |
add USB otg pin definitions
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-imx/imx27-regs.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-arm/arch-imx/imx27-regs.h b/include/asm-arm/arch-imx/imx27-regs.h index 9b49a8f41a..33d67d6f50 100644 --- a/include/asm-arm/arch-imx/imx27-regs.h +++ b/include/asm-arm/arch-imx/imx27-regs.h @@ -308,6 +308,18 @@ #define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13) #define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14) #define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15) +#define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7) +#define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8) +#define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9) +#define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10) +#define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11) +#define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12) +#define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13) +#define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0) +#define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1) +#define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2) +#define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24) +#define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25) /* * Definitions for the clocksource driver |