diff options
| -rw-r--r-- | dts/Bindings/spi/cdns,qspi-nor.yaml | 1 | ||||
| -rw-r--r-- | dts/src/arm/bcm2711.dtsi | 2 | ||||
| -rw-r--r-- | dts/src/arm/bcm283x.dtsi | 2 | ||||
| -rw-r--r-- | dts/src/arm/socfpga.dtsi | 2 | ||||
| -rw-r--r-- | dts/src/arm/socfpga_arria10.dtsi | 2 | ||||
| -rw-r--r-- | dts/src/arm64/altera/socfpga_stratix10.dtsi | 2 | ||||
| -rw-r--r-- | dts/src/arm64/intel/socfpga_agilex.dtsi | 2 |
7 files changed, 9 insertions, 4 deletions
diff --git a/dts/Bindings/spi/cdns,qspi-nor.yaml b/dts/Bindings/spi/cdns,qspi-nor.yaml index ca155abbda..037f41f585 100644 --- a/dts/Bindings/spi/cdns,qspi-nor.yaml +++ b/dts/Bindings/spi/cdns,qspi-nor.yaml @@ -29,6 +29,7 @@ properties: - ti,am654-ospi - intel,lgm-qspi - xlnx,versal-ospi-1.0 + - intel,socfpga-qspi - const: cdns,qspi-nor - const: cdns,qspi-nor diff --git a/dts/src/arm/bcm2711.dtsi b/dts/src/arm/bcm2711.dtsi index 9e01dbca4a..dff18fc9a9 100644 --- a/dts/src/arm/bcm2711.dtsi +++ b/dts/src/arm/bcm2711.dtsi @@ -582,6 +582,8 @@ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + gpio-ranges = <&gpio 0 0 58>; + gpclk0_gpio49: gpclk0_gpio49 { pin-gpclk { pins = "gpio49"; diff --git a/dts/src/arm/bcm283x.dtsi b/dts/src/arm/bcm283x.dtsi index a3e06b6809..c113661a66 100644 --- a/dts/src/arm/bcm283x.dtsi +++ b/dts/src/arm/bcm283x.dtsi @@ -126,6 +126,8 @@ interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&gpio 0 0 54>; + /* Defines common pin muxing groups * * While each pin can have its mux selected diff --git a/dts/src/arm/socfpga.dtsi b/dts/src/arm/socfpga.dtsi index 0b021eef0b..7c1d6423d7 100644 --- a/dts/src/arm/socfpga.dtsi +++ b/dts/src/arm/socfpga.dtsi @@ -782,7 +782,7 @@ }; qspi: spi@ff705000 { - compatible = "cdns,qspi-nor"; + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; #address-cells = <1>; #size-cells = <0>; reg = <0xff705000 0x1000>, diff --git a/dts/src/arm/socfpga_arria10.dtsi b/dts/src/arm/socfpga_arria10.dtsi index a574ea91d9..3ba431dfa8 100644 --- a/dts/src/arm/socfpga_arria10.dtsi +++ b/dts/src/arm/socfpga_arria10.dtsi @@ -756,7 +756,7 @@ }; qspi: spi@ff809000 { - compatible = "cdns,qspi-nor"; + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; #address-cells = <1>; #size-cells = <0>; reg = <0xff809000 0x100>, diff --git a/dts/src/arm64/altera/socfpga_stratix10.dtsi b/dts/src/arm64/altera/socfpga_stratix10.dtsi index d301ac0d40..3ec301bd08 100644 --- a/dts/src/arm64/altera/socfpga_stratix10.dtsi +++ b/dts/src/arm64/altera/socfpga_stratix10.dtsi @@ -594,7 +594,7 @@ }; qspi: spi@ff8d2000 { - compatible = "cdns,qspi-nor"; + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; #address-cells = <1>; #size-cells = <0>; reg = <0xff8d2000 0x100>, diff --git a/dts/src/arm64/intel/socfpga_agilex.dtsi b/dts/src/arm64/intel/socfpga_agilex.dtsi index 163f33b46e..0dd2d2ee76 100644 --- a/dts/src/arm64/intel/socfpga_agilex.dtsi +++ b/dts/src/arm64/intel/socfpga_agilex.dtsi @@ -628,7 +628,7 @@ }; qspi: spi@ff8d2000 { - compatible = "cdns,qspi-nor"; + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; #address-cells = <1>; #size-cells = <0>; reg = <0xff8d2000 0x100>, |