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-rw-r--r--arch/arm/boards/avnet-zedboard/lowlevel.c54
1 files changed, 29 insertions, 25 deletions
diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c
index 912eb11fda..6e5a17d7ef 100644
--- a/arch/arm/boards/avnet-zedboard/lowlevel.c
+++ b/arch/arm/boards/avnet-zedboard/lowlevel.c
@@ -1,27 +1,12 @@
-/*
- *
- * (c) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
+// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-FileCopyrightText: 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
+
#include <common.h>
#include <io.h>
#include <asm/barebox-arm.h>
#include <asm/barebox-arm-head.h>
-#include <mach/init.h>
-#include <mach/zynq7000-regs.h>
+#include <mach/zynq/init.h>
+#include <mach/zynq/zynq7000-regs.h>
#include <serial/cadence.h>
#define DCI_DONE (1 << 13)
@@ -29,7 +14,7 @@
#define PLL_DDR_LOCK (1 << 1)
#define PLL_IO_LOCK (1 << 2)
-extern char __dtb_zynq_zed_start[];
+extern char __dtb_z_zynq_zed_start[];
static void avnet_zedboard_ps7_init(void)
{
@@ -258,7 +243,7 @@ static void avnet_zedboard_ps7_init(void)
/* GEM0 */
writel(0x00000001, 0xf8000138);
- writel(0x00500801, 0xf8000140);
+ writel(0x00100801, 0xf8000140);
writel(0x00000302, 0xf8000740);
writel(0x00000302, 0xf8000744);
writel(0x00000302, 0xf8000748);
@@ -271,11 +256,20 @@ static void avnet_zedboard_ps7_init(void)
writel(0x00001303, 0xf8000764);
writel(0x00001303, 0xf8000768);
writel(0x00001303, 0xf800076C);
- writel(0x00001280, 0xf80007D0);
- writel(0x00001280, 0xf80007D4);
+ writel(0x00000280, 0xf80007D0);
+ writel(0x00000280, 0xf80007D4);
writel(0x00000001, 0xf8000B00);
+ /* FPGA Clock Control */
+ writel(0x00101400, 0xf8000170);
+ writel(0x00101400, 0xf8000180);
+ writel(0x00101400, 0xf8000190);
+ writel(0x00101400, 0xf80001a0);
+
+ /* PCAP Clock Control */
+ writel(0x00000501, 0xf8000168);
+
/* lock up. secure, secure */
writel(0x0000767B, ZYNQ_SLCR_LOCK);
}
@@ -295,7 +289,17 @@ static void avnet_zedboard_pbl_console_init(void)
ENTRY_FUNCTION(start_avnet_zedboard, r0, r1, r2)
{
- void *fdt = __dtb_zynq_zed_start + get_runtime_offset();
+ void *fdt = __dtb_z_zynq_zed_start + get_runtime_offset();
+
+ /* MIO_07 in GPIO Mode 3.3V VIO, can be uncomented because it is the default value */
+ writel(0x0000DF0D, ZYNQ_SLCR_UNLOCK);
+ writel(0x00000600, 0xF800071C );
+ writel(0x0000767B, ZYNQ_SLCR_LOCK);
+
+ /* turns on the LED MIO_07 */
+ writel((1<<7), 0xe000a204 ); // Direction
+ writel((1<<7), 0xe000a208 ); // Output enable
+ writel((1<<7), 0xe000a040 ); // DATA Register
arm_cpu_lowlevel_init();
zynq_cpu_lowlevel_init();