diff options
Diffstat (limited to 'arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg')
| -rw-r--r-- | arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg | 229 |
1 files changed, 116 insertions, 113 deletions
diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg index be4efe3c70..56cb3292a9 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg @@ -2,6 +2,9 @@ soc imx6 loadaddr 0x20000000 dcdofs 0x400 +#include <mach/imx6-ddr-regs.h> +#include <mach/imx6q-ddr-regs.h> + wm 32 0x020e00a4 0x00000016 wm 32 0x020e00c4 0x00000011 wm 32 0x020e03b8 0x0000f079 @@ -30,14 +33,14 @@ wm 32 0x020e02c0 0x00000001 wm 32 0x020e02c4 0x00000001 wm 32 0x020e091c 0x00000003 wm 32 0x020e02ec 0x00000000 -wm 32 0x020e05ac 0x00020030 -wm 32 0x020e05b4 0x00020030 -wm 32 0x020e0528 0x00020030 -wm 32 0x020e0520 0x00020030 -wm 32 0x020e0514 0x00020030 -wm 32 0x020e0510 0x00020030 -wm 32 0x020e05bc 0x00020030 -wm 32 0x020e05c4 0x00020030 +wm 32 MX6_IOM_DRAM_DQM0 0x00020030 +wm 32 MX6_IOM_DRAM_DQM1 0x00020030 +wm 32 MX6_IOM_DRAM_DQM2 0x00020030 +wm 32 MX6_IOM_DRAM_DQM3 0x00020030 +wm 32 MX6_IOM_DRAM_DQM4 0x00020030 +wm 32 MX6_IOM_DRAM_DQM5 0x00020030 +wm 32 MX6_IOM_DRAM_DQM6 0x00020030 +wm 32 MX6_IOM_DRAM_DQM7 0x00020030 wm 32 0x020e052c 0x00020200 wm 32 0x020e0530 0x00020200 wm 32 0x020e0534 0x00020200 @@ -54,32 +57,32 @@ wm 32 0x020e055c 0x00020200 wm 32 0x020e0560 0x00020200 wm 32 0x020e0564 0x00020200 wm 32 0x020e0568 0x00020200 -wm 32 0x020e056c 0x00020030 -wm 32 0x020e0578 0x00020030 -wm 32 0x020e0588 0x00020030 -wm 32 0x020e0594 0x00020030 -wm 32 0x020e057c 0x00020030 -wm 32 0x020e0590 0x00003000 -wm 32 0x020e0598 0x00003000 +wm 32 MX6_IOM_DRAM_CAS 0x00020030 +wm 32 MX6_IOM_DRAM_RAS 0x00020030 +wm 32 MX6_IOM_DRAM_SDCLK_0 0x00020030 +wm 32 MX6_IOM_DRAM_SDCLK_1 0x00020030 +wm 32 MX6_IOM_DRAM_RESET 0x00020030 +wm 32 MX6_IOM_DRAM_SDCKE0 0x00003000 +wm 32 MX6_IOM_DRAM_SDCKE1 0x00003000 wm 32 0x020e0580 0x00000000 wm 32 0x020e0584 0x00000000 -wm 32 0x020e058c 0x00000000 -wm 32 0x020e059c 0x00003030 -wm 32 0x020e05a0 0x00003030 -wm 32 0x020e0784 0x00000030 -wm 32 0x020e0788 0x00000030 -wm 32 0x020e0794 0x00000030 -wm 32 0x020e079c 0x00000030 -wm 32 0x020e07a0 0x00000030 -wm 32 0x020e07a4 0x00000030 -wm 32 0x020e07a8 0x00000030 -wm 32 0x020e0748 0x00000030 -wm 32 0x020e074c 0x00000030 -wm 32 0x020e0750 0x00020000 -wm 32 0x020e0758 0x00000000 -wm 32 0x020e0774 0x00020000 -wm 32 0x020e078c 0x00000030 -wm 32 0x020e0798 0x000c0000 +wm 32 MX6_IOM_DRAM_SDBA2 0x00000000 +wm 32 MX6_IOM_DRAM_SDODT0 0x00003030 +wm 32 MX6_IOM_DRAM_SDODT1 0x00003030 +wm 32 MX6_IOM_GRP_B0DS 0x00000030 +wm 32 MX6_IOM_GRP_B1DS 0x00000030 +wm 32 MX6_IOM_GRP_B2DS 0x00000030 +wm 32 MX6_IOM_GRP_B3DS 0x00000030 +wm 32 MX6_IOM_GRP_B4DS 0x00000030 +wm 32 MX6_IOM_GRP_B5DS 0x00000030 +wm 32 MX6_IOM_GRP_B6DS 0x00000030 +wm 32 MX6_IOM_GRP_B7DS 0x00000030 +wm 32 MX6_IOM_GRP_ADDDS 0x00000030 +wm 32 MX6_IOM_DDRMODE_CTL 0x00020000 +wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 +wm 32 MX6_IOM_GRP_DDRMODE 0x00020000 +wm 32 MX6_IOM_GRP_CTLDS 0x00000030 +wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000 wm 32 0x020e0768 0x00002000 wm 32 0x020e0770 0x00000000 wm 32 0x020e0754 0x00000200 @@ -90,85 +93,85 @@ wm 32 0x020e076c 0x00000200 wm 32 0x020e0778 0x00000200 wm 32 0x020e077c 0x00000200 wm 32 0x020e0780 0x00000200 -wm 32 0x021b001c 0x04008010 -wm 32 0x021b001c 0x04008040 -wm 32 0x021b0800 0xa1390001 -wm 32 0x021b080c 0x001e001e -wm 32 0x021b0810 0x001e001e -wm 32 0x021b480c 0x001e001e -wm 32 0x021b4810 0x001e001e -wm 32 0x021b083c 0x43430349 -wm 32 0x021b0840 0x03330334 -wm 32 0x021b483c 0x434b0351 -wm 32 0x021b4840 0x033d030e -wm 32 0x021b0848 0x40404040 -wm 32 0x021b0850 0x40404040 -wm 32 0x021b4848 0x40404040 -wm 32 0x021b4850 0x40404040 -wm 32 0x021b081c 0x33333333 -wm 32 0x021b0820 0x33333333 -wm 32 0x021b0824 0x33333333 -wm 32 0x021b0828 0x33333333 -wm 32 0x021b481c 0x33333333 -wm 32 0x021b4820 0x33333333 -wm 32 0x021b4824 0x33333333 -wm 32 0x021b4828 0x33333333 -wm 32 0x021b08b8 0x00000800 -wm 32 0x021b48b8 0x00000800 -wm 32 0x021b0018 0x00000742 -check 32 while_all_bits_clear 0x021b0018 0x00000002 -wm 32 0x021b001c 0x00008000 -check 32 while_any_bit_clear 0x021b001c 0x00004000 -wm 32 0x021b0000 0x831a0000 -check 32 while_any_bit_clear 0x021b0018 0x40000000 -wm 32 0x021b000c 0x545a79a4 -wm 32 0x021b0010 0xff538e64 -wm 32 0x021b0014 0x01ff00dd -wm 32 0x021b002c 0x000026d2 -wm 32 0x021b0030 0x005a1023 -wm 32 0x021b0008 0x24444040 -wm 32 0x021b0004 0x00020076 -wm 32 0x021b0040 0x00000027 -wm 32 0x021b001c 0x09308030 -wm 32 0x021b001c 0x00048031 -wm 32 0x021b001c 0x00488032 -wm 32 0x021b001c 0x00008033 -wm 32 0x021b0020 0x0000c000 -wm 32 0x021b001c 0x00008020 -wm 32 0x021b0818 0x00022222 -wm 32 0x021b4818 0x00022222 -wm 32 0x021b0890 0x00000003 -wm 32 0x021b0404 0x00000001 -wm 32 0x021b001c 0x04008010 -wm 32 0x021b001c 0x04008040 -wm 32 0x021b0800 0xa1390001 -check 32 while_all_bits_clear 0x021b0800 0x00010000 -wm 32 0x021b0800 0xa1380000 -wm 32 0x021b001c 0x00048033 -wm 32 0x020e05a8 0x00000030 -wm 32 0x020e05b0 0x00000030 -wm 32 0x020e0524 0x00000030 -wm 32 0x020e051c 0x00000030 -wm 32 0x020e0518 0x00000030 -wm 32 0x020e050c 0x00000030 -wm 32 0x020e05b8 0x00000030 -wm 32 0x020e05c0 0x00000030 -wm 32 0x021b001c 0x04008050 -wm 32 0x021b0860 0x00000030 -wm 32 0x021b4860 0x00000030 -check 32 while_all_bits_clear 0x021b0860 0x0000001f -check 32 while_all_bits_clear 0x021b4860 0x0000001f -wm 32 0x021b001c 0x04008050 -wm 32 0x021b0864 0x00000030 -check 32 while_all_bits_clear 0x021b0864 0x0000001f -wm 32 0x021b001c 0x04008050 -wm 32 0x021b4864 0x00000030 -check 32 while_all_bits_clear 0x021b4864 0x0000001f -wm 32 0x021b001c 0x00008033 -wm 32 0x021b0800 0xa138002b -wm 32 0x021b0020 0x00001800 -wm 32 0x021b0404 0x00001000 -wm 32 0x021b0004 0x00025576 -wm 32 0x021b001c 0x00000000 -check 32 while_all_bits_clear 0x021b001c 0x00004000 +wm 32 MX6_MMDC_P0_MDSCR 0x04008010 +wm 32 MX6_MMDC_P0_MDSCR 0x04008040 +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 +wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x001e001e +wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x001e001e +wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x001e001e +wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x001e001e +wm 32 MX6_MMDC_P0_MPDGCTRL0 0x43430349 +wm 32 MX6_MMDC_P0_MPDGCTRL1 0x03330334 +wm 32 MX6_MMDC_P1_MPDGCTRL0 0x434b0351 +wm 32 MX6_MMDC_P1_MPDGCTRL1 0x033d030e +wm 32 MX6_MMDC_P0_MPRDDLCTL 0x40404040 +wm 32 MX6_MMDC_P0_MPWRDLCTL 0x40404040 +wm 32 MX6_MMDC_P1_MPRDDLCTL 0x40404040 +wm 32 MX6_MMDC_P1_MPWRDLCTL 0x40404040 +wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P0_MDMISC 0x00000742 +check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +wm 32 MX6_MMDC_P0_MDSCR 0x00008000 +check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +wm 32 MX6_MMDC_P0_MDCTL 0x831a0000 +check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +wm 32 MX6_MMDC_P0_MDCFG0 0x545a79a4 +wm 32 MX6_MMDC_P0_MDCFG1 0xff538e64 +wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00dd +wm 32 MX6_MMDC_P0_MDRWD 0x000026d2 +wm 32 MX6_MMDC_P0_MDOR 0x005a1023 +wm 32 MX6_MMDC_P0_MDOTC 0x24444040 +wm 32 MX6_MMDC_P0_MDPDC 0x00020076 +wm 32 MX6_MMDC_P0_MDASP 0x00000027 +wm 32 MX6_MMDC_P0_MDSCR 0x09308030 +wm 32 MX6_MMDC_P0_MDSCR 0x00048031 +wm 32 MX6_MMDC_P0_MDSCR 0x00488032 +wm 32 MX6_MMDC_P0_MDSCR 0x00008033 +wm 32 MX6_MMDC_P0_MDREF 0x0000c000 +wm 32 MX6_MMDC_P0_MDSCR 0x00008020 +wm 32 MX6_MMDC_P0_MPODTCTRL 0x00022222 +wm 32 MX6_MMDC_P1_MPODTCTRL 0x00022222 +wm 32 MX6_MMDC_P0_MPPDCMPR2 0x00000003 +wm 32 MX6_MMDC_P0_MAPSR 0x00000001 +wm 32 MX6_MMDC_P0_MDSCR 0x04008010 +wm 32 MX6_MMDC_P0_MDSCR 0x04008040 +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 +check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000 +wm 32 MX6_MMDC_P0_MDSCR 0x00048033 +wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS2 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS3 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS4 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS5 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS6 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS7 0x00000030 +wm 32 MX6_MMDC_P0_MDSCR 0x04008050 +wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 +wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030 +check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 while_all_bits_clear MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f +wm 32 MX6_MMDC_P0_MDSCR 0x04008050 +wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 +check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +wm 32 MX6_MMDC_P0_MDSCR 0x04008050 +wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030 +check 32 while_all_bits_clear MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f +wm 32 MX6_MMDC_P0_MDSCR 0x00008033 +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b +wm 32 MX6_MMDC_P0_MDREF 0x00001800 +wm 32 MX6_MMDC_P0_MAPSR 0x00001000 +wm 32 MX6_MMDC_P0_MDPDC 0x00025576 +wm 32 MX6_MMDC_P0_MDSCR 0x00000000 +check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 |