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-rw-r--r--arch/arm/boards/ls1021aiot/Makefile3
-rw-r--r--arch/arm/boards/ls1021aiot/board.c47
-rw-r--r--arch/arm/boards/ls1021aiot/lowlevel.c117
-rw-r--r--arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg11
-rw-r--r--arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg8
-rw-r--r--arch/arm/boards/ls1021aiot/start.S11
6 files changed, 197 insertions, 0 deletions
diff --git a/arch/arm/boards/ls1021aiot/Makefile b/arch/arm/boards/ls1021aiot/Makefile
new file mode 100644
index 0000000000..df69ce814b
--- /dev/null
+++ b/arch/arm/boards/ls1021aiot/Makefile
@@ -0,0 +1,3 @@
+lwl-y += lowlevel.o
+obj-y += board.o
+lwl-y += start.o
diff --git a/arch/arm/boards/ls1021aiot/board.c b/arch/arm/boards/ls1021aiot/board.c
new file mode 100644
index 0000000000..70070a4e75
--- /dev/null
+++ b/arch/arm/boards/ls1021aiot/board.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+// SPDX-FileCopyrightText: (C) Copyright 2023 Ametek Inc.
+// SPDX-FileCopyrightText: 2023 Renaud Barbier <renaud.barbier@ametek.com>,
+
+#include <common.h>
+#include <init.h>
+#include <bbu.h>
+#include <net.h>
+#include <crc.h>
+#include <fs.h>
+#include <io.h>
+#include <envfs.h>
+#include <libfile.h>
+#include <asm/memory.h>
+#include <linux/sizes.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <asm/system.h>
+#include <mach/layerscape/layerscape.h>
+#include <of_address.h>
+#include <soc/fsl/immap_lsch2.h>
+
+static int iot_mem_init(void)
+{
+ if (!of_machine_is_compatible("fsl,ls1021a"))
+ return 0;
+
+ arm_add_mem_device("ram0", 0x80000000, 0x40000000);
+
+ return 0;
+}
+mem_initcall(iot_mem_init);
+
+static int iot_postcore_init(void)
+{
+ struct ls102xa_ccsr_scfg *scfg = IOMEM(LSCH2_SCFG_ADDR);
+
+ if (!of_machine_is_compatible("fsl,ls1021a"))
+ return 0;
+
+ /* clear BD & FR bits for BE BD's and frame data */
+ clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
+ out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
+
+ return 0;
+}
+coredevice_initcall(iot_postcore_init);
diff --git a/arch/arm/boards/ls1021aiot/lowlevel.c b/arch/arm/boards/ls1021aiot/lowlevel.c
new file mode 100644
index 0000000000..d2d4237c3d
--- /dev/null
+++ b/arch/arm/boards/ls1021aiot/lowlevel.c
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+// SPDX-FileCopyrightText: (C) Copyright 2023 Ametek Inc.
+// SPDX-FileCopyrightText: 2023 Renaud Barbier <renaud.barbier@ametek.com>
+
+/*
+ * Derived from Freescale LSDK-19.09-update-311219
+ */
+#include <common.h>
+#include <clock.h>
+#include <debug_ll.h>
+#include <mach/layerscape/debug_ll.h>
+#include <debug_ll.h>
+#include <soc/fsl/fsl_ddr_sdram.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <asm/syscounter.h>
+#include <asm/system.h>
+#include <asm/cache.h>
+#include <linux/sizes.h>
+#include <mach/layerscape/errata.h>
+#include <mach/layerscape/lowlevel.h>
+#include <mach/layerscape/xload.h>
+#include <mach/layerscape/layerscape.h>
+
+static struct fsl_ddr_controller ddrc[] = {
+ {
+ .memctl_opts.ddrtype = SDRAM_TYPE_DDR3,
+ .base = IOMEM(LSCH2_DDR_ADDR),
+ .ddr_freq = LS1021A_DDR_FREQ,
+ .erratum_A009942 = 1,
+ .chip_selects_per_ctrl = 4,
+ .fsl_ddr_config_reg = {
+ .cs[0].bnds = 0x008000bf,
+ .cs[0].config = 0x80014302,
+ .cs[0].config_2 = 0x00000000,
+ .cs[1].bnds = 0x00000000,
+ .cs[1].config = 0x00000000,
+ .cs[1].config_2 = 0x00000000,
+ .cs[2].bnds = 0x00000000,
+ .cs[2].config = 0x00000000,
+ .cs[2].config_2 = 0x00000000,
+ .cs[3].bnds = 0x00000000,
+ .cs[3].config = 0x00000000,
+ .cs[3].config_2 = 0x00000000,
+ .timing_cfg_3 = 0x010e1000,
+ .timing_cfg_0 = 0x50550004,
+ .timing_cfg_1 = 0xbcb38c56,
+ .timing_cfg_2 = 0x0040d120,
+ .ddr_sdram_cfg = 0x470c0008,
+ .ddr_sdram_cfg_2 = 0x00401010,
+ .ddr_sdram_mode = 0x00061c60,
+ .ddr_sdram_mode_2 = 0x00180000,
+ .ddr_sdram_interval = 0x18600618,
+ .ddr_data_init = 0xDEADBEEF,
+ .ddr_sdram_clk_cntl = 0x02000000,
+ .ddr_init_addr = 0x00000000,
+ .ddr_init_ext_addr = 0x00000000,
+ .timing_cfg_4 = 0x00000001,
+ .timing_cfg_5 = 0x03401400,
+ .ddr_zq_cntl = 0x89080600,
+ .ddr_wrlvl_cntl = 0x8655f605,
+ .ddr_wrlvl_cntl_2 = 0x05060607,
+ .ddr_wrlvl_cntl_3 = 0x05050505,
+ .ddr_sr_cntr = 0x00000000,
+ .ddr_sdram_rcw_1 = 0x00000000,
+ .ddr_sdram_rcw_2 = 0x00000000,
+ .ddr_sdram_rcw_3 = 0x00000000,
+ .ddr_cdr1 = 0x80040000,
+ .ddr_cdr2 = 0x000000C0,
+ .dq_map_0 = 0x00000000,
+ .dq_map_1 = 0x00000000,
+ .dq_map_2 = 0x00000000,
+ .dq_map_3 = 0x00000000,
+ .debug[28] = 0x00700046,
+ },
+ },
+};
+
+extern char __dtb_fsl_ls1021a_iot_start[];
+
+static noinline __noreturn void ls1021aiot_r_entry(void)
+{
+ unsigned long membase = LS1021A_DDR_SDRAM_BASE;
+
+ if (get_pc() >= membase) {
+ barebox_arm_entry(membase, SZ_1G - SZ_64M,
+ __dtb_fsl_ls1021a_iot_start);
+ }
+
+ ls102xa_init_lowlevel();
+ ls102xa_debug_ll_init();
+
+ udelay(500);
+ putc_ll('>');
+
+ fsl_ddr_set_memctl_regs(&ddrc[0], 0, false);
+
+ ls1021a_errata_post_ddr();
+
+ ls1021a_xload_start_image(SZ_1G, 0, 0);
+
+ pr_err("Booting failed\n");
+
+ while (1)
+ ;
+}
+
+void ls1021aiot_entry(unsigned long r0, unsigned long r1, unsigned long r2);
+
+__noreturn void
+ls1021aiot_entry(unsigned long r0, unsigned long r1, unsigned long r2)
+{
+ relocate_to_current_adr();
+ setup_c();
+
+ ls1021aiot_r_entry();
+}
diff --git a/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg b/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg
new file mode 100644
index 0000000000..840299be8d
--- /dev/null
+++ b/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg
@@ -0,0 +1,11 @@
+#PBI commands
+
+09570200 ffffffff
+09570158 00000300
+8940007c 21f47300
+#Configure Scratch register
+09ee0200 10000000
+#Configure alternate space
+09570158 00001000
+#Flush PBL data
+096100c0 000FFFFF
diff --git a/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg b/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg
new file mode 100644
index 0000000000..3b5300501d
--- /dev/null
+++ b/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg
@@ -0,0 +1,8 @@
+#PBL preamble and RCW header
+aa55aa55 01ee0100
+
+#disable IFC, enable QSPI and DSPI
+0608000a 00000000 00000000 00000000
+20000000 08407900 e0025a00 21046000
+00000000 00000000 00000000 20038000
+20024800 881b1340 00000000 00000000
diff --git a/arch/arm/boards/ls1021aiot/start.S b/arch/arm/boards/ls1021aiot/start.S
new file mode 100644
index 0000000000..c907777ca1
--- /dev/null
+++ b/arch/arm/boards/ls1021aiot/start.S
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <linux/linkage.h>
+#include <asm/barebox-arm64.h>
+
+#define STACK_TOP 0x10020000
+
+ENTRY_PROC(start_ls1021aiot)
+ ldr r3, =STACK_TOP
+ mov sp, r3
+ b ls1021aiot_entry
+ENTRY_PROC_END(start_ls1021aiot)
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-25 06:55:38 +0000