4 files changed, 201 insertions, 0 deletions
diff --git a/arch/arm/boards/nxp-imx6ull-evk/Makefile b/arch/arm/boards/nxp-imx6ull-evk/Makefile
new file mode 100644
index 0000000000..01c7a259e9
--- /dev/null
+++ b/arch/arm/boards/nxp-imx6ull-evk/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/nxp-imx6ull-evk/board.c b/arch/arm/boards/nxp-imx6ull-evk/board.c
new file mode 100644
index 0000000000..a0ca268f82
--- /dev/null
+++ b/arch/arm/boards/nxp-imx6ull-evk/board.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2017 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <mach/bbu.h>
+#include <linux/phy.h>
+
+#include <linux/micrel_phy.h>
+
+static int ksz8081_phy_fixup(struct phy_device *dev)
+{
+	phy_write(dev, 0x1f, 0x8190);
+	phy_write(dev, 0x16, 0x202);
+
+	return 0;
+}
+
+static int nxp_imx6ull_evk_init(void)
+{
+	if (!of_machine_is_compatible("fsl,imx6ull-14x14-evk"))
+		return 0;
+
+	phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
+			ksz8081_phy_fixup);
+
+	imx6_bbu_internal_mmc_register_handler("mmc", "/dev/mmc1.barebox",
+			BBU_HANDLER_FLAG_DEFAULT);
+
+	barebox_set_hostname("imx6ull-evk");
+
+	return 0;
+}
+device_initcall(nxp_imx6ull_evk_init);
diff --git a/arch/arm/boards/nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk.imxcfg b/arch/arm/boards/nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk.imxcfg
new file mode 100644
index 0000000000..a507ab3e24
--- /dev/null
+++ b/arch/arm/boards/nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk.imxcfg
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Values taken from U-Boot-2017.07-rc1
+ *
+ */
+
+loadaddr 0x80000000
+soc imx6
+dcdofs 0x400
+
+/* Enable all clocks */
+wm 32 0x020c4068 0xffffffff
+wm 32 0x020c406c 0xffffffff
+wm 32 0x020c4070 0xffffffff
+wm 32 0x020c4074 0xffffffff
+wm 32 0x020c4078 0xffffffff
+wm 32 0x020c407c 0xffffffff
+wm 32 0x020c4080 0xffffffff
+
+wm 32 0x020e04b4 0x000c0000
+wm 32 0x020e04ac 0x00000000
+wm 32 0x020e027c 0x00000030
+wm 32 0x020e0250 0x00000030
+wm 32 0x020e024c 0x00000030
+wm 32 0x020e0490 0x00000030
+wm 32 0x020e0288 0x000c0030
+wm 32 0x020e0270 0x00000000
+wm 32 0x020e0260 0x00000030
+wm 32 0x020e0264 0x00000030
+wm 32 0x020e04a0 0x00000030
+wm 32 0x020e0494 0x00020000
+wm 32 0x020e0280 0x00000030
+wm 32 0x020e0284 0x00000030
+wm 32 0x020e04b0 0x00020000
+wm 32 0x020e0498 0x00000030
+wm 32 0x020e04a4 0x00000030
+wm 32 0x020e0244 0x00000030
+wm 32 0x020e0248 0x00000030
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b0800 0xa1390003
+wm 32 0x021b080c 0x00000004
+wm 32 0x021b083c 0x41640158
+wm 32 0x021b0848 0x40403237
+wm 32 0x021b0850 0x40403c33
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b082c 0xf3333333
+wm 32 0x021b0830 0xf3333333
+wm 32 0x021b08c0 0x00944009
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b0004 0x0002002d
+wm 32 0x021b0008 0x1b333030
+wm 32 0x021b000c 0x676b52f3
+wm 32 0x021b0010 0xb66d0b63
+wm 32 0x021b0014 0x01ff00db
+wm 32 0x021b0018 0x00201740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026d2
+wm 32 0x021b0030 0x006b1023
+wm 32 0x021b0040 0x0000004f
+wm 32 0x021b0000 0x84180000
+wm 32 0x021b0890 0x00400000
+wm 32 0x021b001c 0x02008032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00048031
+wm 32 0x021b001c 0x15208030
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b0020 0x00000800
+wm 32 0x021b0818 0x00000227
+wm 32 0x021b0004 0x0002552d
+wm 32 0x021b0404 0x00011006
+wm 32 0x021b001c 0x00000000
diff --git a/arch/arm/boards/nxp-imx6ull-evk/lowlevel.c b/arch/arm/boards/nxp-imx6ull-evk/lowlevel.c
new file mode 100644
index 0000000000..bb2e3623dc
--- /dev/null
+++ b/arch/arm/boards/nxp-imx6ull-evk/lowlevel.c
@@ -0,0 +1,74 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <common.h>
+#include <linux/sizes.h>
+#include <mach/generic.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/imx6-regs.h>
+#include <io.h>
+#include <debug_ll.h>
+#include <mach/esdctl.h>
+#include <asm/cache.h>
+#include <asm/sections.h>
+#include <image-metadata.h>
+
+static inline void setup_uart(void)
+{
+	void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+	void __iomem *uart = IOMEM(MX6_UART1_BASE_ADDR);
+
+	imx6_ungate_all_peripherals();
+
+	writel(0x0, iomuxbase + 0x84);
+	writel(0x1b0b1, iomuxbase + 0x0310);
+
+	writel(0x0, iomuxbase + 0x88);
+	writel(0x1b0b0, iomuxbase + 0x0314);
+
+	writel(0x3, iomuxbase + 0x624);
+
+	imx6_uart_setup(uart);
+
+	pbl_set_putc(imx_uart_putc, uart);
+
+	putc_ll('>');
+}
+
+extern char __dtb_imx6ull_14x14_evk_start[];
+
+static noinline void nxp_imx6_ull(void)
+{
+	imx6ul_barebox_entry(__dtb_imx6ull_14x14_evk_start);
+}
+
+ENTRY_FUNCTION(start_nxp_imx6ull_evk, r0, r1, r2)
+{
+
+	imx6ul_cpu_lowlevel_init();
+
+	arm_setup_stack(0x00910000 - 8);
+
+	arm_early_mmu_cache_invalidate();
+
+	relocate_to_current_adr();
+	setup_c();
+
+	setup_uart();
+
+	/* disable all watchdog powerdown counters */
+	writew(0x0, IOMEM(MX6_WDOG1_BASE_ADDR + 0x8));
+	writew(0x0, IOMEM(MX6_WDOG2_BASE_ADDR + 0x8));
+	writew(0x0, IOMEM(MX6ULL_WDOG3_BASE_ADDR + 0x8));
+
+	nxp_imx6_ull();
+}