diff options
Diffstat (limited to 'arch/arm/boards/variscite-som-mx7')
| -rw-r--r-- | arch/arm/boards/variscite-som-mx7/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/boards/variscite-som-mx7/board.c | 25 | ||||
| -rw-r--r-- | arch/arm/boards/variscite-som-mx7/flash-header.imxcfg | 100 | ||||
| -rw-r--r-- | arch/arm/boards/variscite-som-mx7/lowlevel.c | 44 |
4 files changed, 173 insertions, 0 deletions
diff --git a/arch/arm/boards/variscite-som-mx7/Makefile b/arch/arm/boards/variscite-som-mx7/Makefile new file mode 100644 index 0000000000..5b7f460c6d --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only +# SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/variscite-som-mx7/board.c b/arch/arm/boards/variscite-som-mx7/board.c new file mode 100644 index 0000000000..005228d107 --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/board.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> + +#include <common.h> +#include <deep-probe.h> +#include <mach/imx/bbu.h> + +static int var_som_mx7_probe(struct device_d *dev) +{ + imx7_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", BBU_HANDLER_FLAG_DEFAULT); + return 0; +} + +static const struct of_device_id var_som_mx7_of_match[] = { + { .compatible = "variscite,var-som-mx7" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(var_som_mx7_of_match); + +static struct driver_d var_som_mx7_board_driver = { + .name = "board-var-som-mx7", + .probe = var_som_mx7_probe, + .of_compatible = DRV_OF_COMPAT(var_som_mx7_of_match), +}; +postcore_platform_driver(var_som_mx7_board_driver); diff --git a/arch/arm/boards/variscite-som-mx7/flash-header.imxcfg b/arch/arm/boards/variscite-som-mx7/flash-header.imxcfg new file mode 100644 index 0000000000..a8ed640cb2 --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/flash-header.imxcfg @@ -0,0 +1,100 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * SPDX-FileCopyrightText: 2014-2016 Freescale Semiconductor, Inc. + * SPDX-FileCopyrightText: 2016 Variscite Ltd. + * SPDX-FileCopyrightText: 2022 Gossen Metrawatt GmbH + * SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> + */ + +soc imx7 +loadaddr 0x80000000 +ivtofs 0x400 + +#include <mach/imx/imx7-ddr-regs.h> + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Change DDR freq. to 400Mhz */ +wm 32 0x30360070 0x00703021 +wm 32 0x30360090 0x00000000 +wm 32 0x30360070 0x00603021 +check 32 until_all_bits_set 0x30360070 0x80000000 +wm 32 0x30389880 0x00000001 + + +wm 32 0x30340004 0x4F400005 /* Enable OCRAM EPDC */ +/* Clear then set bit30 to ensure exit from DDR retention */ +wm 32 0x30360388 0x40000000 +wm 32 0x30360384 0x40000000 + +wm 32 0x30391000 0x00000002 /* deassert presetn */ + +/* ddrc */ +wm 32 0x307a0000 0x01040001 /* mstr */ +wm 32 0x307a01a0 0x80400003 /* dfiupd0 */ +wm 32 0x307a01a4 0x00100020 /* dfiupd1 */ +wm 32 0x307a01a8 0x80100004 /* dfiupd2 */ +wm 32 0x307a0064 0x00400046 /* rfshtmg */ +wm 32 0x307a0490 0x00000001 /* pctrl_0 */ +wm 32 0x307a00d0 0x00020083 /* init0 */ +wm 32 0x307a00d4 0x00690000 /* init1 */ +wm 32 0x307a00dc 0x09300004 /* init3 */ +wm 32 0x307a00e0 0x04080000 /* init4 */ +wm 32 0x307a00e4 0x00100004 /* init5 */ +wm 32 0x307a00f4 0x0000033f /* rankctl */ +wm 32 0x307a0100 0x09081109 /* dramtmg0 */ +wm 32 0x307a0104 0x0007020d /* dramtmg1 */ +wm 32 0x307a0108 0x03040407 /* dramtmg2 */ +wm 32 0x307a010c 0x00002006 /* dramtmg3 */ +wm 32 0x307a0110 0x04020205 /* dramtmg4 */ +wm 32 0x307a0114 0x03030202 /* dramtmg5 */ +wm 32 0x307a0120 0x00000803 /* dramtmg8 */ +wm 32 0x307a0180 0x00800020 /* zqctl0 */ +wm 32 0x307a0190 0x02098204 /* dfitmg0 */ +wm 32 0x307a0194 0x00030303 /* dfitmg1 */ +wm 32 0x307a0200 0x00000016 /* addrmap0 */ +wm 32 0x307a0204 0x00080808 /* addrmap1 */ +wm 32 0x307a0210 0x00000f0f /* addrmap4 */ +wm 32 0x307a0214 0x07070707 /* addrmap5 */ +wm 32 0x307a0218 0x0F070707 /* addrmap6 */ +wm 32 0x307a0240 0x06000604 /* odtcfg */ +wm 32 0x307a0244 0x00000001 /* odtmap */ + +wm 32 0x30391000 0x00000000 /* deassert presetn */ + +/* ddr_phy */ +wm 32 0x30790000 0x17420f40 /* phy_con0 */ +wm 32 0x30790004 0x10210100 /* phy_con1 */ +wm 32 0x30790010 0x00060807 /* phy_con4 */ +wm 32 0x307900b0 0x1010007e /* mdll_con0 */ +wm 32 0x3079009c 0x00000d6e /* drvds_con0 */ +wm 32 0x30790020 0x08080808 /* offset_rd_con0 */ +wm 32 0x30790030 0x08080808 /* offset_wr_con0 */ +wm 32 0x30790050 0x01000010 /* cmd_sdll_con0 (OFFSETD_CON0) */ +wm 32 0x30790050 0x00000010 /* cmd_sdll_con0 (OFFSETD_CON0) */ +wm 32 0x307900c0 0x0e407304 /* zq_con0 */ +wm 32 0x307900c0 0x0e447304 /* zq_con0 */ +wm 32 0x307900c0 0x0e447306 /* zq_con0 */ + +check 32 until_all_bits_set 0x307900c4 0x1 + +wm 32 0x307900c0 0x0e447304 /* zq_con0 */ +wm 32 0x307900c0 0x0e407304 /* zq_con0 */ + + +wm 32 0x30384130 0x00000000 /* Disable Clock */ +wm 32 0x30340020 0x00000178 /* IOMUX_GRP_GRP8 - Start input to PHY */ +wm 32 0x30384130 0x00000002 /* Enable Clock */ +wm 32 0x30790018 0x0000000f /* ddr_phy lp_con0 */ + +check 32 until_all_bits_set 0x307a0004 0x1 diff --git a/arch/arm/boards/variscite-som-mx7/lowlevel.c b/arch/arm/boards/variscite-som-mx7/lowlevel.c new file mode 100644 index 0000000000..ef67fc3b5a --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/lowlevel.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> + +#include <io.h> +#include <common.h> +#include <console.h> +#include <debug_ll.h> + +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> + +#include <linux/sizes.h> + +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/iomux-mx7.h> +#include <mach/imx/imx7-ccm-regs.h> + +static inline void setup_uart(void) +{ + imx7_early_setup_uart_clock(1); + + imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX); + + imx7_uart_setup_ll(); + + putc_ll('>'); +} + +ENTRY_FUNCTION_WITHSTACK(start_gome_e143_01, 0, r0, r1, r2) +{ + extern char __dtb_imx7d_gome_e143_01_start[]; + + imx7_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + relocate_to_current_adr(); + setup_c(); + + imx7d_barebox_entry(__dtb_imx7d_gome_e143_01_start + get_runtime_offset()); +} |