diff options
Diffstat (limited to 'arch/arm/mach-imx/include/mach')
| -rw-r--r-- | arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg | 41 | ||||
| -rw-r--r-- | arch/arm/mach-imx/include/mach/vf610-ddrmc-regs.h | 24 |
2 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg b/arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg new file mode 100644 index 0000000000..e9d5ab0ca2 --- /dev/null +++ b/arch/arm/mach-imx/include/mach/flash-header/vf610-ddr-phy-default.imxcfg @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * VFxxx shared DDR PHY DCD code. Intended use is to share code + * between all board that copy VF610 Tower Board DDR reference + * layout/design + * + * Copyright (C) 2018 Zodiac Inflight Innovations + */ + +#define DDRMC_PHY_DQ_TIMING 0x00002613 +#define DDRMC_PHY_DQS_TIMING 0x00002615 +#define DDRMC_PHY_CTRL 0x00210000 +#define DDRMC_PHY_MASTER_CTRL 0x0001012a +#define DDRMC_PHY_SLAVE_CTRL 0x00002000 +#define DDRMC_PHY_OFF 0x00000000 +#define DDRMC_PHY_PROC_PAD_ODT 0x00010101 +#define DDRMC_PHY50_DDR3_MODE_EN_SW_HALF_CYCLE 0x00001100 + + +wm 32 DDRMC_PHY00 DDRMC_PHY_DQ_TIMING +wm 32 DDRMC_PHY16 DDRMC_PHY_DQ_TIMING +wm 32 DDRMC_PHY32 DDRMC_PHY_DQ_TIMING + +wm 32 DDRMC_PHY01 DDRMC_PHY_DQS_TIMING +wm 32 DDRMC_PHY17 DDRMC_PHY_DQS_TIMING + +wm 32 DDRMC_PHY02 DDRMC_PHY_CTRL +wm 32 DDRMC_PHY18 DDRMC_PHY_CTRL +wm 32 DDRMC_PHY34 DDRMC_PHY_CTRL + +wm 32 DDRMC_PHY03 DDRMC_PHY_MASTER_CTRL +wm 32 DDRMC_PHY19 DDRMC_PHY_MASTER_CTRL +wm 32 DDRMC_PHY35 DDRMC_PHY_MASTER_CTRL + +wm 32 DDRMC_PHY04 DDRMC_PHY_SLAVE_CTRL +wm 32 DDRMC_PHY20 DDRMC_PHY_SLAVE_CTRL +wm 32 DDRMC_PHY36 DDRMC_PHY_SLAVE_CTRL + +wm 32 DDRMC_PHY49 DDRMC_PHY_OFF +wm 32 DDRMC_PHY50 DDRMC_PHY50_DDR3_MODE_EN_SW_HALF_CYCLE +wm 32 DDRMC_PHY52 DDRMC_PHY_PROC_PAD_ODT diff --git a/arch/arm/mach-imx/include/mach/vf610-ddrmc-regs.h b/arch/arm/mach-imx/include/mach/vf610-ddrmc-regs.h new file mode 100644 index 0000000000..ac2e4a4f42 --- /dev/null +++ b/arch/arm/mach-imx/include/mach/vf610-ddrmc-regs.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * VFxxx DDRMC register addresses definitions for use in DCD + * + * Copyright (C) 2018 Zodiac Inflight Innovations + */ + +#define DDRMC_PHY00 0x400ae400 +#define DDRMC_PHY01 0x400ae404 +#define DDRMC_PHY02 0x400ae408 +#define DDRMC_PHY03 0x400ae40c +#define DDRMC_PHY04 0x400ae410 +#define DDRMC_PHY16 0x400ae440 +#define DDRMC_PHY17 0x400ae444 +#define DDRMC_PHY18 0x400ae448 +#define DDRMC_PHY19 0x400ae44c +#define DDRMC_PHY20 0x400ae450 +#define DDRMC_PHY32 0x400ae480 +#define DDRMC_PHY34 0x400ae488 +#define DDRMC_PHY35 0x400ae48c +#define DDRMC_PHY36 0x400ae490 +#define DDRMC_PHY49 0x400ae4c4 +#define DDRMC_PHY50 0x400ae4c8 +#define DDRMC_PHY52 0x400ae4d0 |