diff options
Diffstat (limited to 'arch/arm/mach-imx/include/mach')
| -rw-r--r-- | arch/arm/mach-imx/include/mach/generic.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-imx/include/mach/reset-reason.h | 37 | ||||
| -rw-r--r-- | arch/arm/mach-imx/include/mach/vf610-regs.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-imx/include/mach/vf610.h | 51 |
4 files changed, 92 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h index dedb4bbf06..ad9d9cb022 100644 --- a/arch/arm/mach-imx/include/mach/generic.h +++ b/arch/arm/mach-imx/include/mach/generic.h @@ -36,6 +36,7 @@ int imx51_init(void); int imx53_init(void); int imx6_init(void); int imx7_init(void); +int vf610_init(void); int imx1_devices_init(void); int imx21_devices_init(void); diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h new file mode 100644 index 0000000000..0f644a8c1d --- /dev/null +++ b/arch/arm/mach-imx/include/mach/reset-reason.h @@ -0,0 +1,37 @@ +#ifndef __MACH_RESET_REASON_H__ +#define __MACH_RESET_REASON_H__ + +#include <reset_source.h> + +#define IMX_SRC_SRSR_IPP_RESET BIT(0) +#define IMX_SRC_SRSR_CSU_RESET BIT(2) +#define IMX_SRC_SRSR_IPP_USER_RESET BIT(3) +#define IMX_SRC_SRSR_WDOG1_RESET BIT(4) +#define IMX_SRC_SRSR_JTAG_RESET BIT(5) +#define IMX_SRC_SRSR_JTAG_SW_RESET BIT(6) +#define IMX_SRC_SRSR_WDOG3_RESET BIT(7) +#define IMX_SRC_SRSR_WDOG4_RESET BIT(8) +#define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9) +#define IMX_SRC_SRSR_WARM_BOOT BIT(16) + +#define IMX_SRC_SRSR 0x008 +#define IMX7_SRC_SRSR 0x05c + +#define VF610_SRC_SRSR_SW_RST BIT(18) +#define VF610_SRC_SRSR_RESETB BIT(7) +#define VF610_SRC_SRSR_JTAG_RST BIT(5) +#define VF610_SRC_SRSR_WDOG_M4 BIT(4) +#define VF610_SRC_SRSR_WDOG_A5 BIT(3) +#define VF610_SRC_SRSR_POR_RST BIT(0) + +struct imx_reset_reason { + uint32_t mask; + enum reset_src_type type; + int instance; +}; + +void imx_set_reset_reason(void __iomem *, const struct imx_reset_reason *); + +extern const struct imx_reset_reason imx_reset_reasons[]; + +#endif /* __MACH_RESET_REASON_H__ */ diff --git a/arch/arm/mach-imx/include/mach/vf610-regs.h b/arch/arm/mach-imx/include/mach/vf610-regs.h index 87772ee76d..416b457aff 100644 --- a/arch/arm/mach-imx/include/mach/vf610-regs.h +++ b/arch/arm/mach-imx/include/mach/vf610-regs.h @@ -109,4 +109,7 @@ #define VF610_MSCM_IRSPRC_CP0_EN 1 #define VF610_MSCM_IRSPRC_NUM 112 +#define VF610_MSCM_CPxCOUNT 0x00c +#define VF610_MSCM_CPxCFG1 0x014 + #endif diff --git a/arch/arm/mach-imx/include/mach/vf610.h b/arch/arm/mach-imx/include/mach/vf610.h new file mode 100644 index 0000000000..6d00d2e457 --- /dev/null +++ b/arch/arm/mach-imx/include/mach/vf610.h @@ -0,0 +1,51 @@ +#ifndef __MACH_VF610_H +#define __MACH_VF610_H + +#include <io.h> +#include <mach/generic.h> +#include <mach/vf610-regs.h> +#include <mach/revision.h> + +#define VF610_CPUTYPE_VFx10 0x010 + +#define VF610_CPUTYPE_VF610 0x610 +#define VF610_CPUTYPE_VF600 0x600 +#define VF610_CPUTYPE_VF510 0x510 +#define VF610_CPUTYPE_VF500 0x500 + +#define VF610_ROM_VERSION_OFFSET 0x80 + +static inline int __vf610_cpu_type(void) +{ + void __iomem *mscm = IOMEM(VF610_MSCM_BASE_ADDR); + const u32 cpxcount = readl(mscm + VF610_MSCM_CPxCOUNT); + const u32 cpxcfg1 = readl(mscm + VF610_MSCM_CPxCFG1); + int cpu_type; + + cpu_type = cpxcount ? VF610_CPUTYPE_VF600 : VF610_CPUTYPE_VF500; + + return cpxcfg1 ? cpu_type | VF610_CPUTYPE_VFx10 : cpu_type; +} + +static inline int vf610_cpu_type(void) +{ + if (!cpu_is_vf610()) + return 0; + + return __vf610_cpu_type(); +} + +static inline int vf610_cpu_revision(void) +{ + if (!cpu_is_vf610()) + return IMX_CHIP_REV_UNKNOWN; + + /* + * There doesn't seem to be a documented way of retreiving + * silicon revision on VFxxx cpus, so we just report Mask ROM + * version instead + */ + return readl(VF610_ROM_VERSION_OFFSET) & 0xff; +} + +#endif |