diff options
Diffstat (limited to 'arch/arm')
153 files changed, 2298 insertions, 3608 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b227bb78b6..652ac24ce3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -25,20 +25,6 @@ config TEXT_BASE menu "System Type" -config BUILTIN_DTB - bool "link a DTB into the barebox image" - depends on OFTREE - depends on !HAVE_PBL_MULTI_IMAGES - -config BUILTIN_DTB_NAME - string "DTB to build into the barebox image" - depends on BUILTIN_DTB - default "canon-a1100" if MACH_CANON_A1100 - default "imx51-genesi-efika-sb" if MACH_EFIKA_MX_SMARTBOOK - default "versatile-pb" if ARCH_VERSATILE_PB - default "virt2real" if MACH_VIRT2REAL - default "module-mb7707" if MACH_MB7707 - choice prompt "ARM system type" @@ -48,7 +34,6 @@ config ARCH_AT91 select CLKDEV_LOOKUP select HAS_DEBUG_LL select HAVE_CLK - select PINCTRL_AT91 select COMMON_CLK_AT91 if COMMON_CLK_OF_PROVIDER @@ -144,10 +129,7 @@ config ARCH_MXS select COMMON_CLK select CLKDEV_LOOKUP select HAS_DEBUG_LL - -config ARCH_NETX - bool "Hilscher NetX based" - select CPU_ARM926T + select HAVE_PBL_MULTI_IMAGES config ARCH_NOMADIK bool "STMicroelectronics Nomadik" @@ -298,7 +280,6 @@ source "arch/arm/mach-imx/Kconfig" source "arch/arm/mach-layerscape/Kconfig" source "arch/arm/mach-mxs/Kconfig" source "arch/arm/mach-mvebu/Kconfig" -source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-nomadik/Kconfig" source "arch/arm/mach-omap/Kconfig" source "arch/arm/mach-pxa/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5cb46f6613..13e8cee286 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -92,7 +92,6 @@ machine-$(CONFIG_ARCH_LAYERSCAPE) := layerscape machine-$(CONFIG_ARCH_MXS) := mxs machine-$(CONFIG_ARCH_MVEBU) := mvebu machine-$(CONFIG_ARCH_NOMADIK) := nomadik -machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_OMAP) := omap machine-$(CONFIG_ARCH_PXA) := pxa machine-$(CONFIG_ARCH_ROCKCHIP) := rockchip @@ -148,23 +147,7 @@ else LDFLAGS_barebox += -static endif -ifdef CONFIG_IMAGE_COMPRESSION -KBUILD_BINARY := arch/arm/pbl/zbarebox.bin -else KBUILD_BINARY := barebox.bin -endif - -barebox.netx: $(KBUILD_BINARY) - $(Q)scripts/gen_netx_image -i $< -o barebox.netx \ - --sdramctrl=$(CONFIG_NETX_SDRAM_CTRL) \ - --sdramtimctrl=$(CONFIG_NETX_SDRAM_TIMING_CTRL) \ - --memctrl=$(CONFIG_NETX_MEM_CTRL) \ - --entrypoint=$(CONFIG_TEXT_BASE) \ - --cookie=$(CONFIG_NETX_COOKIE); - -ifeq ($(machine-y),netx) -KBUILD_IMAGE := barebox.netx -endif barebox.s5p: $(KBUILD_BINARY) $(Q)scripts/s5p_cksum $< barebox.s5p @@ -267,10 +250,6 @@ CFG_barebox.imximg := $(imxcfg-y) KBUILD_IMAGE := barebox.imximg endif -pbl := arch/arm/pbl -$(pbl)/zbarebox.S $(pbl)/zbarebox.bin $(pbl)/zbarebox: barebox.bin FORCE - $(Q)$(MAKE) $(build)=$(pbl) $@ - archclean: $(MAKE) $(clean)=$(pbl) diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index a814ab8239..6cb40d084b 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_MACH_EDB9315A) += edb93xx/ obj-$(CONFIG_MACH_EDB9315) += edb93xx/ obj-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += efika-mx-smartbook/ obj-$(CONFIG_MACH_EMBEDSKY_E9) += embedsky-e9/ +obj-$(CONFIG_MACH_EMBEST_MARSBOARD) += embest-marsboard/ obj-$(CONFIG_MACH_EMBEST_RIOTBOARD) += embest-riotboard/ obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += eukrea_cpuimx25/ obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27/ @@ -81,7 +82,6 @@ obj-$(CONFIG_MACH_NETGEAR_RN2120) += netgear-rn2120/ obj-$(CONFIG_MACH_NOMADIK_8815NHK) += nhk8815/ obj-$(CONFIG_MACH_NVIDIA_BEAVER) += nvidia-beaver/ obj-$(CONFIG_MACH_NVIDIA_JETSON) += nvidia-jetson-tk1/ -obj-$(CONFIG_MACH_NXDB500) += netx/ obj-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += nxp-imx6ull-evk/ obj-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += nxp-imx8mq-evk/ obj-$(CONFIG_MACH_OMAP343xSDP) += omap343xdsp/ @@ -112,6 +112,7 @@ obj-$(CONFIG_MACH_RPI_COMMON) += raspberry-pi/ obj-$(CONFIG_MACH_SABRELITE) += freescale-mx6-sabrelite/ obj-$(CONFIG_MACH_SABRESD) += freescale-mx6-sabresd/ obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += freescale-mx6sx-sabresdb/ +obj-$(CONFIG_MACH_SAMA5D27_SOM1) += sama5d27-som1/ obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/ obj-$(CONFIG_MACH_SAMA5D3_XPLAINED) += sama5d3_xplained/ obj-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += microchip-ksz9477-evb/ diff --git a/arch/arm/boards/at91sam9263ek/lowlevel_init.c b/arch/arm/boards/at91sam9263ek/lowlevel_init.c index ba0ae39c7f..0bf0e0fb4e 100644 --- a/arch/arm/boards/at91sam9263ek/lowlevel_init.c +++ b/arch/arm/boards/at91sam9263ek/lowlevel_init.c @@ -115,7 +115,7 @@ static void __bare_init at91sam9263ek_init(void *fdt) fdt); } -extern char __dtb_at91sam9263ek_start[]; +extern char __dtb_z_at91sam9263ek_start[]; ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2) { @@ -126,7 +126,7 @@ ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2) arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE); if (IS_ENABLED(CONFIG_MACH_AT91SAM9263EK_DT)) - fdt = __dtb_at91sam9263ek_start + get_runtime_offset(); + fdt = __dtb_z_at91sam9263ek_start + get_runtime_offset(); else fdt = NULL; diff --git a/arch/arm/boards/at91sam9x5ek/lowlevel.c b/arch/arm/boards/at91sam9x5ek/lowlevel.c index 9033597e7c..c1433c8f7e 100644 --- a/arch/arm/boards/at91sam9x5ek/lowlevel.c +++ b/arch/arm/boards/at91sam9x5ek/lowlevel.c @@ -7,7 +7,7 @@ #include <io.h> #include <debug_ll.h> -extern char __dtb_at91sam9x5ek_start[]; +extern char __dtb_z_at91sam9x5ek_start[]; ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2) { @@ -16,7 +16,7 @@ ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2) arm_cpu_lowlevel_init(); arm_setup_stack(AT91SAM9X5_SRAM_BASE + AT91SAM9X5_SRAM_SIZE); - fdt = __dtb_at91sam9x5ek_start + get_runtime_offset(); + fdt = __dtb_z_at91sam9x5ek_start + get_runtime_offset(); barebox_arm_entry(AT91_CHIPSELECT_1, at91sam9x5_get_ddram_size(), fdt); } diff --git a/arch/arm/boards/canon-a1100/lowlevel.c b/arch/arm/boards/canon-a1100/lowlevel.c index 744ce59eaa..b75a1bfa60 100644 --- a/arch/arm/boards/canon-a1100/lowlevel.c +++ b/arch/arm/boards/canon-a1100/lowlevel.c @@ -3,10 +3,16 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> +extern char __dtb_canon_a1100_start[]; + void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) { + void *fdt; + arm_cpu_lowlevel_init(); + fdt = __dtb_canon_a1100_start + get_runtime_offset(); + /* FIXME: can we determine RAM size using CP15 register? * * see http://chdk.setepontos.com/index.php?topic=5980.90 @@ -19,5 +25,6 @@ void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) * The Control Register value (mrc p15, 0, %0, c0, c1, 4) * is 0x00051078. */ - barebox_arm_entry(0x0, SZ_64M, 0); + + barebox_arm_entry(0x0, SZ_64M, fdt); } diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c index 5554b78d6d..ea64fd6f47 100644 --- a/arch/arm/boards/chumby_falconwing/falconwing.c +++ b/arch/arm/boards/chumby_falconwing/falconwing.c @@ -22,6 +22,7 @@ #include <linux/sizes.h> #include <usb/ehci.h> #include <asm/armlinux.h> +#include <asm/barebox-arm.h> #include <io.h> #include <asm/mmu.h> #include <generated/mach-types.h> @@ -65,7 +66,7 @@ static struct fb_videomode falconwing_vmode = { .xres = 320, .yres = 240, .pixclock = KHZ2PICOS(6250), /* max. 10 MHz */ - /* line lenght should be 64 µs */ + /* line length should be 64 µs */ .left_margin = 28, .hsync_len = 24, .right_margin = 28, @@ -278,6 +279,9 @@ static int falconwing_devices_init(void) { int i; + if (barebox_arm_machine() != MACH_TYPE_CHUMBY) + return 0; + /* initizalize gpios */ for (i = 0; i < ARRAY_SIZE(pad_setup); i++) imx_gpio_mode(pad_setup[i]); @@ -300,6 +304,9 @@ device_initcall(falconwing_devices_init); static int falconwing_console_init(void) { + if (barebox_arm_machine() != MACH_TYPE_CHUMBY) + return 0; + barebox_set_model("Chumby Falconwing"); barebox_set_hostname("falconwing"); diff --git a/arch/arm/boards/chumby_falconwing/lowlevel.c b/arch/arm/boards/chumby_falconwing/lowlevel.c index 50bacc620f..0277b5d083 100644 --- a/arch/arm/boards/chumby_falconwing/lowlevel.c +++ b/arch/arm/boards/chumby_falconwing/lowlevel.c @@ -3,9 +3,10 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx23-regs.h> +#include <generated/mach-types.h> -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +ENTRY_FUNCTION(start_chumby_falconwing, r0, r1, r2) { arm_cpu_lowlevel_init(); - barebox_arm_entry(IMX_MEMORY_BASE, SZ_64M, NULL); + barebox_arm_entry(IMX_MEMORY_BASE, SZ_64M, (void *)MACH_TYPE_CHUMBY); } diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c index dcf560432d..29b91e775f 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c +++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c @@ -37,6 +37,7 @@ #include <asm/armlinux.h> #include <asm/mmu.h> +#include <asm/barebox-arm.h> #include <mach/fb.h> @@ -93,6 +94,9 @@ static int cfa10036_devices_init(void) { int i; + if (barebox_arm_machine() != MACH_TYPE_CFA10036) + return 0; + /* initizalize muxing */ for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++) imx_gpio_mode(cfa10036_pads[i]); @@ -115,6 +119,9 @@ device_initcall(cfa10036_devices_init); static int cfa10036_console_init(void) { + if (barebox_arm_machine() != MACH_TYPE_CFA10036) + return 0; + barebox_set_model("crystalfontz-cfa10036"); barebox_set_hostname("cfa10036"); diff --git a/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c b/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c index 50dbcdc150..1bc5947682 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c +++ b/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c @@ -3,9 +3,10 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx28-regs.h> +#include <generated/mach-types.h> -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2d) +ENTRY_FUNCTION(start_cfa10036, r0, r1, r2) { arm_cpu_lowlevel_init(); - barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, NULL); + barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, (void *)MACH_TYPE_CFA10036); } diff --git a/arch/arm/boards/duckbill/board.c b/arch/arm/boards/duckbill/board.c index 3c6ab8e596..13d4ae43cf 100644 --- a/arch/arm/boards/duckbill/board.c +++ b/arch/arm/boards/duckbill/board.c @@ -62,6 +62,9 @@ static struct fsl_usb2_platform_data usb_pdata = { static int duckbill_devices_init(void) { + if (!of_machine_is_compatible("i2se,duckbill")) + return 0; + duckbill_get_ethaddr(); /* must be after registering ocotp */ imx28_usb_phy0_enable(); @@ -74,6 +77,9 @@ fs_initcall(duckbill_devices_init); static int duckbill_console_init(void) { + if (!of_machine_is_compatible("i2se,duckbill")) + return 0; + barebox_set_model("I2SE Duckbill"); barebox_set_hostname("duckbill"); diff --git a/arch/arm/boards/embest-marsboard/Makefile b/arch/arm/boards/embest-marsboard/Makefile new file mode 100644 index 0000000000..ef5219444c --- /dev/null +++ b/arch/arm/boards/embest-marsboard/Makefile @@ -0,0 +1,3 @@ +obj-y += board.o +lwl-y += lowlevel.o +bbenv-y += defaultenv-mars diff --git a/arch/arm/boards/embest-marsboard/board.c b/arch/arm/boards/embest-marsboard/board.c new file mode 100644 index 0000000000..66893434c2 --- /dev/null +++ b/arch/arm/boards/embest-marsboard/board.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de> + * Copyright (C) 2014 Eric Bénard <eric@eukrea.com> + * Copyright (C) 2019 Ahmad Fatoum <a.fatoum@pengutronix.de> + */ + +#include <common.h> +#include <init.h> +#include <envfs.h> +#include <mach/bbu.h> +#include <linux/phy.h> + +static int ar8035_phy_fixup(struct phy_device *dev) +{ + u16 val; + + /* Ar803x phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(dev, 0xd, 0x3); + phy_write(dev, 0xe, 0x805d); + phy_write(dev, 0xd, 0x4003); + + val = phy_read(dev, 0xe); + phy_write(dev, 0xe, val & ~(1 << 8)); + + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ + phy_write(dev, 0xd, 0x7); + phy_write(dev, 0xe, 0x8016); + phy_write(dev, 0xd, 0x4007); + + val = phy_read(dev, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(dev, 0xe, val); + + /* introduce tx clock delay */ + phy_write(dev, 0x1d, 0x5); + val = phy_read(dev, 0x1e); + val |= 0x0100; + phy_write(dev, 0x1e, val); + + return 0; +} + +static int marsboard_device_init(void) +{ + if (!of_machine_is_compatible("embest,imx6q-marsboard")) + return 0; + + barebox_set_hostname("marsboard"); + + phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup); + + imx6_bbu_internal_spi_i2c_register_handler("spiflash", + "/dev/m25p0.barebox", BBU_HANDLER_FLAG_DEFAULT); + + defaultenv_append_directory(defaultenv_mars); + + return 0; +} +device_initcall(marsboard_device_init); diff --git a/arch/arm/boards/embest-marsboard/defaultenv-mars/init/fastboot b/arch/arm/boards/embest-marsboard/defaultenv-mars/init/fastboot new file mode 100644 index 0000000000..9c784fb73b --- /dev/null +++ b/arch/arm/boards/embest-marsboard/defaultenv-mars/init/fastboot @@ -0,0 +1,7 @@ +#!/bin/sh + +if [ "$bootsource" != "serial" ]; then + exit 0 +fi + +usbgadget -a -A "" -b diff --git a/arch/arm/boards/embest-marsboard/flash-header-embest-marsboard.imxcfg b/arch/arm/boards/embest-marsboard/flash-header-embest-marsboard.imxcfg new file mode 100644 index 0000000000..bdaf60cb4a --- /dev/null +++ b/arch/arm/boards/embest-marsboard/flash-header-embest-marsboard.imxcfg @@ -0,0 +1,99 @@ +soc imx6 +loadaddr 0x20000000 +dcdofs 0x400 + +wm 32 0x020e05a8 0x00000030 +wm 32 0x020e05b0 0x00000030 +wm 32 0x020e0524 0x00000030 +wm 32 0x020e051c 0x00000030 +wm 32 0x020e0518 0x00000030 +wm 32 0x020e050c 0x00000030 +wm 32 0x020e05b8 0x00000030 +wm 32 0x020e05c0 0x00000030 +wm 32 0x020e05ac 0x00020030 +wm 32 0x020e05b4 0x00020030 +wm 32 0x020e0528 0x00020030 +wm 32 0x020e0520 0x00020030 +wm 32 0x020e0514 0x00020030 +wm 32 0x020e0510 0x00020030 +wm 32 0x020e05bc 0x00020030 +wm 32 0x020e05c4 0x00020030 +wm 32 0x020e056c 0x00020030 +wm 32 0x020e0578 0x00020030 +wm 32 0x020e0588 0x00020030 +wm 32 0x020e0594 0x00020030 +wm 32 0x020e057c 0x00020030 +wm 32 0x020e0590 0x00003000 +wm 32 0x020e0598 0x00003000 +wm 32 0x020e058c 0x00000000 +wm 32 0x020e059c 0x00003030 +wm 32 0x020e05a0 0x00003030 +wm 32 0x020e0784 0x00000030 +wm 32 0x020e0788 0x00000030 +wm 32 0x020e0794 0x00000030 +wm 32 0x020e079c 0x00000030 +wm 32 0x020e07a0 0x00000030 +wm 32 0x020e07a4 0x00000030 +wm 32 0x020e07a8 0x00000030 +wm 32 0x020e0748 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e0758 0x00000000 +wm 32 0x020e0774 0x00020000 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0798 0x000c0000 +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 +wm 32 0x021b0018 0x00081740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b000c 0x555a7975 +wm 32 0x021b0010 0xff538e64 +wm 32 0x021b0014 0x01ff00db +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x005b0e21 +wm 32 0x021b0008 0x09444040 +wm 32 0x021b0004 0x00025576 +wm 32 0x021b0040 0x00000027 +wm 32 0x021b0000 0x831a0000 +wm 32 0x021b001c 0x04088032 +wm 32 0x021b001c 0x0408803a +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x0000803b +wm 32 0x021b001c 0x00428031 +wm 32 0x021b001c 0x00428039 +wm 32 0x021b001c 0x09408030 +wm 32 0x021b001c 0x09408038 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b001c 0x04008048 +wm 32 0x021b0800 0xa1380003 +wm 32 0x021b4800 0xa1380003 +wm 32 0x021b0020 0x00005800 +wm 32 0x021b0818 0x00022227 +wm 32 0x021b4818 0x00022227 +wm 32 0x021b083c 0x434b0350 +wm 32 0x021b0840 0x034c0359 +wm 32 0x021b483c 0x434b0350 +wm 32 0x021b4840 0x03650348 +wm 32 0x021b0848 0x4436383b +wm 32 0x021b4848 0x39393341 +wm 32 0x021b0850 0x35373933 +wm 32 0x021b4850 0x48254A36 +wm 32 0x021b080c 0x001f001f +wm 32 0x021b0810 0x001f001f +wm 32 0x021b480c 0x00440044 +wm 32 0x021b4810 0x00440044 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b001c 0x00000000 +wm 32 0x021b0404 0x00011006 +wm 32 0x020c4068 0x00c03f3f +wm 32 0x020c406c 0x0030fc03 +wm 32 0x020c4070 0x0fffc000 +wm 32 0x020c4074 0x3ff00000 +wm 32 0x020c4078 0x00fff300 diff --git a/arch/arm/boards/embest-marsboard/lowlevel.c b/arch/arm/boards/embest-marsboard/lowlevel.c new file mode 100644 index 0000000000..9e20a2ec06 --- /dev/null +++ b/arch/arm/boards/embest-marsboard/lowlevel.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Ahmad Fatoum - Pengutronix + */ + +#include <common.h> +#include <io.h> +#include <asm/barebox-arm.h> +#include <mach/imx6.h> +#include <mach/esdctl.h> +#include <mach/iomux-mx6.h> +#include <debug_ll.h> + +static inline void setup_uart(void) +{ + void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR); + + imx6_ungate_all_peripherals(); + + imx_setup_pad(iomuxbase, MX6Q_PAD_EIM_D26__UART2_TXD); + + imx6_uart_setup_ll(); + + putc_ll('>'); +} + +extern char __dtb_z_imx6q_marsboard_start[]; + +ENTRY_FUNCTION(start_imx6q_marsboard, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + fdt = __dtb_z_imx6q_marsboard_start + get_runtime_offset(); + + imx6q_barebox_entry(fdt); +} diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c index 25bf40ce79..76d6f5ba86 100644 --- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c +++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c @@ -56,22 +56,18 @@ struct imx_nand_platform_data nand_info = { .hw_ecc = 1, }; -static struct imx_fb_videomode imxfb_mode = { - .mode = { - .name = "CMO-QVGA", - .refresh = 60, - .xres = 320, - .yres = 240, - .pixclock = KHZ2PICOS(6500), - .hsync_len = 30, - .left_margin = 38, - .right_margin = 20, - .vsync_len = 3, - .upper_margin = 15, - .lower_margin = 4, - }, - .pcr = 0xCAD08B80, - .bpp = 16, +static struct fb_videomode imxfb_mode = { + .name = "CMO-QVGA", + .refresh = 60, + .xres = 320, + .yres = 240, + .pixclock = KHZ2PICOS(6500), + .hsync_len = 30, + .left_margin = 38, + .right_margin = 20, + .vsync_len = 3, + .upper_margin = 15, + .lower_margin = 4, }; static struct imx_fb_platform_data eukrea_cpuimx25_fb_data = { @@ -80,6 +76,8 @@ static struct imx_fb_platform_data eukrea_cpuimx25_fb_data = { .pwmr = 0x00A903FF, .lscr1 = 0x00120300, .dmacr = 0x80040060, + .pcr = 0xCAD08B80, + .bpp = 16, }; struct gpio_led led0 = { diff --git a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c index 63034e2755..52971ed7ee 100644 --- a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c +++ b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c @@ -80,22 +80,19 @@ static struct i2c_board_info i2c_devices[] = { }; #ifdef CONFIG_DRIVER_VIDEO_IMX -static struct imx_fb_videomode imxfb_mode = { - .mode = { - .name = "CMO-QVGA", - .refresh = 60, - .xres = 320, - .yres = 240, - .pixclock = 156000, - .hsync_len = 30, - .left_margin = 38, - .right_margin = 20, - .vsync_len = 3, - .upper_margin = 15, - .lower_margin = 4, - }, - .pcr = 0xFAD08B80, - .bpp = 16,}; +static struct fb_videomode imxfb_mode = { + .name = "CMO-QVGA", + .refresh = 60, + .xres = 320, + .yres = 240, + .pixclock = 156000, + .hsync_len = 30, + .left_margin = 38, + .right_margin = 20, + .vsync_len = 3, + .upper_margin = 15, + .lower_margin = 4, +}; static struct imx_fb_platform_data eukrea_cpuimx27_fb_data = { .mode = &imxfb_mode, @@ -103,6 +100,8 @@ static struct imx_fb_platform_data eukrea_cpuimx27_fb_data = { .pwmr = 0x00A903FF, .lscr1 = 0x00120300, .dmacr = 0x00020010, + .pcr = 0xFAD08B80, + .bpp = 16, }; #endif diff --git a/arch/arm/boards/freescale-mx21-ads/imx21ads.c b/arch/arm/boards/freescale-mx21-ads/imx21ads.c index aa654da494..2c54cd7030 100644 --- a/arch/arm/boards/freescale-mx21-ads/imx21ads.c +++ b/arch/arm/boards/freescale-mx21-ads/imx21ads.c @@ -47,24 +47,20 @@ struct imx_nand_platform_data nand_info = { }; /* Sharp LQ035Q7DB02 QVGA display */ -static struct imx_fb_videomode imx_fb_modedata = { - .mode = { - .name = "Sharp-LQ035Q7", - .refresh = 60, - .xres = 240, - .yres = 320, - .pixclock = 188679, - .left_margin = 6, - .right_margin = 16, - .upper_margin = 8, - .lower_margin = 10, - .hsync_len = 2, - .vsync_len = 1, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .pcr = 0xfb108bc7, - .bpp = 16, +static struct fb_videomode imx_fb_modedata = { + .name = "Sharp-LQ035Q7", + .refresh = 60, + .xres = 240, + .yres = 320, + .pixclock = 188679, + .left_margin = 6, + .right_margin = 16, + .upper_margin = 8, + .lower_margin = 10, + .hsync_len = 2, + .vsync_len = 1, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, }; static struct imx_fb_platform_data imx_fb_data = { @@ -76,6 +72,8 @@ static struct imx_fb_platform_data imx_fb_data = { .pwmr = 0x00a903ff, .lscr1 = 0x00120300, .dmacr = 0x00020008, + .pcr = 0xfb108bc7, + .bpp = 16, }; static int imx21ads_timing_init(void) diff --git a/arch/arm/boards/freescale-mx23-evk/lowlevel.c b/arch/arm/boards/freescale-mx23-evk/lowlevel.c index 13c7435cd6..99e08d88c7 100644 --- a/arch/arm/boards/freescale-mx23-evk/lowlevel.c +++ b/arch/arm/boards/freescale-mx23-evk/lowlevel.c @@ -1,11 +1,12 @@ #include <common.h> #include <linux/sizes.h> +#include <generated/mach-types.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx23-regs.h> -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +ENTRY_FUNCTION(start_imx23_evk, r0, r1, r2) { arm_cpu_lowlevel_init(); - barebox_arm_entry(IMX_MEMORY_BASE, SZ_32M, NULL); + barebox_arm_entry(IMX_MEMORY_BASE, SZ_32M, (void *)MACH_TYPE_MX23EVK); } diff --git a/arch/arm/boards/freescale-mx23-evk/mx23-evk.c b/arch/arm/boards/freescale-mx23-evk/mx23-evk.c index a3587db063..75a7d5a6b4 100644 --- a/arch/arm/boards/freescale-mx23-evk/mx23-evk.c +++ b/arch/arm/boards/freescale-mx23-evk/mx23-evk.c @@ -22,6 +22,7 @@ #include <linux/err.h> #include <asm/armlinux.h> #include <generated/mach-types.h> +#include <asm/barebox-arm.h> #include <mach/imx-regs.h> #include <mach/clock.h> #include <mach/mci.h> @@ -99,6 +100,9 @@ static int mx23_evk_devices_init(void) { int i, rc; + if (barebox_arm_machine() != MACH_TYPE_MX23EVK) + return 0; + /* initizalize gpios */ for (i = 0; i < ARRAY_SIZE(pad_setup); i++) imx_gpio_mode(pad_setup[i]); @@ -126,6 +130,9 @@ device_initcall(mx23_evk_devices_init); static int mx23_evk_console_init(void) { + if (barebox_arm_machine() != MACH_TYPE_MX23EVK) + return 0; + barebox_set_model("Freescale i.MX23 EVK"); barebox_set_hostname("mx23evk"); diff --git a/arch/arm/boards/freescale-mx28-evk/board.c b/arch/arm/boards/freescale-mx28-evk/board.c index 4590ceaa35..92097a2bca 100644 --- a/arch/arm/boards/freescale-mx28-evk/board.c +++ b/arch/arm/boards/freescale-mx28-evk/board.c @@ -34,6 +34,9 @@ static void mx28_evk_get_ethaddr(void) static int mx28_evk_devices_init(void) { + if (!of_machine_is_compatible("fsl,imx28-evk")) + return 0; + mx28_evk_get_ethaddr(); /* must be after registering ocotp */ return 0; diff --git a/arch/arm/boards/guf-neso/board.c b/arch/arm/boards/guf-neso/board.c index 2a64bc14fc..6846ba5793 100644 --- a/arch/arm/boards/guf-neso/board.c +++ b/arch/arm/boards/guf-neso/board.c @@ -62,36 +62,18 @@ static struct imx_nand_platform_data nand_info = { .flash_bbt = 1, }; -static struct imx_fb_videomode imxfb_mode = { - .mode = { - .name = "CPT CLAA070LC0JCT", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = KHZ2PICOS(27000), - .hsync_len = 1, /* DE only sync */ - .left_margin = 50, - .right_margin = 50, - .vsync_len = 1, /* DE only sync */ - .upper_margin = 10, - .lower_margin = 10, - }, - /* - * - TFT style panel - * - clk enabled while idle - * - clock inverted - * - data not inverted - * - data enable high active - */ - .pcr = PCR_TFT | - PCR_COLOR | - PCR_PBSIZ_8 | - PCR_BPIX_16 | - PCR_CLKPOL | - PCR_SCLK_SEL | - PCR_LPPOL | - PCR_FLMPOL, - .bpp = 16, /* TODO 32 bit does not work: The 'green' component is lacking in this mode */ +static struct fb_videomode imxfb_mode = { + .name = "CPT CLAA070LC0JCT", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = KHZ2PICOS(27000), + .hsync_len = 1, /* DE only sync */ + .left_margin = 50, + .right_margin = 50, + .vsync_len = 1, /* DE only sync */ + .upper_margin = 10, + .lower_margin = 10, }; static void neso_fb_enable(int enable) @@ -109,6 +91,22 @@ static struct imx_fb_platform_data neso_fb_data = { .dmacr = (0 << 31) | (4 << 16) | 96, .enable = neso_fb_enable, .framebuffer_ovl = (void *)0xa7f00000, + /* + * - TFT style panel + * - clk enabled while idle + * - clock inverted + * - data not inverted + * - data enable high active + */ + .pcr = PCR_TFT | + PCR_COLOR | + PCR_PBSIZ_8 | + PCR_BPIX_16 | + PCR_CLKPOL | + PCR_SCLK_SEL | + PCR_LPPOL | + PCR_FLMPOL, + .bpp = 16, /* TODO 32 bit does not work: The 'green' component is lacking in this mode */ }; #if defined(CONFIG_USB) && defined(CONFIG_USB_ULPI) diff --git a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c index c06779ddf6..af548b3c53 100644 --- a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c +++ b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c @@ -26,6 +26,7 @@ #include <errno.h> #include <mci.h> #include <asm/armlinux.h> +#include <asm/barebox-arm.h> #include <usb/ehci.h> #include <mach/usb.h> #include <generated/mach-types.h> @@ -33,6 +34,7 @@ #include <mach/clock.h> #include <mach/mci.h> #include <mach/iomux.h> +#include <generated/mach-types.h> static struct mxs_mci_platform_data mci_pdata = { .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, @@ -56,6 +58,9 @@ static struct gpio_led led1 = { static int imx23_olinuxino_devices_init(void) { + if (barebox_arm_machine() != MACH_TYPE_IMX233_OLINUXINO) + return 0; + armlinux_set_architecture(MACH_TYPE_IMX233_OLINUXINO); defaultenv_append_directory(defaultenv_imx233_olinuxino); @@ -76,6 +81,9 @@ device_initcall(imx23_olinuxino_devices_init); static int imx23_olinuxino_console_init(void) { + if (barebox_arm_machine() != MACH_TYPE_IMX233_OLINUXINO) + return 0; + barebox_set_model("Olimex.ltd imx233-olinuxino"); barebox_set_hostname("imx233-olinuxino"); diff --git a/arch/arm/boards/imx233-olinuxino/lowlevel.c b/arch/arm/boards/imx233-olinuxino/lowlevel.c index 07a2a0e293..253cf1257b 100644 --- a/arch/arm/boards/imx233-olinuxino/lowlevel.c +++ b/arch/arm/boards/imx233-olinuxino/lowlevel.c @@ -7,10 +7,11 @@ #include <io.h> #include <debug_ll.h> #include <mach/iomux.h> +#include <generated/mach-types.h> ENTRY_FUNCTION(start_barebox_olinuxino_imx23, r0, r1, r2) { - barebox_arm_entry(IMX_MEMORY_BASE, SZ_64M, NULL); + barebox_arm_entry(IMX_MEMORY_BASE, SZ_64M, (void *)MACH_TYPE_IMX233_OLINUXINO); } static const uint32_t pad_setup[] = { diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c index ebebd58d80..a4d4af57a3 100644 --- a/arch/arm/boards/karo-tx25/board.c +++ b/arch/arm/boards/karo-tx25/board.c @@ -125,24 +125,20 @@ static iomux_v3_cfg_t tx25_lcdc_gpios[] = { MX25_PAD_OE_ACD__OE_ACD, }; -static struct imx_fb_videomode stk5_fb_mode = { - .bpp = 16, - .mode = { - .name = "G-ETV570G0DMU", - .pixclock = 33333, - - .xres = 640, - .yres = 480, - - .hsync_len = 64, - .left_margin = 96, - .right_margin = 80, - - .vsync_len = 3, - .upper_margin = 46, - .lower_margin = 39, - }, - .pcr = PCR_TFT | PCR_COLOR | PCR_FLMPOL | PCR_LPPOL | PCR_SCLK_SEL, +static struct fb_videomode stk5_fb_mode = { + .name = "G-ETV570G0DMU", + .pixclock = 33333, + + .xres = 640, + .yres = 480, + + .hsync_len = 64, + .left_margin = 96, + .right_margin = 80, + + .vsync_len = 3, + .upper_margin = 46, + .lower_margin = 39, }; #define STK5_LCD_BACKLIGHT_GPIO IMX_GPIO_NR(1, 26) @@ -168,6 +164,8 @@ static struct imx_fb_platform_data tx25_fb_data = { .num_modes = 1, .dmacr = 0x80040060, .enable = tx25_fb_enable, + .bpp = 16, + .pcr = PCR_TFT | PCR_COLOR | PCR_FLMPOL | PCR_LPPOL | PCR_SCLK_SEL, }; static int tx25_init_fb(void) diff --git a/arch/arm/boards/karo-tx28/lowlevel.c b/arch/arm/boards/karo-tx28/lowlevel.c index 1a93be747d..84cc681816 100644 --- a/arch/arm/boards/karo-tx28/lowlevel.c +++ b/arch/arm/boards/karo-tx28/lowlevel.c @@ -11,10 +11,11 @@ #include <debug_ll.h> #include <mach/iomux.h> #include <stmp-device.h> +#include <generated/mach-types.h> ENTRY_FUNCTION(start_barebox_karo_tx28, r0, r1, r2) { - barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, NULL); + barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, (void *)MACH_TYPE_TX28); } static const uint32_t iomux_pads[] = { diff --git a/arch/arm/boards/karo-tx28/tx28-stk5.c b/arch/arm/boards/karo-tx28/tx28-stk5.c index ec0826297b..8628db2b25 100644 --- a/arch/arm/boards/karo-tx28/tx28-stk5.c +++ b/arch/arm/boards/karo-tx28/tx28-stk5.c @@ -23,6 +23,7 @@ #include <io.h> #include <net.h> #include <asm/sections.h> +#include <asm/barebox-arm.h> #include <linux/err.h> #include <mach/imx-regs.h> #include <mach/clock.h> @@ -30,6 +31,7 @@ #include <mach/fb.h> #include <mach/ocotp.h> #include <mach/iomux.h> +#include <generated/mach-types.h> static struct mxs_mci_platform_data mci_pdata = { .caps = MMC_CAP_4_BIT_DATA, @@ -347,7 +349,7 @@ static int register_persistent_environment(void) return 0; } -void tx28_get_ethaddr(void) +static void tx28_get_ethaddr(void) { u32 buf[2]; /* to make use of cpu_to_be32 */ u32 ethaddr[2]; @@ -395,6 +397,9 @@ void base_board_init(void) static int tx28kit_console_init(void) { + if (barebox_arm_machine() != MACH_TYPE_TX28) + return 0; + barebox_set_model("Ka-Ro TX28"); barebox_set_hostname("tx28"); diff --git a/arch/arm/boards/karo-tx28/tx28.c b/arch/arm/boards/karo-tx28/tx28.c index 47cac21307..d99083b190 100644 --- a/arch/arm/boards/karo-tx28/tx28.c +++ b/arch/arm/boards/karo-tx28/tx28.c @@ -18,6 +18,7 @@ #include <environment.h> #include <errno.h> #include <asm/armlinux.h> +#include <asm/barebox-arm.h> #include <io.h> #include <generated/mach-types.h> #include <mach/imx-regs.h> @@ -77,6 +78,9 @@ static int tx28_devices_init(void) { int i; + if (barebox_arm_machine() != MACH_TYPE_TX28) + return 0; + /* initizalize gpios */ for (i = 0; i < ARRAY_SIZE(tx28_pad_setup); i++) imx_gpio_mode(tx28_pad_setup[i]); diff --git a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c index 0ce2b299ed..30a5760da6 100644 --- a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c +++ b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c @@ -1,7 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only AND BSD-1-Clause /* + * Copyright (C) 2014, Atmel Corporation * Copyright (C) 2018 Ahmad Fatoum, Pengutronix - * - * Under GPLv2 */ #include <common.h> @@ -9,10 +9,34 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> +#include <mach/at91_pmc_ll.h> #include <mach/hardware.h> +#include <mach/iomux.h> +#include <debug_ll.h> +#include <mach/at91_dbgu.h> -extern char __dtb_at91_microchip_ksz9477_evb_start[]; +/* PCK = 528MHz, MCK = 132MHz */ +#define MASTER_CLOCK 132000000 + +#define sama5d3_pmc_enable_periph_clock(clk) \ + at91_pmc_enable_periph_clock(IOMEM(SAMA5D3_BASE_PMC), clk) + +static void dbgu_init(void) +{ + void __iomem *pio = IOMEM(SAMA5D3_BASE_PIOB); + + sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_PIOB); + + at91_mux_pio3_pin(pio, pin_to_mask(AT91_PIN_PB31), AT91_MUX_PERIPH_A, 0); + + sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_DBGU); + at91_dbgu_setup_ll(IOMEM(AT91_BASE_DBGU1), MASTER_CLOCK, 115200); + + putc_ll('>'); +} + +extern char __dtb_z_at91_microchip_ksz9477_evb_start[]; ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r0, r1, r2) { @@ -22,7 +46,10 @@ ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r0, r1, r2) arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE); - fdt = __dtb_at91_microchip_ksz9477_evb_start + get_runtime_offset(); + if (IS_ENABLED(CONFIG_DEBUG_LL)) + dbgu_init(); + + fdt = __dtb_z_at91_microchip_ksz9477_evb_start + get_runtime_offset(); barebox_arm_entry(SAMA5_DDRCS, SZ_256M, fdt); } diff --git a/arch/arm/boards/module-mb7707/lowlevel.c b/arch/arm/boards/module-mb7707/lowlevel.c index 055e432c1c..fc102e26e1 100644 --- a/arch/arm/boards/module-mb7707/lowlevel.c +++ b/arch/arm/boards/module-mb7707/lowlevel.c @@ -26,9 +26,15 @@ #define MB7707_SRAM_BASE 0x40000000 #define MB7707_SRAM_SIZE SZ_128M +extern char __dtb_module_mb7707_start[]; + void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) { + void *fdt; + arm_cpu_lowlevel_init(); - barebox_arm_entry(MB7707_SRAM_BASE, MB7707_SRAM_SIZE, 0); + fdt = __dtb_module_mb7707_start + get_runtime_offset(); + + barebox_arm_entry(MB7707_SRAM_BASE, MB7707_SRAM_SIZE, fdt); } diff --git a/arch/arm/boards/netx/Makefile b/arch/arm/boards/netx/Makefile deleted file mode 100644 index 90979ace8f..0000000000 --- a/arch/arm/boards/netx/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -obj-y += netx.o -lwl-y += platform.o diff --git a/arch/arm/boards/netx/netx.c b/arch/arm/boards/netx/netx.c deleted file mode 100644 index a9cb6a578c..0000000000 --- a/arch/arm/boards/netx/netx.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - */ - -#include <common.h> -#include <net.h> -#include <init.h> -#include <environment.h> -#include <mach/netx-regs.h> -#include <partition.h> -#include <asm/armlinux.h> -#include <fs.h> -#include <fcntl.h> -#include <generated/mach-types.h> -#include <mach/netx-eth.h> - -struct netx_eth_platform_data eth0_data = { - .xcno = 0, -}; - -struct netx_eth_platform_data eth1_data = { - .xcno = 1, -}; - -static int netx_mem_init(void) -{ - arm_add_mem_device("ram0", 0x80000000, 64 * 1024 * 1024); - - return 0; -} -mem_initcall(netx_mem_init); - -static int netx_devices_init(void) { - add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0xC0000000, 32 * 1024 * 1024, 0); - - add_generic_device("netx-eth", DEVICE_ID_DYNAMIC, NULL, 0, 0, IORESOURCE_MEM, - ð0_data); - add_generic_device("netx-eth", DEVICE_ID_DYNAMIC, NULL, 0, 0, IORESOURCE_MEM, - ð1_data); - - devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); - - /* Do not overwrite primary env for now */ - devfs_add_partition("nor0", 0xc0000, 0x80000, DEVFS_PARTITION_FIXED, "env0"); - - protect_file("/dev/env0", 1); - - armlinux_set_architecture(MACH_TYPE_NXDB500); - - return 0; -} - -device_initcall(netx_devices_init); - -static int netx_console_init(void) -{ - /* configure gpio for serial */ - *(volatile unsigned long *)(0x00100800) = 2; - *(volatile unsigned long *)(0x00100804) = 2; - *(volatile unsigned long *)(0x00100808) = 2; - *(volatile unsigned long *)(0x0010080c) = 2; - - barebox_set_model("Hilscher Netx nxdb500"); - barebox_set_hostname("nxdb500"); - - add_generic_device("netx_serial", DEVICE_ID_DYNAMIC, NULL, NETX_PA_UART0, 0x40, - IORESOURCE_MEM, NULL); - return 0; -} - -console_initcall(netx_console_init); - diff --git a/arch/arm/boards/netx/platform.S b/arch/arm/boards/netx/platform.S deleted file mode 100644 index 95ae46cc6d..0000000000 --- a/arch/arm/boards/netx/platform.S +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Board specific setup info - * - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#include <linux/sizes.h> -#include <asm/barebox-arm-head.h> - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - bl arm_cpu_lowlevel_init - mov r0, #0x80000000 - mov r1, #SZ_64M - mov r2, #0 - b barebox_arm_entry diff --git a/arch/arm/boards/phytec-phycore-imx27/pcm038.c b/arch/arm/boards/phytec-phycore-imx27/pcm038.c index 5ebef516a7..008346faf1 100644 --- a/arch/arm/boards/phytec-phycore-imx27/pcm038.c +++ b/arch/arm/boards/phytec-phycore-imx27/pcm038.c @@ -34,20 +34,26 @@ #define PCM038_GPIO_OTG_STP (GPIO_PORTE + 1) -static struct imx_fb_videomode imxfb_mode = { - .mode = { - .name = "Sharp-LQ035Q7", - .refresh = 60, - .xres = 240, - .yres = 320, - .pixclock = 188679, /* in ps (5.3MHz) */ - .hsync_len = 7, - .left_margin = 5, - .right_margin = 16, - .vsync_len = 1, - .upper_margin = 7, - .lower_margin = 9, - }, +static struct fb_videomode imxfb_mode = { + .name = "Sharp-LQ035Q7", + .refresh = 60, + .xres = 240, + .yres = 320, + .pixclock = 188679, /* in ps (5.3MHz) */ + .hsync_len = 7, + .left_margin = 5, + .right_margin = 16, + .vsync_len = 1, + .upper_margin = 7, + .lower_margin = 9, +}; + +static struct imx_fb_platform_data pcm038_fb_data = { + .mode = &imxfb_mode, + .num_modes = 1, + .pwmr = 0x00a903ff, + .lscr1 = 0x00120300, + .dmacr = 0x00020010, /* * - HSYNC active high * - VSYNC active high @@ -57,16 +63,8 @@ static struct imx_fb_videomode imxfb_mode = { * - data enable low active * - enable sharp mode */ - .pcr = 0xf00080c0, - .bpp = 16, -}; - -static struct imx_fb_platform_data pcm038_fb_data = { - .mode = &imxfb_mode, - .num_modes = 1, - .pwmr = 0x00a903ff, - .lscr1 = 0x00120300, - .dmacr = 0x00020010, + .pcr = 0xf00080c0, + .bpp = 16, }; static const unsigned int pcm038_pins[] = { diff --git a/arch/arm/boards/phytec-som-am335x/board.c b/arch/arm/boards/phytec-som-am335x/board.c index 441d56348c..c25f33ae20 100644 --- a/arch/arm/boards/phytec-som-am335x/board.c +++ b/arch/arm/boards/phytec-som-am335x/board.c @@ -124,15 +124,11 @@ static int physom_devices_init(void) ARRAY_SIZE(nandslots)); am33xx_bbu_emmc_mlo_register_handler("MLO.emmc", "/dev/mmc1"); - if (IS_ENABLED(CONFIG_STATE)) { - state = state_by_name("am335x_phytec_mac_state"); - if (state) - for (state_i = 0; state_i < 2; state_i++) { - state_ret = state_read_mac(state, - eth_names[state_i], &mac[0]); - if (!state_ret && is_valid_ether_addr(&mac[0])) - eth_register_ethaddr(state_i, mac); - } + state = state_by_name("am335x_phytec_mac_state"); + for (state_i = 0; state_i < 2; state_i++) { + state_ret = state_read_mac(state, eth_names[state_i], &mac[0]); + if (!state_ret && is_valid_ether_addr(&mac[0])) + eth_register_ethaddr(state_i, mac); } if (IS_ENABLED(CONFIG_PHYTEC_SOM_AM335X_OF_AUTOENABLE)) { diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c index 730115702b..27a1ad4f66 100644 --- a/arch/arm/boards/phytec-som-imx6/board.c +++ b/arch/arm/boards/phytec-som-imx6/board.c @@ -115,12 +115,16 @@ static int ksz8081_phy_fixup(struct phy_device *phydev) static int phycore_da9062_setup_buck_mode(void) { struct i2c_adapter *adapter = NULL; + struct device_node *pmic_np = NULL; struct i2c_client client; unsigned char value; - int bus = 0; int ret; - adapter = i2c_get_adapter(bus); + pmic_np = of_find_node_by_name(NULL, "pmic@58"); + if (!pmic_np) + return -ENODEV; + + adapter = of_find_i2c_adapter_by_node(pmic_np->parent); if (!adapter) return -ENODEV; diff --git a/arch/arm/boards/sama5d27-som1/Makefile b/arch/arm/boards/sama5d27-som1/Makefile new file mode 100644 index 0000000000..b08c4a93ca --- /dev/null +++ b/arch/arm/boards/sama5d27-som1/Makefile @@ -0,0 +1 @@ +lwl-y += lowlevel.o diff --git a/arch/arm/boards/sama5d27-som1/lowlevel.c b/arch/arm/boards/sama5d27-som1/lowlevel.c new file mode 100644 index 0000000000..7df5a4772d --- /dev/null +++ b/arch/arm/boards/sama5d27-som1/lowlevel.c @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix + */ + +#include <common.h> +#include <init.h> + +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <mach/at91_pmc_ll.h> + +#include <mach/hardware.h> +#include <mach/iomux.h> +#include <debug_ll.h> +#include <mach/at91_dbgu.h> + +#define RGB_LED_GREEN (1 << 0) +#define RGB_LED_RED (1 << 1) +#define RGB_LED_BLUE (1 << 2) + +/* PCK = 492MHz, MCK = 164MHz */ +#define MASTER_CLOCK 164000000 + +#define sama5d2_pmc_enable_periph_clock(clk) \ + at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk) + +static void ek_turn_led(unsigned color) +{ + struct { + unsigned long pio; + unsigned bit; + unsigned color; + } *led, leds[] = { + { .pio = SAMA5D2_BASE_PIOA, .bit = 10, .color = color & RGB_LED_RED }, + { .pio = SAMA5D2_BASE_PIOB, .bit = 1, .color = color & RGB_LED_GREEN }, + { .pio = SAMA5D2_BASE_PIOA, .bit = 31, .color = color & RGB_LED_BLUE }, + { /* sentinel */ }, + }; + + for (led = leds; led->pio; led++) { + at91_mux_gpio4_enable(IOMEM(led->pio), BIT(led->bit)); + at91_mux_gpio4_input(IOMEM(led->pio), BIT(led->bit), false); + at91_mux_gpio4_set(IOMEM(led->pio), BIT(led->bit), led->color); + } +} + +static void ek_dbgu_init(void) +{ + unsigned mck = MASTER_CLOCK / 2; + + sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_PIOD); + + at91_mux_pio4_set_A_periph(IOMEM(SAMA5D2_BASE_PIOD), + pin_to_mask(AT91_PIN_PD3)); /* DBGU TXD */ + + sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_UART1); + + at91_dbgu_setup_ll(IOMEM(SAMA5D2_BASE_UART1), mck, 115200); + + putc_ll('>'); +} + +extern char __dtb_z_at91_sama5d27_som1_ek_start[]; + +ENTRY_FUNCTION(start_sama5d27_som1_ek, r0, r1, r2) +{ + void *fdt; + + arm_cpu_lowlevel_init(); + + arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 16); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + ek_dbgu_init(); + + fdt = __dtb_z_at91_sama5d27_som1_ek_start + get_runtime_offset(); + + ek_turn_led(RGB_LED_GREEN); + barebox_arm_entry(SAMA5_DDRCS, SZ_128M, fdt); +} diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c b/arch/arm/boards/stm32mp157c-dk2/board.c index cbfe21db6a..9cb861af85 100644 --- a/arch/arm/boards/stm32mp157c-dk2/board.c +++ b/arch/arm/boards/stm32mp157c-dk2/board.c @@ -5,7 +5,7 @@ #include <asm/memory.h> #include <mach/stm32.h> -static int dk2_postcore_init(void) +static int dk2_mem_init(void) { if (!of_machine_is_compatible("st,stm32mp157c-dk2")) return 0; @@ -14,4 +14,4 @@ static int dk2_postcore_init(void) return 0; } -mem_initcall(dk2_postcore_init); +mem_initcall(dk2_mem_init); diff --git a/arch/arm/boards/tqmls1046a/defaultenv-tqmls1046a/nv/dev.eth0.mode b/arch/arm/boards/tqmls1046a/defaultenv-tqmls1046a/nv/dev.eth0.mode new file mode 100644 index 0000000000..7a68b11da8 --- /dev/null +++ b/arch/arm/boards/tqmls1046a/defaultenv-tqmls1046a/nv/dev.eth0.mode @@ -0,0 +1 @@ +disabled diff --git a/arch/arm/boards/tqmls1046a/defaultenv-tqmls1046a/nv/dev.eth1.mode b/arch/arm/boards/tqmls1046a/defaultenv-tqmls1046a/nv/dev.eth1.mode new file mode 100644 index 0000000000..7a68b11da8 --- /dev/null +++ b/arch/arm/boards/tqmls1046a/defaultenv-tqmls1046a/nv/dev.eth1.mode @@ -0,0 +1 @@ +disabled diff --git a/arch/arm/boards/versatile/lowlevel.c b/arch/arm/boards/versatile/lowlevel.c index a9ccf1fff5..beab04d234 100644 --- a/arch/arm/boards/versatile/lowlevel.c +++ b/arch/arm/boards/versatile/lowlevel.c @@ -3,8 +3,15 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> +extern char __dtb_versatile_pb_start[]; + void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) { + void *fdt; + arm_cpu_lowlevel_init(); - barebox_arm_entry(0x0, SZ_64M, NULL); + + fdt = __dtb_versatile_pb_start + get_runtime_offset(); + + barebox_arm_entry(0x0, SZ_64M, fdt); } diff --git a/arch/arm/boards/virt2real/lowlevel.c b/arch/arm/boards/virt2real/lowlevel.c index 264ebee893..a72334bb0e 100644 --- a/arch/arm/boards/virt2real/lowlevel.c +++ b/arch/arm/boards/virt2real/lowlevel.c @@ -26,9 +26,15 @@ #define VIRT2REAL_SRAM_BASE 0x82000000 #define VIRT2REAL_SRAM_SIZE SZ_16M +extern char __dtb_virt2real_start[]; + void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) { + void *fdt; + arm_cpu_lowlevel_init(); - barebox_arm_entry(VIRT2REAL_SRAM_BASE, VIRT2REAL_SRAM_SIZE, NULL); + fdt = __dtb_virt2real_start + get_runtime_offset(); + + barebox_arm_entry(VIRT2REAL_SRAM_BASE, VIRT2REAL_SRAM_SIZE, fdt); } diff --git a/arch/arm/boards/zii-common/board.c b/arch/arm/boards/zii-common/board.c index 20ec64d2d4..9a9564e6d1 100644 --- a/arch/arm/boards/zii-common/board.c +++ b/arch/arm/boards/zii-common/board.c @@ -16,6 +16,64 @@ #include <globalvar.h> #include <init.h> #include <fs.h> +#include <net.h> +#include <linux/nvmem-consumer.h> + +static int rdu_eth_register_ethaddr(struct device_node *np) +{ + u8 mac[ETH_ALEN]; + u8 *data; + int i; + + data = nvmem_cell_get_and_read(np, "mac-address", ETH_ALEN); + if (IS_ERR(data)) + return PTR_ERR(data); + /* + * EEPROM stores MAC address in reverse (to what we expect it + * to be) byte order. + */ + for (i = 0; i < ETH_ALEN; i++) + mac[i] = data[ETH_ALEN - i - 1]; + + free(data); + + of_eth_register_ethaddr(np, mac); + + return 0; +} + +static int rdu_ethernet_init(void) +{ + static const char * const aliases[] = { "ethernet0", "ethernet1" }; + struct device_node *np, *root; + int i, ret; + + if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") && + !of_machine_is_compatible("zii,imx6qp-zii-rdu2") && + !of_machine_is_compatible("zii,imx8mq-ultra")) + return 0; + + root = of_get_root_node(); + + for (i = 0; i < ARRAY_SIZE(aliases); i++) { + const char *alias = aliases[i]; + + np = of_find_node_by_alias(root, alias); + if (!np) { + pr_warn("Failed to find %s\n", alias); + continue; + } + + ret = rdu_eth_register_ethaddr(np); + if (ret) { + pr_warn("Failed to register MAC for %s\n", alias); + continue; + } + } + + return 0; +} +late_initcall(rdu_ethernet_init); static int rdu_networkconfig(void) { diff --git a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c index da05b0564c..c7bb044e0d 100644 --- a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c +++ b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c @@ -68,9 +68,9 @@ static unsigned int get_system_type(void) return FIELD_GET(SYSTEM_TYPE, dr); } -extern char __dtb_imx51_zii_rdu1_start[]; -extern char __dtb_imx51_zii_scu2_mezz_start[]; -extern char __dtb_imx51_zii_scu3_esb_start[]; +extern char __dtb_z_imx51_zii_rdu1_start[]; +extern char __dtb_z_imx51_zii_scu2_mezz_start[]; +extern char __dtb_z_imx51_zii_scu3_esb_start[]; ENTRY_FUNCTION(start_imx51_zii_rdu1, r0, r1, r2) { @@ -96,13 +96,13 @@ ENTRY_FUNCTION(start_imx51_zii_rdu1, r0, r1, r2) /* FALLTHROUGH */ case ZII_PLATFORM_IMX51_RDU_REV_B: case ZII_PLATFORM_IMX51_RDU_REV_C: - fdt = __dtb_imx51_zii_rdu1_start; + fdt = __dtb_z_imx51_zii_rdu1_start; break; case ZII_PLATFORM_IMX51_SCU2_MEZZ: - fdt = __dtb_imx51_zii_scu2_mezz_start; + fdt = __dtb_z_imx51_zii_scu2_mezz_start; break; case ZII_PLATFORM_IMX51_SCU3_ESB: - fdt = __dtb_imx51_zii_scu3_esb_start; + fdt = __dtb_z_imx51_zii_scu3_esb_start; break; } diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c index 6adb0b1c6f..63367a419a 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/board.c +++ b/arch/arm/boards/zii-imx6q-rdu2/board.c @@ -159,61 +159,6 @@ static int rdu2_devices_init(void) } device_initcall(rdu2_devices_init); -static int rdu2_eth_register_ethaddr(struct device_node *np) -{ - u8 mac[ETH_ALEN]; - u8 *data; - int i; - - data = nvmem_cell_get_and_read(np, "mac-address", ETH_ALEN); - if (IS_ERR(data)) - return PTR_ERR(data); - /* - * EEPROM stores MAC address in reverse (to what we expect it - * to be) byte order. - */ - for (i = 0; i < ETH_ALEN; i++) - mac[i] = data[ETH_ALEN - i - 1]; - - free(data); - - of_eth_register_ethaddr(np, mac); - - return 0; -} - -static int rdu2_ethernet_init(void) -{ - const char *aliases[] = { "ethernet0", "ethernet1" }; - struct device_node *np, *root; - int i, ret; - - if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") && - !of_machine_is_compatible("zii,imx6qp-zii-rdu2")) - return 0; - - root = of_get_root_node(); - - for (i = 0; i < ARRAY_SIZE(aliases); i++) { - const char *alias = aliases[i]; - - np = of_find_node_by_alias(root, alias); - if (!np) { - pr_warn("Failed to find %s\n", alias); - continue; - } - - ret = rdu2_eth_register_ethaddr(np); - if (ret) { - pr_warn("Failed to register MAC for %s\n", alias); - continue; - } - } - - return 0; -} -late_initcall(rdu2_ethernet_init); - static int rdu2_fixup_egalax_ts(struct device_node *root, void *context) { struct device_node *np; diff --git a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c index 3f5d90b61d..87e634509f 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c +++ b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c @@ -263,8 +263,8 @@ static inline void setup_uart(void) putc_ll('>'); } -extern char __dtb_imx6q_zii_rdu2_start[]; -extern char __dtb_imx6qp_zii_rdu2_start[]; +extern char __dtb_z_imx6q_zii_rdu2_start[]; +extern char __dtb_z_imx6qp_zii_rdu2_start[]; static noinline void rdu2_sram_setup(void) { @@ -304,9 +304,9 @@ ENTRY_FUNCTION(start_imx6_zii_rdu2, r0, r1, r2) rdu2_sram_setup(); if (__imx6_cpu_type() == IMX6_CPUTYPE_IMX6QP) - imx6q_barebox_entry(__dtb_imx6qp_zii_rdu2_start + + imx6q_barebox_entry(__dtb_z_imx6qp_zii_rdu2_start + get_runtime_offset()); else - imx6q_barebox_entry(__dtb_imx6q_zii_rdu2_start + + imx6q_barebox_entry(__dtb_z_imx6q_zii_rdu2_start + get_runtime_offset()); } diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c index 3ad4940da8..3bacfd0c7d 100644 --- a/arch/arm/boards/zii-imx7d-dev/lowlevel.c +++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c @@ -18,8 +18,8 @@ #include <asm/cache.h> #include <mach/esdctl.h> -extern char __dtb_imx7d_zii_rpu2_start[]; -extern char __dtb_imx7d_zii_rmu2_start[]; +extern char __dtb_z_imx7d_zii_rpu2_start[]; +extern char __dtb_z_imx7d_zii_rmu2_start[]; static inline void setup_uart(void) { @@ -97,10 +97,10 @@ ENTRY_FUNCTION(start_zii_imx7d_dev, r0, r1, r2) } /* FALLTHROUGH */ case ZII_PLATFORM_IMX7D_RPU2: - fdt = __dtb_imx7d_zii_rpu2_start; + fdt = __dtb_z_imx7d_zii_rpu2_start; break; case ZII_PLATFORM_IMX7D_RMU2: - fdt = __dtb_imx7d_zii_rmu2_start; + fdt = __dtb_z_imx7d_zii_rmu2_start; break; } diff --git a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c index 7eb8b684d2..795c98cb66 100644 --- a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c +++ b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c @@ -117,8 +117,8 @@ static unsigned int get_system_type(void) return FIELD_GET(SYSTEM_TYPE, dr); } -extern char __dtb_imx8mq_zii_ultra_rmb3_start[]; -extern char __dtb_imx8mq_zii_ultra_zest_start[]; +extern char __dtb_z_imx8mq_zii_ultra_rmb3_start[]; +extern char __dtb_z_imx8mq_zii_ultra_zest_start[]; static __noreturn noinline void zii_imx8mq_dev_start(void) { @@ -155,8 +155,6 @@ static __noreturn noinline void zii_imx8mq_dev_start(void) switch (system_type) { default: if (IS_ENABLED(CONFIG_DEBUG_LL)) { - relocate_to_current_adr(); - setup_c(); puts_ll("\n*********************************\n"); puts_ll("* Unknown system type: "); puthex_ll(system_type); @@ -165,10 +163,10 @@ static __noreturn noinline void zii_imx8mq_dev_start(void) } /* FALLTHROUGH */ case ZII_PLATFORM_IMX8MQ_ULTRA_RMB3: - fdt = __dtb_imx8mq_zii_ultra_rmb3_start; + fdt = __dtb_z_imx8mq_zii_ultra_rmb3_start; break; case ZII_PLATFORM_IMX8MQ_ULTRA_ZEST: - fdt = __dtb_imx8mq_zii_ultra_zest_start; + fdt = __dtb_z_imx8mq_zii_ultra_zest_start; break; } diff --git a/arch/arm/boards/zii-vf610-dev/lowlevel.c b/arch/arm/boards/zii-vf610-dev/lowlevel.c index b320fbc0cf..9b57581d1b 100644 --- a/arch/arm/boards/zii-vf610-dev/lowlevel.c +++ b/arch/arm/boards/zii-vf610-dev/lowlevel.c @@ -75,13 +75,13 @@ static unsigned int get_system_type(void) return pdir; } -extern char __dtb_vf610_zii_dev_rev_b_start[]; -extern char __dtb_vf610_zii_dev_rev_c_start[]; -extern char __dtb_vf610_zii_cfu1_start[]; -extern char __dtb_vf610_zii_ssmb_spu3_start[]; -extern char __dtb_vf610_zii_scu4_aib_start[]; -extern char __dtb_vf610_zii_ssmb_dtu_start[]; -extern char __dtb_vf610_zii_spb4_start[]; +extern char __dtb_z_vf610_zii_dev_rev_b_start[]; +extern char __dtb_z_vf610_zii_dev_rev_c_start[]; +extern char __dtb_z_vf610_zii_cfu1_start[]; +extern char __dtb_z_vf610_zii_ssmb_spu3_start[]; +extern char __dtb_z_vf610_zii_scu4_aib_start[]; +extern char __dtb_z_vf610_zii_ssmb_dtu_start[]; +extern char __dtb_z_vf610_zii_spb4_start[]; ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2) { @@ -105,25 +105,25 @@ ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2) puts_ll("*********************************\n"); } case ZII_PLATFORM_VF610_DEV_REV_B: /* FALLTHROUGH */ - fdt = __dtb_vf610_zii_dev_rev_b_start; + fdt = __dtb_z_vf610_zii_dev_rev_b_start; break; case ZII_PLATFORM_VF610_SCU4_AIB: - fdt = __dtb_vf610_zii_scu4_aib_start; + fdt = __dtb_z_vf610_zii_scu4_aib_start; break; case ZII_PLATFORM_VF610_DEV_REV_C: - fdt = __dtb_vf610_zii_dev_rev_c_start; + fdt = __dtb_z_vf610_zii_dev_rev_c_start; break; case ZII_PLATFORM_VF610_CFU1: - fdt = __dtb_vf610_zii_cfu1_start; + fdt = __dtb_z_vf610_zii_cfu1_start; break; case ZII_PLATFORM_VF610_SSMB_SPU3: - fdt = __dtb_vf610_zii_ssmb_spu3_start; + fdt = __dtb_z_vf610_zii_ssmb_spu3_start; break; case ZII_PLATFORM_VF610_SPB4: - fdt = __dtb_vf610_zii_spb4_start; + fdt = __dtb_z_vf610_zii_spb4_start; break; case ZII_PLATFORM_VF610_SSMB_DTU: - fdt = __dtb_vf610_zii_ssmb_dtu_start; + fdt = __dtb_z_vf610_zii_ssmb_dtu_start; break; } diff --git a/arch/arm/configs/canon-a1100_defconfig b/arch/arm/configs/canon-a1100_defconfig index 9887c4c292..12a3f0af95 100644 --- a/arch/arm/configs/canon-a1100_defconfig +++ b/arch/arm/configs/canon-a1100_defconfig @@ -1,5 +1,4 @@ CONFIG_TEXT_BASE=0x00300000 -CONFIG_BUILTIN_DTB=y CONFIG_ARCH_DIGIC=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_PBL_IMAGE=y diff --git a/arch/arm/configs/cfa10036_defconfig b/arch/arm/configs/cfa10036_defconfig deleted file mode 100644 index 5a4e2ab45d..0000000000 --- a/arch/arm/configs/cfa10036_defconfig +++ /dev/null @@ -1,38 +0,0 @@ -CONFIG_TEXT_BASE=0x43000000 -CONFIG_ARCH_MXS=y -CONFIG_ARCH_IMX28=y -CONFIG_MACH_CFA10036=y -CONFIG_AEABI=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x800000 -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_OFTREE=y -CONFIG_CONSOLE_ACTIVATE_ALL=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/crystalfontz-cfa10036/env" -CONFIG_LONGHELP=y -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_OFTREE=y -# CONFIG_SPI is not set -CONFIG_I2C=y -CONFIG_MCI=y -CONFIG_MCI_STARTUP=y -CONFIG_MCI_MXS=y -CONFIG_FS_EXT4=y -CONFIG_FS_FAT=y -CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/chumbyone_defconfig b/arch/arm/configs/chumbyone_defconfig deleted file mode 100644 index 2b38b8cf88..0000000000 --- a/arch/arm/configs/chumbyone_defconfig +++ /dev/null @@ -1,46 +0,0 @@ -CONFIG_ARCH_MXS=y -CONFIG_MACH_CHUMBY=y -CONFIG_AEABI=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x1000000 -CONFIG_PROMPT="chumby:" -CONFIG_GLOB=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/chumby_falconwing/env" -CONFIG_LONGHELP=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_LOADENV=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_GETOPT=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_SPLASH=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_GPIO=y -CONFIG_NET=y -CONFIG_NET_NFS=y -CONFIG_NET_NETCONSOLE=y -CONFIG_NET_RESOLV=y -CONFIG_NET_USB=y -CONFIG_NET_USB_ASIX=y -# CONFIG_SPI is not set -CONFIG_USB_HOST=y -CONFIG_USB_EHCI=y -CONFIG_VIDEO=y -CONFIG_DRIVER_VIDEO_STM=y -CONFIG_MCI=y -CONFIG_MCI_STARTUP=y -CONFIG_FS_TFTP=y diff --git a/arch/arm/configs/datamodul-edm-qmx6_defconfig b/arch/arm/configs/datamodul-edm-qmx6_defconfig deleted file mode 100644 index b828b38e0f..0000000000 --- a/arch/arm/configs/datamodul-edm-qmx6_defconfig +++ /dev/null @@ -1,88 +0,0 @@ -CONFIG_ARCH_IMX=y -CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x31000 -CONFIG_IMX_MULTI_BOARDS=y -CONFIG_MACH_REALQ7=y -CONFIG_IMX_IIM=y -CONFIG_IMX_IIM_FUSE_BLOW=y -CONFIG_THUMB2_BAREBOX=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_ARM_UNWIND=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x0 -CONFIG_MALLOC_TLSF=y -CONFIG_RELOCATABLE=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_VERBOSE=y -CONFIG_BOOTM_INITRD=y -CONFIG_BOOTM_OFTREE=y -CONFIG_BOOTM_OFTREE_UIMAGE=y -CONFIG_CONSOLE_ACTIVATE_NONE=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/datamodul-edm-qmx6/env" -CONFIG_RESET_SOURCE=y -CONFIG_LONGHELP=y -CONFIG_CMD_IOMEM=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_ARM_MMUINFO=y -# CONFIG_CMD_BOOTU is not set -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_MAGICVAR=y -CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_FILETYPE=y -CONFIG_CMD_LN=y -CONFIG_CMD_MD5SUM=y -CONFIG_CMD_UNCOMPRESS=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MIITOOL=y -CONFIG_CMD_PING=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DETECT=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SPI=y -CONFIG_CMD_WD=y -CONFIG_CMD_BAREBOX_UPDATE=y -CONFIG_CMD_OF_NODE=y -CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OFTREE=y -CONFIG_CMD_TIME=y -CONFIG_NET=y -CONFIG_OFDEVICE=y -CONFIG_OF_BAREBOX_DRIVERS=y -CONFIG_DRIVER_NET_FEC_IMX=y -CONFIG_DRIVER_SPI_IMX=y -CONFIG_I2C=y -CONFIG_I2C_IMX=y -CONFIG_MTD=y -CONFIG_MTD_M25P80=y -CONFIG_DISK_AHCI=y -CONFIG_DISK_AHCI_IMX=y -CONFIG_MCI=y -CONFIG_MCI_IMX_ESDHC=y -CONFIG_MFD_STMPE=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_IMX=y -CONFIG_GPIO_STMPE=y -CONFIG_FS_TFTP=y -CONFIG_FS_NFS=y -CONFIG_FS_FAT=y -CONFIG_FS_FAT_WRITE=y -CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/freescale-mx23-evk_defconfig b/arch/arm/configs/freescale-mx23-evk_defconfig deleted file mode 100644 index 2b12e297b3..0000000000 --- a/arch/arm/configs/freescale-mx23-evk_defconfig +++ /dev/null @@ -1,28 +0,0 @@ -CONFIG_ARCH_MXS=y -CONFIG_AEABI=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_RESET_SOURCE=y -CONFIG_LONGHELP=y -CONFIG_CMD_RESET=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -# CONFIG_SPI is not set -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DFU=y -CONFIG_MCI=y -CONFIG_MCI_STARTUP=y -CONFIG_MCI_MXS=y -CONFIG_FS_EXT4=y -CONFIG_FS_FAT=y -CONFIG_FS_FAT_WRITE=y -CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/freescale-mx28-evk_defconfig b/arch/arm/configs/freescale-mx28-evk_defconfig deleted file mode 100644 index 29db99cee6..0000000000 --- a/arch/arm/configs/freescale-mx28-evk_defconfig +++ /dev/null @@ -1,89 +0,0 @@ -CONFIG_ARCH_MXS=y -CONFIG_ARCH_IMX28=y -CONFIG_MACH_MX28EVK=y -CONFIG_AEABI=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_ARM_UNWIND=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x0 -CONFIG_MALLOC_TLSF=y -CONFIG_KALLSYMS=y -CONFIG_RELOCATABLE=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_MENU=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_VERBOSE=y -CONFIG_BOOTM_INITRD=y -CONFIG_BLSPEC=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_RESET_SOURCE=y -CONFIG_CMD_DMESG=y -CONFIG_LONGHELP=y -CONFIG_CMD_IOMEM=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_LOADENV=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_MAGICVAR=y -CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_CMP=y -CONFIG_CMD_FILETYPE=y -CONFIG_CMD_LN=y -CONFIG_CMD_MD5SUM=y -CONFIG_CMD_UNCOMPRESS=y -CONFIG_CMD_LET=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_READF=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MIITOOL=y -CONFIG_CMD_PING=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_MENUTREE=y -CONFIG_CMD_SPLASH=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_MM=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DETECT=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_NANDTEST=y -CONFIG_CMD_SPI=y -CONFIG_CMD_OF_NODE=y -CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OFTREE=y -CONFIG_NET=y -CONFIG_OFDEVICE=y -CONFIG_OF_BAREBOX_DRIVERS=y -CONFIG_DRIVER_SERIAL_AUART=y -CONFIG_DRIVER_NET_FEC_IMX=y -CONFIG_DRIVER_SPI_MXS=y -CONFIG_MTD=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SST25L=y -CONFIG_NAND=y -CONFIG_NAND_MXS=y -CONFIG_VIDEO=y -CONFIG_DRIVER_VIDEO_STM=y -CONFIG_MCI=y -CONFIG_MCI_STARTUP=y -CONFIG_MCI_MXS=y -CONFIG_MXS_APBH_DMA=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED=y -CONFIG_FS_TFTP=y -CONFIG_FS_FAT=y -CONFIG_FS_FAT_WRITE=y -CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/imx233-olinuxino_defconfig b/arch/arm/configs/imx23_defconfig index 15d15a0b9d..26c63814b9 100644 --- a/arch/arm/configs/imx233-olinuxino_defconfig +++ b/arch/arm/configs/imx23_defconfig @@ -1,11 +1,13 @@ CONFIG_ARCH_MXS=y +CONFIG_MACH_MX23EVK=y +CONFIG_MACH_CHUMBY=y CONFIG_MACH_IMX233_OLINUXINO=y CONFIG_MXS_OCOTP=y CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_ARM_UNWIND=y CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x1000000 +CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y CONFIG_RELOCATABLE=y @@ -16,11 +18,8 @@ CONFIG_MENU=y CONFIG_BOOTM_SHOW_TYPE=y CONFIG_BOOTM_VERBOSE=y CONFIG_BOOTM_INITRD=y -CONFIG_BOOTM_OFTREE=y -CONFIG_BOOTM_OFTREE_UIMAGE=y CONFIG_BLSPEC=y -CONFIG_CONSOLE_ACTIVATE_ALL=y -CONFIG_DEFAULT_COMPRESSION_LZO=y +CONFIG_CONSOLE_ALLOW_COLOR=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_RESET_SOURCE=y CONFIG_CMD_DMESG=y @@ -31,9 +30,9 @@ CONFIG_CMD_MEMINFO=y # CONFIG_CMD_BOOTU is not set CONFIG_CMD_GO=y CONFIG_CMD_RESET=y +CONFIG_CMD_UIMAGE=y CONFIG_CMD_PARTITION=y CONFIG_CMD_EXPORT=y -CONFIG_CMD_DEFAULTENV=y CONFIG_CMD_LOADENV=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_MAGICVAR=y @@ -44,7 +43,6 @@ CONFIG_CMD_FILETYPE=y CONFIG_CMD_LN=y CONFIG_CMD_MD5SUM=y CONFIG_CMD_SHA1SUM=y -CONFIG_CMD_SHA224SUM=y CONFIG_CMD_SHA256SUM=y CONFIG_CMD_UNCOMPRESS=y CONFIG_CMD_LET=y @@ -56,35 +54,42 @@ CONFIG_CMD_PING=y CONFIG_CMD_TFTP=y CONFIG_CMD_ECHO_E=y CONFIG_CMD_EDIT=y -CONFIG_CMD_MENU=y -CONFIG_CMD_MENU_MANAGEMENT=y CONFIG_CMD_MENUTREE=y CONFIG_CMD_SPLASH=y CONFIG_CMD_READLINE=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_CRC=y CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MM=y CONFIG_CMD_CLK=y CONFIG_CMD_DETECT=y CONFIG_CMD_FLASH=y CONFIG_CMD_GPIO=y -CONFIG_CMD_2048=y +CONFIG_CMD_LED=y +CONFIG_CMD_NANDTEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_LED_TRIGGER=y +CONFIG_CMD_USBGADGET=y +CONFIG_CMD_BAREBOX_UPDATE=y CONFIG_CMD_OF_NODE=y CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OF_DISPLAY_TIMINGS=y CONFIG_CMD_OFTREE=y CONFIG_CMD_TIME=y CONFIG_NET=y -CONFIG_NET_NFS=y -CONFIG_NET_NETCONSOLE=y +CONFIG_OFDEVICE=y +CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_DRIVER_SERIAL_AUART=y -CONFIG_NET_USB=y -CONFIG_NET_USB_SMSC95XX=y -# CONFIG_SPI is not set -CONFIG_USB_HOST=y -CONFIG_USB_EHCI=y -CONFIG_USB_STORAGE=y +CONFIG_I2C=y +CONFIG_I2C_GPIO=y +CONFIG_MTD=y +CONFIG_NAND=y +CONFIG_NAND_MXS=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DFU=y +CONFIG_USB_GADGET_SERIAL=y +CONFIG_USB_GADGET_FASTBOOT=y CONFIG_VIDEO=y CONFIG_DRIVER_VIDEO_STM=y CONFIG_MCI=y @@ -92,14 +97,17 @@ CONFIG_MCI_STARTUP=y CONFIG_MCI_MXS=y CONFIG_LED=y CONFIG_LED_GPIO=y +CONFIG_LED_GPIO_OF=y CONFIG_LED_TRIGGERS=y -CONFIG_KEYBOARD_GPIO=y +CONFIG_EEPROM_AT24=y +CONFIG_WATCHDOG=y CONFIG_MXS_APBH_DMA=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED=y CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_NFS=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y CONFIG_FS_FAT_LFN=y -CONFIG_ZLIB=y -CONFIG_LZO_DECOMPRESS=y +CONFIG_FS_UBIFS=y diff --git a/arch/arm/configs/duckbill_defconfig b/arch/arm/configs/imx28_defconfig index c0a3c1753b..58cda937a8 100644 --- a/arch/arm/configs/duckbill_defconfig +++ b/arch/arm/configs/imx28_defconfig @@ -1,6 +1,9 @@ CONFIG_ARCH_MXS=y CONFIG_ARCH_IMX28=y +CONFIG_MACH_TX28=y +CONFIG_MACH_MX28EVK=y CONFIG_MACH_DUCKBILL=y +CONFIG_MACH_CFA10036=y CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_ARM_UNWIND=y @@ -17,12 +20,15 @@ CONFIG_BOOTM_SHOW_TYPE=y CONFIG_BOOTM_VERBOSE=y CONFIG_BOOTM_INITRD=y CONFIG_BLSPEC=y +CONFIG_CONSOLE_ALLOW_COLOR=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_RESET_SOURCE=y CONFIG_CMD_DMESG=y CONFIG_LONGHELP=y CONFIG_CMD_IOMEM=y +CONFIG_CMD_IMD=y CONFIG_CMD_MEMINFO=y +# CONFIG_CMD_BOOTU is not set CONFIG_CMD_GO=y CONFIG_CMD_RESET=y CONFIG_CMD_UIMAGE=y @@ -37,6 +43,8 @@ CONFIG_CMD_CMP=y CONFIG_CMD_FILETYPE=y CONFIG_CMD_LN=y CONFIG_CMD_MD5SUM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_SHA256SUM=y CONFIG_CMD_UNCOMPRESS=y CONFIG_CMD_LET=y CONFIG_CMD_MSLEEP=y @@ -64,18 +72,23 @@ CONFIG_CMD_NANDTEST=y CONFIG_CMD_SPI=y CONFIG_CMD_LED_TRIGGER=y CONFIG_CMD_USBGADGET=y +CONFIG_CMD_BAREBOX_UPDATE=y CONFIG_CMD_OF_NODE=y CONFIG_CMD_OF_PROPERTY=y CONFIG_CMD_OFTREE=y +CONFIG_CMD_TIME=y CONFIG_NET=y CONFIG_OFDEVICE=y CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_DRIVER_SERIAL_AUART=y CONFIG_DRIVER_NET_FEC_IMX=y CONFIG_DRIVER_SPI_MXS=y +CONFIG_I2C=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DFU=y CONFIG_USB_GADGET_SERIAL=y @@ -89,8 +102,15 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_LED_GPIO_OF=y CONFIG_LED_TRIGGERS=y +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_MXS28=y CONFIG_MXS_APBH_DMA=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED=y +CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y +CONFIG_FS_NFS=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y CONFIG_FS_FAT_LFN=y +CONFIG_FS_UBIFS=y diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig index 18c2775687..8b8178a96f 100644 --- a/arch/arm/configs/imx_v7_defconfig +++ b/arch/arm/configs/imx_v7_defconfig @@ -27,6 +27,7 @@ CONFIG_MACH_NITROGEN6=y CONFIG_MACH_SOLIDRUN_MICROSOM=y CONFIG_MACH_TECHNEXION_PICO_HOBBIT=y CONFIG_MACH_TECHNEXION_WANDBOARD=y +CONFIG_MACH_EMBEST_MARSBOARD=y CONFIG_MACH_EMBEST_RIOTBOARD=y CONFIG_MACH_UDOO=y CONFIG_MACH_VARISCITE_MX6=y diff --git a/arch/arm/configs/module-mb7707_defconfig b/arch/arm/configs/module-mb7707_defconfig index 189f295c67..9484c39fb8 100644 --- a/arch/arm/configs/module-mb7707_defconfig +++ b/arch/arm/configs/module-mb7707_defconfig @@ -1,4 +1,3 @@ -CONFIG_BUILTIN_DTB=y CONFIG_ARCH_UEMD=y CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y diff --git a/arch/arm/configs/netx_nxdb500_defconfig b/arch/arm/configs/netx_nxdb500_defconfig deleted file mode 100644 index a8b5ffb7ac..0000000000 --- a/arch/arm/configs/netx_nxdb500_defconfig +++ /dev/null @@ -1,30 +0,0 @@ -CONFIG_TEXT_BASE=0x08f80000 -CONFIG_ARCH_NETX=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_PARTITION=y -# CONFIG_DEFAULT_ENVIRONMENT is not set -CONFIG_LONGHELP=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_LOADENV=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_CRC=y -CONFIG_CMD_FLASH=y -CONFIG_NET=y -CONFIG_DRIVER_NET_NETX=y -CONFIG_MTD=y -CONFIG_DRIVER_CFI=y -CONFIG_CFI_BUFFER_WRITE=y -CONFIG_FS_TFTP=y diff --git a/arch/arm/configs/tqma53_defconfig b/arch/arm/configs/tqma53_defconfig deleted file mode 100644 index 3b0dc306be..0000000000 --- a/arch/arm/configs/tqma53_defconfig +++ /dev/null @@ -1,72 +0,0 @@ -CONFIG_ARCH_IMX=y -CONFIG_IMX_MULTI_BOARDS=y -CONFIG_MACH_TQMA53=y -CONFIG_IMX_IIM=y -CONFIG_IMX_IIM_FUSE_BLOW=y -CONFIG_AEABI=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_ARM_UNWIND=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x0 -CONFIG_MALLOC_TLSF=y -CONFIG_KALLSYMS=y -CONFIG_RELOCATABLE=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_VERBOSE=y -CONFIG_BOOTM_INITRD=y -CONFIG_BOOTM_OFTREE=y -CONFIG_BOOTM_OFTREE_UIMAGE=y -CONFIG_BLSPEC=y -CONFIG_CONSOLE_ACTIVATE_NONE=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_LONGHELP=y -CONFIG_CMD_IOMEM=y -CONFIG_CMD_MEMINFO=y -# CONFIG_CMD_BOOTU is not set -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_MAGICVAR=y -CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_UNCOMPRESS=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MIITOOL=y -CONFIG_CMD_PING=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DETECT=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_OF_NODE=y -CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OFTREE=y -CONFIG_CMD_TIME=y -CONFIG_NET=y -CONFIG_NET_NETCONSOLE=y -CONFIG_OFDEVICE=y -CONFIG_OF_BAREBOX_DRIVERS=y -CONFIG_DRIVER_NET_FEC_IMX=y -# CONFIG_SPI is not set -CONFIG_MCI=y -CONFIG_MCI_STARTUP=y -CONFIG_MCI_IMX_ESDHC=y -CONFIG_FS_TFTP=y -CONFIG_FS_NFS=y -CONFIG_FS_FAT=y -CONFIG_FS_FAT_WRITE=y -CONFIG_FS_FAT_LFN=y -CONFIG_ZLIB=y -CONFIG_LZO_DECOMPRESS=y diff --git a/arch/arm/configs/tx28stk5_defconfig b/arch/arm/configs/tx28stk5_defconfig deleted file mode 100644 index c712975fd9..0000000000 --- a/arch/arm/configs/tx28stk5_defconfig +++ /dev/null @@ -1,94 +0,0 @@ -CONFIG_ARCH_MXS=y -CONFIG_ARCH_IMX28=y -CONFIG_AEABI=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_ARM_UNWIND=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x0 -CONFIG_MALLOC_TLSF=y -CONFIG_KALLSYMS=y -CONFIG_RELOCATABLE=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_MENU=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_VERBOSE=y -CONFIG_BOOTM_INITRD=y -CONFIG_BOOTM_OFTREE=y -CONFIG_BOOTM_OFTREE_UIMAGE=y -CONFIG_BLSPEC=y -CONFIG_IMD=y -CONFIG_PBL_CONSOLE=y -CONFIG_DEFAULT_COMPRESSION_LZO=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_RESET_SOURCE=y -CONFIG_DEBUG_LL=y -CONFIG_CMD_DMESG=y -CONFIG_LONGHELP=y -CONFIG_CMD_IOMEM=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_DEFAULTENV=y -CONFIG_CMD_LOADENV=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_MAGICVAR=y -CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_CMP=y -CONFIG_CMD_FILETYPE=y -CONFIG_CMD_LN=y -CONFIG_CMD_MD5SUM=y -CONFIG_CMD_SHA1SUM=y -CONFIG_CMD_SHA224SUM=y -CONFIG_CMD_SHA256SUM=y -CONFIG_CMD_UNCOMPRESS=y -CONFIG_CMD_LET=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_READF=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MIITOOL=y -CONFIG_CMD_PING=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_MENUTREE=y -CONFIG_CMD_SPLASH=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DETECT=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_2048=y -CONFIG_CMD_OF_NODE=y -CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OF_DISPLAY_TIMINGS=y -CONFIG_CMD_OFTREE=y -CONFIG_CMD_TIME=y -CONFIG_NET=y -CONFIG_DRIVER_SERIAL_AUART=y -CONFIG_DRIVER_NET_FEC_IMX=y -# CONFIG_SPI is not set -CONFIG_MTD=y -CONFIG_VIDEO=y -CONFIG_DRIVER_VIDEO_STM=y -CONFIG_MCI=y -CONFIG_MCI_STARTUP=y -CONFIG_MCI_MXS=y -CONFIG_MXS_APBH_DMA=y -CONFIG_FS_EXT4=y -CONFIG_FS_TFTP=y -CONFIG_FS_NFS=y -CONFIG_FS_FAT=y -CONFIG_FS_FAT_WRITE=y -CONFIG_FS_FAT_LFN=y -CONFIG_ZLIB=y -CONFIG_LZO_DECOMPRESS=y diff --git a/arch/arm/configs/tx53stk5_defconfig b/arch/arm/configs/tx53stk5_defconfig deleted file mode 100644 index 7c3c51defe..0000000000 --- a/arch/arm/configs/tx53stk5_defconfig +++ /dev/null @@ -1,64 +0,0 @@ -CONFIG_TEXT_BASE=0x87f00000 -CONFIG_ARCH_IMX=y -CONFIG_IMX_IIM=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_PBL_IMAGE=y -CONFIG_IMAGE_COMPRESSION_GZIP=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x2000000 -CONFIG_MALLOC_TLSF=y -CONFIG_KALLSYMS=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_MENU=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_VERBOSE=y -CONFIG_BOOTM_INITRD=y -CONFIG_BOOTM_OFTREE=y -CONFIG_BOOTM_OFTREE_UIMAGE=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_RESET_SOURCE=y -CONFIG_LONGHELP=y -CONFIG_CMD_IOMEM=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_MAGICVAR=y -CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_UNCOMPRESS=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_MENU=y -CONFIG_CMD_MENU_MANAGEMENT=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_LED=y -CONFIG_CMD_TIME=y -CONFIG_NET=y -CONFIG_MTD=y -CONFIG_NAND=y -CONFIG_NAND_IMX=y -CONFIG_MCI=y -CONFIG_MCI_STARTUP=y -CONFIG_MCI_IMX_ESDHC=y -CONFIG_LED=y -CONFIG_LED_GPIO=y -CONFIG_FS_TFTP=y -CONFIG_FS_NFS=y -CONFIG_FS_FAT=y -CONFIG_ZLIB=y -CONFIG_LZO_DECOMPRESS=y diff --git a/arch/arm/configs/versatilepb_arm1176_defconfig b/arch/arm/configs/versatilepb_arm1176_defconfig index 284fbd1150..e8c662183a 100644 --- a/arch/arm/configs/versatilepb_arm1176_defconfig +++ b/arch/arm/configs/versatilepb_arm1176_defconfig @@ -1,5 +1,3 @@ -CONFIG_BUILTIN_DTB=y -CONFIG_BUILTIN_DTB_NAME="versatile-pb" CONFIG_ARCH_VERSATILE=y CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x80000 CONFIG_MACH_VERSATILEPB_ARM1176=y diff --git a/arch/arm/configs/versatilepb_defconfig b/arch/arm/configs/versatilepb_defconfig index 61b9ff1c38..14481ea58e 100644 --- a/arch/arm/configs/versatilepb_defconfig +++ b/arch/arm/configs/versatilepb_defconfig @@ -1,5 +1,3 @@ -CONFIG_BUILTIN_DTB=y -CONFIG_BUILTIN_DTB_NAME="versatile-pb" CONFIG_ARCH_VERSATILE=y CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x80000 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y diff --git a/arch/arm/configs/vincell_defconfig b/arch/arm/configs/vincell_defconfig deleted file mode 100644 index a09161df44..0000000000 --- a/arch/arm/configs/vincell_defconfig +++ /dev/null @@ -1,110 +0,0 @@ -CONFIG_ARCH_IMX=y -CONFIG_IMX_MULTI_BOARDS=y -CONFIG_MACH_GUF_VINCELL=y -CONFIG_IMX_IIM=y -CONFIG_IMX_IIM_FUSE_BLOW=y -CONFIG_THUMB2_BAREBOX=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_ARM_UNWIND=y -CONFIG_IMAGE_COMPRESSION_XZKERN=y -CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x0 -CONFIG_MALLOC_TLSF=y -CONFIG_RELOCATABLE=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_VERBOSE=y -CONFIG_BOOTM_INITRD=y -CONFIG_BOOTM_OFTREE=y -CONFIG_BOOTM_OFTREE_UIMAGE=y -CONFIG_BLSPEC=y -CONFIG_CONSOLE_ACTIVATE_NONE=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_POLLER=y -CONFIG_STATE=y -CONFIG_RESET_SOURCE=y -CONFIG_LONGHELP=y -CONFIG_CMD_IOMEM=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_ARM_MMUINFO=y -# CONFIG_CMD_BOOTU is not set -CONFIG_CMD_GO=y -CONFIG_CMD_RESET=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_UBIFORMAT=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_LOADENV=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_MAGICVAR=y -CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_FILETYPE=y -CONFIG_CMD_LN=y -CONFIG_CMD_MD5SUM=y -CONFIG_CMD_UNCOMPRESS=y -CONFIG_CMD_LET=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_READF=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MIITOOL=y -CONFIG_CMD_PING=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_MEMTEST=y -CONFIG_CMD_MM=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DETECT=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SPI=y -CONFIG_CMD_WD=y -CONFIG_CMD_BAREBOX_UPDATE=y -CONFIG_CMD_OF_NODE=y -CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OFTREE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_STATE=y -CONFIG_NET=y -CONFIG_NET_NETCONSOLE=y -CONFIG_OFDEVICE=y -CONFIG_OF_BAREBOX_DRIVERS=y -CONFIG_DRIVER_NET_FEC_IMX=y -CONFIG_AT803X_PHY=y -CONFIG_DRIVER_SPI_IMX=y -CONFIG_I2C=y -CONFIG_I2C_IMX=y -CONFIG_MTD=y -CONFIG_MTD_RAW_DEVICE=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SST25L=y -CONFIG_NAND=y -CONFIG_NAND_ALLOW_ERASE_BAD=y -CONFIG_NAND_IMX=y -CONFIG_NAND_IMX_BBM=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_FASTMAP=y -CONFIG_USB_HOST=y -CONFIG_USB_IMX_CHIPIDEA=y -CONFIG_USB_EHCI=y -CONFIG_USB_ULPI=y -CONFIG_USB_STORAGE=y -CONFIG_MCI=y -CONFIG_MCI_IMX_ESDHC=y -CONFIG_STATE_DRV=y -CONFIG_EEPROM_AT25=y -CONFIG_EEPROM_AT24=y -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_IMX=y -CONFIG_FS_TFTP=y -CONFIG_LZO_DECOMPRESS=y diff --git a/arch/arm/configs/virt2real_defconfig b/arch/arm/configs/virt2real_defconfig index 4fb61cbd0c..814fe69e42 100644 --- a/arch/arm/configs/virt2real_defconfig +++ b/arch/arm/configs/virt2real_defconfig @@ -1,5 +1,4 @@ CONFIG_TEXT_BASE=0x82300000 -CONFIG_BUILTIN_DTB=y CONFIG_ARCH_DAVINCI=y CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile index 97e4eb52e3..e0b16747ad 100644 --- a/arch/arm/cpu/Makefile +++ b/arch/arm/cpu/Makefile @@ -8,7 +8,7 @@ obj-pbl-$(CONFIG_CPU_32v7) += hyp.o AFLAGS_hyp.o :=-Wa,-march=armv7-a -Wa,-mcpu=all AFLAGS_pbl-hyp.o :=-Wa,-march=armv7-a -Wa,-mcpu=all -obj-y += start.o entry.o +obj-y += start.o entry.o entry_ll$(S64).o pbl-$(CONFIG_BOARD_ARM_GENERIC_DT) += board-dt-2nd.o pbl-$(CONFIG_BOARD_ARM_GENERIC_DT_AARCH64) += board-dt-2nd-aarch64.o @@ -47,8 +47,7 @@ AFLAGS_cache-armv8.o :=-Wa,-march=armv8-a obj-pbl-$(CONFIG_CPU_64v8) += cache-armv8.o AFLAGS_pbl-cache-armv8.o :=-Wa,-march=armv8-a -pbl-y += entry.o -pbl-$(CONFIG_PBL_SINGLE_IMAGE) += start-pbl.o -pbl-$(CONFIG_PBL_MULTI_IMAGES) += uncompress.o +pbl-y += entry.o entry_ll$(S64).o +pbl-y += uncompress.o obj-pbl-y += common.o sections.o diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S index 6a8aff8bb1..0f6108426c 100644 --- a/arch/arm/cpu/cache-armv7.S +++ b/arch/arm/cpu/cache-armv7.S @@ -7,7 +7,6 @@ ENTRY(v7_mmu_cache_on) mov r12, lr #ifdef CONFIG_MMU mrc p15, 0, r11, c0, c1, 4 @ read ID_MMFR0 - tst r11, #0xf @ VMSA mov r0, #0 dsb @ drain write buffer tst r11, #0xf @ VMSA @@ -21,8 +20,6 @@ ENTRY(v7_mmu_cache_on) orr r0, r0, #1 << 25 @ big-endian page tables #endif orrne r0, r0, #1 @ MMU enabled - movne r1, #-1 - mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif isb mcr p15, 0, r0, c1, c0, 0 @ load control register diff --git a/arch/arm/cpu/cpuinfo.c b/arch/arm/cpu/cpuinfo.c index 1ba3b4379c..ff6e1eb87b 100644 --- a/arch/arm/cpu/cpuinfo.c +++ b/arch/arm/cpu/cpuinfo.c @@ -76,8 +76,6 @@ static int do_cpuinfo(int argc, char *argv[]) : "=r" (cache) : : "memory"); - - cr = get_cr(); #else __asm__ __volatile__( "mrc p15, 0, %0, c0, c0, 0 @ read control reg\n" @@ -90,13 +88,8 @@ static int do_cpuinfo(int argc, char *argv[]) : "=r" (cache) : : "memory"); - - __asm__ __volatile__( - "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n" - : "=r" (cr) - : - : "memory"); #endif + cr = get_cr(); switch (mainid >> 24) { case 0x41: diff --git a/arch/arm/cpu/dtb.c b/arch/arm/cpu/dtb.c index b9390b46e6..1ba5aa415e 100644 --- a/arch/arm/cpu/dtb.c +++ b/arch/arm/cpu/dtb.c @@ -36,12 +36,6 @@ static int of_arm_init(void) if (fdt) pr_debug("using boarddata provided DTB\n"); - /* Next see if we have a builtin dtb */ - if (!fdt && IS_ENABLED(CONFIG_BUILTIN_DTB)) { - fdt = __dtb_start; - pr_debug("using internal DTB\n"); - } - if (!fdt) { pr_debug("No DTB found\n"); return 0; diff --git a/arch/arm/cpu/entry.c b/arch/arm/cpu/entry.c index 30df95f078..0b447de801 100644 --- a/arch/arm/cpu/entry.c +++ b/arch/arm/cpu/entry.c @@ -24,16 +24,19 @@ * be fine. */ +/* + * It can be hard to convince GCC to not use old stack pointer after + * we modify it with arm_setup_stack() on ARM64, so we implement the + * low level details in assembly + */ +void __noreturn __barebox_arm_entry(unsigned long membase, + unsigned long memsize, + void *boarddata, + unsigned long sp); + void NAKED __noreturn barebox_arm_entry(unsigned long membase, - unsigned long memsize, void *boarddata) + unsigned long memsize, void *boarddata) { - arm_setup_stack(arm_mem_stack_top(membase, membase + memsize)); - arm_early_mmu_cache_invalidate(); - - if (IS_ENABLED(CONFIG_PBL_MULTI_IMAGES)) - barebox_multi_pbl_start(membase, memsize, boarddata); - else if (IS_ENABLED(CONFIG_PBL_SINGLE_IMAGE)) - barebox_single_pbl_start(membase, memsize, boarddata); - else - barebox_non_pbl_start(membase, memsize, boarddata); + __barebox_arm_entry(membase, memsize, boarddata, + arm_mem_stack_top(membase, membase + memsize)); } diff --git a/arch/arm/cpu/entry.h b/arch/arm/cpu/entry.h index f0163a34f7..18110eadf3 100644 --- a/arch/arm/cpu/entry.h +++ b/arch/arm/cpu/entry.h @@ -7,12 +7,8 @@ void __noreturn barebox_non_pbl_start(unsigned long membase, unsigned long memsize, void *boarddata); -void __noreturn barebox_multi_pbl_start(unsigned long membase, - unsigned long memsize, - void *boarddata); - -void __noreturn barebox_single_pbl_start(unsigned long membase, - unsigned long memsize, - void *boarddata); +void __noreturn barebox_pbl_start(unsigned long membase, + unsigned long memsize, + void *boarddata); #endif diff --git a/arch/arm/cpu/entry_ll.S b/arch/arm/cpu/entry_ll.S new file mode 100644 index 0000000000..8cc7a84f10 --- /dev/null +++ b/arch/arm/cpu/entry_ll.S @@ -0,0 +1,25 @@ +#include <linux/linkage.h> +#include <asm/sections.h> + +/* + * r0: memory base + * r1: memory size + * r2: board data + * r3: new value for SP + */ +.section .text.__barebox_arm_entry +ENTRY(__barebox_arm_entry) + mov sp, r3 + mov r4, r0 + mov r5, r1 + mov r6, r2 + bl arm_early_mmu_cache_invalidate + mov r0, r4 + mov r1, r5 + mov r2, r6 +#if IS_ENABLED(CONFIG_PBL_IMAGE) + b barebox_pbl_start +#else + b barebox_non_pbl_start +#endif +ENDPROC(__barebox_arm_entry) diff --git a/arch/arm/cpu/entry_ll_64.S b/arch/arm/cpu/entry_ll_64.S new file mode 100644 index 0000000000..37e0cb66b5 --- /dev/null +++ b/arch/arm/cpu/entry_ll_64.S @@ -0,0 +1,23 @@ +#include <linux/linkage.h> +#include <asm/sections.h> + +/* + * x0: memory base + * x1: memory size + * x2: board data + * x3: new value for SP + */ +.section .text.__barebox_arm_entry +ENTRY(__barebox_arm_entry) + mov sp, x3 + /* + * arm_early_mmu_cache_invalidate is jsut a call to + * v8_invalidate_icache_all() which doesn't clobber x0, x1 or x2 + */ + bl arm_early_mmu_cache_invalidate +#if IS_ENABLED(CONFIG_PBL_IMAGE) + b barebox_pbl_start +#else + b barebox_non_pbl_start +#endif +ENDPROC(__barebox_arm_entry)
\ No newline at end of file diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c index 2f5876fc46..7c30526b94 100644 --- a/arch/arm/cpu/mmu-early.c +++ b/arch/arm/cpu/mmu-early.c @@ -29,7 +29,12 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize, arm_set_cache_functions(); set_ttbr(ttb); - set_domain(DOMAIN_MANAGER); + + /* For the XN bit to take effect, we can't be using DOMAIN_MANAGER. */ + if (cpu_architecture() >= CPU_ARCH_ARMv7) + set_domain(DOMAIN_CLIENT); + else + set_domain(DOMAIN_MANAGER); /* * This marks the whole address space as uncachable as well as diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 123e19e9e5..158b130b57 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -56,13 +56,14 @@ static inline void tlb_invalidate(void) ); } -#define PTE_FLAGS_CACHED_V7 (PTE_EXT_TEX(1) | PTE_BUFFERABLE | PTE_CACHEABLE) -#define PTE_FLAGS_WC_V7 (PTE_EXT_TEX(1) | PTE_EXT_XN) -#define PTE_FLAGS_UNCACHED_V7 PTE_EXT_XN +#define PTE_FLAGS_CACHED_V7 (PTE_EXT_TEX(1) | PTE_BUFFERABLE | PTE_CACHEABLE | \ + PTE_EXT_AP_URW_SRW) +#define PTE_FLAGS_WC_V7 (PTE_EXT_TEX(1) | PTE_EXT_AP_URW_SRW | PTE_EXT_XN) +#define PTE_FLAGS_UNCACHED_V7 (PTE_EXT_AP_URW_SRW | PTE_EXT_XN) #define PTE_FLAGS_CACHED_V4 (PTE_SMALL_AP_UNO_SRW | PTE_BUFFERABLE | PTE_CACHEABLE) #define PTE_FLAGS_UNCACHED_V4 PTE_SMALL_AP_UNO_SRW -#define PGD_FLAGS_WC_V7 (PMD_SECT_TEX(1) | PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \ - PMD_SECT_XN) +#define PGD_FLAGS_WC_V7 (PMD_SECT_TEX(1) | PMD_SECT_DEF_UNCACHED | \ + PMD_SECT_BUFFERABLE | PMD_SECT_XN) #define PGD_FLAGS_UNCACHED_V7 (PMD_SECT_DEF_UNCACHED | PMD_SECT_XN) /* @@ -445,7 +446,12 @@ void __mmu_init(bool mmu_on) ttb = xmemalign(ARM_TTB_SIZE, ARM_TTB_SIZE); set_ttbr(ttb); - set_domain(DOMAIN_MANAGER); + + /* For the XN bit to take effect, we can't be using DOMAIN_MANAGER. */ + if (cpu_architecture() >= CPU_ARCH_ARMv7) + set_domain(DOMAIN_CLIENT); + else + set_domain(DOMAIN_MANAGER); create_flat_mapping(ttb); __mmu_cache_flush(); @@ -455,11 +461,6 @@ void __mmu_init(bool mmu_on) vectors_init(); - /* - * First remap sdram cached using sections. - * This is to speed up the generation of 2nd level page tables - * below - */ for_each_memory_bank(bank) { create_sections(ttb, bank->start, bank->start + bank->size - 1, PMD_SECT_DEF_CACHED); diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h index c911ee209f..6e7a4c0350 100644 --- a/arch/arm/cpu/mmu.h +++ b/arch/arm/cpu/mmu.h @@ -36,6 +36,7 @@ static inline void set_ttbr(void *ttb) asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/); } +#define DOMAIN_CLIENT 1 #define DOMAIN_MANAGER 3 static inline void set_domain(unsigned val) diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c deleted file mode 100644 index 796239d902..0000000000 --- a/arch/arm/cpu/start-pbl.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * start-pbl.c - * - * Copyright (c) 2010-2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - * Copyright (c) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <init.h> -#include <linux/sizes.h> -#include <pbl.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm-generic/memory_layout.h> -#include <asm/sections.h> -#include <asm/secure.h> -#include <asm/cache.h> -#include <asm/mmu.h> -#include <asm/unaligned.h> - -#include "entry.h" - -unsigned long free_mem_ptr; -unsigned long free_mem_end_ptr; - -void pbl_start(void); - -/* - * First instructions in the pbl image - */ -void __naked __section(.text_head_entry) pbl_start(void) -{ - barebox_arm_head(); -} - -extern void *input_data; -extern void *input_data_end; - -__noreturn void barebox_single_pbl_start(unsigned long membase, - unsigned long memsize, void *boarddata) -{ - unsigned long offset; - unsigned long pg_start, pg_end, pg_len, uncompressed_len; - void __noreturn (*barebox)(unsigned long, unsigned long, void *); - unsigned long endmem = membase + memsize; - unsigned long barebox_base; - - if (IS_ENABLED(CONFIG_PBL_RELOCATABLE)) - relocate_to_current_adr(); - - /* Get offset between linked address and runtime address */ - offset = get_runtime_offset(); - - pg_start = (unsigned long)&input_data + global_variable_offset(); - pg_end = (unsigned long)&input_data_end + global_variable_offset(); - pg_len = pg_end - pg_start; - uncompressed_len = get_unaligned((const u32 *)(pg_start + pg_len - 4)); - - if (IS_ENABLED(CONFIG_RELOCATABLE)) - barebox_base = arm_mem_barebox_image(membase, endmem, uncompressed_len + MAX_BSS_SIZE); - else - barebox_base = TEXT_BASE; - - if (offset && (IS_ENABLED(CONFIG_PBL_FORCE_PIGGYDATA_COPY) || - region_overlap(pg_start, pg_len, barebox_base, pg_len * 4))) { - /* - * copy piggydata binary to its link address - */ - memcpy(&input_data, (void *)pg_start, pg_len); - pg_start = (uint32_t)&input_data; - } - - setup_c(); - - if (IS_ENABLED(CONFIG_MMU_EARLY)) { - unsigned long ttb = arm_mem_ttb(membase, endmem); - mmu_early_enable(membase, memsize, ttb); - } - - free_mem_ptr = arm_mem_early_malloc(membase, endmem); - free_mem_end_ptr = arm_mem_early_malloc_end(membase, endmem); - - pbl_barebox_uncompress((void*)barebox_base, (void *)pg_start, pg_len); - - sync_caches_for_execution(); - - if (IS_ENABLED(CONFIG_THUMB2_BAREBOX)) - barebox = (void *)(barebox_base + 1); - else - barebox = (void *)barebox_base; - - if (IS_ENABLED(CONFIG_CPU_V7) && boot_cpu_mode() == HYP_MODE) - armv7_switch_to_hyp(); - - barebox(membase, memsize, boarddata); -} diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index c97b2770c4..44d974e40e 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -193,7 +193,19 @@ __noreturn void barebox_non_pbl_start(unsigned long membase, uint32_t totalsize = 0; const char *name; - if (blob_is_fdt(boarddata)) { + if ((unsigned long)boarddata < 8192) { + struct barebox_arm_boarddata *bd; + uint32_t machine_type = (unsigned long)boarddata; + unsigned long mem = arm_mem_boarddata(membase, endmem, + sizeof(*bd)); + pr_debug("found machine type %d in boarddata\n", + machine_type); + bd = barebox_boarddata = (void *)mem; + barebox_boarddata_size = sizeof(*bd); + bd->magic = BAREBOX_ARM_BOARDDATA_MAGIC; + bd->machine = machine_type; + malloc_end = mem; + } else if (blob_is_fdt(boarddata)) { totalsize = get_unaligned_be32(boarddata + 4); name = "DTB"; } else if (blob_is_compressed_fdt(boarddata)) { diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c index 4f16af22f8..88d073ebdd 100644 --- a/arch/arm/cpu/uncompress.c +++ b/arch/arm/cpu/uncompress.c @@ -36,14 +36,27 @@ #include "entry.h" +#ifndef CONFIG_HAVE_PBL_MULTI_IMAGES + +void start_pbl(void); + +/* + * First instructions in the pbl image + */ +void __naked __section(.text_head_entry_start_single_pbl) start_pbl(void) +{ + barebox_arm_head(); +} +#endif + unsigned long free_mem_ptr; unsigned long free_mem_end_ptr; extern unsigned char input_data[]; extern unsigned char input_data_end[]; -void __noreturn barebox_multi_pbl_start(unsigned long membase, - unsigned long memsize, void *boarddata) +void __noreturn barebox_pbl_start(unsigned long membase, unsigned long memsize, + void *boarddata) { uint32_t pg_len, uncompressed_len; void __noreturn (*barebox)(unsigned long, unsigned long, void *); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f33e6a4989..294a0bfa55 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1,51 +1,49 @@ -BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_NAME)) -ifneq ($(BUILTIN_DTB),) -obj-dtb-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o -endif - # just to build a built-in.o. Otherwise compilation fails when no devicetree is # created. obj- += dummy.o -pbl-dtb-$(CONFIG_MACH_ADVANTECH_ROM_742X) += imx6dl-advantech-rom-7421.dtb.o -pbl-dtb-$(CONFIG_MACH_AFI_GF) += am335x-afi-gf.dtb.o -pbl-dtb-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o am335x-bone-common.dtb.o -pbl-dtb-$(CONFIG_MACH_CM_FX6) += imx6dl-cm-fx6.dtb.o imx6q-cm-fx6.dtb.o imx6q-utilite.dtb.o -pbl-dtb-$(CONFIG_MACH_DFI_FS700_M60) += imx6q-dfi-fs700-m60-6q.dtb.o imx6dl-dfi-fs700-m60-6s.dtb.o -pbl-dtb-$(CONFIG_MACH_DUCKBILL) += imx28-duckbill.dtb.o -pbl-dtb-$(CONFIG_MACH_KINDLE_MX50) += imx50-kindle-d01100.dtb.o imx50-kindle-d01200.dtb.o imx50-kindle-ey21.dtb.o -pbl-dtb-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o -pbl-dtb-$(CONFIG_MACH_ELTEC_HIPERCAM) += imx6dl-eltec-hipercam.dtb.o -pbl-dtb-$(CONFIG_MACH_EMBEST_RIOTBOARD) += imx6s-riotboard.dtb.o -pbl-dtb-$(CONFIG_MACH_EMBEDSKY_E9) += imx6q-embedsky-e9.dtb.o -pbl-dtb-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o -pbl-dtb-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o imx53-qsrb.dtb.o -pbl-dtb-$(CONFIG_MACH_TX53) += imx53-tx53-xx30.dtb.o imx53-tx53-1011.dtb.o -pbl-dtb-$(CONFIG_MACH_CCMX51) += imx51-ccxmx51.dtb.o -pbl-dtb-$(CONFIG_MACH_CCMX53) += imx53-ccxmx53.dtb.o -pbl-dtb-$(CONFIG_MACH_DIGI_CCIMX6ULSBCPRO) += imx6ul-ccimx6ulsbcpro.dtb.o -pbl-dtb-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o -pbl-dtb-$(CONFIG_MACH_FREESCALE_MX7_SABRESD) += imx7d-sdb.dtb.o -pbl-dtb-$(CONFIG_MACH_GK802) += imx6q-gk802.dtb.o -pbl-dtb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += kirkwood-guruplug-server-plus-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += armada-370-mirabox-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_GRINN_LITEBOARD) += imx6ul-liteboard.dtb.o -pbl-dtb-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o -pbl-dtb-$(CONFIG_MACH_GUF_VINCELL) += imx53-guf-vincell.dtb.o imx53-guf-vincell-lt.dtb.o -pbl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o -pbl-dtb-$(CONFIG_MACH_KONTRON_SAMX6I) += imx6q-samx6i.dtb.o \ +lwl-dtb-$(CONFIG_MACH_ADVANTECH_ROM_742X) += imx6dl-advantech-rom-7421.dtb.o +lwl-dtb-$(CONFIG_MACH_AFI_GF) += am335x-afi-gf.dtb.o +lwl-dtb-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o am335x-bone-common.dtb.o +lwl-dtb-$(CONFIG_MACH_CANON_A1100) += canon-a1100.dtb.o +lwl-dtb-$(CONFIG_MACH_CM_FX6) += imx6dl-cm-fx6.dtb.o imx6q-cm-fx6.dtb.o imx6q-utilite.dtb.o +lwl-dtb-$(CONFIG_MACH_DFI_FS700_M60) += imx6q-dfi-fs700-m60-6q.dtb.o imx6dl-dfi-fs700-m60-6s.dtb.o +lwl-dtb-$(CONFIG_MACH_DUCKBILL) += imx28-duckbill.dtb.o +lwl-dtb-$(CONFIG_MACH_KINDLE_MX50) += imx50-kindle-d01100.dtb.o imx50-kindle-d01200.dtb.o imx50-kindle-ey21.dtb.o +lwl-dtb-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o +lwl-dtb-$(CONFIG_MACH_ELTEC_HIPERCAM) += imx6dl-eltec-hipercam.dtb.o +lwl-dtb-$(CONFIG_MACH_EMBEST_MARSBOARD) += imx6q-marsboard.dtb.o +lwl-dtb-$(CONFIG_MACH_EMBEST_RIOTBOARD) += imx6s-riotboard.dtb.o +lwl-dtb-$(CONFIG_MACH_EMBEDSKY_E9) += imx6q-embedsky-e9.dtb.o +lwl-dtb-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o +lwl-dtb-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o imx53-qsrb.dtb.o +lwl-dtb-$(CONFIG_MACH_TX53) += imx53-tx53-xx30.dtb.o imx53-tx53-1011.dtb.o +lwl-dtb-$(CONFIG_MACH_CCMX51) += imx51-ccxmx51.dtb.o +lwl-dtb-$(CONFIG_MACH_CCMX53) += imx53-ccxmx53.dtb.o +lwl-dtb-$(CONFIG_MACH_DIGI_CCIMX6ULSBCPRO) += imx6ul-ccimx6ulsbcpro.dtb.o +lwl-dtb-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o +lwl-dtb-$(CONFIG_MACH_FREESCALE_MX7_SABRESD) += imx7d-sdb.dtb.o +lwl-dtb-$(CONFIG_MACH_GK802) += imx6q-gk802.dtb.o +lwl-dtb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += kirkwood-guruplug-server-plus-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += armada-370-mirabox-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_GRINN_LITEBOARD) += imx6ul-liteboard.dtb.o +lwl-dtb-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o +lwl-dtb-$(CONFIG_MACH_GUF_VINCELL) += imx53-guf-vincell.dtb.o imx53-guf-vincell-lt.dtb.o +lwl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o +lwl-dtb-$(CONFIG_MACH_KONTRON_SAMX6I) += imx6q-samx6i.dtb.o \ imx6dl-samx6i.dtb.o -pbl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o armada-xp-db-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_MX28EVK) += imx28-evk.dtb.o -pbl-dtb-$(CONFIG_MACH_NETGEAR_RN104) += armada-370-rn104-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_NETGEAR_RN2120) += armada-xp-rn2120-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_NITROGEN6) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o imx6qp-nitrogen6_max.dtb.o -pbl-dtb-$(CONFIG_MACH_NVIDIA_BEAVER) += tegra30-beaver.dtb.o -pbl-dtb-$(CONFIG_MACH_NVIDIA_JETSON) += tegra124-jetson-tk1.dtb.o -pbl-dtb-$(CONFIG_MACH_PCA100) += imx27-phytec-phycard-s-rdk-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o -pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \ +lwl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o armada-xp-db-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_MB7707) += module-mb7707.dtb.o +lwl-dtb-$(CONFIG_MACH_MX28EVK) += imx28-evk.dtb.o +lwl-dtb-$(CONFIG_MACH_NETGEAR_RN104) += armada-370-rn104-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_NETGEAR_RN2120) += armada-xp-rn2120-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_NITROGEN6) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o imx6qp-nitrogen6_max.dtb.o +lwl-dtb-$(CONFIG_MACH_NVIDIA_BEAVER) += tegra30-beaver.dtb.o +lwl-dtb-$(CONFIG_MACH_NVIDIA_JETSON) += tegra124-jetson-tk1.dtb.o +lwl-dtb-$(CONFIG_MACH_PCA100) += imx27-phytec-phycard-s-rdk-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o +lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \ am335x-phytec-phyflex-som-no-spi.dtb.o am335x-phytec-phyflex-som-no-eeprom.dtb.o \ am335x-phytec-phyflex-som-no-spi-no-eeprom.dtb.o \ am335x-phytec-phycore-som-mlo.dtb.o \ @@ -53,7 +51,7 @@ pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am33 am335x-phytec-phycore-som-nand-no-eeprom.dtb.o am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dtb.o \ am335x-phytec-phycore-som-emmc.dtb.o \ am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o -pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \ +lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \ imx6s-phytec-pbab01.dtb.o \ imx6dl-phytec-pbab01.dtb.o \ imx6q-phytec-pbab01.dtb.o \ @@ -71,61 +69,63 @@ pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \ imx6ull-phytec-phycore-som-lc-nand.dtb.o \ imx6ull-phytec-phycore-som-nand.dtb.o \ imx6ull-phytec-phycore-som-emmc.dtb.o -pbl-dtb-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7) += imx7d-phyboard-zeta.dtb.o -pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX8MQ) += imx8mq-phytec-phycore-som.dtb.o -pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_RADXA_ROCK) += rk3188-radxarock.dtb.o -pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += rk3288-phycore-som.dtb.o -pbl-dtb-$(CONFIG_MACH_REALQ7) += imx6q-dmo-edmqmx6.dtb.o -pbl-dtb-$(CONFIG_MACH_RPI) += bcm2835-rpi.dtb.o -pbl-dtb-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2.dtb.o -pbl-dtb-$(CONFIG_MACH_RPI3) += bcm2837-rpi-3.dtb.o -pbl-dtb-$(CONFIG_MACH_RPI_CM3) += bcm2837-rpi-cm3.dtb.o -pbl-dtb-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o -pbl-dtb-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o -pbl-dtb-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o -pbl-dtb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o -pbl-dtb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o -pbl-dtb-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += socfpga_arria10_achilles.dtb.o -pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += socfpga_cyclone5_de0_nano_soc.dtb.o -pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o -pbl-dtb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o \ +lwl-dtb-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7) += imx7d-phyboard-zeta.dtb.o +lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX8MQ) += imx8mq-phytec-phycore-som.dtb.o +lwl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_RADXA_ROCK) += rk3188-radxarock.dtb.o +lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += rk3288-phycore-som.dtb.o +lwl-dtb-$(CONFIG_MACH_REALQ7) += imx6q-dmo-edmqmx6.dtb.o +lwl-dtb-$(CONFIG_MACH_RPI) += bcm2835-rpi.dtb.o +lwl-dtb-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2.dtb.o +lwl-dtb-$(CONFIG_MACH_RPI3) += bcm2837-rpi-3.dtb.o +lwl-dtb-$(CONFIG_MACH_RPI_CM3) += bcm2837-rpi-cm3.dtb.o +lwl-dtb-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o +lwl-dtb-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o +lwl-dtb-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o +lwl-dtb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o +lwl-dtb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o +lwl-dtb-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += socfpga_arria10_achilles.dtb.o +lwl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += socfpga_cyclone5_de0_nano_soc.dtb.o +lwl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o +lwl-dtb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o \ imx6dl-hummingboard2.dtb.o imx6q-hummingboard2.dtb.o \ imx6q-h100.dtb.o -pbl-dtb-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2.dtb.o -pbl-dtb-$(CONFIG_MACH_SCB9328) += imx1-scb9328.dtb.o -pbl-dtb-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o -pbl-dtb-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += imx6ul-pico-hobbit.dtb.o -pbl-dtb-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += imx6ull-14x14-evk.dtb.o -pbl-dtb-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += imx8mq-evk.dtb.o -pbl-dtb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += tegra20-colibri-iris.dtb.o -pbl-dtb-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o -pbl-dtb-$(CONFIG_MACH_TQMA53) += imx53-mba53.dtb.o -pbl-dtb-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o -pbl-dtb-$(CONFIG_MACH_TX25) += imx25-karo-tx25.dtb.o -pbl-dtb-$(CONFIG_MACH_TX6X) += imx6dl-tx6u.dtb.o -pbl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o -pbl-dtb-$(CONFIG_MACH_TURRIS_OMNIA) += armada-385-turris-omnia-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o -pbl-dtb-$(CONFIG_MACH_UDOO_NEO) += imx6sx-udoo-neo-full.dtb.o -pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o -pbl-dtb-$(CONFIG_MACH_VEXPRESS) += vexpress-v2p-ca9.dtb.o -pbl-dtb-$(CONFIG_MACH_VEXPRESS) += vexpress-v2p-ca15.dtb.o -pbl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o -pbl-dtb-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o -pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o -pbl-dtb-$(CONFIG_MACH_ZII_RDU1) += \ +lwl-dtb-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2.dtb.o +lwl-dtb-$(CONFIG_MACH_SCB9328) += imx1-scb9328.dtb.o +lwl-dtb-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o +lwl-dtb-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += imx6ul-pico-hobbit.dtb.o +lwl-dtb-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += imx6ull-14x14-evk.dtb.o +lwl-dtb-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += imx8mq-evk.dtb.o +lwl-dtb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += tegra20-colibri-iris.dtb.o +lwl-dtb-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o +lwl-dtb-$(CONFIG_MACH_TQMA53) += imx53-mba53.dtb.o +lwl-dtb-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o +lwl-dtb-$(CONFIG_MACH_TX25) += imx25-karo-tx25.dtb.o +lwl-dtb-$(CONFIG_MACH_TX6X) += imx6dl-tx6u.dtb.o +lwl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o +lwl-dtb-$(CONFIG_MACH_TURRIS_OMNIA) += armada-385-turris-omnia-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o +lwl-dtb-$(CONFIG_MACH_UDOO_NEO) += imx6sx-udoo-neo-full.dtb.o +lwl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o +lwl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o +lwl-dtb-$(CONFIG_MACH_VERSATILEPB) += versatile-pb.dtb.o +lwl-dtb-$(CONFIG_MACH_VEXPRESS) += vexpress-v2p-ca9.dtb.o +lwl-dtb-$(CONFIG_MACH_VEXPRESS) += vexpress-v2p-ca15.dtb.o +lwl-dtb-$(CONFIG_MACH_VIRT2REAL) += virt2real.dtb.o +lwl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o +lwl-dtb-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o +lwl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o +lwl-dtb-$(CONFIG_MACH_ZII_RDU1) += \ imx51-zii-rdu1.dtb.o \ imx51-zii-scu2-mezz.dtb.o \ imx51-zii-scu3-esb.dtb.o -pbl-dtb-$(CONFIG_MACH_ZII_RDU2) += imx6q-zii-rdu2.dtb.o imx6qp-zii-rdu2.dtb.o -pbl-dtb-$(CONFIG_MACH_ZII_IMX8MQ_DEV) += \ +lwl-dtb-$(CONFIG_MACH_ZII_RDU2) += imx6q-zii-rdu2.dtb.o imx6qp-zii-rdu2.dtb.o +lwl-dtb-$(CONFIG_MACH_ZII_IMX8MQ_DEV) += \ imx8mq-zii-ultra-rmb3.dtb.o \ imx8mq-zii-ultra-zest.dtb.o -pbl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \ +lwl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \ vf610-zii-dev-rev-b.dtb.o \ vf610-zii-dev-rev-c.dtb.o \ vf610-zii-cfu1.dtb.o \ @@ -133,14 +133,15 @@ pbl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \ vf610-zii-scu4-aib.dtb.o \ vf610-zii-spb4.dtb.o \ vf610-zii-ssmb-dtu.dtb.o -pbl-dtb-$(CONFIG_MACH_AT91SAM9263EK_DT) += at91sam9263ek.dtb.o -pbl-dtb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o -pbl-dtb-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o -pbl-dtb-$(CONFIG_MACH_XILINX_ZCU104) += zynqmp-zcu104-revA.dtb.o +lwl-dtb-$(CONFIG_MACH_AT91SAM9263EK_DT) += at91sam9263ek.dtb.o +lwl-dtb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o +lwl-dtb-$(CONFIG_MACH_SAMA5D27_SOM1) += at91-sama5d27_som1_ek.dtb.o +lwl-dtb-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o +lwl-dtb-$(CONFIG_MACH_XILINX_ZCU104) += zynqmp-zcu104-revA.dtb.o -pbl-dtb-$(CONFIG_MACH_ZII_IMX7D_DEV) += imx7d-zii-rpu2.dtb.o imx7d-zii-rmu2.dtb.o -pbl-dtb-$(CONFIG_MACH_WAGO_PFC_AM35XX) += am35xx-pfc-750_820x.dtb.o -pbl-dtb-$(CONFIG_MACH_LS1046ARDB) += fsl-ls1046a-rdb.dtb.o -pbl-dtb-$(CONFIG_MACH_TQMLS1046A) += fsl-tqmls1046a-mbls10xxa.dtb.o +lwl-dtb-$(CONFIG_MACH_ZII_IMX7D_DEV) += imx7d-zii-rpu2.dtb.o imx7d-zii-rmu2.dtb.o +lwl-dtb-$(CONFIG_MACH_WAGO_PFC_AM35XX) += am35xx-pfc-750_820x.dtb.o +lwl-dtb-$(CONFIG_MACH_LS1046ARDB) += fsl-ls1046a-rdb.dtb.o +lwl-dtb-$(CONFIG_MACH_TQMLS1046A) += fsl-tqmls1046a-mbls10xxa.dtb.o clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts new file mode 100644 index 0000000000..936f07eac4 --- /dev/null +++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright (C) 2019 Oleksij Rempel - Pengutronix + */ + +#include <arm/at91-sama5d27_som1_ek.dts> + +/ { + chosen { + environment { + compatible = "barebox,environment"; + device-path = &barebox_env; + }; + }; + + memory { + reg = <0x20000000 0x8000000>; + }; +}; + +&qspi1 { + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + barebox_env: partition@80000 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; + }; +}; diff --git a/arch/arm/dts/at91sam9x5ek.dts b/arch/arm/dts/at91sam9x5ek.dts index d5c7a8fe5c..bc2a279709 100644 --- a/arch/arm/dts/at91sam9x5ek.dts +++ b/arch/arm/dts/at91sam9x5ek.dts @@ -19,18 +19,6 @@ status = "okay"; }; - ahb { - apb { - pinctrl@fffff400 { - spi { - pinctrl_board_spi: spi-board { - atmel,pins = <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; - }; - }; - }; - }; - }; - leds { /* * PB18 has a resource conflict since it is both used @@ -68,3 +56,10 @@ phy-mode = "rmii"; }; +&{/ahb/apb/pinctrl@fffff400} { + spi0 { + pinctrl_board_spi: spi-board { + atmel,pins = <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + }; +}; diff --git a/arch/arm/dts/canon-a1100.dts b/arch/arm/dts/canon-a1100.dts index a88eacf4d4..18ba495bcf 100644 --- a/arch/arm/dts/canon-a1100.dts +++ b/arch/arm/dts/canon-a1100.dts @@ -7,6 +7,7 @@ compatible = "canon,a1100"; memory { + device_type = "memory"; reg = <0x00000000 0x04000000>; }; diff --git a/arch/arm/dts/digic4.dtsi b/arch/arm/dts/digic4.dtsi index 21b004d4a2..2db9393b33 100644 --- a/arch/arm/dts/digic4.dtsi +++ b/arch/arm/dts/digic4.dtsi @@ -1,8 +1,11 @@ -/include/ "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; + compatible = "canon,digic4"; + chosen { }; + timer0: timer@c0210000 { compatible = "canon,digic-timer"; reg = <0xc0210000 0x1c>; diff --git a/arch/arm/dts/dm365.dtsi b/arch/arm/dts/dm365.dtsi index ea69007fa8..b03cc3efa9 100644 --- a/arch/arm/dts/dm365.dtsi +++ b/arch/arm/dts/dm365.dtsi @@ -1,6 +1,9 @@ -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; + + chosen { }; + soc { compatible = "simple-bus"; model = "TI TMS320DM365"; diff --git a/arch/arm/dts/fsl-ls1046a-rdb.dts b/arch/arm/dts/fsl-ls1046a-rdb.dts index e16948bc8a..842d684588 100644 --- a/arch/arm/dts/fsl-ls1046a-rdb.dts +++ b/arch/arm/dts/fsl-ls1046a-rdb.dts @@ -29,6 +29,18 @@ }; }; +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + &fman0 { ethernet@e0000 { status = "disabled"; @@ -96,3 +108,17 @@ status = "disabled"; }; }; + +&usb0 { + dr_mode = "host"; +}; + +&usb1 { + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + status = "okay"; +}; + +&usb2 { + dr_mode = "host"; +}; diff --git a/arch/arm/dts/imx25-karo-tx25.dts b/arch/arm/dts/imx25-karo-tx25.dts index 9296e90b07..2785a3c91a 100644 --- a/arch/arm/dts/imx25-karo-tx25.dts +++ b/arch/arm/dts/imx25-karo-tx25.dts @@ -9,102 +9,16 @@ * http://www.gnu.org/copyleft/gpl.html */ -/dts-v1/; +#include <arm/imx25-karo-tx25.dts> #include "imx25.dtsi" / { - model = "Ka-Ro TX25"; - compatible = "karo,imx25-tx25", "fsl,imx25"; - chosen { - stdout-path = &uart1; - environment { compatible = "barebox,environment"; device-path = &nfc, "partname:environment"; }; }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_fec_phy: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "fec-phy"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio4 9 0>; - }; - }; - - memory { - reg = <0x80000000 0x02000000 0x90000000 0x02000000>; - }; -}; - -&iomuxc { - pinctrl_uart1: uart1grp { - fsl,pins = < - MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 - MX25_PAD_UART1_RXD__UART1_RXD 0x80000000 - MX25_PAD_UART1_CTS__UART1_CTS 0x80000000 - MX25_PAD_UART1_RTS__UART1_RTS 0x80000000 - >; - }; - - pinctrl_fec: fecgrp { - fsl,pins = < - MX25_PAD_D11__GPIO_4_9 0x80000000 /* FEC PHY power on pin */ - MX25_PAD_D13__GPIO_4_7 0x80000000 /* FEC reset */ - MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 - MX25_PAD_FEC_MDIO__FEC_MDIO 0x80000000 - MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 - MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 - MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 - MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 - MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 - MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 - MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 - >; - }; - - pinctrl_nfc: nfcgrp { - fsl,pins = < - MX25_PAD_NF_CE0__NF_CE0 0x80000000 - MX25_PAD_NFWE_B__NFWE_B 0x80000000 - MX25_PAD_NFRE_B__NFRE_B 0x80000000 - MX25_PAD_NFALE__NFALE 0x80000000 - MX25_PAD_NFCLE__NFCLE 0x80000000 - MX25_PAD_NFWP_B__NFWP_B 0x80000000 - MX25_PAD_NFRB__NFRB 0x80000000 - MX25_PAD_D7__D7 0x80000000 - MX25_PAD_D6__D6 0x80000000 - MX25_PAD_D5__D5 0x80000000 - MX25_PAD_D4__D4 0x80000000 - MX25_PAD_D3__D3 0x80000000 - MX25_PAD_D2__D2 0x80000000 - MX25_PAD_D1__D1 0x80000000 - MX25_PAD_D0__D0 0x80000000 - >; - }; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec>; - phy-reset-gpios = <&gpio4 7 0>; - phy-mode = "rmii"; - phy-supply = <®_fec_phy>; - status = "okay"; }; &iim { @@ -112,14 +26,8 @@ }; &nfc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nfc>; #address-cells = <1>; #size-cells = <1>; - nand-on-flash-bbt; - nand-ecc-mode = "hw"; - nand-bus-width = <8>; - status = "okay"; partition@0 { label = "boot"; diff --git a/arch/arm/dts/imx25.dtsi b/arch/arm/dts/imx25.dtsi index eb30461780..e72dbd5f36 100644 --- a/arch/arm/dts/imx25.dtsi +++ b/arch/arm/dts/imx25.dtsi @@ -9,10 +9,12 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include "skeleton.dtsi" -#include <arm/imx25.dtsi> - / { + #address-cells = <1>; + #size-cells = <1>; + + chosen { }; + aliases { mmc0 = &esdhc1; mmc2 = &esdhc2; diff --git a/arch/arm/dts/imx6q-marsboard.dts b/arch/arm/dts/imx6q-marsboard.dts new file mode 100644 index 0000000000..1d9f8f005d --- /dev/null +++ b/arch/arm/dts/imx6q-marsboard.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright (C) 2019 Ahmad Fatoum - Pengutronix + */ + +#include <arm/imx6q-marsboard.dts> +#include "imx6q.dtsi" + +/ { + chosen { + stdout-path = &uart2; + + environment { + compatible = "barebox,environment"; + device-path = &environment_spinor; + }; + }; +}; + +&ecspi1 { + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x000000 0x100000>; + }; + + environment_spinor: partition@100000 { + label = "barebox-environment"; + reg = <0x100000 0x80000>; + }; + }; +}; + +&fec { + phy-reset-duration = <2>; +}; + +&ocotp { + barebox,provide-mac-address = <&fec 0x620>; +}; diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi index f0bba2e098..846ebbe6b1 100644 --- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -86,6 +86,10 @@ }; }; +&fec { + /delete-property/ phy-supply; +}; + &gpmi { partitions { compatible = "fixed-partitions"; diff --git a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts index dd4379bd59..414497b4e8 100644 --- a/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts +++ b/arch/arm/dts/imx8mq-zii-ultra-rmb3.dts @@ -3,41 +3,5 @@ * Copyright (C) 2019 Zodiac Inflight Innovations */ -/dts-v1/; - +#include <arm64/freescale/imx8mq-zii-ultra-rmb3.dts> #include "imx8mq-zii-ultra.dtsi" - -/ { - model = "ZII i.MX8MQ Ultra RMB3 Board"; - compatible = "zii,imx8mq-ultra-rmb3", "zii,imx8mq-ultra", "fsl,imx8mq"; -}; - -&ecspi1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; - cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - nor_flash: flash@0 { - compatible = "st,m25p128", "jedec,spi-nor"; - spi-max-frequency = <20000000>; - reg = <0>; - }; -}; - -&iomuxc { - pinctrl_ecspi1: ecspi1grp { - fsl,pins = < - MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 - MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 - MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 - MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 - >; - }; -}; - -&usb_hub { - swap-dx-lanes = <0>; -}; diff --git a/arch/arm/dts/imx8mq-zii-ultra-zest.dts b/arch/arm/dts/imx8mq-zii-ultra-zest.dts index c2ac05d8e8..491e669080 100644 --- a/arch/arm/dts/imx8mq-zii-ultra-zest.dts +++ b/arch/arm/dts/imx8mq-zii-ultra-zest.dts @@ -3,11 +3,5 @@ * Copyright (C) 2019 Zodiac Inflight Innovations */ -/dts-v1/; - +#include <arm64/freescale/imx8mq-zii-ultra-zest.dts> #include "imx8mq-zii-ultra.dtsi" - -/ { - model = "ZII i.MX8MQ Ultra Zest Board"; - compatible = "zii,imx8mq-ultra-zest", "zii,imx8mq-ultra", "fsl,imx8mq"; -}; diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi b/arch/arm/dts/imx8mq-zii-ultra.dtsi index 6e41e820b8..6180f21ab0 100644 --- a/arch/arm/dts/imx8mq-zii-ultra.dtsi +++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi @@ -3,7 +3,6 @@ * Copyright (C) 2019 Zodiac Inflight Innovations */ -#include <arm64/freescale/imx8mq.dtsi> #include "imx8mq.dtsi" #include "imx8mq-ddrc.dtsi" @@ -24,6 +23,8 @@ }; aliases { + ethernet0 = &fec1; + ethernet1 = &i210; /* * NVMEM device corresponding to EEPROM attached to * the switch shared DT node with it, so we use that @@ -31,265 +32,18 @@ */ switch-eeprom = &switch; }; - - mdio0: bitbang-mdio { - compatible = "virtual,mdio-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mdio_bitbang>, <&pinctrl_fec1_phy_reset>; - gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>, /* MDC */ - <&gpio1 14 GPIO_ACTIVE_HIGH>; /* MDIO */ - #address-cells = <1>; - #size-cells = <0>; - - phy0: ethernet-phy@0 { - reg = <0>; - reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; - }; - }; - - reg_usdhc2_vmmc: regulator-vsd-3v3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usdhc2>; - compatible = "regulator-fixed"; - regulator-name = "VSD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - pcie0_refclk: pcie0-refclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - - pcie1_refclk: pcie0-refclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; }; &fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1>; - - phy-handle = <&phy0>; - phy-mode = "rmii"; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - switch: switch@0 { - compatible = "marvell,mv88e6085"; - reg = <0>; - dsa,member = <0 0>; - eeprom-length = <512>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - label = "gigabit_proc"; - }; - - port@1 { - reg = <1>; - label = "netaux"; - }; - - port@2 { - reg = <2>; - label = "cpu"; - - fixed-link { - speed = <100>; - full-duplex; - }; - }; - - port@3 { - reg = <3>; - label = "netright"; - }; - - port@4 { - reg = <4>; - label = "netleft"; - }; - }; - }; - }; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - - pmic@8 { - compatible = "fsl,pfuze100"; - reg = <0x8>; - - regulators { - sw1a_reg: sw1ab { - regulator-min-microvolt = <825000>; - regulator-max-microvolt = <1100000>; - }; - - sw1c_reg: sw1c { - regulator-min-microvolt = <825000>; - regulator-max-microvolt = <1100000>; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - }; - - sw3a_reg: sw3ab { - regulator-min-microvolt = <825000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - }; - - sw4_reg: sw4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-always-on; - }; - - vgen1_reg: vgen1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen2_reg: vgen2 { - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <975000>; - regulator-always-on; - }; - - vgen3_reg: vgen3 { - regulator-min-microvolt = <1675000>; - regulator-max-microvolt = <1975000>; - regulator-always-on; - }; - - vgen4_reg: vgen4 { - regulator-min-microvolt = <1625000>; - regulator-max-microvolt = <1875000>; - regulator-always-on; - }; - - vgen5_reg: vgen5 { - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3625000>; - regulator-always-on; - }; - - vgen6_reg: vgen6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - }; - }; - - temp-sense@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - eeprom@54 { - compatible = "atmel,24c128"; - reg = <0x54>; - }; - - ds1341: rtc@68 { - compatible = "dallas,ds1341"; - reg = <0x68>; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - status = "okay"; - - usb_hub: usb2513b@2c { - compatible = "microchip,usb2513b"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2513b>; - reg = <0x2c>; - reset-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; - }; -}; - -&i2c4 { - clock-frequency = <400000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - status = "okay"; + nvmem-cells = <&mac_address_0>; + nvmem-cell-names = "mac-address"; }; &ocotp { barebox,provide-mac-address = <&fec1 0x640>; }; -&pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie0>; - reset-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; - clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>, - <&clk IMX8MQ_CLK_PCIE1_AUX>, - <&clk IMX8MQ_CLK_PCIE1_PHY>, - <&pcie0_refclk>; - clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; - status = "okay"; -}; - &pcie1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie1>; - reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>; - clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, - <&clk IMX8MQ_CLK_PCIE2_AUX>, - <&clk IMX8MQ_CLK_PCIE2_PHY>, - <&pcie1_refclk>; - clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; - status = "okay"; - host@0 { reg = <0 0 0 0 0>; @@ -302,73 +56,26 @@ }; }; -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; +&i210 { + nvmem-cells = <&mac_address_1>; + nvmem-cell-names = "mac-address"; }; &uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; - rave-sp { - compatible = "zii,rave-sp-rdu2"; - current-speed = <1000000>; - #address-cells = <1>; - #size-cells = <1>; - - watchdog { - compatible = "zii,rave-sp-watchdog"; - }; - - main_eeprom: eeprom@a4 { - compatible = "zii,rave-sp-eeprom"; - reg = <0xa4 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - zii,eeprom-name = "main-eeprom"; - }; + eeprom@a4 { + mac_address_0: mac-address@180 { + reg = <0x180 6>; + }; - eeprom@a3 { - compatible = "zii,rave-sp-eeprom"; - reg = <0xa3 0x4000>; - zii,eeprom-name = "dds-eeprom"; + mac_address_1: mac-address@190 { + reg = <0x190 6>; + }; }; }; }; -&usb_dwc3_0 { - status = "okay"; - dr_mode = "host"; -}; - -&usb3_phy0 { - status = "okay"; -}; - -&usb_dwc3_1 { - status = "okay"; - dr_mode = "host"; -}; - -&usb3_phy1 { - status = "okay"; -}; - &usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - vqmmc-supply = <&sw4_reg>; - bus-width = <8>; - non-removable; - no-sd; - no-sdio; - status = "okay"; - #address-cells = <1>; #size-cells = <1>; @@ -384,14 +91,6 @@ }; &usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>; - cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_usdhc2_vmmc>; - status = "okay"; - #address-cells = <1>; #size-cells = <1>; @@ -406,187 +105,3 @@ }; }; -&iomuxc { - pinctrl_mdio_bitbang: bitbangmdiogrp { - fsl,pins = < - MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x44 - MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x64 - >; - }; - - pinctrl_fec1: fec1grp { - fsl,pins = < - MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 - MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23 - MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f - MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f - MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 - MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 - MX8MQ_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x1f - MX8MQ_IOMUXC_ENET_RXC_ENET1_RX_ER 0x91 - MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 - MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f - >; - }; - - pinctrl_fec1_phy_reset: fec1phyresetgrp { - fsl,pins = < - MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x11 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f - MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f - MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f - MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f - >; - }; - - pinctrl_i2c4: i2c4grp { - fsl,pins = < - MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x4000007f - MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x4000007f - >; - }; - - pinctrl_pcie0: pcie0grp { - fsl,pins = < - MX8MQ_IOMUXC_UART4_RXD_PCIE1_CLKREQ_B 0x76 - MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x16 - >; - }; - - pinctrl_pcie1: pcie1grp { - fsl,pins = < - MX8MQ_IOMUXC_UART4_TXD_PCIE2_CLKREQ_B 0x76 - MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x16 - >; - }; - - pinctrl_reg_usdhc2: regusdhc2grpgpio { - fsl,pins = < - MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 - MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 - MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 - >; - }; - - pinctrl_usb2513b: usb2513bgrp { - fsl,pins = < - MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x41 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 - MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 - MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 - MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 - MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 - MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 - MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 - MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 - MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 - MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 - MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 - MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1-100grp { - fsl,pins = < - MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85 - MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5 - MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc5 - MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc5 - MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc5 - MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc5 - MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc5 - MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc5 - MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc5 - MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc5 - MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x85 - MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1-200grp { - fsl,pins = < - MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87 - MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7 - MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc7 - MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc7 - MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc7 - MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc7 - MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc7 - MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc7 - MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc7 - MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc7 - MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x87 - MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 - MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 - MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 - MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 - MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 - MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 - MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 - >; - }; - - pinctrl_usdhc2_100mhz: usdhc2-100grp { - fsl,pins = < - MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85 - MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5 - MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5 - MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5 - MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5 - MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5 - MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 - >; - }; - - pinctrl_usdhc2_200mhz: usdhc2-200grp { - fsl,pins = < - MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87 - MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7 - MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7 - MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7 - MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7 - MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7 - MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 - >; - }; -};
\ No newline at end of file diff --git a/arch/arm/dts/k1879hb1ya.dtsi b/arch/arm/dts/k1879hb1ya.dtsi index 83ba7fb399..7bbc31efc5 100644 --- a/arch/arm/dts/k1879hb1ya.dtsi +++ b/arch/arm/dts/k1879hb1ya.dtsi @@ -1,6 +1,13 @@ -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; + + chosen { }; + + memory { + device_type = "memory"; + }; + soc { compatible = "simple-bus"; model = "RC Module K1879HB1YA"; diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/arch/arm/dts/sama5d2.dtsi diff --git a/arch/arm/dts/skeleton.dtsi b/arch/arm/dts/skeleton.dtsi deleted file mode 100644 index b41d241de2..0000000000 --- a/arch/arm/dts/skeleton.dtsi +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Skeleton device tree; the bare minimum needed to boot; just include and - * add a compatible value. The bootloader will typically populate the memory - * node. - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - chosen { }; - aliases { }; - memory { device_type = "memory"; reg = <0 0>; }; -}; diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi b/arch/arm/dts/stm32mp157a-dk1.dtsi index cd3d614d46..f7fbdcd174 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1.dtsi @@ -8,6 +8,13 @@ #include <dt-bindings/gpio/gpio.h> / { + chosen { + environment { + compatible = "barebox,environment"; + device-path = &sdmmc1, "partname:barebox-environment"; + }; + }; + led { red { label = "error"; diff --git a/arch/arm/dts/vf610-zii-scu4-aib.dts b/arch/arm/dts/vf610-zii-scu4-aib.dts index 43a13e243d..1e6a54954a 100644 --- a/arch/arm/dts/vf610-zii-scu4-aib.dts +++ b/arch/arm/dts/vf610-zii-scu4-aib.dts @@ -109,3 +109,11 @@ label = "fiber9"; }; }; + +/* + * FIXME: Remove once this code appears in kernel DTS +*/ +&i2c2 { + tca9548@70 { i2c-mux-idle-disconnect; }; + tca9548@71 { i2c-mux-idle-disconnect; }; +}; diff --git a/arch/arm/dts/virt2real.dts b/arch/arm/dts/virt2real.dts index 09aec1f722..8f8c65ba7a 100644 --- a/arch/arm/dts/virt2real.dts +++ b/arch/arm/dts/virt2real.dts @@ -6,6 +6,7 @@ model = "virt2real"; memory { + device_type = "memory"; reg = <0x82000000 0x01000000>; }; diff --git a/arch/arm/include/asm/common.h b/arch/arm/include/asm/common.h index c32cdfe5ec..d03ee6273f 100644 --- a/arch/arm/include/asm/common.h +++ b/arch/arm/include/asm/common.h @@ -50,8 +50,7 @@ static inline void arm_setup_stack(unsigned long top) { __asm__ __volatile__("mov sp, %0" : - : "r"(top) - : "sp"); + : "r"(top)); } #endif /* __ASM_ARM_COMMON_H */ diff --git a/arch/arm/lib64/barebox.lds.S b/arch/arm/lib64/barebox.lds.S index b3e6843a15..694bbcaaf1 100644 --- a/arch/arm/lib64/barebox.lds.S +++ b/arch/arm/lib64/barebox.lds.S @@ -31,6 +31,8 @@ SECTIONS . = TEXT_BASE; #endif + .image_start : { *(.__image_start) } + #ifndef CONFIG_PBL_IMAGE PRE_IMAGE #endif @@ -112,6 +114,8 @@ SECTIONS _edata = .; + .image_end : { *(.__image_end) } + . = ALIGN(4); .__bss_start : { *(.__bss_start) } .bss : { *(.bss*) } diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 8e1bf0629a..ef00e32e38 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -6,6 +6,9 @@ config HAVE_AT91_UTMI config HAVE_AT91_USB_CLK bool +config HAVE_AT91_PIO4 + bool + config COMMON_CLK_AT91 bool select COMMON_CLK @@ -47,6 +50,7 @@ config SOC_AT91SAM9 select HAVE_AT91_SMD select HAVE_AT91_USB_CLK select HAVE_AT91_UTMI + select PINCTRL_AT91 config SOC_SAMA5 bool @@ -57,6 +61,13 @@ config SOC_SAMA5D2 select SOC_SAMA5 select AT91SAM9_SMC select CLOCKSOURCE_ATMEL_PIT + select HAVE_AT91_H32MX + select HAVE_AT91_UTMI + select HAVE_AT91_USB_CLK + select HAVE_AT91_GENERATED_CLK + select PINCTRL_AT91PIO4 + select HAS_MACB + select HAVE_MACH_ARM_HEAD config SOC_SAMA5D3 bool @@ -66,6 +77,9 @@ config SOC_SAMA5D3 select HAVE_AT91_SMD select HAVE_AT91_USB_CLK select HAVE_AT91_UTMI + select PINCTRL_AT91 + select HAS_MACB + select HAVE_MACH_ARM_HEAD config SOC_SAMA5D4 bool @@ -76,12 +90,15 @@ config SOC_SAMA5D4 select HAVE_AT91_SMD select HAVE_AT91_USB_CLK select HAVE_AT91_UTMI + select PINCTRL_AT91 + select HAS_MACB + select HAVE_MACH_ARM_HEAD config ARCH_TEXT_BASE hex - default 0x73f00000 if ARCH_AT91SAM9G45 - default 0x26f00000 if ARCH_AT91SAM9X5 - default 0x20f00000 if ARCH_AT91RM9200 + default 0x73f00000 if SOC_AT91SAM9G45 + default 0x26f00000 if SOC_AT91SAM9X5 + default 0x20f00000 if SOC_AT91RM9200 default 0x21f00000 if MACH_ANIMEO_IP default 0x23f00000 @@ -102,11 +119,14 @@ config SOC_AT91RM9200 select HAS_AT91_ETHER select HAVE_AT91_DBGU0 select HAVE_AT91_USB_CLK + select PINCTRL_AT91 config SOC_AT91SAM9260 bool select SOC_AT91SAM9 select HAS_MACB + select PINCTRL_AT91 + select HAVE_MACH_ARM_HEAD help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE or AT91SAM9G20 SoC. @@ -114,6 +134,9 @@ config SOC_AT91SAM9260 config SOC_AT91SAM9261 bool select SOC_AT91SAM9 + select PINCTRL_AT91 + select HAVE_AT91_LOAD_BAREBOX_SRAM + select HAVE_MACH_ARM_HEAD help Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. @@ -122,11 +145,15 @@ config SOC_AT91SAM9263 select SOC_AT91SAM9 select HAS_MACB select HAVE_AT91_LOAD_BAREBOX_SRAM + select HAVE_MACH_ARM_HEAD + select PINCTRL_AT91 config SOC_AT91SAM9G45 bool select SOC_AT91SAM9 select HAS_MACB + select PINCTRL_AT91 + select HAVE_MACH_ARM_HEAD help Select this if you are using one of Atmel's AT91SAM9G45 family SoC. This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. @@ -136,6 +163,8 @@ config SOC_AT91SAM9X5 select SOC_AT91SAM9 select HAS_MACB select COMMON_CLK_OF_PROVIDER + select PINCTRL_AT91 + select OFDEVICE help Select this if you are using one of Atmel's AT91SAM9x5 family SoC. This means that your SAM9 name finishes with a '5' (except if it is @@ -146,11 +175,25 @@ config SOC_AT91SAM9X5 config SOC_AT91SAM9N12 bool select SOC_AT91SAM9 + select PINCTRL_AT91 + select HAVE_MACH_ARM_HEAD help Select this if you are using Atmel's AT91SAM9N12 SoC. +config SUPPORT_CALAO_DAB_MMX + bool + +config SUPPORT_CALAO_MOB_TNY_MD2 + bool + +if !AT91_MULTI_BOARDS + +# ---------------------------------------------------------- + choice prompt "Atmel AT91 Processor" + help + Select here which SoC to support in non-multi-image configurations config ARCH_AT91RM9200 bool "AT91RM9200" @@ -163,49 +206,38 @@ config ARCH_AT91SAM9260 config ARCH_AT91SAM9261 bool "AT91SAM9261" select SOC_AT91SAM9261 - select HAVE_AT91_LOAD_BAREBOX_SRAM config ARCH_AT91SAM9263 bool "AT91SAM9263" select SOC_AT91SAM9263 - select HAVE_MACH_ARM_HEAD config ARCH_AT91SAM9G10 bool "AT91SAM9G10" select SOC_AT91SAM9261 - select HAVE_MACH_ARM_HEAD config ARCH_AT91SAM9G20 bool "AT91SAM9G20" select SOC_AT91SAM9260 - select HAVE_MACH_ARM_HEAD config ARCH_AT91SAM9G45 bool "AT91SAM9G45 or AT91SAM9M10" select SOC_AT91SAM9G45 - select HAVE_MACH_ARM_HEAD config ARCH_AT91SAM9X5 bool "AT91SAM9X5" select SOC_AT91SAM9X5 - select OFDEVICE config ARCH_AT91SAM9N12 bool "AT91SAM9N12" select SOC_AT91SAM9N12 - select HAVE_MACH_ARM_HEAD config ARCH_SAMA5D3 bool "SAMA5D3x" select SOC_SAMA5D3 - select HAS_MACB - select HAVE_MACH_ARM_HEAD config ARCH_SAMA5D4 bool "SAMA5D4" select SOC_SAMA5D4 - select HAS_MACB - select HAVE_MACH_ARM_HEAD endchoice @@ -213,25 +245,15 @@ config ARCH_BAREBOX_MAX_BARE_INIT_SIZE hex default 0x1000 if ARCH_AT91SAM9260 default 0x27000 if ARCH_AT91SAM9261 - default 0x12000 if ARCH_AT91SAM9263 default 0x4000 if ARCH_AT91SAM9G20 default 0x3000 if ARCH_AT91SAM9G10 default 0xF000 if ARCH_AT91SAM9G45 - default 0x6000 if ARCH_AT91SAM9X5 default 0x6000 if ARCH_AT91SAM9N12 - default 0x6000 if ARCH_SAMA5D3 + default 0x12000 if SOC_AT91SAM9263 + default 0x6000 if SOC_AT91SAM9X5 + default 0x6000 if SOC_SAMA5D3 default 0xffffffff -config SUPPORT_CALAO_DAB_MMX - bool - -config SUPPORT_CALAO_MOB_TNY_MD2 - bool - -if !AT91_MULTI_BOARDS - -# ---------------------------------------------------------- - if ARCH_AT91RM9200 choice @@ -521,12 +543,13 @@ endif config AT91_MULTI_BOARDS bool "Allow multiple boards to be selected" select HAVE_PBL_MULTI_IMAGES + select ARM_USE_COMPRESSED_DTB if AT91_MULTI_BOARDS config MACH_AT91SAM9263EK bool "Atmel AT91SAM9263-EK" - depends on ARCH_AT91SAM9263 + select SOC_AT91SAM9263 select OFDEVICE select COMMON_CLK_OF_PROVIDER select HAVE_NAND_ATMEL_BUSWIDTH_16 @@ -537,19 +560,27 @@ config MACH_AT91SAM9263EK config MACH_AT91SAM9X5EK bool "Atmel AT91SAM9x5 Series Evaluation Kit" - depends on ARCH_AT91SAM9X5 + select SOC_AT91SAM9X5 help Select this if you re using Atmel's AT91SAM9x5-EK Evaluation Kit. Supported chips are sam9g15, sam9g25, sam9x25, sam9g35 and sam9x35. config MACH_MICROCHIP_KSZ9477_EVB bool "Microchip EVB-KSZ9477 Evaluation Kit" - depends on ARCH_SAMA5D3 + select SOC_SAMA5D3 select OFDEVICE select COMMON_CLK_OF_PROVIDER help Select this if you are using Microchip's EVB-KSZ9477 Evaluation Kit. +config MACH_SAMA5D27_SOM1 + bool "Microchip SAMA5D27 SoM-1 Evaluation Kit" + select SOC_SAMA5D2 + select OFDEVICE + select COMMON_CLK_OF_PROVIDER + help + Select this if you are using Microchip's sama5d27 SoM evaluation kit + endif comment "AT91 Board Options" diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index d81683ac12..66d0b700f6 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -1,4 +1,5 @@ obj-y += setup.o +lwl-y += at91_pmc_ll.o ifeq ($(CONFIG_COMMON_CLK_OF_PROVIDER),) obj-y += clock.o @@ -14,16 +15,16 @@ obj-y += at91sam9g45_reset.o obj-$(CONFIG_AT91SAM9_SMC) += sam9_smc.o # CPU-specific support -obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o -obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam9260_devices.o -obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam9261_devices.o -obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam9261_devices.o +obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o +obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o at91sam9260_devices.o +obj-$(CONFIG_SOC_AT91SAM9261) += at91sam9261.o at91sam9261_devices.o +obj-$(CONFIG_SOC_AT91SAM9G10) += at91sam9261.o at91sam9261_devices.o ifeq ($(CONFIG_OFDEVICE),) -obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam9263_devices.o -obj-$(CONFIG_ARCH_SAMA5D3) += sama5d3.o sama5d3_devices.o +obj-$(CONFIG_SOC_AT91SAM9263) += at91sam9263.o at91sam9263_devices.o +obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o sama5d3_devices.o endif -obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam9260_devices.o -obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam9g45_devices.o -obj-$(CONFIG_ARCH_AT91SAM9X5) += at91sam9x5.o at91sam9x5_devices.o -obj-$(CONFIG_ARCH_AT91SAM9N12) += at91sam9n12.o at91sam9n12_devices.o -obj-$(CONFIG_ARCH_SAMA5D4) += sama5d4.o sama5d4_devices.o +obj-$(CONFIG_SOC_AT91SAM9G20) += at91sam9260.o at91sam9260_devices.o +obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o at91sam9g45_devices.o +obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o at91sam9x5_devices.o +obj-$(CONFIG_SOC_AT91SAM9N12) += at91sam9n12.o at91sam9n12_devices.o +obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o sama5d4_devices.o diff --git a/arch/arm/mach-at91/at91_pmc_ll.c b/arch/arm/mach-at91/at91_pmc_ll.c new file mode 100644 index 0000000000..4d39f57909 --- /dev/null +++ b/arch/arm/mach-at91/at91_pmc_ll.c @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: BSD-1-Clause +/* + * Copyright (c) 2006, Atmel Corporation + * + * Atmel's name may not be used to endorse or promote products + * derived from this software without specific prior written permission. + */ + +#include <common.h> +#include <mach/at91_pmc_ll.h> + +#define at91_pmc_write(off, val) writel(val, pmc_base + off) +#define at91_pmc_read(off) readl(pmc_base + off) + +void at91_pmc_init(void __iomem *pmc_base, unsigned int flags) +{ + u32 tmp; + + /* + * Switch the master clock to the slow clock without modifying other + * parameters. It is assumed that ROM code set H32MXDIV, PLLADIV2, + * PCK_DIV3. + */ + tmp = at91_pmc_read(AT91_PMC_MCKR); + tmp &= ~AT91_PMC_ALT_PCKR_CSS; + tmp |= AT91_PMC_CSS_SLOW; + at91_pmc_write(AT91_PMC_MCKR, tmp); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MCKRDY)) + ; + + if (flags & AT91_PMC_LL_FLAG_SAM9X5_PMC) { + /* + * Enable the Main Crystal Oscillator + * tST_max = 2ms + * Startup Time: 32768 * 2ms / 8 = 8 + */ + tmp = at91_pmc_read(AT91_CKGR_MOR); + tmp &= ~AT91_PMC_OSCOUNT; + tmp &= ~AT91_PMC_KEY_MASK; + tmp |= AT91_PMC_MOSCEN; + tmp |= AT91_PMC_OSCOUNT_(8); + tmp |= AT91_PMC_KEY; + at91_pmc_write(AT91_CKGR_MOR, tmp); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MOSCS)) + ; + + if (flags & AT91_PMC_LL_FLAG_MEASURE_XTAL) { + /* Enable a measurement of the Main Crystal Oscillator */ + tmp = at91_pmc_read(AT91_CKGR_MCFR); + tmp |= AT91_PMC_CCSS_XTAL_OSC; + tmp |= AT91_PMC_RCMEAS; + at91_pmc_write(AT91_CKGR_MCFR, tmp); + + while (!(at91_pmc_read(AT91_CKGR_MCFR) & AT91_PMC_MAINRDY)) + ; + } + + /* Switch from internal 12MHz RC to the Main Crystal Oscillator */ + tmp = at91_pmc_read(AT91_CKGR_MOR); + tmp &= ~AT91_PMC_OSCBYPASS; + tmp &= ~AT91_PMC_KEY_MASK; + tmp |= AT91_PMC_KEY; + at91_pmc_write(AT91_CKGR_MOR, tmp); + + tmp = at91_pmc_read(AT91_CKGR_MOR); + tmp |= AT91_PMC_MOSCSEL; + tmp &= ~AT91_PMC_KEY_MASK; + tmp |= AT91_PMC_KEY; + at91_pmc_write(AT91_CKGR_MOR, tmp); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MOSCSELS)) + ; + + if (flags & AT91_PMC_LL_FLAG_DISABLE_RC) { + /* Disable the 12MHz RC Oscillator */ + tmp = at91_pmc_read(AT91_CKGR_MOR); + tmp &= ~AT91_PMC_MOSCRCEN; + tmp &= ~AT91_PMC_KEY_MASK; + tmp |= AT91_PMC_KEY; + at91_pmc_write(AT91_CKGR_MOR, tmp); + } + + } else { + /* + * Enable the Main Crystal Oscillator + * tST_max = 2ms + * Startup Time: 32768 * 2ms / 8 = 8 + */ + tmp = at91_pmc_read(AT91_CKGR_MOR); + tmp &= ~AT91_PMC_OSCOUNT; + tmp |= AT91_PMC_MOSCEN; + tmp |= AT91_PMC_OSCOUNT_(8); + at91_pmc_write(AT91_CKGR_MOR, tmp); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MOSCS)) + ; + } + + /* After stablization, switch to Main Clock */ + if ((at91_pmc_read(AT91_PMC_MCKR) & AT91_PMC_ALT_PCKR_CSS) == AT91_PMC_CSS_SLOW) { + tmp = at91_pmc_read(AT91_PMC_MCKR); + tmp &= ~(0x1 << 13); + tmp &= ~AT91_PMC_ALT_PCKR_CSS; + tmp |= AT91_PMC_CSS_MAIN; + at91_pmc_write(AT91_PMC_MCKR, tmp); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MCKRDY)) + ; + + tmp &= ~AT91_PMC_PRES; + tmp |= AT91_PMC_PRES_1; + at91_pmc_write(AT91_PMC_MCKR, tmp); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MCKRDY)) + ; + } +} + +void at91_pmc_cfg_plla(void __iomem *pmc_base, u32 pmc_pllar, + unsigned int __always_unused flags) +{ + /* Always disable PLL before configuring it */ + at91_pmc_write(AT91_CKGR_PLLAR, AT91_PMC_PLLA_WR_ERRATA); + at91_pmc_write(AT91_CKGR_PLLAR, AT91_PMC_PLLA_WR_ERRATA | pmc_pllar); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKA)) + ; +} + +void at91_pmc_cfg_mck(void __iomem *pmc_base, u32 pmc_mckr, unsigned int flags) +{ + u32 tmp; + + /* + * Program the PRES field in the AT91_PMC_MCKR register + */ + tmp = at91_pmc_read(AT91_PMC_MCKR); + tmp &= ~(0x1 << 13); + + if (flags & AT91_PMC_LL_FLAG_SAM9X5_PMC) { + tmp &= ~AT91_PMC_ALT_PRES; + tmp |= pmc_mckr & AT91_PMC_ALT_PRES; + } else { + tmp &= ~AT91_PMC_PRES; + tmp |= pmc_mckr & AT91_PMC_PRES; + } + at91_pmc_write(AT91_PMC_MCKR, tmp); + + /* + * Program the MDIV field in the AT91_PMC_MCKR register + */ + tmp = at91_pmc_read(AT91_PMC_MCKR); + tmp &= ~AT91_PMC_MDIV; + tmp |= pmc_mckr & AT91_PMC_MDIV; + at91_pmc_write(AT91_PMC_MCKR, tmp); + + /* + * Program the PLLADIV2 field in the AT91_PMC_MCKR register + */ + tmp = at91_pmc_read(AT91_PMC_MCKR); + tmp &= ~AT91_PMC_PLLADIV2; + tmp |= pmc_mckr & AT91_PMC_PLLADIV2; + at91_pmc_write(AT91_PMC_MCKR, tmp); + + /* + * Program the H32MXDIV field in the AT91_PMC_MCKR register + */ + tmp = at91_pmc_read(AT91_PMC_MCKR); + tmp &= ~AT91_PMC_H32MXDIV; + tmp |= pmc_mckr & AT91_PMC_H32MXDIV; + at91_pmc_write(AT91_PMC_MCKR, tmp); + + /* + * Program the CSS field in the AT91_PMC_MCKR register, + * wait for MCKRDY bit to be set in the PMC_SR register + */ + tmp = at91_pmc_read(AT91_PMC_MCKR); + tmp &= ~AT91_PMC_ALT_PCKR_CSS; + tmp |= pmc_mckr & AT91_PMC_ALT_PCKR_CSS; + at91_pmc_write(AT91_PMC_MCKR, tmp); + + while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MCKRDY)) + ; +} diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index d2691acae3..9a58b243d8 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -46,6 +46,7 @@ #define cpu_has_utmi() ( cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ + || cpu_is_sama5d2() \ || cpu_is_sama5d3() \ || cpu_is_sama5d4()) @@ -69,11 +70,13 @@ #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ + || cpu_is_sama5d2() \ || cpu_is_sama5d3() \ || cpu_is_sama5d4())) #define cpu_has_upll() (cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ + || cpu_is_sama5d2() \ || cpu_is_sama5d3() \ || cpu_is_sama5d4()) @@ -84,30 +87,36 @@ #define cpu_has_udpfs() (!(cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ + || cpu_is_sama5d2() \ || cpu_is_sama5d3() \ || cpu_is_sama5d4())) #define cpu_has_plladiv2() (cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ || cpu_is_at91sam9n12() \ + || cpu_is_sama5d2() \ || cpu_is_sama5d3() \ || cpu_is_sama5d4()) #define cpu_has_mdiv3() (cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ || cpu_is_at91sam9n12() \ + || cpu_is_sama5d2() \ || cpu_is_sama5d3() \ || cpu_is_sama5d4()) #define cpu_has_alt_prescaler() (cpu_is_at91sam9x5() \ || cpu_is_at91sam9n12() \ + || cpu_is_sama5d2() \ || cpu_is_sama5d3() \ || cpu_is_sama5d4()) -#define cpu_has_pcr() (cpu_is_sama5d3() \ +#define cpu_has_pcr() (cpu_is_sama5d2() \ + || cpu_is_sama5d3() \ || cpu_is_sama5d4()) -#define cpu_has_dual_matrix() (cpu_is_sama5d4()) +#define cpu_has_dual_matrix() (cpu_is_sama5d2() \ + || cpu_is_sama5d4()) static void *pmc; @@ -663,6 +672,8 @@ int at91_clock_init(void) if (cpu_is_sama5d4()) pmc = IOMEM(0xf0018000); + else if (cpu_is_sama5d2()) + pmc = IOMEM(0xf0014000); else pmc = IOMEM(0xfffffc00); /* * All other supported SoCs use this diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h index e33a358153..0ba9cdae10 100644 --- a/arch/arm/mach-at91/include/mach/at91_dbgu.h +++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h @@ -5,7 +5,7 @@ * Copyright (C) SAN People * * Debug Unit (DBGU) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. + * Based on AT91RM9200 datasheet revision E and SAMA5D3 datasheet revision B. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,7 +17,33 @@ #define AT91_DBGU_H #define AT91_DBGU_CR (0x00) /* Control Register */ +#define AT91_DBGU_RSTRX (1 << 2) /* Reset Receiver */ +#define AT91_DBGU_RSTTX (1 << 3) /* Reset Transmitter */ +#define AT91_DBGU_RXEN (1 << 4) /* Receiver Enable */ +#define AT91_DBGU_RXDIS (1 << 5) /* Receiver Disable */ +#define AT91_DBGU_TXEN (1 << 6) /* Transmitter Enable */ +#define AT91_DBGU_TXDIS (1 << 7) /* Transmitter Disable */ +#define AT91_DBGU_RSTSTA (1 << 8) /* Reset Status Bits */ #define AT91_DBGU_MR (0x04) /* Mode Register */ +#define AT91_DBGU_NBSTOP_1BIT (0 << 12) /* 1 stop bit */ +#define AT91_DBGU_NBSTOP_1_5BIT (1 << 12) /* 1.5 stop bits */ +#define AT91_DBGU_NBSTOP_2BIT (2 << 12) /* 2 stop bits */ + +#define AT91_DBGU_CHRL_5BIT (0 << 6) /* 5 bit character length */ +#define AT91_DBGU_CHRL_6BIT (1 << 6) /* 6 bit character length */ +#define AT91_DBGU_CHRL_7BIT (2 << 6) /* 7 bit character length */ +#define AT91_DBGU_CHRL_8BIT (3 << 6) /* 8 bit character length */ + +#define AT91_DBGU_PAR_EVEN (0 << 9) /* Even Parity */ +#define AT91_DBGU_PAR_ODD (1 << 9) /* Odd Parity */ +#define AT91_DBGU_PAR_SPACE (2 << 9) /* Space: Force Parity to 0 */ +#define AT91_DBGU_PAR_MARK (3 << 9) /* Mark: Force Parity to 1 */ +#define AT91_DBGU_PAR_NONE (4 << 9) /* No Parity */ + +#define AT91_DBGU_CHMODE_NORMAL (0 << 14) /* Normal mode */ +#define AT91_DBGU_CHMODE_AUTO (1 << 14) /* Automatic Echo */ +#define AT91_DBGU_CHMODE_LOCAL (2 << 14) /* Local Loopback */ +#define AT91_DBGU_CHMODE_REMOTE (3 << 14) /* Remote Loopback */ #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ #define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ @@ -61,4 +87,39 @@ #define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ #define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ +#ifndef __ASSEMBLY__ + +#include <asm/io.h> +static inline void at91_dbgu_setup_ll(void __iomem *dbgu_base, + unsigned mck, + unsigned baudrate) +{ + if (IS_ENABLED(CONFIG_DEBUG_LL)) { + u32 brgr = mck / (baudrate * 16); + + if ((mck / (baudrate * 16)) % 10 >= 5) + brgr++; + + writel(~0, dbgu_base + AT91_DBGU_IDR); + + writel(AT91_DBGU_RSTRX + | AT91_DBGU_RSTTX + | AT91_DBGU_RXDIS + | AT91_DBGU_TXDIS, + dbgu_base + AT91_DBGU_CR); + + writel(brgr, dbgu_base + AT91_DBGU_BRGR); + + writel(AT91_DBGU_PAR_NONE + | AT91_DBGU_CHMODE_NORMAL + | AT91_DBGU_CHRL_8BIT + | AT91_DBGU_NBSTOP_1BIT, + dbgu_base + AT91_DBGU_MR); + + writel(AT91_DBGU_RXEN | AT91_DBGU_TXEN, dbgu_base + AT91_DBGU_CR); + } +} + +#endif + #endif diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h index 2d80dfc3c9..0f129c9975 100644 --- a/arch/arm/mach-at91/include/mach/at91_pio.h +++ b/arch/arm/mach-at91/include/mach/at91_pio.h @@ -3,6 +3,8 @@ * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People + * Copyright (C) 2015 Atmel, + * 2015 Ludovic Desroches <ludovic.desroches@atmel.com> * * Parallel I/O Controller (PIO) - System peripherals registers. * Based on AT91RM9200 datasheet revision E. @@ -16,6 +18,8 @@ #ifndef AT91_PIO_H #define AT91_PIO_H +#include <linux/bitops.h> + #define PIO_PER 0x00 /* Enable Register */ #define PIO_PDR 0x04 /* Disable Register */ #define PIO_PSR 0x08 /* Status Register */ @@ -71,4 +75,33 @@ #define ABCDSR_PERIPH_C 0x2 #define ABCDSR_PERIPH_D 0x3 +#define PIO4_MSKR 0x0000 /* Mask Register */ +#define PIO4_CFGR 0x0004 /* Configuration Register */ +#define PIO4_CFGR_FUNC_MASK GENMASK(2, 0) +#define PIO4_DIR_MASK BIT(8) +#define PIO4_PUEN_MASK BIT(9) +#define PIO4_PDEN_MASK BIT(10) +#define PIO4_IFEN_MASK BIT(12) +#define PIO4_IFSCEN_MASK BIT(13) +#define PIO4_OPD_MASK BIT(14) +#define PIO4_SCHMITT_MASK BIT(15) +#define PIO4_DRVSTR_MASK GENMASK(17, 16) +#define PIO4_DRVSTR_OFFSET 16 +#define PIO4_CFGR_EVTSEL_MASK GENMASK(26, 24) +#define PIO4_CFGR_EVTSEL_FALLING (0 << 24) +#define PIO4_CFGR_EVTSEL_RISING (1 << 24) +#define PIO4_CFGR_EVTSEL_BOTH (2 << 24) +#define PIO4_CFGR_EVTSEL_LOW (3 << 24) +#define PIO4_CFGR_EVTSEL_HIGH (4 << 24) +#define PIO4_PDSR 0x0008 /* Data Status Register */ +#define PIO4_LOCKSR 0x000C /* Lock Status Register */ +#define PIO4_SODR 0x0010 /* Set Output Data Register */ +#define PIO4_CODR 0x0014 /* Clear Output Data Register */ +#define PIO4_ODSR 0x0018 /* Output Data Status Register */ +#define PIO4_IER 0x0020 /* Interrupt Enable Register */ +#define PIO4_IDR 0x0024 /* Interrupt Disable Register */ +#define PIO4_IMR 0x0028 /* Interrupt Mask Register */ +#define PIO4_ISR 0x002C /* Interrupt Status Register */ +#define PIO4_IOFR 0x003C /* I/O Freeze Configuration Register */ + #endif diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h index bbbd497afa..4d60becefb 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h @@ -50,14 +50,19 @@ #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */ #define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */ #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ -#define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */ +#define AT91_PMC_OSCOUNT_(x) ((x) << 8) +#define AT91_PMC_KEY_MASK (0xff << 16) /* MOR Writing Key */ +#define AT91_PMC_KEY (0x37 << 16) #define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */ #define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */ #define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */ #define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ -#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ - +#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Frequency Measure Ready */ +#define AT91_PMC_RCMEAS (1 << 20) /* RC Oscillator Frequency Measure (write-only) */ +#define AT91_PMC_CCSS (1 << 24) /* Counter Clock Source Selection */ +#define AT91_PMC_CCSS_RC_OSC (0 << 24) /* MAINF counter clock is the RC oscillator. */ +#define AT91_PMC_CCSS_XTAL_OSC (1 << 24) /* MAINF counter clock is the crystal oscillator. */ #define AT91_CKGR_PLLAR 0x28 /* PLL A Register */ #define AT91_CKGR_PLLBR 0x2c /* PLL B Register */ #define AT91_PMC_DIV (0xff << 0) /* Divider */ @@ -133,6 +138,7 @@ #define AT91_PMC_CSSMCK_MCK (1 << 8) #define AT91_PMC_IER 0x60 /* Interrupt Enable Register */ +#define AT91_PMC_MOSCXTS (1 << 0) /* Oscillator Startup Time */ #define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */ #define AT91_PMC_SR 0x68 /* Status Register */ #define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ @@ -148,6 +154,17 @@ #define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */ #define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */ #define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */ +#define AT91_PMC_PLLICPR 0x80 /* PLL Charge Pump Current Register */ +#define AT91_PMC_ICPPLLA (0xf << 0) +#define AT91_PMC_ICPPLLA_0 (0 << 0) +#define AT91_PMC_ICPPLLA_1 (1 << 0) +#define AT91_PMC_REALLOCK (0x1 << 7) +#define AT91_PMC_IPLLA (0xf << 8) +#define AT91_PMC_IPLLA_0 (0 << 8) +#define AT91_PMC_IPLLA_1 (1 << 8) +#define AT91_PMC_IPLLA_2 (2 << 8) +#define AT91_PMC_IPLLA_3 (3 << 8) + #define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */ #define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */ @@ -163,6 +180,7 @@ #define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9] */ #define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */ #define AT91_PMC_PCR_CMD (0x1 << 12) /* Command */ +#define AT91_PMC_PCR_DIV_MASK (0x3 << 16) #define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor value */ #define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */ #define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */ diff --git a/arch/arm/mach-at91/include/mach/at91_pmc_ll.h b/arch/arm/mach-at91/include/mach/at91_pmc_ll.h new file mode 100644 index 0000000000..eda40e8e12 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/at91_pmc_ll.h @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: BSD-1-Clause +/* + * Copyright (c) 2006, Atmel Corporation + */ + +#ifndef AT91_PMC_LL_H +#define AT91_PMC_LL_H + +#include <errno.h> +#include <asm/io.h> +#include <mach/at91_pmc.h> + +#define AT91_PMC_LL_FLAG_SAM9X5_PMC (1 << 0) +#define AT91_PMC_LL_FLAG_MEASURE_XTAL (1 << 1) +#define AT91_PMC_LL_FLAG_DISABLE_RC (1 << 2) + +#define AT91_PMC_LL_AT91RM9200 (0) +#define AT91_PMC_LL_AT91SAM9260 (0) +#define AT91_PMC_LL_AT91SAM9261 (0) +#define AT91_PMC_LL_AT91SAM9263 (0) +#define AT91_PMC_LL_AT91SAM9G45 (0) +#define AT91_PMC_LL_AT91SAM9X5 (AT91_PMC_LL_FLAG_SAM9X5_PMC | \ + AT91_PMC_LL_FLAG_DISABLE_RC) +#define AT91_PMC_LL_AT91SAM9N12 (AT91_PMC_LL_FLAG_SAM9X5_PMC | \ + AT91_PMC_LL_FLAG_DISABLE_RC) +#define AT91_PMC_LL_SAMA5D2 (AT91_PMC_LL_FLAG_SAM9X5_PMC | \ + AT91_PMC_LL_FLAG_MEASURE_XTAL) +#define AT91_PMC_LL_SAMA5D3 (AT91_PMC_LL_FLAG_SAM9X5_PMC | \ + AT91_PMC_LL_FLAG_DISABLE_RC) +#define AT91_PMC_LL_SAMA5D4 (AT91_PMC_LL_FLAG_SAM9X5_PMC) + +void at91_pmc_init(void __iomem *pmc_base, unsigned int flags); +void at91_pmc_cfg_mck(void __iomem *pmc_base, u32 pmc_mckr, unsigned int flags); +void at91_pmc_cfg_plla(void __iomem *pmc_base, u32 pmc_pllar, unsigned int flags); + +static inline void at91_pmc_init_pll(void __iomem *pmc_base, u32 pmc_pllicpr) +{ + writel(pmc_pllicpr, pmc_base + AT91_PMC_PLLICPR); +} + +static inline void at91_pmc_enable_system_clock(void __iomem *pmc_base, + unsigned clock_id) +{ + writel(clock_id, pmc_base + AT91_PMC_SCER); +} + +static inline int at91_pmc_enable_periph_clock(void __iomem *pmc_base, + unsigned periph_id) +{ + u32 mask = 0x01 << (periph_id % 32); + + if ((periph_id / 32) == 1) + writel(mask, pmc_base + AT91_PMC_PCER1); + else if ((periph_id / 32) == 0) + writel(mask, pmc_base + AT91_PMC_PCER); + else + return -EINVAL; + + return 0; +} + +static inline int at91_pmc_sam9x5_enable_periph_clock(void __iomem *pmc_base, + unsigned periph_id) +{ + u32 pcr = periph_id; + + if (periph_id >= 0x80) /* 7 bits only */ + return -EINVAL; + + writel(pcr, pmc_base + AT91_PMC_PCR); + pcr |= readl(pmc_base + AT91_PMC_PCR) & AT91_PMC_PCR_DIV_MASK; + pcr |= AT91_PMC_PCR_CMD | AT91_PMC_PCR_EN; + writel(pcr, pmc_base + AT91_PMC_PCR); + + return 0; +} + +#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h b/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h index d52a29e5ef..3dab64b71a 100644 --- a/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h +++ b/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h @@ -183,28 +183,22 @@ static void __always_inline at91sam926x_board_init(void __iomem *smcbase, writel(0xffffffff, pmc + AT91_PMC_PCER); } -#if defined CONFIG_ARCH_AT91SAM9260 #include <mach/at91sam9260.h> static void __always_inline at91sam9260_board_init(struct at91sam926x_board_cfg *cfg) { at91sam926x_board_init(IOMEM(AT91SAM9260_BASE_SMC), cfg); } -#endif -#if defined CONFIG_ARCH_AT91SAM9261 || defined CONFIG_ARCH_AT91SAM9G10 #include <mach/at91sam9261.h> static void __always_inline at91sam9261_board_init(struct at91sam926x_board_cfg *cfg) { at91sam926x_board_init(IOMEM(AT91SAM9261_BASE_SMC), cfg); } -#endif -#if defined CONFIG_ARCH_AT91SAM9263 #include <mach/at91sam9263.h> static void __always_inline at91sam9263_board_init(struct at91sam926x_board_cfg *cfg) { at91sam926x_board_init(IOMEM(AT91SAM9263_BASE_SMC0), cfg); } -#endif #endif /* __AT91SAM926X_BOARD_INIT_H__ */ diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index def49dc00d..6e0f25f325 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -52,6 +52,22 @@ #define ARCH_EXID_AT91SAM9CN11 0x00000009 #define ARCH_EXID_AT91SAM9CN12 0x00000005 +#define ARCH_EXID_SAMA5D21CU 0x0000005a +#define ARCH_EXID_SAMA5D225C_D1M 0x00000053 +#define ARCH_EXID_SAMA5D22CU 0x00000059 +#define ARCH_EXID_SAMA5D22CN 0x00000069 +#define ARCH_EXID_SAMA5D23CU 0x00000058 +#define ARCH_EXID_SAMA5D24CX 0x00000004 +#define ARCH_EXID_SAMA5D24CU 0x00000014 +#define ARCH_EXID_SAMA5D26CU 0x00000012 +#define ARCH_EXID_SAMA5D27C_D1G 0x00000033 +#define ARCH_EXID_SAMA5D27C_D5M 0x00000032 +#define ARCH_EXID_SAMA5D27CU 0x00000011 +#define ARCH_EXID_SAMA5D27CN 0x00000021 +#define ARCH_EXID_SAMA5D28C_D1G 0x00000013 +#define ARCH_EXID_SAMA5D28CU 0x00000010 +#define ARCH_EXID_SAMA5D28CN 0x00000020 + #define ARCH_EXID_SAMA5D3 0x00004300 #define ARCH_EXID_SAMA5D31 0x00444300 #define ARCH_EXID_SAMA5D33 0x00414300 @@ -93,6 +109,9 @@ enum at91_soc_type { /* SAM9N12 */ AT91_SOC_SAM9N12, + /* SAMA5D2 */ + AT91_SOC_SAMA5D2, + /* SAMA5D3 */ AT91_SOC_SAMA5D3, @@ -120,6 +139,14 @@ enum at91_soc_subtype { /* SAM9N12 */ AT91_SOC_SAM9CN11, AT91_SOC_SAM9CN12, + /* SAMA5D2 */ + AT91_SOC_SAMA5D21CU, + AT91_SOC_SAMA5D225C_D1M, AT91_SOC_SAMA5D22CU, AT91_SOC_SAMA5D22CN, + AT91_SOC_SAMA5D23CU, AT91_SOC_SAMA5D24CX, AT91_SOC_SAMA5D24CU, + AT91_SOC_SAMA5D26CU, AT91_SOC_SAMA5D27C_D1G, AT91_SOC_SAMA5D27C_D5M, + AT91_SOC_SAMA5D27CU, AT91_SOC_SAMA5D27CN, AT91_SOC_SAMA5D28C_D1G, + AT91_SOC_SAMA5D28CU, AT91_SOC_SAMA5D28CN, + /* SAMA5D3 */ AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34, AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D36, @@ -222,7 +249,36 @@ static inline int at91_soc_is_detected(void) #define cpu_is_at91sam9n12() (0) #endif -#ifdef CONFIG_ARCH_SAMA5D3 +#ifdef CONFIG_SOC_SAMA5D2 +#define cpu_is_sama5d2() (at91_soc_initdata.type == AT91_SOC_SAMA5D2) +#define cpu_is_sama5d21() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D21CU) +#define cpu_is_sama5d22() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D225C_D1M \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D225C_D1M \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D22CU \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D22CN) +#define cpu_is_sama5d23() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D23CU) +#define cpu_is_sama5d24() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D24CX \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D24CU) +#define cpu_is_sama5d26() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D26CU) +#define cpu_is_sama5d27() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D27C_D1G \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D27C_D5M \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D27CU \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D27CN) +#define cpu_is_sama5d28() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D28C_D1G \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D28CU \ + || at91_soc_initdata.subtype == AT91_SOC_SAMA5D28CN) +#else +#define cpu_is_sama5d2() (0) +#define cpu_is_sama5d21() (0) +#define cpu_is_sama5d22() (0) +#define cpu_is_sama5d23() (0) +#define cpu_is_sama5d24() (0) +#define cpu_is_sama5d26() (0) +#define cpu_is_sama5d27() (0) +#define cpu_is_sama5d28() (0) +#endif + +#ifdef CONFIG_SOC_SAMA5D3 #define cpu_is_sama5d3() (at91_soc_initdata.type == AT91_SOC_SAMA5D3) #define cpu_is_sama5d31() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D31) #define cpu_is_sama5d33() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D33) @@ -238,7 +294,7 @@ static inline int at91_soc_is_detected(void) #define cpu_is_sama5d36() (0) #endif -#ifdef CONFIG_ARCH_SAMA5D4 +#ifdef CONFIG_SOC_SAMA5D4 #define cpu_is_sama5d4() (at91_soc_initdata.type == AT91_SOC_SAMA5D4) #define cpu_is_sama5d41() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D41) #define cpu_is_sama5d42() (at91_soc_initdata.subtype == AT91_SOC_SAMA5D42) diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index f5ab47c064..ddd6971e37 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h @@ -7,8 +7,23 @@ #ifndef __AT91_GPIO_H__ #define __AT91_GPIO_H__ +#include <dt-bindings/gpio/gpio.h> +#include <asm/io.h> +#include <mach/at91_pio.h> + #define MAX_NB_GPIO_PER_BANK 32 +enum at91_mux { + AT91_MUX_GPIO = 0, + AT91_MUX_PERIPH_A = 1, + AT91_MUX_PERIPH_B = 2, + AT91_MUX_PERIPH_C = 3, + AT91_MUX_PERIPH_D = 4, + AT91_MUX_PERIPH_E = 5, + AT91_MUX_PERIPH_F = 6, + AT91_MUX_PERIPH_G = 7, +}; + static inline unsigned pin_to_bank(unsigned pin) { return pin / MAX_NB_GPIO_PER_BANK; @@ -130,10 +145,162 @@ int value) static inline int at91_mux_gpio_get(void __iomem *pio, unsigned mask) { - u32 pdsr; + u32 pdsr; + + pdsr = readl(pio + PIO_PDSR); + return (pdsr & mask) != 0; +} + +static inline void at91_mux_pio3_pin(void __iomem *pio, unsigned mask, + enum at91_mux mux, int gpio_state) +{ + at91_mux_disable_interrupt(pio, mask); + + switch(mux) { + case AT91_MUX_GPIO: + at91_mux_gpio_enable(pio, mask); + break; + case AT91_MUX_PERIPH_A: + at91_mux_pio3_set_A_periph(pio, mask); + break; + case AT91_MUX_PERIPH_B: + at91_mux_pio3_set_B_periph(pio, mask); + break; + case AT91_MUX_PERIPH_C: + at91_mux_pio3_set_C_periph(pio, mask); + break; + case AT91_MUX_PERIPH_D: + at91_mux_pio3_set_D_periph(pio, mask); + break; + default: + /* ignore everything else */ + break; + } + if (mux != AT91_MUX_GPIO) + at91_mux_gpio_disable(pio, mask); + + at91_mux_set_pullup(pio, mask, gpio_state & GPIO_PULL_UP); + at91_mux_pio3_set_pulldown(pio, mask, gpio_state & GPIO_PULL_DOWN); +} + +/* helpers for PIO4 pinctrl (>= sama5d2) */ + +static inline void at91_mux_pio4_set_periph(void __iomem *pio, unsigned mask, u32 func) +{ + writel(mask, pio + PIO4_MSKR); + writel(func, pio + PIO4_CFGR); +} + +static inline void at91_mux_pio4_set_A_periph(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_periph(pio, mask, AT91_MUX_PERIPH_A); +} + +static inline void at91_mux_pio4_set_B_periph(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_periph(pio, mask, AT91_MUX_PERIPH_B); +} + +static inline void at91_mux_pio4_set_C_periph(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_periph(pio, mask, AT91_MUX_PERIPH_C); +} + +static inline void at91_mux_pio4_set_D_periph(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_periph(pio, mask, AT91_MUX_PERIPH_D); +} + +static inline void at91_mux_pio4_set_E_periph(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_periph(pio, mask, AT91_MUX_PERIPH_E); +} + +static inline void at91_mux_pio4_set_F_periph(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_periph(pio, mask, AT91_MUX_PERIPH_F); +} + +static inline void at91_mux_pio4_set_G_periph(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_periph(pio, mask, AT91_MUX_PERIPH_G); +} + +static inline void at91_mux_pio4_set_func(void __iomem *pio, + unsigned pin_mask, + unsigned cfgr_and_mask, + unsigned cfgr_or_mask) +{ + u32 reg; + writel(pin_mask, pio + PIO4_MSKR); + reg = readl(pio + PIO4_CFGR); + reg &= cfgr_and_mask; + reg |= cfgr_or_mask; + writel(reg, pio + PIO4_CFGR); +} + +static inline void at91_mux_pio4_set_bistate(void __iomem *pio, + unsigned pin_mask, + unsigned func_mask, + bool is_on) +{ + at91_mux_pio4_set_func(pio, pin_mask, ~func_mask, + is_on ? func_mask : 0); +} + +static inline void at91_mux_pio4_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) +{ + at91_mux_pio4_set_bistate(pio, mask, PIO4_IFEN_MASK, is_on); +} + +static inline void at91_mux_pio4_set_debounce(void __iomem *pio, unsigned mask, + bool is_on, u32 div) +{ + at91_mux_pio4_set_bistate(pio, mask, PIO4_IFEN_MASK, is_on); + at91_mux_pio4_set_bistate(pio, mask, PIO4_IFSCEN_MASK, is_on); +} + +static inline void at91_mux_pio4_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) +{ + at91_mux_pio4_set_bistate(pio, mask, PIO4_PDEN_MASK, is_on); +} + +static inline void at91_mux_pio4_disable_schmitt_trig(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_bistate(pio, mask, PIO4_SCHMITT_MASK, false); +} + +static inline void at91_mux_gpio4_enable(void __iomem *pio, unsigned mask) +{ + at91_mux_pio4_set_func(pio, mask, ~PIO4_CFGR_FUNC_MASK, AT91_MUX_GPIO); +} + +static inline void at91_mux_gpio4_input(void __iomem *pio, unsigned mask, bool input) +{ + u32 cfgr; + + writel(mask, pio + PIO4_MSKR); + + cfgr = readl(pio + PIO4_CFGR); + if (input) + cfgr &= ~PIO4_DIR_MASK; + else + cfgr |= PIO4_DIR_MASK; + writel(cfgr, pio + PIO4_CFGR); +} + +static inline void at91_mux_gpio4_set(void __iomem *pio, unsigned mask, + int value) +{ + writel(mask, pio + (value ? PIO4_SODR : PIO4_CODR)); +} + +static inline int at91_mux_gpio4_get(void __iomem *pio, unsigned mask) +{ + u32 pdsr; - pdsr = readl(pio + PIO_PDSR); - return (pdsr & mask) != 0; + pdsr = readl(pio + PIO4_PDSR); + return (pdsr & mask) != 0; } #endif /* __AT91_GPIO_H__ */ diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 21462030e9..3ae54247e0 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -29,6 +29,7 @@ #include <mach/at91sam9g45.h> #include <mach/at91sam9n12.h> #include <mach/at91sam9x5.h> +#include <mach/sama5d2.h> #include <mach/sama5d3.h> #include <mach/sama5d4.h> diff --git a/arch/arm/mach-at91/include/mach/iomux.h b/arch/arm/mach-at91/include/mach/iomux.h index bac7ef65a2..0c91b22a8f 100644 --- a/arch/arm/mach-at91/include/mach/iomux.h +++ b/arch/arm/mach-at91/include/mach/iomux.h @@ -17,6 +17,7 @@ #include <asm-generic/errno.h> #include <mach/at91_pio.h> #include <mach/hardware.h> +#include <mach/gpio.h> #define AT91_PIN_PA0 (0x00 + 0) #define AT91_PIN_PA1 (0x00 + 1) @@ -183,14 +184,6 @@ #define AT91_PIN_PE30 (0x80 + 30) #define AT91_PIN_PE31 (0x80 + 31) -enum at91_mux { - AT91_MUX_GPIO = 0, - AT91_MUX_PERIPH_A = 1, - AT91_MUX_PERIPH_B = 2, - AT91_MUX_PERIPH_C = 3, - AT91_MUX_PERIPH_D = 4, -}; - /* * mux the pin */ diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h new file mode 100644 index 0000000000..3dad7d9c9c --- /dev/null +++ b/arch/arm/mach-at91/include/mach/sama5d2.h @@ -0,0 +1,261 @@ +// SPDX-License-Identifier: BSD-1-Clause +/* + * Chip-specific header file for the SAMA5D2 family + * + * Copyright (c) 2015, Atmel Corporation + * Copyright (c) 2019 Ahmad Fatoum, Pengutronix + * + * Common definitions. + * Based on SAMA5D2 datasheet: + * http://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Series-Data-Sheet-DS60001476C.pdf + * + */ + +#ifndef SAMA5D2_H +#define SAMA5D2_H + +/* + * Peripheral identifiers/interrupts. (Table 18-9) + */ +#define SAMA5D2_ID_FIQ 0 /* FIQ Interrupt ID */ +/* 1 */ +#define SAMA5D2_ID_ARM 2 /* Performance Monitor Unit */ +#define SAMA5D2_ID_PIT 3 /* Periodic Interval Timer Interrupt */ +#define SAMA5D2_ID_WDT 4 /* Watchdog Timer Interrupt */ +#define SAMA5D2_ID_GMAC 5 /* Ethernet MAC */ +#define SAMA5D2_ID_XDMAC0 6 /* DMA Controller 0 */ +#define SAMA5D2_ID_XDMAC1 7 /* DMA Controller 1 */ +#define SAMA5D2_ID_ICM 8 /* Integrity Check Monitor */ +#define SAMA5D2_ID_AES 9 /* Advanced Encryption Standard */ +#define SAMA5D2_ID_AESB 10 /* AES bridge */ +#define SAMA5D2_ID_TDES 11 /* Triple Data Encryption Standard */ +#define SAMA5D2_ID_SHA 12 /* SHA Signature */ +#define SAMA5D2_ID_MPDDRC 13 /* MPDDR Controller */ +#define SAMA5D2_ID_MATRIX1 14 /* H32MX, 32-bit AHB Matrix */ +#define SAMA5D2_ID_MATRIX0 15 /* H64MX, 64-bit AHB Matrix */ +#define SAMA5D2_ID_SECUMOD 16 /* Secure Module */ +#define SAMA5D2_ID_HSMC 17 /* Multi-bit ECC interrupt */ +#define SAMA5D2_ID_PIOA 18 /* Parallel I/O Controller A */ +#define SAMA5D2_ID_FLEXCOM0 19 /* FLEXCOM0 */ +#define SAMA5D2_ID_FLEXCOM1 20 /* FLEXCOM1 */ +#define SAMA5D2_ID_FLEXCOM2 21 /* FLEXCOM2 */ +#define SAMA5D2_ID_FLEXCOM3 22 /* FLEXCOM3 */ +#define SAMA5D2_ID_FLEXCOM4 23 /* FLEXCOM4 */ +#define SAMA5D2_ID_UART0 24 /* UART0 */ +#define SAMA5D2_ID_UART1 25 /* UART1 */ +#define SAMA5D2_ID_UART2 26 /* UART2 */ +#define SAMA5D2_ID_UART3 27 /* UART3 */ +#define SAMA5D2_ID_UART4 28 /* UART4 */ +#define SAMA5D2_ID_TWI0 29 /* Two-wire Interface 0 */ +#define SAMA5D2_ID_TWI1 30 /* Two-wire Interface 1 */ +#define SAMA5D2_ID_SDMMC0 31 /* Secure Data Memory Card Controller 0 */ +#define SAMA5D2_ID_SDMMC1 32 /* Secure Data Memory Card Controller 1 */ +#define SAMA5D2_ID_SPI0 33 /* Serial Peripheral Interface 0 */ +#define SAMA5D2_ID_SPI1 34 /* Serial Peripheral Interface 1 */ +#define SAMA5D2_ID_TC0 35 /* Timer Counter 0 (ch.0,1,2) */ +#define SAMA5D2_ID_TC1 36 /* Timer Counter 1 (ch.3,4,5) */ +/* 37 */ +#define SAMA5D2_ID_PWM 38 /* Pulse Width Modulation Controller0 (ch. 0,1,2,3) */ +/* 39 */ +#define SAMA5D2_ID_ADC 40 /* Touch Screen ADC Controller */ +#define SAMA5D2_ID_UHPHS 41 /* USB Host High Speed */ +#define SAMA5D2_ID_UDPHS 42 /* USB Device High Speed */ +#define SAMA5D2_ID_SSC0 43 /* Serial Synchronous Controller 0 */ +#define SAMA5D2_ID_SSC1 44 /* Serial Synchronous Controller 1 */ +#define SAMA5D2_ID_LCDC 45 /* LCD Controller */ +#define SAMA5D2_ID_ISI 46 /* Image Sensor Interface */ +#define SAMA5D2_ID_TRNG 47 /* True Random Number Generator */ +#define SAMA5D2_ID_PDMIC 48 /* Pulse Density Modulation Interface Controller */ +#define SAMA5D2_ID_IRQ 49 /* IRQ Interrupt ID */ +#define SAMA5D2_ID_SFC 50 /* Fuse Controller */ +#define SAMA5D2_ID_SECURAM 51 /* Secure RAM */ +#define SAMA5D2_ID_QSPI0 52 /* QSPI0 */ +#define SAMA5D2_ID_QSPI1 53 /* QSPI1 */ +#define SAMA5D2_ID_I2SC0 54 /* Inter-IC Sound Controller 0 */ +#define SAMA5D2_ID_I2SC1 55 /* Inter-IC Sound Controller 1 */ +#define SAMA5D2_ID_CAN0_INT0 56 /* MCAN 0 Interrupt0 */ +#define SAMA5D2_ID_CAN1_INT0 57 /* MCAN 1 Interrupt0 */ +#define SAMA5D2_ID_PTC 58 /* Peripheral Touch Controller */ +#define SAMA5D2_ID_CLASSD 59 /* Audio Class D Amplifier */ +#define SAMA5D2_ID_SFR 60 /* Special Function Register */ +#define SAMA5D2_ID_SAIC 61 /* Secured Advanced Interrupt Controller */ +#define SAMA5D2_ID_AIC 62 /* Advanced Interrupt Controller */ +#define SAMA5D2_ID_L2CC 63 /* L2 Cache Controller */ +#define SAMA5D2_ID_CAN0_INT1 64 /* MCAN 0 Interrupt1 */ +#define SAMA5D2_ID_CAN1_INT1 65 /* MCAN 1 Interrupt1 */ +#define SAMA5D2_ID_GMAC_Q1 66 /* GMAC Queue 1 Interrupt */ +#define SAMA5D2_ID_GMAC_Q2 67 /* GMAC Queue 2 Interrupt */ +#define SAMA5D2_ID_PIOB 68 /* Parallel I/O Controller B */ +#define SAMA5D2_ID_PIOC 69 /* Parallel I/O Controller C */ +#define SAMA5D2_ID_PIOD 70 /* Parallel I/O Controller D */ +#define SAMA5D2_ID_SDMMC0_TIMER 71 /* Secure Data Memory Card Controller 0 */ +#define SAMA5D2_ID_SDMMC1_TIMER 72 /* Secure Data Memory Card Controller 1 */ +/* 73 */ +#define SAMA5D2_ID_SYS 74 /* System Controller Interrupt */ +#define SAMA5D2_ID_ACC 75 /* Analog Comparator */ +#define SAMA5D2_ID_RXLP 76 /* UART Low-Power */ +#define SAMA5D2_ID_SFRBU 77 /* Special Function Register BackUp */ +#define SAMA5D2_ID_CHIPID 78 /* Chip ID */ + +/* + * User Peripheral physical base addresses. + */ + +#define SAMA5D2_BASE_LCDC 0xf0000000 +#define SAMA5D2_BASE_XDMAC1 0xf0004000 +#define SAMA5D2_BASE_HXISI 0xf0008000 +#define SAMA5D2_BASE_MPDDRC 0xf000c000 +#define SAMA5D2_BASE_XDMAC0 0xf0010000 +#define SAMA5D2_BASE_PMC 0xf0014000 +#define SAMA5D2_BASE_MATRIX64 0xf0018000 /* MATRIX0 */ +#define SAMA5D2_BASE_AESB 0xf001c000 +#define SAMA5D2_BASE_QSPI0 0xf0020000 +#define SAMA5D2_BASE_QSPI1 0xf0024000 +#define SAMA5D2_BASE_SHA 0xf0028000 +#define SAMA5D2_BASE_AES 0xf002c000 + +#define SAMA5D2_BASE_SPI0 0xf8000000 +#define SAMA5D2_BASE_SSC0 0xf8004000 +#define SAMA5D2_BASE_GMAC 0xf8008000 +#define SAMA5D2_BASE_TC0 0xf800c000 +#define SAMA5D2_BASE_TC1 0xf8010000 +#define SAMA5D2_BASE_HSMC 0xf8014000 +#define SAMA5D2_BASE_PDMIC 0xf8018000 +#define SAMA5D2_BASE_UART0 0xf801c000 +#define SAMA5D2_BASE_UART1 0xf8020000 +#define SAMA5D2_BASE_UART2 0xf8024000 +#define SAMA5D2_BASE_TWI0 0xf8028000 +#define SAMA5D2_BASE_PWMC 0xf802c000 +#define SAMA5D2_BASE_SFR 0xf8030000 +#define SAMA5D2_BASE_FLEXCOM0 0xf8034000 +#define SAMA5D2_BASE_FLEXCOM1 0xf8038000 +#define SAMA5D2_BASE_SAIC 0xf803c000 +#define SAMA5D2_BASE_ICM 0xf8040000 +#define SAMA5D2_BASE_SECURAM 0xf8044000 +#define SAMA5D2_BASE_SYSC 0xf8048000 +#define SAMA5D2_BASE_ACC 0xf804a000 +#define SAMA5D2_BASE_SFC 0xf804c000 +#define SAMA5D2_BASE_I2SC0 0xf8050000 +#define SAMA5D2_BASE_CAN0 0xf8054000 + +#define SAMA5D2_BASE_SPI1 0xfc000000 +#define SAMA5D2_BASE_SSC1 0xfc004000 +#define SAMA5D2_BASE_UART3 0xfc008000 +#define SAMA5D2_BASE_UART4 0xfc00c000 +#define SAMA5D2_BASE_FLEXCOM2 0xfc010000 +#define SAMA5D2_BASE_FLEXCOM3 0xfc014000 +#define SAMA5D2_BASE_FLEXCOM4 0xfc018000 +#define SAMA5D2_BASE_TRNG 0xfc01c000 +#define SAMA5D2_BASE_AIC 0xfc020000 +#define SAMA5D2_BASE_TWI1 0xfc028000 +#define SAMA5D2_BASE_UDPHS 0xfc02c000 +#define SAMA5D2_BASE_ADC 0xfc030000 + +#define SAMA5D2_BASE_PIOA 0xfc038000 +#define SAMA5D2_BASE_MATRIX32 0xfc03c000 /* MATRIX1 */ +#define SAMA5D2_BASE_SECUMOD 0xfc040000 +#define SAMA5D2_BASE_TDES 0xfc044000 +#define SAMA5D2_BASE_CLASSD 0xfc048000 +#define SAMA5D2_BASE_I2SC1 0xfc04c000 +#define SAMA5D2_BASE_CAN1 0xfc050000 +#define SAMA5D2_BASE_SFRBU 0xfc05c000 +#define SAMA5D2_BASE_CHIPID 0xfc069000 + +/* + * Address Memory Space + */ +#define SAMA5D2_BASE_INTERNAL_MEM 0x00000000 +#define SAMA5D2_BASE_CS0 0x10000000 +#define SAMA5D2_BASE_DDRCS 0x20000000 +#define SAMA5D2_BASE_DDRCS_AES 0x40000000 +#define SAMA5D2_BASE_CS1 0x60000000 +#define SAMA5D2_BASE_CS2 0x70000000 +#define SAMA5D2_BASE_CS3 0x80000000 +#define SAMA5D2_BASE_QSPI0_AES_MEM 0x90000000 +#define SAMA5D2_BASE_QSPI1_AES_MEM 0x98000000 +#define SAMA5D2_BASE_SDHC0 0xa0000000 +#define SAMA5D2_BASE_SDHC1 0xb0000000 +#define SAMA5D2_BASE_NFC_CMD_REG 0xc0000000 +#define SAMA5D2_BASE_QSPI0_MEM 0xd0000000 +#define SAMA5D2_BASE_QSPI1_MEM 0xd8000000 +#define SAMA5D2_BASE_PERIPH 0xf0000000 + +/* + * Internal Memories + */ +#define SAMA5D2_BASE_ROM 0x00000000 /* ROM */ +#define SAMA5D2_BASE_ECC_ROM 0x00060000 /* ECC ROM */ +#define SAMA5D2_BASE_NFC_SRAM 0x00100000 /* NFC SRAM */ +#define SAMA5D2_BASE_SRAM0 0x00200000 /* SRAM0 */ +#define SAMA5D2_BASE_SRAM1 0x00220000 /* SRAM1 */ +#define SAMA5D2_BASE_UDPHS_SRAM 0x00300000 /* UDPHS RAM */ +#define SAMA5D2_BASE_UHP_OHCI 0x00400000 /* UHP OHCI */ +#define SAMA5D2_BASE_UHP_EHCI 0x00500000 /* UHP EHCI */ +#define SAMA5D2_BASE_AXI_MATRIX 0x00600000 /* AXI Maxtrix */ +#define SAMA5D2_BASE_DAP 0x00700000 /* DAP */ +#define SAMA5D2_BASE_PTC 0x00800000 /* PTC */ +#define SAMA5D2_BASE_L2CC 0x00A00000 /* L2CC */ + +/* + * Other misc defines + */ +#define SAMA5D2_BASE_PMECC (SAMA5D2_BASE_HSMC + 0x70) +#define SAMA5D2_BASE_PMERRLOC (SAMA5D2_BASE_HSMC + 0x500) + +#define SAMA5D2_PMECC (SAMA5D2_BASE_PMECC - SAMA5D2_BASE_SYS) +#define SAMA5D2_PMERRLOC (SAMA5D2_BASE_PMERRLOC - SAMA5D2_BASE_SYS) + +#define SAMA5D2_BASE_PIOB (SAMA5D2_BASE_PIOA + 0x40) +#define SAMA5D2_BASE_PIOC (SAMA5D2_BASE_PIOB + 0x40) +#define SAMA5D2_BASE_PIOD (SAMA5D2_BASE_PIOC + 0x40) + +/* SYSC spawns */ +#define SAMA5D2_BASE_RSTC SAMA5D2_BASE_SYSC +#define SAMA5D2_BASE_SHDC (SAMA5D2_BASE_SYSC + 0x10) +#define SAMA5D2_BASE_PITC (SAMA5D2_BASE_SYSC + 0x30) +#define SAMA5D2_BASE_WDT (SAMA5D2_BASE_SYSC + 0x40) +#define SAMA5D2_BASE_SCKCR (SAMA5D2_BASE_SYSC + 0x50) +#define SAMA5D2_BASE_RTCC (SAMA5D2_BASE_SYSC + 0xb0) + +#define SAMA5D2_BASE_SMC (SAMA5D2_BASE_HSMC + 0x700) + +#define SAMA5D2_NUM_PIO 4 +#define SAMA5D2_NUM_TWI 2 + +/* AICREDIR Unlock Key */ +#define SAMA5D2_AICREDIR_KEY 0xB6D81C4D + +/* + * Matrix Slaves ID + */ +/* MATRIX0(H64MX) Matrix Slaves */ +/* Bridge from H64MX to AXIMX (Internal ROM, Cryto Library, PKCC RAM) */ +#define SAMA5D2_H64MX_SLAVE_BRIDGE_TO_AXIMX 0 +#define SAMA5D2_H64MX_SLAVE_PERI_BRIDGE 1 /* H64MX Peripheral Bridge */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_0 2 /* DDR2 Port0-AESOTF */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_1 3 /* DDR2 Port1 */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_2 4 /* DDR2 Port2 */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_3 5 /* DDR2 Port3 */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_4 6 /* DDR2 Port4 */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_5 7 /* DDR2 Port5 */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_6 8 /* DDR2 Port6 */ +#define SAMA5D2_H64MX_SLAVE_DDR2_PORT_7 9 /* DDR2 Port7 */ +#define SAMA5D2_H64MX_SLAVE_INTERNAL_SRAM 10 /* Internal SRAM 128K */ +#define SAMA5D2_H64MX_SLAVE_CACHE_L2 11 /* Internal SRAM 128K (Cache L2) */ +#define SAMA5D2_H64MX_SLAVE_QSPI0 12 /* QSPI0 */ +#define SAMA5D2_H64MX_SLAVE_QSPI1 13 /* QSPI1 */ +#define SAMA5D2_H64MX_SLAVE_AESB 14 /* AESB */ + +/* MATRIX1(H32MX) Matrix Slaves */ +#define SAMA5D2_H32MX_BRIDGE_TO_H64MX 0 /* Bridge from H32MX to H64MX */ +#define SAMA5D2_H32MX_PERI_BRIDGE_0 1 /* H32MX Peripheral Bridge 0 */ +#define SAMA5D2_H32MX_PERI_BRIDGE_1 2 /* H32MX Peripheral Bridge 1 */ +#define SAMA5D2_H32MX_EXTERNAL_EBI 3 /* External Bus Interface */ +#define SAMA5D2_H32MX_NFC_CMD_REG 3 /* NFC command Register */ +#define SAMA5D2_H32MX_NFC_SRAM 4 /* NFC SRAM */ +#define SAMA5D2_H32MX_USB 5 + +#define SAMA5D2_SRAM_BASE SAMA5D2_BASE_SRAM0 +#define SAMA5D2_SRAM_SIZE (128 * SZ_1K) + +#endif diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h index f0e53610c6..cd2102c20e 100644 --- a/arch/arm/mach-at91/include/mach/sama5d3.h +++ b/arch/arm/mach-at91/include/mach/sama5d3.h @@ -92,7 +92,7 @@ #define SAMA5D3_BASE_RSTC 0xfffffe00 #define SAMA5D3_BASE_PIT 0xfffffe30 #define SAMA5D3_BASE_WDT 0xfffffe40 - +#define SAMA5D3_BASE_PMC 0xfffffc00 #define SAMA5D3_BASE_PMECC 0xffffc070 #define SAMA5D3_BASE_PMERRLOC 0xffffc500 diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index a4d441f023..05584c0711 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -19,7 +19,8 @@ #define AT91_SAM9_SMC_CS_STRIDE 0x10 #define AT91_SAMA5_SMC_CS_STRIDE 0x14 -#define AT91_SMC_CS_STRIDE ((at91_soc_initdata.type == AT91_SOC_SAMA5D3 \ +#define AT91_SMC_CS_STRIDE ((at91_soc_initdata.type == AT91_SOC_SAMA5D2 \ + || at91_soc_initdata.type == AT91_SOC_SAMA5D3 \ || at91_soc_initdata.type == AT91_SOC_SAMA5D4) \ ? AT91_SAMA5_SMC_CS_STRIDE : AT91_SAM9_SMC_CS_STRIDE) #define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * AT91_SMC_CS_STRIDE)) @@ -32,6 +33,7 @@ static void sam9_smc_cs_write_mode(void __iomem *base, void __iomem *mode_reg; switch (at91_soc_initdata.type) { + case AT91_SOC_SAMA5D2: case AT91_SOC_SAMA5D3: case AT91_SOC_SAMA5D4: mode_reg = base + AT91_SAMA5_SMC_MODE; @@ -106,6 +108,7 @@ static void sam9_smc_cs_read_mode(void __iomem *base, void __iomem *mode_reg; switch (at91_soc_initdata.type) { + case AT91_SOC_SAMA5D2: case AT91_SOC_SAMA5D3: case AT91_SOC_SAMA5D4: mode_reg = base + AT91_SAMA5_SMC_MODE; diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 4e30c78de7..b7a66aa0ae 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -25,7 +25,7 @@ void __initdata (*at91_boot_soc)(void); struct at91_socinfo at91_soc_initdata; EXPORT_SYMBOL(at91_soc_initdata); -static void __init soc_detect(u32 dbgu_base) +static void __init dbgu_soc_detect(u32 dbgu_base) { u32 cidr, socid; @@ -188,6 +188,84 @@ static void __init soc_detect(u32 dbgu_base) } } +static void __init chipid_soc_detect(u32 chipid_base) +{ + u32 cidr, socid; + + cidr = readl(chipid_base); + socid = cidr & AT91_CIDR_ARCH; + + if (!(cidr & AT91_CIDR_EXT)) + return; + + if (socid == (ARCH_ID_SAMA5 & AT91_CIDR_ARCH)) { + at91_soc_initdata.exid = readl(chipid_base + 4); + + switch (at91_soc_initdata.exid) { + case ARCH_EXID_SAMA5D21CU: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D21CU; + break; + case ARCH_EXID_SAMA5D225C_D1M: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D225C_D1M; + break; + case ARCH_EXID_SAMA5D22CU: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D22CU; + break; + case ARCH_EXID_SAMA5D22CN: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D22CN; + break; + case ARCH_EXID_SAMA5D23CU: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D23CU; + break; + case ARCH_EXID_SAMA5D24CX: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D24CX; + break; + case ARCH_EXID_SAMA5D24CU: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D24CU; + break; + case ARCH_EXID_SAMA5D26CU: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D26CU; + break; + case ARCH_EXID_SAMA5D27C_D1G: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D27C_D1G; + break; + case ARCH_EXID_SAMA5D27C_D5M: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D27C_D5M; + break; + case ARCH_EXID_SAMA5D27CU: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D27CU; + break; + case ARCH_EXID_SAMA5D27CN: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D27CN; + break; + case ARCH_EXID_SAMA5D28C_D1G: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D28C_D1G; + break; + case ARCH_EXID_SAMA5D28CU: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D28CU; + break; + case ARCH_EXID_SAMA5D28CN: + at91_soc_initdata.type = AT91_SOC_SAMA5D2; + at91_soc_initdata.subtype = AT91_SOC_SAMA5D28CN; + break; + } + } +} + static const char *soc_name[] = { [AT91_SOC_RM9200] = "at91rm9200", [AT91_SOC_SAM9260] = "at91sam9260", @@ -199,6 +277,7 @@ static const char *soc_name[] = { [AT91_SOC_SAM9RL] = "at91sam9rl", [AT91_SOC_SAM9X5] = "at91sam9x5", [AT91_SOC_SAM9N12] = "at91sam9n12", + [AT91_SOC_SAMA5D2] = "sama5d2", [AT91_SOC_SAMA5D3] = "sama5d3", [AT91_SOC_SAMA5D4] = "sama5d4", [AT91_SOC_NONE] = "Unknown" @@ -226,6 +305,21 @@ static const char *soc_subtype_name[] = { [AT91_SOC_SAM9N12] = "at91sam9n12", [AT91_SOC_SAM9CN11] = "at91sam9cn11", [AT91_SOC_SAM9CN12] = "at91sam9cn12", + [AT91_SOC_SAMA5D21CU] = "sama5d21cu", + [AT91_SOC_SAMA5D225C_D1M] = "sama5d225c_d1m", + [AT91_SOC_SAMA5D22CU] = "sama5d22cu", + [AT91_SOC_SAMA5D22CN] = "sama5d22cn", + [AT91_SOC_SAMA5D23CU] = "sama5d23cu", + [AT91_SOC_SAMA5D24CX] = "sama5d24cx", + [AT91_SOC_SAMA5D24CU] = "sama5d24cu", + [AT91_SOC_SAMA5D26CU] = "sama5d26cu", + [AT91_SOC_SAMA5D27C_D1G] = "sama5d27c_d1g", + [AT91_SOC_SAMA5D27C_D5M] = "sama5d27c_d5m", + [AT91_SOC_SAMA5D27CU] = "sama5d27cu", + [AT91_SOC_SAMA5D27CN] = "sama5d27cn", + [AT91_SOC_SAMA5D28C_D1G] = "sama5d28c_d1g", + [AT91_SOC_SAMA5D28CU] = "sama5d28cu", + [AT91_SOC_SAMA5D28CN] = "sama5d28cn", [AT91_SOC_SAMA5D31] = "sama5d31", [AT91_SOC_SAMA5D33] = "sama5d33", [AT91_SOC_SAMA5D34] = "sama5d34", @@ -249,11 +343,13 @@ static int at91_detect(void) at91_soc_initdata.type = AT91_SOC_NONE; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - soc_detect(AT91_BASE_DBGU0); + dbgu_soc_detect(AT91_BASE_DBGU0); + if (!at91_soc_is_detected()) + dbgu_soc_detect(AT91_BASE_DBGU1); if (!at91_soc_is_detected()) - soc_detect(AT91_BASE_DBGU1); + dbgu_soc_detect(AT91_BASE_DBGU2); if (!at91_soc_is_detected()) - soc_detect(AT91_BASE_DBGU2); + chipid_soc_detect(0xfc069000); if (!at91_soc_is_detected()) panic("AT91: Impossible to detect the SOC type"); diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e7721621ab..6e98e95dbb 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -397,6 +397,11 @@ config MACH_TECHNEXION_WANDBOARD select ARM_USE_COMPRESSED_DTB select MCI_IMX_ESDHC_PBL +config MACH_EMBEST_MARSBOARD + bool "Embest MarSboard" + select ARCH_IMX6 + select ARM_USE_COMPRESSED_DTB + config MACH_EMBEST_RIOTBOARD bool "Embest RIoTboard" select ARCH_IMX6 @@ -447,12 +452,14 @@ config MACH_ZII_RDU1 select MACH_FREESCALE_MX51_PDK_POWER select CRC8 select MACH_ZII_COMMON + select ARM_USE_COMPRESSED_DTB config MACH_ZII_RDU2 bool "ZII i.MX6Q(+) RDU2" select ARCH_IMX6 select MCI_IMX_ESDHC_PBL select MACH_ZII_COMMON + select ARM_USE_COMPRESSED_DTB config MACH_ZII_IMX8MQ_DEV bool "ZII i.MX8MQ based devices" @@ -462,15 +469,18 @@ config MACH_ZII_IMX8MQ_DEV select ARM_SMCCC select MCI_IMX_ESDHC_PBL select MACH_ZII_COMMON + select ARM_USE_COMPRESSED_DTB config MACH_ZII_VF610_DEV bool "ZII VF610 Dev Family" select ARCH_VF610 select CLKDEV_LOOKUP + select ARM_USE_COMPRESSED_DTB config MACH_ZII_IMX7D_DEV bool "ZII i.MX7D based devices" select ARCH_IMX7 + select ARM_USE_COMPRESSED_DTB config MACH_PHYTEC_PHYCORE_IMX7 bool "Phytec phyCORE i.MX7" diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index 0fdd9f082f..41e0066add 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -192,13 +192,7 @@ int imx6_cpu_revision(void) u64 imx6_uid(void) { - void __iomem *ocotpbase = IOMEM(MX6_OCOTP_BASE_ADDR); - u64 uid; - - uid = ((u64)readl(ocotpbase + MX6_OCOTP_CFG0) << 32); - uid |= (u64)readl(ocotpbase + MX6_OCOTP_CFG1); - - return uid; + return imx_ocotp_read_uid(IOMEM(MX6_OCOTP_BASE_ADDR)); } int imx6_init(void) diff --git a/arch/arm/mach-imx/imx8mq.c b/arch/arm/mach-imx/imx8mq.c index 089344528d..d06ba098c3 100644 --- a/arch/arm/mach-imx/imx8mq.c +++ b/arch/arm/mach-imx/imx8mq.c @@ -20,6 +20,7 @@ #include <mach/revision.h> #include <mach/imx8mq.h> #include <mach/reset-reason.h> +#include <mach/ocotp.h> #include <linux/iopoll.h> #include <linux/arm-smccc.h> @@ -27,6 +28,11 @@ #define FSL_SIP_BUILDINFO 0xC2000003 #define FSL_SIP_BUILDINFO_GET_COMMITHASH 0x00 +u64 imx8mq_uid(void) +{ + return imx_ocotp_read_uid(IOMEM(MX8MQ_OCOTP_BASE_ADDR)); +} + int imx8mq_init(void) { void __iomem *anatop = IOMEM(MX8MQ_ANATOP_BASE_ADDR); @@ -52,6 +58,7 @@ int imx8mq_init(void) * Reset reasons seem to be identical to that of i.MX7 */ imx_set_reset_reason(src + IMX7_SRC_SRSR, imx7_reset_reasons); + pr_info("%s unique ID: %llx\n", cputypestr, imx8mq_uid()); if (IS_ENABLED(CONFIG_ARM_SMCCC) && IS_ENABLED(CONFIG_FIRMWARE_IMX8MQ_ATF)) { diff --git a/arch/arm/mach-imx/include/mach/imx8mq.h b/arch/arm/mach-imx/include/mach/imx8mq.h index 08dc06fdb4..c085894ef7 100644 --- a/arch/arm/mach-imx/include/mach/imx8mq.h +++ b/arch/arm/mach-imx/include/mach/imx8mq.h @@ -49,4 +49,6 @@ static inline int imx8mq_cpu_revision(void) return revision; } +u64 imx8mq_uid(void); + #endif /* __MACH_IMX8_H */
\ No newline at end of file diff --git a/arch/arm/mach-imx/include/mach/imxfb.h b/arch/arm/mach-imx/include/mach/imxfb.h index ea39e3198e..6df7a14dde 100644 --- a/arch/arm/mach-imx/include/mach/imxfb.h +++ b/arch/arm/mach-imx/include/mach/imxfb.h @@ -52,17 +52,11 @@ #define DMACR_HM(x) (((x) & 0xf) << 16) #define DMACR_TM(x) ((x) & 0xf) -struct imx_fb_videomode { - struct fb_videomode mode; - u32 pcr; - unsigned char bpp; -}; - /** * Define relevant framebuffer information */ struct imx_fb_platform_data { - struct imx_fb_videomode *mode; + struct fb_videomode *mode; u_int num_modes; u_int cmap_greyscale:1, @@ -73,6 +67,8 @@ struct imx_fb_platform_data { u_int pwmr; u_int lscr1; u_int dmacr; + u32 pcr; + unsigned char bpp; /** force a memory area to be used, else NULL for dynamic allocation */ void *framebuffer; diff --git a/arch/arm/mach-imx/include/mach/ocotp.h b/arch/arm/mach-imx/include/mach/ocotp.h index e758238cb9..7ba5da156b 100644 --- a/arch/arm/mach-imx/include/mach/ocotp.h +++ b/arch/arm/mach-imx/include/mach/ocotp.h @@ -26,10 +26,24 @@ #define OCOTP_BIT(n) FIELD_PREP(OCOTP_BIT_MASK, n) #define OCOTP_WIDTH(n) FIELD_PREP(OCOTP_WIDTH_MASK, (n) - 1) +#define OCOTP_OFFSET_CFG0 0x410 +#define OCOTP_OFFSET_CFG1 0x420 + int imx_ocotp_read_field(uint32_t field, unsigned *value); int imx_ocotp_write_field(uint32_t field, unsigned value); int imx_ocotp_permanent_write(int enable); bool imx_ocotp_sense_enable(bool enable); +static inline u64 imx_ocotp_read_uid(void __iomem *ocotp) +{ + u64 uid; + + uid = readl(ocotp + OCOTP_OFFSET_CFG0); + uid <<= 32; + uid |= readl(ocotp + OCOTP_OFFSET_CFG1); + + return uid; +} + #endif /* __MACH_IMX_OCOTP_H */ diff --git a/arch/arm/mach-layerscape/Makefile b/arch/arm/mach-layerscape/Makefile index 8a814f9441..854a327c91 100644 --- a/arch/arm/mach-layerscape/Makefile +++ b/arch/arm/mach-layerscape/Makefile @@ -5,3 +5,4 @@ obj-y += icid.o obj-pbl-y += boot.o pbl-y += xload-qspi.o xload.o obj-$(CONFIG_ARCH_LAYERSCAPE_PPA) += ppa.o ppa-entry.o +obj-$(CONFIG_BOOTM) += pblimage.o diff --git a/arch/arm/mach-layerscape/pblimage.c b/arch/arm/mach-layerscape/pblimage.c new file mode 100644 index 0000000000..deaf7143b9 --- /dev/null +++ b/arch/arm/mach-layerscape/pblimage.c @@ -0,0 +1,58 @@ +#define pr_fmt(fmt) "pblimage: " fmt + +#include <bootm.h> +#include <common.h> +#include <init.h> +#include <memory.h> +#include <linux/sizes.h> + +#define BAREBOX_STAGE2_OFFSET SZ_128K + +static int do_bootm_layerscape_pblimage(struct image_data *data) +{ + void (*barebox)(unsigned long x0, unsigned long x1, unsigned long x2, + unsigned long x3); + resource_size_t start, end; + int ret; + + ret = memory_bank_first_find_space(&start, &end); + if (ret) + return ret; + + ret = bootm_load_os(data, start); + if (ret) + return ret; + + barebox = (void*)start + BAREBOX_STAGE2_OFFSET; + + if (data->verbose) + printf("Loaded barebox image to 0x%08lx\n", + (unsigned long)barebox); + + shutdown_barebox(); + + barebox(0, 0, 0, 0); + + return -EIO; +} + +static struct image_handler image_handler_layerscape_pbl_image = { + .name = "Layerscape image", + .bootm = do_bootm_layerscape_pblimage, + .filetype = filetype_layerscape_image, +}; + +static struct image_handler image_handler_layerscape_qspi_pbl_image = { + .name = "Layerscape QSPI image", + .bootm = do_bootm_layerscape_pblimage, + .filetype = filetype_layerscape_qspi_image, +}; + +static int layerscape_register_pbl_image_handler(void) +{ + register_image_handler(&image_handler_layerscape_pbl_image); + register_image_handler(&image_handler_layerscape_qspi_pbl_image); + + return 0; +} +late_initcall(layerscape_register_pbl_image_handler); diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index fed7b524de..b3a7c6259c 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -29,9 +29,6 @@ endchoice if ARCH_IMX23 -choice - prompt "i.MX23 Board Type" - config MACH_MX23EVK bool "mx23-evk" help @@ -45,36 +42,27 @@ config MACH_CHUMBY config MACH_IMX233_OLINUXINO bool "Olimex.ltd imx223-olinuxino" - select HAVE_PBL_MULTI_IMAGES help Say Y here if you are using the imx233-olinuxino -endchoice - endif if ARCH_IMX28 -choice - prompt "i.MX28 Board Type" - config MACH_TX28 bool "KARO tx28" - select HAVE_PBL_MULTI_IMAGES help Say Y here if you are using the KARO TX28 CPU module. config MACH_MX28EVK bool "mx28-evk" select MXS_OCOTP - select HAVE_PBL_MULTI_IMAGES help Say Y here if you are using the Freescale i.MX28-EVK board config MACH_DUCKBILL bool "Duckbill" select MXS_OCOTP - select HAVE_PBL_MULTI_IMAGES help Say Y here if you are using the I2SE Duckbill board @@ -86,8 +74,6 @@ config MACH_CFA10036 help Say Y here if you are using the Crystalfontz CFA-10036 module -endchoice - endif menu "i.MX specific settings" diff --git a/arch/arm/mach-netx/Kconfig b/arch/arm/mach-netx/Kconfig deleted file mode 100644 index 63cfe3be43..0000000000 --- a/arch/arm/mach-netx/Kconfig +++ /dev/null @@ -1,34 +0,0 @@ -if ARCH_NETX - -config ARCH_TEXT_BASE - hex - default 0x81f00000 if MACH_NXDB500 - -config NETX_SDRAM_CTRL - hex - default 0x010D0121 if MACH_NXDB500 - -config NETX_SDRAM_TIMING_CTRL - hex - default 0x03C13261 if MACH_NXDB500 - -config NETX_MEM_CTRL - hex - default 0x0203030F if MACH_NXDB500 - -config NETX_COOKIE - hex - default 32 if MACH_NXDB500 - -choice - prompt "Netx Board Type" - -config MACH_NXDB500 - bool "Hilscher Netx nxdb500" - select HAS_NETX_ETHER - help - Say Y here if you are using the Hilscher Netx nxdb500 board - -endchoice - -endif diff --git a/arch/arm/mach-netx/Makefile b/arch/arm/mach-netx/Makefile deleted file mode 100644 index 0b6791e787..0000000000 --- a/arch/arm/mach-netx/Makefile +++ /dev/null @@ -1,5 +0,0 @@ - -obj-y += clocksource.o -obj-y += lowlevel_init.o -obj-y += generic.o - diff --git a/arch/arm/mach-netx/clocksource.c b/arch/arm/mach-netx/clocksource.c deleted file mode 100644 index 1eb977d3c9..0000000000 --- a/arch/arm/mach-netx/clocksource.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * - * (C) Copyright 2007 - * Sascha Hauer, Pengutronix - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <init.h> -#include <clock.h> -#include <mach/netx-regs.h> - -static uint64_t netx_clocksource_read(void) -{ - return GPIO_REG(GPIO_COUNTER_CURRENT(0)); -} - -static struct clocksource cs = { - .read = netx_clocksource_read, - .mask = CLOCKSOURCE_MASK(32), - .shift = 10, -}; - -static int clocksource_init (void) -{ - /* disable timer initially */ - GPIO_REG(GPIO_COUNTER_CTRL(0)) = 0; - /* Reset the timer value to zero */ - GPIO_REG(GPIO_COUNTER_CURRENT(0)) = 0; - GPIO_REG(GPIO_COUNTER_MAX(0)) = 0xffffffff; - GPIO_REG(GPIO_COUNTER_CTRL(0)) = COUNTER_CTRL_RUN; - - cs.mult = clocksource_hz2mult(100 * 1000 * 1000, cs.shift); - - return init_clock(&cs); -} - -core_initcall(clocksource_init); diff --git a/arch/arm/mach-netx/eth_firmware.h b/arch/arm/mach-netx/eth_firmware.h deleted file mode 100644 index a90d0a5eb4..0000000000 --- a/arch/arm/mach-netx/eth_firmware.h +++ /dev/null @@ -1,370 +0,0 @@ - -unsigned int rpu_eth0[] = { - 0x00f40401, 0x915fdb81, 0x01e7fffd, 0x915fdb82, 0x01e3fffd, 0x915fdb83, 0x012bff01, 0x915fdb84, 0x01240001, - 0x915fdb85, 0x00ac17bd, 0x915fdb86, 0x00dc0000, 0x001be686, 0x20dc0000, 0x001c1c87, 0x0137f811, 0x91561ca4, - 0x20c000c9, 0x8d9e1ca4, 0x0137fe41, 0x91481b8d, 0x00dc0000, 0x001be689, 0x00001800, 0x01dfdbac, 0x20700021, - 0x82b61ca4, 0x007000c9, 0x859fdb8f, 0x20dc0000, 0x001e1ca4, 0x1c700020, 0xf2bfdb91, 0x20dc0000, 0x001e1ca4, - 0x20dc0000, 0x001e1ca4, 0x1c700020, 0xf2be1911, 0x00ac17cd, 0x91485b95, 0x20dc0000, 0x001c1c9b, 0x00dc0000, - 0x00185cab, 0x00000c00, 0x01c91aac, 0x20dc0000, 0x001c1ca8, 0x18dc0000, 0x00185cab, 0x04700020, 0xf2ba1c95, - 0x00dc0000, 0x001be524, 0x00000c00, 0x01c91aac, 0x00000400, 0x01ce1b9f, 0x00001c00, 0x01c8c81f, 0x0137feb1, - 0x915fdba0, 0x00020000, 0x01d08820, 0x00dc0000, 0x001fdba2, 0x00000001, 0x9153c022, 0x00dc0000, 0x001fdb81, - 0x00c8005a, 0x52305cab, 0x00001400, 0x01c89b2c, 0x00001000, 0x01ca1bac, 0x00001400, 0x01dfdb9f, 0x00dc0000, - 0x001be524, 0x00000800, 0x01ce1b9f, 0x00dc0000, 0x001fdb9e, 0x00000400, 0x01dfdbac, 0x00dc0000, 0x00181cac, - 0x00dc0000, 0x001fdb9f, -}; - -unsigned int rpu_eth0_patch[] = { - 0x00160844, 0x00000000, 0x0016089c, 0x0000dd7b, 0x001608a0, 0x0000c704, 0x001608f0, 0x00000280, 0x00160934, - 0x00000000, 0x0016093c, 0x0000ff00, 0x00160940, 0x0000d500, 0x00160944, 0x0000ffff, 0x00160948, 0x00000081, - 0x001609d8, 0x00001db7, 0x001609dc, 0x000004c1, 0x001609e8, 0x000003f8, -}; - -unsigned int tpu_eth0[] = { - 0x010c0041, 0x915fdb81, 0x01fbfffd, 0x915fdb82, 0x01f7fffd, 0x915fdb83, 0x012ffdfd, 0x915fdb84, 0x00dc0000, - 0x001bc82d, 0x01380001, 0x91489c86, 0x01390001, 0x914ba707, 0x00dc0000, 0x001bc82d, 0x00b00020, 0xea97c085, - 0x00b000b0, 0xeddfdb8a, 0x01300001, 0x627fdb8b, 0x00dc0000, 0x001b8093, 0x01380001, 0x91489c8d, 0x00c80102, - 0x727fdb8e, 0x00dc0000, 0x00199b10, 0x00dc0000, 0x001fdb8c, 0x00c80182, 0x727fdb91, 0x00dc0000, 0x00199b16, - 0x00dc0000, 0x001fdb90, 0x00a40020, 0xea918813, 0x00a400a4, 0xedd18814, 0x00ec0005, 0x9157d995, 0x20855555, - 0x915fdb97, 0x00ec0005, 0x915fdb98, 0x013bff11, 0x915fdb99, 0x28dc0000, 0x0018dcd3, 0x00840035, 0x91565919, - 0x280800c5, 0x955fdb9c, 0x00048000, 0x09d8dcd7, 0x048400c8, 0xed9fdb9e, 0x28dc0000, 0x0018dcdd, 0x3cc800c9, - 0x0d58dcdd, 0x00dc0000, 0x001d881d, 0x008401f5, 0x94bfdba2, 0x28dc0000, 0x0018dcdd, 0x00041000, 0x09cfd924, - 0x28dc0000, 0x0018dcdd, 0x28dc0000, 0x0018dcdd, 0x288401f9, 0x94b0dcdd, 0x28dc0000, 0x0018dcdd, 0x28dc0000, - 0x0018dcdd, 0x28dc0000, 0x0018dcdd, 0x0084000d, 0x08cfd92b, 0x28ec0001, 0x9150dcdd, 0x0087fffd, 0x915bd96d, - 0x01390001, 0x914ba72e, 0x00dc0000, 0x001fc805, 0x00b00020, 0xea97c0ad, 0x00b000b0, 0xeddfdbb1, 0x01300001, - 0x627fdbb2, 0x00dc0000, 0x001b80b6, 0x00c80182, 0x727fdbb4, 0x00dc0000, 0x00199b39, 0x00dc0000, 0x001fdbb3, - 0x00a40020, 0xea918836, 0x00a400a4, 0xedd18837, 0x00ec0005, 0x9157d9b8, 0x20855555, 0x915fdbba, 0x00ec0005, - 0x915fdbbb, 0x013bff11, 0x915fdbbc, 0x20dc0000, 0x001fdbbd, 0x00840035, 0x9156593c, 0x200800c5, 0x955fdbbf, - 0x00048000, 0x09dfdbc0, 0x048400c8, 0xed9fdbc1, 0x20dc0000, 0x001fdbc2, 0x34c800c9, 0x0d5fdbc3, 0x00dc0000, - 0x001d8840, 0x008401f5, 0x94bfdbc5, 0x20dc0000, 0x001fdbc6, 0x00041000, 0x09cfd947, 0x20dc0000, 0x001fdbc8, - 0x20dc0000, 0x001fdbc9, 0x20dc0000, 0x001fdbca, 0x008401f9, 0x94bfdbcb, 0x20dc0000, 0x001fdbcc, 0x20dc0000, - 0x001fdbcd, 0x20dc0000, 0x001fdbce, 0x0084000d, 0x08cfd94f, 0x20ec0001, 0x915fdbd0, 0x0087fffd, 0x915bd96d, - 0x01380001, 0x915fdbd2, 0x0005fffc, 0x091fdb81, 0x00840035, 0x914a5956, 0x20dc0000, 0x001fdbd5, 0x00840035, - 0x91565953, 0x20040400, 0x09dfdbd8, 0x00040400, 0x09dfdbd8, 0x013bff81, 0x915fdbd9, 0x0086aaab, 0xe8dfdbda, - 0x20dc0000, 0x001fdbdb, 0x00ec0001, 0x9156595a, 0x0087fffd, 0x915fdbd1, 0x013bff81, 0x915fdbde, 0x0086aaab, - 0xe8dfdbdf, 0x20040400, 0x09cbe5e0, 0x00ec0001, 0x9156595e, 0x0087fffd, 0x915fdbe2, 0x00040800, 0x09cfe5e3, - 0x00dc0000, 0x001fdbd1, 0x20ec000d, 0x915fdbe5, 0x00dc0000, 0x001fdbe6, 0x013bffd1, 0x915fdbe9, 0x013bffc1, - 0x915fdbe8, 0x00855557, 0xe8dfdbe9, 0x213bffc1, 0x91565969, 0x00855557, 0xf0dfdbeb, 0x20dc0000, 0x001e596b, - 0x00ec0001, 0x915fdbd1, 0x00040c00, 0x09cf086e, 0x00dc0000, 0x001fdbd1, -}; - -unsigned int tpu_eth0_patch[] = { - 0x00160884, 0x0000ffff, 0x00160888, 0x00000000, 0x001608a8, 0x0000ffff, 0x00160938, 0x00000000, 0x001609ec, - 0x00001db7, 0x001609f0, 0x000004c1, 0x001609fc, 0x000002f9, -}; - -unsigned int xpec_eth0_mac[] = { - 0x0a00c2df, 0x0a28e2e0, 0x0580c2e1, 0x3400c000, 0x0400c813, 0x1080c813, 0x2800c000, 0x3480c000, 0x3500c000, - 0x0480c813, 0x1100c813, 0x2880c000, 0x1c70e2e2, 0x0000c2e3, 0x00b9b838, 0x40810000, 0x09f042e4, 0xa6000014, - 0x1c70e2e5, 0xbe000015, 0x1c7022e5, 0x09f042e6, 0xa6000019, 0x1c70e2e7, 0xbe00001a, 0x1c7022e7, 0x0e80c2e8, - 0x0f00c2e9, 0x0e00c2ea, 0x0f80c2eb, 0x0a80c2ec, 0x0b00c2ed, 0x2700c3e8, 0xc0fff000, 0x0d00c826, 0x0d80c824, - 0x30c28001, 0x30c26001, 0x0011a83c, 0x0001083c, 0x00b682ee, 0x013682ef, 0x09810801, 0x9600002e, 0x0180c2f0, - 0x01071802, 0x0080c2f1, 0x0100e802, 0x410100c1, 0x0080c2f2, 0x09b70530, 0x92000035, 0x0d3502f3, 0x4d0100c1, - 0x0e80c2f4, 0x2800c000, 0xaf1e0038, 0x29cb0000, 0x8e00003e, 0x30c2e004, 0x042702e7, 0xbe000049, 0xaf00003e, - 0x044ae2e7, 0x001082f5, 0x002db800, 0x008172f6, 0x001082f7, 0x0021b800, 0x21817618, 0x0100c2f8, 0x00870801, - 0x408100c2, 0x29c24001, 0xa6000059, 0x29c24004, 0xa6000053, 0x0100c2f9, 0x2080c003, 0x0183052e, 0x418100c2, - 0x0180c2fa, 0x418102c2, 0x0d00c2fb, 0x0d80c2fc, 0x0080c2fd, 0x0300c2fe, 0x2680c008, 0x430180c1, 0x29c24004, - 0xa6000061, 0x0100c2ff, 0x2080c003, 0x0183052e, 0x418100c2, 0x0180c300, 0x418102c2, 0x0d00c301, 0x0d80c302, - 0x0080c2fd, 0x0380c303, 0x2680c008, 0x438180c1, 0x21a11006, 0x8e00006b, 0x0687a803, 0xc0fff000, 0x0081852f, - 0x0000c304, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x49810040, 0x29c24004, - 0xa600007d, 0x0100c305, 0x2080c001, 0x20830600, 0x0183052e, 0x418100c2, 0x0180c306, 0x418102c2, 0x0e80c307, - 0x2680c008, 0xc0fff000, 0x0000c304, 0x0180c308, 0x0080c813, 0x00826d00, 0x00826d00, 0x00826d00, 0x00826d00, - 0x00826d00, 0x00826d00, 0x408100c3, 0x0100c309, 0x0007b801, 0x400100c2, 0x0100c30a, 0x20028007, 0x20012001, - 0x400100c2, 0x0e80c30b, 0x2680c008, 0xc0fff000, 0x2180c001, 0x01868558, 0xa6000099, 0x30c2e010, 0xbe0000b5, - 0x00270528, 0x29808001, 0xa60000ad, 0x00270528, 0x098102f3, 0x860000a5, 0x00270529, 0x098102ee, 0x860000a5, - 0x30c2e400, 0x30c2e010, 0xbe0000b5, 0x30c2e200, 0x0080c30c, 0x00830533, 0x00270534, 0x09808c01, 0xa60000b5, - 0x30c2e010, 0xbe0000b5, 0x30c2e100, 0x00270528, 0x09810559, 0x860000b5, 0x00270529, 0x0981055a, 0x860000b5, - 0x30c2e010, 0x0e80c30d, 0x2680c008, 0xc0fff000, 0x21a1100c, 0x8e0000bc, 0x0687a803, 0xc0fff000, 0x008d852f, - 0x0000c30e, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x49810040, 0x0e80c30f, - 0x2680c008, 0xc0fff000, 0x0000c30e, 0x0180c310, 0x00a66d00, 0x00826d00, 0x00826d00, 0x00826d00, 0x00826d00, - 0x00826d00, 0x408100c3, 0x0100c311, 0x0007b801, 0x400100c2, 0x0100c312, 0x20028007, 0x20012001, 0x400100c2, - 0x0027052a, 0x29808001, 0xa60000e5, 0x0027052a, 0x098102f3, 0x860000e3, 0x0027052b, 0x098102ee, 0x860000e3, - 0x10c2e2e7, 0xbe0000e6, 0x10c2e313, 0xbe0000e6, 0x10c2e2e5, 0x0e80c314, 0x2680c008, 0xc0fff000, 0x21a11012, - 0x8e0000ed, 0x0687a803, 0xc0fff000, 0x0099852f, 0x0e80c2ee, 0x610101c1, 0x018482ee, 0x29870081, 0x820000f7, - 0x0000c315, 0x041022f6, 0x30c22002, 0x41018040, 0x0000c316, 0x0410e2f6, 0x410100c0, 0x01048317, 0x012bb802, - 0x0000c318, 0x00008558, 0x0021b800, 0x09810802, 0x96000103, 0x30c22002, 0xbe000104, 0x30c2e002, 0x0000c315, - 0x61010041, 0x410180c0, 0x5e018106, 0x098d0303, 0x82000115, 0x09f08319, 0xa600010e, 0x2600c008, 0xbe000110, - 0x2680c050, 0xbe000110, 0x09a7080d, 0x86000110, 0x09f0831a, 0xa6000115, 0x5e010106, 0x230d0020, 0x0080c2f8, - 0x20270020, 0x0001052e, 0x400100c1, 0x30c26001, 0x0380c303, 0x0d00c301, 0x0d80c302, 0x29c24004, 0xa6000021, - 0x0100c2ff, 0x2080c003, 0x0183052e, 0x418100c2, 0x0180c300, 0x418182c2, 0x5e018107, 0x098f031b, 0x82000134, - 0x09f08319, 0xa600012d, 0x2680c008, 0xbe00012f, 0x2680c050, 0xbe00012f, 0x09a7080d, 0x8600012f, 0x09f0831a, - 0xa6000134, 0x5e010107, 0x238f0020, 0x0080c2f8, 0x20270020, 0x0001052e, 0x400100c1, 0x30c26001, 0x0300c2fe, - 0x0d00c2fb, 0x0d80c2fc, 0x29c24004, 0xa6000021, 0x0100c2f9, 0x2080c003, 0x0183052e, 0x418100c2, 0x0180c2fa, - 0x418182c2, 0x01d082df, 0x145022f6, 0x3c70e400, 0x0e80c2e8, 0x0d00c2ee, 0x0d80c2ee, 0x3c702400, 0x00899810, - 0x0410e801, 0x0100c31c, 0x0011b803, 0x00b9a800, 0x0402e808, 0x0300c2f3, 0x690400d0, 0x0380c2f3, 0x0080c31d, - 0x00038561, 0x400100c1, 0xbe000159, 0x29c28004, 0xa600015f, 0x0080c31e, 0x00038568, 0x400100c1, 0xc0fff000, - 0x29c28010, 0xa600019f, 0x29c28002, 0xa600016d, 0x29c28010, 0xa6000021, 0x81808000, 0x1280c808, 0xae000167, - 0x00270558, 0x0980831f, 0xa6000021, 0x31c6e002, 0xc0fff000, 0x29c28010, 0xa6000021, 0x81810000, 0x1280c808, - 0xae000171, 0x00270558, 0x09808320, 0xa6000021, 0x31c6e008, 0xc0fff000, 0x0080c321, 0x00038562, 0x400100c1, - 0x0410e2e0, 0xbe00019a, 0x0080c322, 0x00038563, 0x400100c1, 0x0410e323, 0xbe00019a, 0x0080c324, 0x00038564, - 0x400100c1, 0x0410e325, 0xbe00019a, 0x0080c326, 0x00038565, 0x400100c1, 0x0410e327, 0xbe00019a, 0x0080c328, - 0x00038566, 0x400100c1, 0x0410e329, 0xbe00019a, 0x0080c32a, 0x00038567, 0x400100c1, 0x0410e32b, 0xbe00019a, - 0x0080c32c, 0x00038569, 0x400100c1, 0x0410e32d, 0xbe00019a, 0x29c24004, 0xa6000021, 0x00270558, 0x29804002, - 0xa600015f, 0x81800000, 0x1290832e, 0xae0001a1, 0xc0fff000, 0xaf0181a3, 0x0480c825, 0x3144e008, 0xbe0001ab, - 0xaf0201a7, 0x0480c825, 0x31442008, 0xbe0001ab, 0x0e00c2ee, 0x0f80c2ee, 0x0000c32f, 0x0100c330, 0x009282f5, - 0x00adb801, 0x008372f6, 0x019282f7, 0x01a1b803, 0x21877618, 0x00870801, 0x408100c0, 0x408100c2, 0x0100c331, - 0x201287ff, 0x400100c2, 0x0180c332, 0x00c19800, 0x408100c3, 0x2981003c, 0x8a0001e1, 0x099282f6, 0xa60001c4, - 0x298105ee, 0x920001e1, 0x298105ea, 0x920001e1, 0x0f80c333, 0x31446002, 0x2880c000, 0x1e11b800, 0x3e0080ff, - 0x29c44002, 0xa60001d7, 0x0280c334, 0x0500c335, 0x0e00c336, 0x31442001, 0x0100c337, 0x2080c000, 0x01830500, - 0x418100c2, 0x0180c338, 0x418182c2, 0x0280c339, 0x0500c33a, 0x0e00c33b, 0x3144e001, 0x0100c33c, 0x2080c000, - 0x01830500, 0x418100c2, 0x0180c33d, 0x418182c2, 0x0039b327, 0xbe0002b2, 0x14a702f6, 0x0b80c2ee, 0x0c00c33e, - 0x0c80c33f, 0xbe00020f, 0x14a702f6, 0x0b80c2ee, 0x0c00c33e, 0x0c80c33f, 0xbe00022a, 0x0b80c826, 0x0c80c824, - 0x005482ee, 0x00b282ee, 0x013282ef, 0x09810801, 0x960001f6, 0x0180c2f0, 0x01071802, 0x0080c340, 0x0100e802, - 0x410100c1, 0x0080c341, 0x09b30506, 0x920001fd, 0x0baf02f3, 0x4b8100c1, 0x0c80c342, 0x0b80c343, 0x0100c344, - 0x2080c001, 0x20830600, 0x01830500, 0x418100c2, 0x0180c345, 0x418182c2, 0x29c48001, 0xa600020b, 0x2600c020, - 0xc0fff000, 0x29c48004, 0xa600020f, 0x0e00c2ee, 0xc0fff000, 0x2180c020, 0x0100c330, 0x00870501, 0x408100c2, - 0x0000c332, 0x09870503, 0x8a000218, 0x498100c0, 0xbe00021a, 0x00871503, 0x408100c0, 0x0e00c346, 0x3144e002, - 0x0100c33c, 0x2080c000, 0x01830501, 0x418100c2, 0x0180c33d, 0x418182c2, 0x29c44001, 0xa6000226, 0x2600c020, - 0xc0fff000, 0x29c48004, 0xa600022a, 0x0e00c2ee, 0xc0fff000, 0x2180c020, 0x0100c330, 0x00870501, 0x408100c2, - 0x0000c332, 0x09870503, 0x8a000233, 0x498100c0, 0xbe000235, 0x00871503, 0x408100c0, 0x0e00c347, 0x31442002, - 0x0100c337, 0x2080c000, 0x01830501, 0x418100c2, 0x0180c338, 0x418182c2, 0x7e018105, 0x0021b80a, 0x00008348, - 0x098b0800, 0x82000021, 0x0c80c349, 0x09a60813, 0xc0fff000, 0x7e010105, 0x0c80c342, 0xc0fff000, 0x29c44004, - 0xa6000268, 0x0000c331, 0x2100c020, 0x00851502, 0x408100c0, 0x09850502, 0x8a00025e, 0x3144e004, 0x01270502, - 0x29c44001, 0xa6000259, 0x0280c339, 0x010b0802, 0x0521a802, 0x3144e001, 0xc0fff000, 0x0280c334, 0x010b0802, - 0x0521a802, 0x31442001, 0xc0fff000, 0x29c44001, 0xa6000264, 0x0280c339, 0x0500c33a, 0x3144e001, 0xc0fff000, - 0x0280c334, 0x0500c335, 0x31442001, 0xc0fff000, 0x31442004, 0x0c00c2ee, 0x0c80c2ee, 0x0b80c2ee, 0xc0fff000, - 0x0c00c2ee, 0x0c80c2ee, 0x0b80c2ee, 0x0100c34a, 0x005282df, 0x0091b800, 0x1c70e34b, 0x690400d1, 0x1c70234b, - 0x0080c34c, 0x0003855b, 0x400100c1, 0x09818504, 0x8600027d, 0x2492e000, 0xbe0002b2, 0x0492e2e4, 0xbe0002b2, - 0x09818504, 0x86000285, 0x0080c34d, 0x0003855c, 0x400100c1, 0xbe00028c, 0x0080c34e, 0x0003855d, 0x400100c1, - 0x099f8504, 0x9200028c, 0x0492e325, 0xbe0002b2, 0x0000c34f, 0x00838504, 0x408100c0, 0x09958504, 0x8a000293, - 0x00a70504, 0xbe000294, 0x20a7000a, 0x0180c350, 0x00486351, 0x008302f3, 0x20832002, 0x008302f3, 0x00028800, - 0x20017200, 0x09f04319, 0xa600029e, 0x2001700a, 0x400100c3, 0x0f80c352, 0x0e00c2ee, 0x06158505, 0xc0fff000, - 0x0080c353, 0x0003855e, 0x400100c1, 0x0492e2e0, 0xbe0002b2, 0x0080c354, 0x0003855f, 0x400100c1, 0x0492e323, - 0xbe0002b2, 0x0080c355, 0x00038560, 0x400100c1, 0x0492e32b, 0xbe0002b2, 0x29c48008, 0xa60002bc, 0x81828000, - 0x1280c809, 0xae0002b6, 0x00270558, 0x09808356, 0xa60002c3, 0x31c6e001, 0xbe0002c3, 0x81830000, 0x1280c809, - 0xae0002be, 0x00270558, 0x09808357, 0xa60002c3, 0x31c6e004, 0x0000c34f, 0x0f80c2ea, 0x0e00c2eb, 0x498180c0, - 0x0000c2e3, 0x00b9b838, 0x40810000, 0x09f042e4, 0xa60002ce, 0x1c70e2e5, 0xbe0002cf, 0x1c7022e5, 0x00270558, - 0x09808358, 0xa6000021, 0x31c6e010, 0xc0fff000, 0x0000c2e3, 0x00b9b838, 0x40810000, 0x09f042e6, 0xa60002db, - 0x1c70e2e7, 0xbe0002dc, 0x1c7022e7, 0x2700c3e8, 0xc0fff000, 0xc0000fff, 0x00000f00, 0x80000000, 0x15601540, - 0x0000a000, 0x000015b4, 0x10000000, 0x00001000, 0x20000000, 0x00004000, 0x8022ffb6, 0x8145ff47, 0x89a3ffc1, - 0x89a7ffc2, 0xdac70c0c, 0x92d4ff42, 0x0000ffff, 0xffff0000, 0x00010000, 0x000014c0, 0x000014c4, 0xffffffff, - 0x9067ff41, 0x03c00000, 0x00008000, 0x003f0000, 0x000014b8, 0x00001ffc, 0x0854877e, 0x0107b4b6, 0x9908ffb4, - 0x000014bc, 0x00001520, 0x00001ff4, 0x085507fd, 0x0126b5b6, 0x9927ffb5, 0x00001540, 0x000014a0, 0x00001fdc, - 0x0253047a, 0x9080ff41, 0x000014c8, 0x000014cc, 0x000014d0, 0x9094ff41, 0x000015e0, 0x90b8ff41, 0x000014a8, - 0x90c8ff41, 0x000014d4, 0x000014d8, 0x000014dc, 0x00002000, 0x90e9ff41, 0x000014b0, 0x000014b4, 0x00e00000, - 0x000f0000, 0x40000000, 0x00040000, 0x00001560, 0x000014e0, 0x00001584, 0x000015a0, 0x00100000, 0x00200000, - 0x00001588, 0x0000158c, 0x90000000, 0x00001590, 0xa0000000, 0x00001594, 0xb0000000, 0x00001598, 0xc0000000, - 0x0000159c, 0xd0000000, 0x000015a4, 0xe0000000, 0x03ff0000, 0x00001400, 0x00001404, 0x00001408, 0x0000140c, - 0x9a6dff4b, 0x00001460, 0x14800000, 0x91e3ff86, 0x00001fec, 0x08518c7c, 0x00001480, 0x14a00000, 0x91e8ff87, - 0x00001fe4, 0x08520c7b, 0x023db3ba, 0x91edff49, 0x00001418, 0x0000141c, 0x023eabba, 0x2a48abb3, 0x00001fd4, - 0x0250647f, 0xd2224087, 0xd2074086, 0x00001fff, 0x8245ff04, 0x00001420, 0x00000800, 0x0000156c, 0x00001570, - 0x00001574, 0x00001410, 0x00001414, 0x55555555, 0x91abff40, 0x00001578, 0x0000157c, 0x00001580, 0x00400000, - 0x00800000, 0x01000000, -}; - -unsigned int xpec_eth0_mac_patch[] = { - 0x00170054, 0x0000ffff, 0x00170058, 0x0000ffff, 0x0017005c, 0x0000ffff, 0x00170060, 0x0000ffff, 0x00170064, - 0x0000ffff, 0x00170068, 0x0000ffff, 0x0017006c, 0x0000ffff, 0x00170070, 0x0000ffff, 0x00170074, 0x0000ffff, - 0x00170078, 0x0000ffff, 0x0017007c, 0x0000ffff, 0x00170080, 0x0000ffff, 0x00173400, 0x00000000, 0x00173404, - 0x00000000, 0x00173408, 0x00000000, 0x0017340c, 0x00000000, 0x00173410, 0x00000000, 0x00173414, 0x00000000, - 0x00173418, 0x00000000, 0x0017341c, 0x00000000, 0x00173420, 0x00000276, 0x00173424, 0x0000027f, 0x00173428, - 0x000002a3, 0x0017342c, 0x000002a8, 0x00173430, 0x000002ad, 0x00173434, 0x000002de, 0x00173438, 0x000002de, - 0x0017343c, 0x000002de, 0x00173440, 0x000002de, 0x00173444, 0x000002de, 0x00173448, 0x000002de, 0x0017344c, - 0x000002de, 0x00173450, 0x000002de, 0x00173454, 0x000002de, 0x00173458, 0x000002de, 0x0017345c, 0x000002de, - 0x00173460, 0x00000000, 0x00173464, 0x00000000, 0x00173468, 0x00000000, 0x0017346c, 0x00000000, 0x00173470, - 0x00000000, 0x00173474, 0x00000000, 0x00173478, 0x00000000, 0x0017347c, 0x00000000, 0x00173480, 0x00000000, - 0x00173484, 0x00000000, 0x00173488, 0x00000000, 0x0017348c, 0x00000000, 0x00173490, 0x00000000, 0x00173494, - 0x00000000, 0x00173498, 0x00000000, 0x0017349c, 0x00000000, 0x001734a0, 0x00000000, 0x001734a4, 0x00000000, - 0x001734a8, 0x00000000, 0x001734ac, 0x00000000, 0x001734b0, 0x00000000, 0x001734b4, 0x00000000, 0x001734b8, - 0x00000000, 0x001734bc, 0x00000000, 0x001734c0, 0x00000000, 0x001734c4, 0x00000000, 0x001734c8, 0x00000000, - 0x001734cc, 0x00000000, 0x001734d0, 0x00000000, 0x001734d4, 0x00000000, 0x001734d8, 0x00000000, 0x001734dc, - 0x00000000, 0x001734e0, 0x00000155, 0x001734e4, 0x00000177, 0x001734e8, 0x0000017c, 0x001734ec, 0x00000181, - 0x001734f0, 0x00000186, 0x001734f4, 0x0000018b, 0x001734f8, 0x00000190, 0x001734fc, 0x00000195, 0x00173500, - 0x000002de, 0x00173504, 0x000002de, 0x00173508, 0x000002de, 0x0017350c, 0x000002de, 0x00173510, 0x000002de, - 0x00173514, 0x000002de, 0x00173518, 0x000002de, 0x0017351c, 0x000002de, 0x00173520, 0x00000000, 0x00173524, - 0x00000000, 0x00173528, 0x00000000, 0x0017352c, 0x00000000, 0x00173530, 0x00000000, 0x00173534, 0x00000000, - 0x00173538, 0x00000000, 0x0017353c, 0x00000000, 0x00173540, 0x00000000, 0x00173544, 0x00000000, 0x00173548, - 0x00000000, 0x0017354c, 0x00000000, 0x00173550, 0x00000000, 0x00173554, 0x00000000, 0x00173558, 0x00000000, - 0x0017355c, 0x00000000, 0x00173560, 0x00080000, 0x00173564, 0x03020100, 0x00173568, 0x00000504, 0x0017356c, - 0x00000000, 0x00173570, 0x00000000, 0x00173574, 0x00000000, 0x00173578, 0x00000000, 0x0017357c, 0x00000000, - 0x00173580, 0x00000000, 0x00173584, 0x00000000, 0x00173588, 0x00000000, 0x0017358c, 0x00000000, 0x00173590, - 0x00000000, 0x00173594, 0x00000000, 0x00173598, 0x00000000, 0x0017359c, 0x00000000, 0x001735a0, 0x00000000, - 0x001735a4, 0x00000000, 0x001735a8, 0x00000000, 0x001735ac, 0x00000000, 0x001735b0, 0x00000000, 0x001735e0, - 0x00000000, 0x001735e4, 0x00000000, 0x001735e8, 0x00000000, 0x001735ec, 0x00000000, 0x001735f0, 0x00000000, - 0x001735f4, 0x00000000, 0x001735f8, 0x00000000, 0x001735fc, 0x00000000, 0x00173fd0, 0x0250607f, 0x00173fd8, - 0x0253007a, 0x00173fe0, 0x0852087b, 0x00173fe8, 0x0851887c, 0x00173ff0, 0x085503fd, 0x00173ff8, 0x0854837e, -}; - -static unsigned int rpu_eth1[] = { - 0x00f40401, 0x915fdb81, 0x01e7fffd, 0x915fdb82, 0x01e3fffd, 0x915fdb83, 0x012bff01, 0x915fdb84, 0x01240001, - 0x915fdb85, 0x00ac17bd, 0x915fdb86, 0x00dc0000, 0x001be686, 0x20dc0000, 0x001c1c87, 0x0137f811, 0x91561ca4, - 0x20c000c9, 0x8d9e1ca4, 0x0137fe41, 0x91481b8d, 0x00dc0000, 0x001be689, 0x00101800, 0x21dfdbac, 0x20700021, - 0x82b61ca4, 0x007000c9, 0x859fdb8f, 0x20dc0000, 0x001e1ca4, 0x1c700020, 0xf2bfdb91, 0x20dc0000, 0x001e1ca4, - 0x20dc0000, 0x001e1ca4, 0x1c700020, 0xf2be1911, 0x00ac17cd, 0x91485b95, 0x20dc0000, 0x001c1c9b, 0x00dc0000, - 0x00185cab, 0x00100c00, 0x21c91aac, 0x20dc0000, 0x001c1ca8, 0x18dc0000, 0x00185cab, 0x04700020, 0xf2ba1c95, - 0x00dc0000, 0x001be524, 0x00100c00, 0x21c91aac, 0x00100400, 0x21ce1b9f, 0x00101c00, 0x21c8c91f, 0x0137feb1, - 0x915fdba0, 0x00120000, 0x21d08920, 0x00dc0000, 0x001fdba2, 0x00100001, 0x9153c222, 0x00dc0000, 0x001fdb81, - 0x00c8005a, 0x52305cab, 0x00101400, 0x21c89b2c, 0x00101000, 0x21ca1bac, 0x00101400, 0x21dfdb9f, 0x00dc0000, - 0x001be524, 0x00100800, 0x21ce1b9f, 0x00dc0000, 0x001fdb9e, 0x00100400, 0x21dfdbac, 0x00dc0000, 0x00181cac, - 0x00dc0000, 0x001fdb9f, -}; - -static unsigned int rpu_eth1_patch[] = { - 0x0016184c, 0x00000000, 0x0016189c, 0x0000dd7b, 0x001618a0, 0x0000c704, 0x001618f0, 0x00000200, 0x00161934, - 0x00000000, 0x0016193c, 0x0000ff00, 0x00161940, 0x0000d500, 0x00161944, 0x0000ffff, 0x00161948, 0x00000081, - 0x001619d8, 0x00001db7, 0x001619dc, 0x000004c1, 0x001619e8, 0x000003f8, -}; - -static unsigned int tpu_eth1[] = { - 0x010c0041, 0x915fdb81, 0x01fbfffd, 0x915fdb82, 0x01f7fffd, 0x915fdb83, 0x012ffdfd, 0x915fdb84, - 0x00dc0000, 0x001bc92d, 0x01380001, 0x91489c86, 0x01390001, 0x914ba707, 0x00dc0000, 0x001bc92d, 0x00b00020, - 0xea97c285, 0x00b000b0, 0xeddfdb8a, 0x01300001, 0x627fdb8b, 0x00dc0000, 0x001b8293, 0x01380001, 0x91489c8d, - 0x00c80102, 0x727fdb8e, 0x00dc0000, 0x00199b10, 0x00dc0000, 0x001fdb8c, 0x00c80182, 0x727fdb91, 0x00dc0000, - 0x00199b16, 0x00dc0000, 0x001fdb90, 0x00a40020, 0xea918913, 0x00a400a4, 0xedd18914, 0x00ec0005, 0x9157d995, - 0x20855555, 0x915fdb97, 0x00ec0005, 0x915fdb98, 0x013bff11, 0x915fdb99, 0x28dc0000, 0x0018dcd3, 0x00840035, - 0x91565919, 0x281800c5, 0x955fdb9c, 0x00148000, 0x29d8dcd7, 0x048400c8, 0xed9fdb9e, 0x28dc0000, 0x0018dcdd, - 0x3cc800c9, 0x0d58dcdd, 0x00dc0000, 0x001d891d, 0x008401f5, 0x94bfdba2, 0x28dc0000, 0x0018dcdd, 0x00141000, - 0x29cfd924, 0x28dc0000, 0x0018dcdd, 0x28dc0000, 0x0018dcdd, 0x288401f9, 0x94b0dcdd, 0x28dc0000, 0x0018dcdd, - 0x28dc0000, 0x0018dcdd, 0x28dc0000, 0x0018dcdd, 0x0084000d, 0x08cfd92b, 0x28ec0001, 0x9150dcdd, 0x0087fffd, - 0x915bd96d, 0x01390001, 0x914ba72e, 0x00dc0000, 0x001fc905, 0x00b00020, 0xea97c2ad, 0x00b000b0, 0xeddfdbb1, - 0x01300001, 0x627fdbb2, 0x00dc0000, 0x001b82b6, 0x00c80182, 0x727fdbb4, 0x00dc0000, 0x00199b39, 0x00dc0000, - 0x001fdbb3, 0x00a40020, 0xea918936, 0x00a400a4, 0xedd18937, 0x00ec0005, 0x9157d9b8, 0x20855555, 0x915fdbba, - 0x00ec0005, 0x915fdbbb, 0x013bff11, 0x915fdbbc, 0x20dc0000, 0x001fdbbd, 0x00840035, 0x9156593c, 0x201800c5, - 0x955fdbbf, 0x00148000, 0x29dfdbc0, 0x048400c8, 0xed9fdbc1, 0x20dc0000, 0x001fdbc2, 0x34c800c9, 0x0d5fdbc3, - 0x00dc0000, 0x001d8940, 0x008401f5, 0x94bfdbc5, 0x20dc0000, 0x001fdbc6, 0x00141000, 0x29cfd947, 0x20dc0000, - 0x001fdbc8, 0x20dc0000, 0x001fdbc9, 0x20dc0000, 0x001fdbca, 0x008401f9, 0x94bfdbcb, 0x20dc0000, 0x001fdbcc, - 0x20dc0000, 0x001fdbcd, 0x20dc0000, 0x001fdbce, 0x0084000d, 0x08cfd94f, 0x20ec0001, 0x915fdbd0, 0x0087fffd, - 0x915bd96d, 0x01380001, 0x915fdbd2, 0x0015fffc, 0x291fdb81, 0x00840035, 0x914a5956, 0x20dc0000, 0x001fdbd5, - 0x00840035, 0x91565953, 0x20140400, 0x29dfdbd8, 0x00140400, 0x29dfdbd8, 0x013bff81, 0x915fdbd9, 0x0086aaab, - 0xe8dfdbda, 0x20dc0000, 0x001fdbdb, 0x00ec0001, 0x9156595a, 0x0087fffd, 0x915fdbd1, 0x013bff81, 0x915fdbde, - 0x0086aaab, 0xe8dfdbdf, 0x20140400, 0x29cbe5e0, 0x00ec0001, 0x9156595e, 0x0087fffd, 0x915fdbe2, 0x00140800, - 0x29cfe5e3, 0x00dc0000, 0x001fdbd1, 0x20ec000d, 0x915fdbe5, 0x00dc0000, 0x001fdbe6, 0x013bffd1, 0x915fdbe9, - 0x013bffc1, 0x915fdbe8, 0x00855557, 0xe8dfdbe9, 0x213bffc1, 0x91565969, 0x00855557, 0xf0dfdbeb, 0x20dc0000, - 0x001e596b, 0x00ec0001, 0x915fdbd1, 0x00140c00, 0x29cf096e, 0x00dc0000, 0x001fdbd1, -}; - -static unsigned int tpu_eth1_patch[] = { - 0x00161884, 0x0000ffff, 0x00161888, 0x00000000, 0x001618a8, 0x0000ffff, 0x00161938, 0x00000000, 0x001619ec, - 0x00001db7, 0x001619f0, 0x000004c1, 0x001619fc, 0x000002f9, -}; - -static unsigned int xpec_eth1_mac[] = { - 0x0a00c2df, 0x0a28e2e0, 0x0580c2e1, 0x3600c000, 0x0400c813, 0x1080c813, 0x2800c000, 0x3680c000, 0x3700c000, - 0x0480c813, 0x1100c813, 0x2880c000, 0x1cf2e2e2, 0x0000c2e3, 0x00b9b839, 0x40810000, 0x09f242e4, 0xa6000014, - 0x1cf2e2e5, 0xbe000015, 0x1cf222e5, 0x09f242e6, 0xa6000019, 0x1cf2e2e7, 0xbe00001a, 0x1cf222e7, 0x0e80c2e8, - 0x0f00c2e9, 0x0e00c2ea, 0x0f80c2eb, 0x0a80c2ec, 0x0b00c2ed, 0x2700c3e8, 0xc0fff000, 0x0d00c826, 0x0d80c824, - 0x30c28001, 0x30c26001, 0x0011a83d, 0x0001083d, 0x00b682ee, 0x013682ef, 0x09810801, 0x9600002e, 0x0180c2f0, - 0x01071802, 0x0080c2f1, 0x0100e802, 0x410100c1, 0x0080c2f2, 0x09b70530, 0x92000035, 0x0d3502f3, 0x4d0100c1, - 0x0e80c2f4, 0x2800c000, 0xaf220038, 0x29cb0000, 0x8e00003e, 0x30c2e004, 0x042702e7, 0xbe000049, 0xaf04003e, - 0x044ae2e7, 0x001082f5, 0x002db800, 0x008172f6, 0x001082f7, 0x0021b800, 0x21817618, 0x0100c2f8, 0x00870801, - 0x408100c2, 0x29c24001, 0xa6000059, 0x29c24004, 0xa6000053, 0x0100c2f9, 0x2080c003, 0x0183052e, 0x418100c2, - 0x0180c2fa, 0x418102c2, 0x0d00c2fb, 0x0d80c2fc, 0x0080c2fd, 0x0300c2fe, 0x2680c008, 0x430180c1, 0x29c24004, - 0xa6000061, 0x0100c2ff, 0x2080c003, 0x0183052e, 0x418100c2, 0x0180c300, 0x418102c2, 0x0d00c301, 0x0d80c302, - 0x0080c2fd, 0x0380c303, 0x2680c008, 0x438180c1, 0x21a11006, 0x8e00006b, 0x0687a803, 0xc0fff000, 0x0081852f, - 0x0000c304, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x49810040, 0x29c24004, - 0xa600007d, 0x0100c305, 0x2080c001, 0x20830600, 0x0183052e, 0x418100c2, 0x0180c306, 0x418102c2, 0x0e80c307, - 0x2680c008, 0xc0fff000, 0x0000c304, 0x0180c308, 0x0080c813, 0x00826d00, 0x00826d00, 0x00826d00, 0x00826d00, - 0x00826d00, 0x00826d00, 0x408100c3, 0x0100c309, 0x0007b801, 0x400100c2, 0x0100c30a, 0x20028007, 0x20012001, - 0x400100c2, 0x0e80c30b, 0x2680c008, 0xc0fff000, 0x2180c001, 0x01868558, 0xa6000099, 0x30c2e010, 0xbe0000b5, - 0x00270528, 0x29808001, 0xa60000ad, 0x00270528, 0x098102f3, 0x860000a5, 0x00270529, 0x098102ee, 0x860000a5, - 0x30c2e400, 0x30c2e010, 0xbe0000b5, 0x30c2e200, 0x0080c30c, 0x00830533, 0x00270534, 0x09808c01, 0xa60000b5, - 0x30c2e010, 0xbe0000b5, 0x30c2e100, 0x00270528, 0x09810559, 0x860000b5, 0x00270529, 0x0981055a, 0x860000b5, - 0x30c2e010, 0x0e80c30d, 0x2680c008, 0xc0fff000, 0x21a1100c, 0x8e0000bc, 0x0687a803, 0xc0fff000, 0x008d852f, - 0x0000c30e, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x61010141, 0x41010140, 0x49810040, 0x0e80c30f, - 0x2680c008, 0xc0fff000, 0x0000c30e, 0x0180c310, 0x00a66d00, 0x00826d00, 0x00826d00, 0x00826d00, 0x00826d00, - 0x00826d00, 0x408100c3, 0x0100c311, 0x0007b801, 0x400100c2, 0x0100c312, 0x20028007, 0x20012001, 0x400100c2, - 0x0027052a, 0x29808001, 0xa60000e5, 0x0027052a, 0x098102f3, 0x860000e3, 0x0027052b, 0x098102ee, 0x860000e3, - 0x10c2e2e7, 0xbe0000e6, 0x10c2e313, 0xbe0000e6, 0x10c2e2e5, 0x0e80c314, 0x2680c008, 0xc0fff000, 0x21a11012, - 0x8e0000ed, 0x0687a803, 0xc0fff000, 0x0099852f, 0x0e80c2ee, 0x610101c1, 0x018482ee, 0x29870081, 0x820000f7, - 0x0000c315, 0x041022f6, 0x30c22002, 0x41018040, 0x0000c316, 0x0410e2f6, 0x410100c0, 0x01048317, 0x012bb802, - 0x0000c318, 0x00008558, 0x0021b800, 0x09810802, 0x96000103, 0x30c22002, 0xbe000104, 0x30c2e002, 0x0000c315, - 0x61010041, 0x410180c0, 0x5e818106, 0x098d0303, 0x82000115, 0x09f28319, 0xa600010e, 0x2600c008, 0xbe000110, - 0x2680c050, 0xbe000110, 0x09a7080d, 0x86000110, 0x09f2831a, 0xa6000115, 0x5e810106, 0x230d0020, 0x0080c2f8, - 0x20270020, 0x0001052e, 0x400100c1, 0x30c26001, 0x0380c303, 0x0d00c301, 0x0d80c302, 0x29c24004, 0xa6000021, - 0x0100c2ff, 0x2080c003, 0x0183052e, 0x418100c2, 0x0180c300, 0x418182c2, 0x5e818107, 0x098f031b, 0x82000134, - 0x09f28319, 0xa600012d, 0x2680c008, 0xbe00012f, 0x2680c050, 0xbe00012f, 0x09a7080d, 0x8600012f, 0x09f2831a, - 0xa6000134, 0x5e810107, 0x238f0020, 0x0080c2f8, 0x20270020, 0x0001052e, 0x400100c1, 0x30c26001, 0x0300c2fe, - 0x0d00c2fb, 0x0d80c2fc, 0x29c24004, 0xa6000021, 0x0100c2f9, 0x2080c003, 0x0183052e, 0x418100c2, 0x0180c2fa, - 0x418182c2, 0x01d882df, 0x165822f6, 0x3cf2e400, 0x0e80c2e8, 0x0d00c2ee, 0x0d80c2ee, 0x3cf22400, 0x00899810, - 0x0410e801, 0x0100c31c, 0x0011b803, 0x00b9a800, 0x0402e808, 0x0300c2f3, 0x690400d0, 0x0380c2f3, 0x0080c31d, - 0x00038561, 0x400100c1, 0xbe000159, 0x29c28004, 0xa600015f, 0x0080c31e, 0x00038568, 0x400100c1, 0xc0fff000, - 0x29c28010, 0xa600019f, 0x29c28002, 0xa600016d, 0x29c28010, 0xa6000021, 0x81848000, 0x1280c808, 0xae000167, - 0x00270558, 0x0980831f, 0xa6000021, 0x31c6e002, 0xc0fff000, 0x29c28010, 0xa6000021, 0x81850000, 0x1280c808, - 0xae000171, 0x00270558, 0x09808320, 0xa6000021, 0x31c6e008, 0xc0fff000, 0x0080c321, 0x00038562, 0x400100c1, - 0x0410e2e0, 0xbe00019a, 0x0080c322, 0x00038563, 0x400100c1, 0x0410e323, 0xbe00019a, 0x0080c324, 0x00038564, - 0x400100c1, 0x0410e325, 0xbe00019a, 0x0080c326, 0x00038565, 0x400100c1, 0x0410e327, 0xbe00019a, 0x0080c328, - 0x00038566, 0x400100c1, 0x0410e329, 0xbe00019a, 0x0080c32a, 0x00038567, 0x400100c1, 0x0410e32b, 0xbe00019a, - 0x0080c32c, 0x00038569, 0x400100c1, 0x0410e32d, 0xbe00019a, 0x29c24004, 0xa6000021, 0x00270558, 0x29804002, - 0xa600015f, 0x81840000, 0x1290832e, 0xae0001a1, 0xc0fff000, 0xaf0581a3, 0x0480c825, 0x3144e008, 0xbe0001ab, - 0xaf0601a7, 0x0480c825, 0x31442008, 0xbe0001ab, 0x0e00c2ee, 0x0f80c2ee, 0x0000c32f, 0x0100c330, 0x009282f5, - 0x00adb801, 0x008372f6, 0x019282f7, 0x01a1b803, 0x21877618, 0x00870801, 0x408100c0, 0x408100c2, 0x0100c331, - 0x201287ff, 0x400100c2, 0x0180c332, 0x00c19800, 0x408100c3, 0x2981003c, 0x8a0001e1, 0x099282f6, 0xa60001c4, - 0x298105ee, 0x920001e1, 0x298105ea, 0x920001e1, 0x0f80c333, 0x31446002, 0x2880c000, 0x1e91b800, 0x3e8080ff, - 0x29c44002, 0xa60001d7, 0x0280c334, 0x0500c335, 0x0e00c336, 0x31442001, 0x0100c337, 0x2080c000, 0x01830500, - 0x418100c2, 0x0180c338, 0x418182c2, 0x0280c339, 0x0500c33a, 0x0e00c33b, 0x3144e001, 0x0100c33c, 0x2080c000, - 0x01830500, 0x418100c2, 0x0180c33d, 0x418182c2, 0x0039b327, 0xbe0002b2, 0x16a702f6, 0x0b80c2ee, 0x0c00c33e, - 0x0c80c33f, 0xbe00020f, 0x16a702f6, 0x0b80c2ee, 0x0c00c33e, 0x0c80c33f, 0xbe00022a, 0x0b80c826, 0x0c80c824, - 0x005c82ee, 0x00b282ee, 0x013282ef, 0x09810801, 0x960001f6, 0x0180c2f0, 0x01071802, 0x0080c340, 0x0100e802, - 0x410100c1, 0x0080c341, 0x09b30506, 0x920001fd, 0x0baf02f3, 0x4b8100c1, 0x0c80c342, 0x0b80c343, 0x0100c344, - 0x2080c001, 0x20830600, 0x01830500, 0x418100c2, 0x0180c345, 0x418182c2, 0x29c48001, 0xa600020b, 0x2600c020, - 0xc0fff000, 0x29c48004, 0xa600020f, 0x0e00c2ee, 0xc0fff000, 0x2180c020, 0x0100c330, 0x00870501, 0x408100c2, - 0x0000c332, 0x09870503, 0x8a000218, 0x498100c0, 0xbe00021a, 0x00871503, 0x408100c0, 0x0e00c346, 0x3144e002, - 0x0100c33c, 0x2080c000, 0x01830501, 0x418100c2, 0x0180c33d, 0x418182c2, 0x29c44001, 0xa6000226, 0x2600c020, - 0xc0fff000, 0x29c48004, 0xa600022a, 0x0e00c2ee, 0xc0fff000, 0x2180c020, 0x0100c330, 0x00870501, 0x408100c2, - 0x0000c332, 0x09870503, 0x8a000233, 0x498100c0, 0xbe000235, 0x00871503, 0x408100c0, 0x0e00c347, 0x31442002, - 0x0100c337, 0x2080c000, 0x01830501, 0x418100c2, 0x0180c338, 0x418182c2, 0x7e818105, 0x0021b80a, 0x00008348, - 0x098b0800, 0x82000021, 0x0c80c349, 0x09a60813, 0xc0fff000, 0x7e810105, 0x0c80c342, 0xc0fff000, 0x29c44004, - 0xa6000268, 0x0000c331, 0x2100c020, 0x00851502, 0x408100c0, 0x09850502, 0x8a00025e, 0x3144e004, 0x01270502, - 0x29c44001, 0xa6000259, 0x0280c339, 0x010b0802, 0x0521a802, 0x3144e001, 0xc0fff000, 0x0280c334, 0x010b0802, - 0x0521a802, 0x31442001, 0xc0fff000, 0x29c44001, 0xa6000264, 0x0280c339, 0x0500c33a, 0x3144e001, 0xc0fff000, - 0x0280c334, 0x0500c335, 0x31442001, 0xc0fff000, 0x31442004, 0x0c00c2ee, 0x0c80c2ee, 0x0b80c2ee, 0xc0fff000, - 0x0c00c2ee, 0x0c80c2ee, 0x0b80c2ee, 0x0100c34a, 0x005a82df, 0x0091b800, 0x1cf2e34b, 0x690400d1, 0x1cf2234b, - 0x0080c34c, 0x0003855b, 0x400100c1, 0x09818504, 0x8600027d, 0x2492e000, 0xbe0002b2, 0x0492e2e4, 0xbe0002b2, - 0x09818504, 0x86000285, 0x0080c34d, 0x0003855c, 0x400100c1, 0xbe00028c, 0x0080c34e, 0x0003855d, 0x400100c1, - 0x099f8504, 0x9200028c, 0x0492e325, 0xbe0002b2, 0x0000c34f, 0x00838504, 0x408100c0, 0x09958504, 0x8a000293, - 0x00a70504, 0xbe000294, 0x20a7000a, 0x0180c350, 0x00486351, 0x008302f3, 0x20832002, 0x008302f3, 0x00028800, - 0x20017200, 0x09f24319, 0xa600029e, 0x2001700a, 0x400100c3, 0x0f80c352, 0x0e00c2ee, 0x06158505, 0xc0fff000, - 0x0080c353, 0x0003855e, 0x400100c1, 0x0492e2e0, 0xbe0002b2, 0x0080c354, 0x0003855f, 0x400100c1, 0x0492e323, - 0xbe0002b2, 0x0080c355, 0x00038560, 0x400100c1, 0x0492e32b, 0xbe0002b2, 0x29c48008, 0xa60002bc, 0x81868000, - 0x1280c809, 0xae0002b6, 0x00270558, 0x09808356, 0xa60002c3, 0x31c6e001, 0xbe0002c3, 0x81870000, 0x1280c809, - 0xae0002be, 0x00270558, 0x09808357, 0xa60002c3, 0x31c6e004, 0x0000c34f, 0x0f80c2ea, 0x0e00c2eb, 0x498180c0, - 0x0000c2e3, 0x00b9b839, 0x40810000, 0x09f242e4, 0xa60002ce, 0x1cf2e2e5, 0xbe0002cf, 0x1cf222e5, 0x00270558, - 0x09808358, 0xa6000021, 0x31c6e010, 0xc0fff000, 0x0000c2e3, 0x00b9b839, 0x40810000, 0x09f242e6, 0xa60002db, - 0x1cf2e2e7, 0xbe0002dc, 0x1cf222e7, 0x2700c3e8, 0xc0fff000, 0xc0000fff, 0x00000f00, 0x80000000, 0x15601540, - 0x0000a000, 0x000015b4, 0x10000000, 0x00001000, 0x20000000, 0x00004000, 0x8022ffb7, 0x8145ff57, 0x89a3ffc9, - 0x89a7ffca, 0xdac71c1c, 0x92d4ff42, 0x0000ffff, 0xffff0000, 0x00010000, 0x000014c0, 0x000014c4, 0xffffffff, - 0x9067ff41, 0x03c00000, 0x00008000, 0x003f0000, 0x000014b8, 0x00001ffc, 0x0854877e, 0x0107b4b7, 0x9908ffb4, - 0x000014bc, 0x00001520, 0x00001ff4, 0x085507fd, 0x0126b5b7, 0x9927ffb5, 0x00001540, 0x000014a0, 0x00001fdc, - 0x0253047a, 0x9080ff41, 0x000014c8, 0x000014cc, 0x000014d0, 0x9094ff41, 0x000015e0, 0x90b8ff41, 0x000014a8, - 0x90c8ff41, 0x000014d4, 0x000014d8, 0x000014dc, 0x00002000, 0x90e9ff41, 0x000014b0, 0x000014b4, 0x00e00000, - 0x000f0000, 0x40000000, 0x00040000, 0x00001560, 0x000014e0, 0x00001584, 0x000015a0, 0x00100000, 0x00200000, - 0x00001588, 0x0000158c, 0x90000000, 0x00001590, 0xa0000000, 0x00001594, 0xb0000000, 0x00001598, 0xc0000000, - 0x0000159c, 0xd0000000, 0x000015a4, 0xe0000000, 0x03ff0000, 0x00001400, 0x00001404, 0x00001408, 0x0000140c, - 0x9a6dff5b, 0x00001460, 0x14800000, 0x91e3ff8e, 0x00001fec, 0x08518c7c, 0x00001480, 0x14a00000, 0x91e8ff8f, - 0x00001fe4, 0x08520c7b, 0x023db3bb, 0x91edff59, 0x00001418, 0x0000141c, 0x023eabbb, 0x2a48abb3, 0x00001fd4, - 0x0250647f, 0xd222408f, 0xd207408e, 0x00001fff, 0x8245ff14, 0x00001420, 0x00000800, 0x0000156c, 0x00001570, - 0x00001574, 0x00001410, 0x00001414, 0x55555555, 0x91abff40, 0x00001578, 0x0000157c, 0x00001580, 0x00400000, - 0x00800000, 0x01000000, -}; - -static unsigned int xpec_eth1_mac_patch[] = { - 0x00174054, 0x0000ffff, 0x00174058, 0x0000ffff, 0x0017405c, 0x0000ffff, 0x00174060, 0x0000ffff, 0x00174064, - 0x0000ffff, 0x00174068, 0x0000ffff, 0x0017406c, 0x0000ffff, 0x00174070, 0x0000ffff, 0x00174074, 0x0000ffff, - 0x00174078, 0x0000ffff, 0x0017407c, 0x0000ffff, 0x00174080, 0x0000ffff, 0x00177400, 0x00000000, 0x00177404, - 0x00000000, 0x00177408, 0x00000000, 0x0017740c, 0x00000000, 0x00177410, 0x00000000, 0x00177414, 0x00000000, - 0x00177418, 0x00000000, 0x0017741c, 0x00000000, 0x00177420, 0x00000276, 0x00177424, 0x0000027f, 0x00177428, - 0x000002a3, 0x0017742c, 0x000002a8, 0x00177430, 0x000002ad, 0x00177434, 0x000002de, 0x00177438, 0x000002de, - 0x0017743c, 0x000002de, 0x00177440, 0x000002de, 0x00177444, 0x000002de, 0x00177448, 0x000002de, 0x0017744c, - 0x000002de, 0x00177450, 0x000002de, 0x00177454, 0x000002de, 0x00177458, 0x000002de, 0x0017745c, 0x000002de, - 0x00177460, 0x00000000, 0x00177464, 0x00000000, 0x00177468, 0x00000000, 0x0017746c, 0x00000000, 0x00177470, - 0x00000000, 0x00177474, 0x00000000, 0x00177478, 0x00000000, 0x0017747c, 0x00000000, 0x00177480, 0x00000000, - 0x00177484, 0x00000000, 0x00177488, 0x00000000, 0x0017748c, 0x00000000, 0x00177490, 0x00000000, 0x00177494, - 0x00000000, 0x00177498, 0x00000000, 0x0017749c, 0x00000000, 0x001774a0, 0x00000000, 0x001774a4, 0x00000000, - 0x001774a8, 0x00000000, 0x001774ac, 0x00000000, 0x001774b0, 0x00000000, 0x001774b4, 0x00000000, 0x001774b8, - 0x00000000, 0x001774bc, 0x00000000, 0x001774c0, 0x00000000, 0x001774c4, 0x00000000, 0x001774c8, 0x00000000, - 0x001774cc, 0x00000000, 0x001774d0, 0x00000000, 0x001774d4, 0x00000000, 0x001774d8, 0x00000000, 0x001774dc, - 0x00000000, 0x001774e0, 0x00000155, 0x001774e4, 0x00000177, 0x001774e8, 0x0000017c, 0x001774ec, 0x00000181, - 0x001774f0, 0x00000186, 0x001774f4, 0x0000018b, 0x001774f8, 0x00000190, 0x001774fc, 0x00000195, 0x00177500, - 0x000002de, 0x00177504, 0x000002de, 0x00177508, 0x000002de, 0x0017750c, 0x000002de, 0x00177510, 0x000002de, - 0x00177514, 0x000002de, 0x00177518, 0x000002de, 0x0017751c, 0x000002de, 0x00177520, 0x00000000, 0x00177524, - 0x00000000, 0x00177528, 0x00000000, 0x0017752c, 0x00000000, 0x00177530, 0x00000000, 0x00177534, 0x00000000, - 0x00177538, 0x00000000, 0x0017753c, 0x00000000, 0x00177540, 0x00000000, 0x00177544, 0x00000000, 0x00177548, - 0x00000000, 0x0017754c, 0x00000000, 0x00177550, 0x00000000, 0x00177554, 0x00000000, 0x00177558, 0x00000000, - 0x0017755c, 0x00000000, 0x00177560, 0x00080000, 0x00177564, 0x03020100, 0x00177568, 0x00000504, 0x0017756c, - 0x00000000, 0x00177570, 0x00000000, 0x00177574, 0x00000000, 0x00177578, 0x00000000, 0x0017757c, 0x00000000, - 0x00177580, 0x00000000, 0x00177584, 0x00000000, 0x00177588, 0x00000000, 0x0017758c, 0x00000000, 0x00177590, - 0x00000000, 0x00177594, 0x00000000, 0x00177598, 0x00000000, 0x0017759c, 0x00000000, 0x001775a0, 0x00000000, - 0x001775a4, 0x00000000, 0x001775a8, 0x00000000, 0x001775ac, 0x00000000, 0x001775b0, 0x00000000, 0x001775e0, - 0x00000000, 0x001775e4, 0x00000000, 0x001775e8, 0x00000000, 0x001775ec, 0x00000000, 0x001775f0, 0x00000000, - 0x001775f4, 0x00000000, 0x001775f8, 0x00000000, 0x001775fc, 0x00000000, 0x00177fd0, 0x0250607f, 0x00177fd8, - 0x0253007a, 0x00177fe0, 0x0852087b, 0x00177fe8, 0x0851887c, 0x00177ff0, 0x085503fd, 0x00177ff8, 0x0854837e, -}; diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c deleted file mode 100644 index 450226d2cc..0000000000 --- a/arch/arm/mach-netx/generic.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <init.h> -#include <command.h> -#include <io.h> -#include <restart.h> -#include <mach/netx-regs.h> -#include <mach/netx-xc.h> -#include "eth_firmware.h" - -struct fw_header { - unsigned int magic; - unsigned int type; - unsigned int version; - unsigned int table_size; - unsigned int reserved[4]; -} __attribute__((packed)); - -static int xc_check_ptr(int xcno, unsigned long adr, unsigned int size) -{ - if (adr >= NETX_PA_XMAC(xcno) && - adr + size < NETX_PA_XMAC(xcno) + XMAC_MEM_SIZE) - return 0; - - if (adr >= NETX_PA_XPEC(xcno) && - adr + size < NETX_PA_XPEC(xcno) + XPEC_MEM_SIZE) - return 0; - - printf("%s: illegal pointer 0x%08lx\n", __func__ ,adr); - return -1; -} - -static int xc_patch(int xcno, const u32 *patch, int count) -{ - unsigned int adr, val; - - int i; - for (i = 0; i < count; i++) { - adr = *patch++; - val = *patch++; - if (xc_check_ptr(xcno, adr, 1) < 0) - return -1; - writel(val, adr); - } - return 0; -} - -static void memset32(void *s, int c, int n) -{ - int i; - u32 *t = s; - - for (i = 0; i < (n >> 2); i++) - *t++ = 0; -} - -static void memcpy32(void *trg, const void *src, int size) -{ - int i; - u32 *t = trg; - const u32 *s = src; - for (i = 0; i < (size >> 2); i++) - *t++ = *s++; -} - -int loadxc(int xcno) -{ - /* stop xmac / xpec */ - XMAC_REG(xcno, XMAC_RPU_HOLD_PC) = RPU_HOLD_PC; - XMAC_REG(xcno, XMAC_TPU_HOLD_PC) = TPU_HOLD_PC; - XPEC_REG(xcno, XPEC_XPU_HOLD_PC) = XPU_HOLD_PC; - - XPEC_REG(xcno, XPEC_PC) = 0; - - /* load firmware */ - memset32((void*)NETX_PA_XPEC(xcno) + XPEC_RAM_START, 0, 0x2000); - memset32((void*)NETX_PA_XMAC(xcno), 0, 0x800); - - /* can't use barebox memcpy here, we need 32bit accesses */ - if (xcno == 0) { - memcpy32((void*)(NETX_PA_XMAC(xcno) + XMAC_RPU_PROGRAM_START), rpu_eth0, sizeof(rpu_eth0)); - memcpy32((void*)(NETX_PA_XMAC(xcno) + XMAC_TPU_PROGRAM_START), tpu_eth0, sizeof(tpu_eth0)); - memcpy32((void*)NETX_PA_XPEC(xcno) + XPEC_RAM_START, xpec_eth0_mac, sizeof(xpec_eth0_mac)); - xc_patch(xcno, rpu_eth0_patch, ARRAY_SIZE(rpu_eth0_patch) >> 1); - xc_patch(xcno, tpu_eth0_patch, ARRAY_SIZE(tpu_eth0_patch) >> 1); - xc_patch(xcno, xpec_eth0_mac_patch, ARRAY_SIZE(xpec_eth0_mac_patch) >> 1); - } else { - memcpy32((void*)(NETX_PA_XMAC(xcno) + XMAC_RPU_PROGRAM_START), rpu_eth1, sizeof(rpu_eth1)); - memcpy32((void*)(NETX_PA_XMAC(xcno) + XMAC_TPU_PROGRAM_START), tpu_eth1, sizeof(tpu_eth1)); - memcpy32((void*)NETX_PA_XPEC(xcno) + XPEC_RAM_START, xpec_eth1_mac, sizeof(xpec_eth1_mac)); - xc_patch(xcno, rpu_eth1_patch, ARRAY_SIZE(rpu_eth1_patch) >> 1); - xc_patch(xcno, tpu_eth1_patch, ARRAY_SIZE(tpu_eth1_patch) >> 1); - xc_patch(xcno, xpec_eth1_mac_patch, ARRAY_SIZE(xpec_eth1_mac_patch) >> 1); - } - - /* start xmac / xpec */ - XPEC_REG(xcno, XPEC_XPU_HOLD_PC) = 0; - XMAC_REG(xcno, XMAC_TPU_HOLD_PC) = 0; - XMAC_REG(xcno, XMAC_RPU_HOLD_PC) = 0; - - return 0; -} - -static int do_loadxc(int argc, char *argv[]) -{ - int xcno; - - if (argc < 2) - goto failure; - - xcno = simple_strtoul(argv[1], NULL, 16); - - printf("loading xc%d\n",xcno); - - /* There is a bug in the netx internal firmware. For now we have to call this twice */ - loadxc(xcno); - loadxc(xcno); - - return 0; - -failure: - return COMMAND_ERROR_USAGE; -} - -BAREBOX_CMD_START(loadxc) - .cmd = do_loadxc, - BAREBOX_CMD_DESC("load XMAC/XPEC engine with ethernet firmware") - BAREBOX_CMD_GROUP(CMD_GRP_NET) -BAREBOX_CMD_END - -static void __noreturn netx_restart_soc(struct restart_handler *rst) -{ - SYSTEM_REG(SYSTEM_RES_CR) = 0x01000008; - - /* Not reached */ - hang(); -} - -static int restart_register_feature(void) -{ - restart_handler_register_fn(netx_restart_soc); - - return 0; -} -coredevice_initcall(restart_register_feature); diff --git a/arch/arm/mach-netx/include/mach/netx-cm.h b/arch/arm/mach-netx/include/mach/netx-cm.h deleted file mode 100644 index 37cf76d1f9..0000000000 --- a/arch/arm/mach-netx/include/mach/netx-cm.h +++ /dev/null @@ -1,32 +0,0 @@ - -#ifndef __AT_CM_USERAREAS_H__ -#define __AT_CM_USERAREAS_H__ - -int netx_cm_init(void); - -struct netx_cm_userarea_1 { - unsigned short signature; /* configuration block signature */ - unsigned short version; /* version information */ - unsigned short crc16; /* crc16 checksum over all 3 areas, including the reserved blocks */ - unsigned char mac[4][6]; /* mac addresses */ - unsigned char reserved[2]; /* reserved, must be 0 */ -}; - -struct netx_cm_userarea_2 { - unsigned long sdram_size; /* sdram size in bytes */ - unsigned long sdram_control; /* sdram control register value (sdram_general_ctrl) */ - unsigned long sdram_timing; /* sdram timing register value (sdram_timing_ctrl) */ - unsigned char reserved0[20]; /* reserved, must be 0 */ -}; - -struct netx_cm_userarea_3 { - unsigned char reserved[32]; /* reserved, must be 0 */ -}; - -struct netx_cm_userarea { - struct netx_cm_userarea_1 area_1; - struct netx_cm_userarea_2 area_2; - struct netx_cm_userarea_3 area_3; -}; - -#endif /* __AT_CM_USERAREAS_H__ */ diff --git a/arch/arm/mach-netx/include/mach/netx-eth.h b/arch/arm/mach-netx/include/mach/netx-eth.h deleted file mode 100644 index 654cfe73d3..0000000000 --- a/arch/arm/mach-netx/include/mach/netx-eth.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _ASM_ARCH_NETX_ETH_H -#define _ASM_ARCH_NETX_ETH_H - -struct netx_eth_platform_data { - int xcno; -}; - -#endif /* _ASM_ARCH_NETX_ETH_H */ - diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h deleted file mode 100644 index c984eec274..0000000000 --- a/arch/arm/mach-netx/include/mach/netx-regs.h +++ /dev/null @@ -1,324 +0,0 @@ -/* - * include/asm-arm/arch-netx/netx-regs.h - * - * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_NETX_REGS_H -#define __ASM_ARCH_NETX_REGS_H - -#define NETX_SDRAM_BASE 0x80000000 -#define NETX_CS0_BASE 0xc0000000 -#define NETX_CS1_BASE 0xc8000000 -#define NETX_CS2_BASE 0xd0000000 - -#define NETX_IO_PHYS 0x00100000 -#define io_p2v(x) (x) -#define __REG(base,ofs) (*((volatile unsigned long *)(io_p2v(base) + ofs))) - -#define XPEC_MEM_SIZE 0x4000 -#define XMAC_MEM_SIZE 0x1000 -#define SRAM_MEM_SIZE 0x8000 - -/* offsets relative to the beginning of the io space */ -#define NETX_OFS_SYSTEM 0x00000 -#define NETX_OFS_MEMCR 0x00100 -#define NETX_OFS_DPRAM 0x03000 -#define NETX_OFS_GPIO 0x00800 -#define NETX_OFS_PIO 0x00900 -#define NETX_OFS_UART0 0x00a00 -#define NETX_OFS_UART1 0x00a40 -#define NETX_OFS_UART2 0x00a80 -#define NETX_OF_MIIMU 0x00b00 -#define NETX_OFS_SPI 0x00c00 -#define NETX_OFS_I2C 0x00d00 -#define NETX_OFS_SYSTIME 0x01100 -#define NETX_OFS_RTC 0x01200 -#define NETX_OFS_LCD 0x04000 -#define NETX_OFS_USB 0x20000 -#define NETX_OFS_XMAC0 0x60000 -#define NETX_OFS_XMAC1 0x61000 -#define NETX_OFS_XMAC2 0x62000 -#define NETX_OFS_XMAC3 0x63000 -#define NETX_OFS_XMAC(no) (0x60000 + (no) * 0x1000) -#define NETX_OFS_PFIFO 0x64000 -#define NETX_OFS_XPEC0 0x70000 -#define NETX_OFS_XPEC1 0x74000 -#define NETX_OFS_XPEC2 0x78000 -#define NETX_OFS_XPEC3 0x7c000 -#define NETX_OFS_XPEC(no) (0x70000 + (no) * 0x4000) -#define NETX_OFS_VIC 0xff000 - -#define NETX_PA_SYSTEM (NETX_IO_PHYS + NETX_OFS_SYSTEM) -#define NETX_PA_MEMCR (NETX_IO_PHYS + NETX_OFS_MEMCR) -#define NETX_PA_DPMAS (NETX_IO_PHYS + NETX_OFS_DPRAM) -#define NETX_PA_GPIO (NETX_IO_PHYS + NETX_OFS_GPIO) -#define NETX_PA_PIO (NETX_IO_PHYS + NETX_OFS_PIO) -#define NETX_PA_UART0 (NETX_IO_PHYS + NETX_OFS_UART0) -#define NETX_PA_UART1 (NETX_IO_PHYS + NETX_OFS_UART1) -#define NETX_PA_UART2 (NETX_IO_PHYS + NETX_OFS_UART2) -#define NETX_PA_MIIMU (NETX_IO_PHYS + NETX_OF_MIIMU) -#define NETX_PA_SPI (NETX_IO_PHYS + NETX_OFS_SPI) -#define NETX_PA_I2C (NETX_IO_PHYS + NETX_OFS_I2C) -#define NETX_PA_SYSTIME (NETX_IO_PHYS + NETX_OFS_SYSTIME) -#define NETX_PA_RTC (NETX_IO_PHYS + NETX_OFS_RTC) -#define NETX_PA_LCD (NETX_IO_PHYS + NETX_OFS_LCD) -#define NETX_PA_USB (NETX_IO_PHYS + NETX_OFS_USB) -#define NETX_PA_XMAC0 (NETX_IO_PHYS + NETX_OFS_XMAC0) -#define NETX_PA_XMAC1 (NETX_IO_PHYS + NETX_OFS_XMAC1) -#define NETX_PA_XMAC2 (NETX_IO_PHYS + NETX_OFS_XMAC2) -#define NETX_PA_XMAC3 (NETX_IO_PHYS + NETX_OFS_XMAC3) -#define NETX_PA_XMAC(no) (NETX_IO_PHYS + NETX_OFS_XMAC(no)) -#define NETX_PA_PFIFO (NETX_IO_PHYS + NETX_OFS_PFIFO) -#define NETX_PA_XPEC0 (NETX_IO_PHYS + NETX_OFS_XPEC0) -#define NETX_PA_XPEC1 (NETX_IO_PHYS + NETX_OFS_XPEC1) -#define NETX_PA_XPEC2 (NETX_IO_PHYS + NETX_OFS_XPEC2) -#define NETX_PA_XPEC3 (NETX_IO_PHYS + NETX_OFS_XPEC3) -#define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no)) -#define NETX_PA_VIC (NETX_IO_PHYS + NETX_OFS_VIC) - -/********************************* - * System functions * - *********************************/ - -#define SYSTEM_REG(x) __REG(NETX_PA_SYSTEM, (x)) -#define SYSTEM_BOO_SR 0x00 -#define SYSTEM_IOC_CR 0x04 -#define SYSTEM_IOC_MR 0x08 -#define SYSTEM_RES_CR 0x0c -#define SYSTEM_PHY_CONTROL 0x10 -#define SYSTEM_REV 0x34 -#define SYSTEM_IOC_ACCESS_KEY 0x70 -#define SYSTEM_WDG_TR 0x200 -#define SYSTEM_WDG_CTR 0x204 -#define SYSTEM_WDG_IRQ_TIMEOUT 0x208 -#define SYSTEM_WDG_RES_TIMEOUT 0x20c - -#define PHY_CONTROL_RESET (1<<31) -#define PHY_CONTROL_SIM_BYP (1<<30) -#define PHY_CONTROL_CLK_XLATIN (1<<29) -#define PHY_CONTROL_PHY1_EN (1<<21) -#define PHY_CONTROL_PHY1_NP_MSG_CODE -#define PHY_CONTROL_PHY1_AUTOMDIX (1<<17) -#define PHY_CONTROL_PHY1_FIXMODE (1<<16) -#define PHY_CONTROL_PHY1_MODE(mode) (((mode) & 0x7) << 13) -#define PHY_CONTROL_PHY0_EN (1<<12) -#define PHY_CONTROL_PHY0_NP_MSG_CODE -#define PHY_CONTROL_PHY0_AUTOMDIX (1<<8) -#define PHY_CONTROL_PHY0_FIXMODE (1<<7) -#define PHY_CONTROL_PHY0_MODE(mode) (((mode) & 0x7) << 4) -#define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf) - -#define PHY_MODE_10BASE_T_HALF 0 -#define PHY_MODE_10BASE_T_FULL 1 -#define PHY_MODE_100BASE_TX_FX_FULL 2 -#define PHY_MODE_100BASE_TX_FX_HALF 3 -#define PHY_MODE_100BASE_TX_HALF 4 -#define PHY_MODE_REPEATER 5 -#define PHY_MODE_POWER_DOWN 6 -#define PHY_MODE_ALL 7 - -/********************************* - * Vector interrupt controller * - *********************************/ - -/* Registers */ -#define VIC_REG(x) __REG(NETX_PA_VIC, (x)) -#define VIC_IRQ_STATUS 0x00 -#define VIC_FIQ_STATUS 0x04 -#define VIC_IRQ_RAW_STATUS 0x08 -#define VIC_INT_SELECT 0x0C /* 1 = FIQ, 0 = IRQ */ -#define VIC_IRQ_ENABLE 0x10 /* 1 = enable, 0 = disable */ -#define VIC_IRQ_ENABLE_CLEAR 0x14 -#define VIC_IRQ_SOFT 0x18 -#define VIC_IRQ_SOFT_CLEAR 0x1C -#define VIC_PROTECT 0x20 -#define VIC_VECT_ADDR 0x30 -#define VIC_DEF_VECT_ADDR 0x34 -#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */ -#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */ -#define VIC_ITCR 0x300 /* VIC test control register */ - -/* Bits */ -#define VECT_CNTL_ENABLE (1 << 5) - -/******************************* - * GPIO and timer module * - *******************************/ - -/* Registers */ -#define GPIO_REG(x) __REG(NETX_PA_GPIO, (x)) -#define GPIO_CFG(gpio) (0x0 + ((gpio)<<2)) -#define GPIO_THRESHOLD_CAPTURE(gpio) (0x40 + ((gpio)<<2)) -#define GPIO_COUNTER_CTRL(counter) (0x80 + ((counter)<<2)) -#define GPIO_COUNTER_MAX(counter) (0x94 + ((counter)<<2)) -#define GPIO_COUNTER_CURRENT(counter) (0xa8 + ((counter)<<2)) -#define GPIO_IRQ_ENABLE (0xbc) -#define GPIO_IRQ_DISABLE (0xc0) -#define GPIO_SYSTIME_NS_CMP (0xc4) -#define GPIO_LINE (0xc8) -#define GPIO_IRQ (0xd0) - -/* Bits */ -#define CFG_IOCFG_GP_INPUT (0x0) -#define CFG_IOCFG_GP_OUTPUT (0x1) -#define CFG_IOCFG_GP_UART (0x2) -#define CFG_INV (1<<2) -#define CFG_MODE_INPUT_READ (0<<3) -#define CFG_MODE_INPUT_CAPTURE_CONT_RISING (1<<3) -#define CFG_MODE_INPUT_CAPTURE_ONCE_RISING (2<<3) -#define CFG_MODE_INPUT_CAPTURE_HIGH_LEVEL (3<<3) -#define CFG_COUNT_REF_COUNTER0 (0<<5) -#define CFG_COUNT_REF_COUNTER1 (1<<5) -#define CFG_COUNT_REF_COUNTER2 (2<<5) -#define CFG_COUNT_REF_COUNTER3 (3<<5) -#define CFG_COUNT_REF_COUNTER4 (4<<5) -#define CFG_COUNT_REF_SYSTIME (7<<5) - -#define COUNTER_CTRL_RUN (1<<0) -#define COUNTER_CTRL_SYM (1<<1) -#define COUNTER_CTRL_ONCE (1<<2) -#define COUNTER_CTRL_IRQ_EN (1<<3) -#define COUNTER_CTRL_CNT_EVENT (1<<4) -#define COUNTER_CTRL_RST_EN (1<<5) -#define COUNTER_CTRL_SEL_EVENT (1<<6) -#define COUNTER_CTRL_GPIO_REF /* FIXME */ - -#define GPIO_BIT(gpio) (1<<(gpio)) -#define COUNTER_BIT(counter) ((1<<16)<<(counter)) - -/******************************* - * PIO * - *******************************/ - -/* Registers */ -#define NETX_PIO_REG(ofs) __REG(NETX_PA_PIO, ofs) -#define NETX_PIO_INPIO NETX_PIO_REG(0x0) -#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4) -#define NETX_PIO_OEPIO NETX_PIO_REG(0x8) - -/******************************* - * MII Unit * - *******************************/ -#define MIIMU_REG __REG(NETX_PA_MIIMU, 0) -/* Bits */ -#define MIIMU_SNRDY (1<<0) -#define MIIMU_PREAMBLE (1<<1) -#define MIIMU_OPMODE_WRITE (1<<2) -#define MIIMU_MDC_PERIOD (1<<3) -#define MIIMU_PHY_NRES (1<<4) -#define MIIMU_RTA (1<<5) -#define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6) -#define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11) -#define MIIMU_DATA(data) (((data) & 0xffff) << 16) - -/******************************* - * xmac / xpec * - *******************************/ -#define XPEC_REG(no, reg) __REG(NETX_PA_XPEC(no), (reg)) -#define XPEC_R0 0x00 -#define XPEC_R1 0x04 -#define XPEC_R2 0x08 -#define XPEC_R3 0x0c -#define XPEC_R4 0x10 -#define XPEC_R5 0x14 -#define XPEC_R6 0x18 -#define XPEC_R7 0x1c -#define XPEC_RANGE01 0x20 -#define XPEC_RANGE23 0x24 -#define XPEC_RANGE45 0x28 -#define XPEC_RANGE67 0x2c -#define XPEC_PC 0x48 -#define XPEC_TIMER(timer) (0x30 + ((timer)<<2)) -#define XPEC_IRQ 0x8c -#define XPEC_SYSTIME_NS 0x90 -#define XPEC_FIFO_DATA 0x94 -#define XPEC_SYSTIME_S 0x98 -#define XPEC_ADC 0x9c -#define XPEC_URX_COUNT 0x40 -#define XPEC_UTX_COUNT 0x44 -#define XPEC_PC 0x48 -#define XPEC_ZERO 0x4c -#define XPEC_STATCFG 0x50 -#define XPEC_EC_MASKA 0x54 -#define XPEC_EC_MASKB 0x58 -#define XPEC_EC_MASK0 0x5c -#define XPEC_EC_MASK8 0x7c -#define XPEC_EC_MASK9 0x80 -#define XPEC_XPU_HOLD_PC 0x100 -#define XPEC_RAM_START 0x2000 - -#define XPU_HOLD_PC (1<<0) - -#define XMAC_REG(no, reg) __REG(NETX_PA_XMAC(no), (reg)) -#define XMAC_RPU_PROGRAM_START 0x000 -#define XMAC_RPU_PROGRAM_END 0x3ff -#define XMAC_TPU_PROGRAM_START 0x400 -#define XMAC_TPU_PROGRAM_END 0x7ff -#define XMAC_RPU_HOLD_PC 0xa00 -#define XMAC_TPU_HOLD_PC 0xa04 - -#define RPU_HOLD_PC (1<<15) -#define TPU_HOLD_PC (1<<15) -/******************************* - * Pointer FIFO * - *******************************/ -#define PFIFO_REG(x) __REG(NETX_PA_PFIFO, (x)) -#define PFIFO_BASE(pfifo) (0x00 + ((pfifo)<<2) ) -#define PFIFO_BORDER_BASE(pfifo) (0x80 + ((pfifo)<<2) ) -#define PFIFO_RESET 0x100 -#define PFIFO_FULL 0x104 -#define PFIFO_EMPTY 0x108 -#define PFIFO_OVEFLOW 0x10c -#define PFIFO_UNDERRUN 0x110 -#define PFIFO_FILL_LEVEL(pfifo) (0x180 + ((pfifo)<<2)) - -/******************************* - * Dual Port Memory * - *******************************/ - -/* Registers */ -#define NETX_DPMAS_REG(ofs) __REG(NETX_PA_DPMAS, (ofs)) -#define NETX_DPMAS_IF_CONF0_REG NETX_DPMAS_REG(0x608) -#define NETX_DPMAS_IF_CONF1_REG NETX_DPMAS_REG(0x60c) -#define NETX_DPMAS_EXT_CONFIG0_REG NETX_DPMAS_REG(0x610) -#define NETX_DPMAS_EXT_CONFIG1_REG NETX_DPMAS_REG(0x614) -#define NETX_DPMAS_EXT_CONFIG2_REG NETX_DPMAS_REG(0x618) -#define NETX_DPMAS_EXT_CONFIG3_REG NETX_DPMAS_REG(0x61c) -#define NETX_DPMAS_IO_MODE0_REG NETX_DPMAS_REG(0x620) /* I/O 32..63 */ -#define NETX_DPMAS_DRV_EN0_REG NETX_DPMAS_REG(0x624) -#define NETX_DPMAS_DATA0_REG NETX_DPMAS_REG(0x628) -#define NETX_DPMAS_IO_MODE1_REG NETX_DPMAS_REG(0x630) /* I/O 64..84 */ -#define NETX_DPMAS_DRV_EN1_REG NETX_DPMAS_REG(0x634) -#define NETX_DPMAS_DATA1_REG NETX_DPMAS_REG(0x638) - -/* Bits */ -#define IF_CONF0_HIF_DISABLED (0<<28) -#define IF_CONF0_HIF_EXT_BUS (1<<28) -#define IF_CONF0_HIF_UP_8BIT (2<<28) -#define IF_CONF0_HIF_UP_16BIT (3<<28) -#define IF_CONF0_HIF_IO (4<<28) - -#define IO_MODE1_SAMPLE_NPOR (0<<30) -#define IO_MODE1_SAMPLE_100MHZ (1<<30) -#define IO_MODE1_SAMPLE_NPIO36 (2<<30) -#define IO_MODE1_SAMPLE_PIO36 (3<<30) - -/******************************* - * I2C * - *******************************/ -#define NETX_I2C_REG(ofs) __REG(NETX_PA_I2C, (ofs)) -#define NETX_I2C_CTRL_REG NETX_I2C_REG(0x0) -#define NETX_I2C_DATA_REG NETX_I2C_REG(0x4) - -#endif /* __ASM_ARCH_NETX_REGS_H */ diff --git a/arch/arm/mach-netx/include/mach/netx-xc.h b/arch/arm/mach-netx/include/mach/netx-xc.h deleted file mode 100644 index 060a9b3b02..0000000000 --- a/arch/arm/mach-netx/include/mach/netx-xc.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_ARCH_NETX_XC_H -#define __ASM_ARCH_NETX_XC_H - -int loadxc(int); - -#endif diff --git a/arch/arm/mach-netx/interrupts.c b/arch/arm/mach-netx/interrupts.c deleted file mode 100644 index af78e19bfd..0000000000 --- a/arch/arm/mach-netx/interrupts.c +++ /dev/null @@ -1,70 +0,0 @@ -#include <common.h> - -#include <mach/netx-regs.h> - -int timer_init (void) -{ - /* disable timer initially */ - GPIO_REG(GPIO_COUNTER_CTRL(0)) = 0; - /* Reset the timer value to zero */ - GPIO_REG(GPIO_COUNTER_CURRENT(0)) = 0; - GPIO_REG(GPIO_COUNTER_MAX(0)) = 0xffffffff; - GPIO_REG(GPIO_COUNTER_CTRL(0)) = COUNTER_CTRL_RUN; - - return 0; -} - -/* current timestamp in ms */ -static unsigned long timestamp = 0; - -static unsigned long last_timer = 0; - -/* We can't detect overruns here since we don't know how often - * we get called. The only thing we can do is to make sure that - * time moves forward. - */ -ulong get_timer (ulong start) -{ - unsigned long cur_timer = GPIO_REG(GPIO_COUNTER_CURRENT(0)); - unsigned long time_inc; - - - if(cur_timer > last_timer) - time_inc = (cur_timer - last_timer) / 100000; - else - time_inc = ((0xffffffff - last_timer) + cur_timer) / 100000; - - if(time_inc) - last_timer = cur_timer; - - timestamp += time_inc; - - return timestamp - start; -} - -void mdelay(unsigned long msec) -{ - unsigned long now = get_timer(0); - - while( get_timer(0) < now + msec ); -} - -void udelay(unsigned long usec) -{ - unsigned long start, end, msec = usec / 1000; - - if(msec) - mdelay(msec); - - usec -= msec * 1000; - - start = GPIO_REG(GPIO_COUNTER_CURRENT(0)); - end = start + usec * 100; - - if(end < start) { - /* wait for overrun */ - while( GPIO_REG(GPIO_COUNTER_CURRENT(0)) > start); - } - - while( GPIO_REG(GPIO_COUNTER_CURRENT(0)) < end); -} diff --git a/arch/arm/mach-netx/lowlevel_init.S b/arch/arm/mach-netx/lowlevel_init.S deleted file mode 100644 index 7990545665..0000000000 --- a/arch/arm/mach-netx/lowlevel_init.S +++ /dev/null @@ -1,3 +0,0 @@ -.globl lowlevel_init -lowlevel_init: - mov pc, lr diff --git a/arch/arm/mach-netx/netx-cm.c b/arch/arm/mach-netx/netx-cm.c deleted file mode 100644 index ebf9901d19..0000000000 --- a/arch/arm/mach-netx/netx-cm.c +++ /dev/null @@ -1,317 +0,0 @@ -#include <common.h> -#include <mach/netx-regs.h> -#include <mach/netx-cm.h> - -#define I2C_CTRL_ENABLE (1<<0) -#define I2C_CTRL_SPEED_25 (0<<1) -#define I2C_CTRL_SPEED_50 (1<<1) -#define I2C_CTRL_SPEED_100 (2<<1) -#define I2C_CTRL_SPEED_200 (3<<1) -#define I2C_CTRL_SPEED_400 (4<<1) -#define I2C_CTRL_SPEED_600 (5<<1) -#define I2C_CTRL_SPEED_800 (6<<1) -#define I2C_CTRL_SPEED_1000 (7<<1) -#define I2C_CTRL_SLAVEID(id) (((id) & 0x7f) << 4) - -#define I2C_DATA_SEND_STOP (1<<8) -#define I2C_DATA_READ (1<<9) -#define I2C_DATA_SEND_START (1<<10) -#define I2C_DATA_BUSY (1<<11) -#define I2C_DATA_EXECUTE (1<<11) -#define I2C_DATA_RDF (1<<12) - -/* INS */ -#define AT88_WRITE_USER_ZONE 0xb0 -#define AT88_READ_USER_ZONE 0xb2 -#define AT88_SYSTEM_WRITE 0xb4 -#define AT88_SYSTEM_READ 0xb6 - -/* P1 */ -#define AT88_READ_CONFIG_ZONE 0x00 -#define AT88_SET_USER_ZONE 0x03 -#define SEND_START (1<<0) -#define SEND_STOP (1<<1) -#define IGNORE_RDF (1<<2) - -#define MAX_USER_ZONE_SIZE 128 - -/* - * netx i2c functions - */ -static inline void i2c_set_slaveid(uchar id) -{ - unsigned int val; - val = NETX_I2C_CTRL_REG; - val &= 0xf; - val |= I2C_CTRL_SLAVEID(id); - NETX_I2C_CTRL_REG = val; -} - -static inline uchar i2c_read_byte(int flags) -{ - unsigned int val = I2C_DATA_EXECUTE | I2C_DATA_READ; - - if(flags & SEND_START) - val |= I2C_DATA_SEND_START; - if(flags & SEND_STOP) - val |= I2C_DATA_SEND_STOP; - - NETX_I2C_DATA_REG = val; - - while(NETX_I2C_DATA_REG & I2C_DATA_BUSY); - - return NETX_I2C_DATA_REG & 0xff; -} - -static inline void i2c_write_byte(uchar byte, int flags) -{ - unsigned int val = byte; - - if(flags & SEND_START) - val |= I2C_DATA_SEND_START; - if(flags & SEND_STOP) - val |= I2C_DATA_SEND_STOP; - val |= I2C_DATA_EXECUTE; - - NETX_I2C_DATA_REG = val; - - while(NETX_I2C_DATA_REG & I2C_DATA_BUSY); -} - -void i2c_init (int speed) -{ - unsigned int val; - - switch(speed) { - case 25000: - val = I2C_CTRL_SPEED_25; - break; - case 50000: - val = I2C_CTRL_SPEED_50; - break; - case 100000: - val = I2C_CTRL_SPEED_100; - break; - case 200000: - val = I2C_CTRL_SPEED_200; - break; - case 400000: - val = I2C_CTRL_SPEED_400; - break; - case 600000: - val = I2C_CTRL_SPEED_600; - break; - case 800000: - val = I2C_CTRL_SPEED_800; - break; - case 1000000: - val = I2C_CTRL_SPEED_1000; - break; - default: - printf("unsupported speed %d. defaulting to 100kHz\n",speed); - val = I2C_CTRL_SPEED_100; - break; - } - - NETX_I2C_CTRL_REG = val | I2C_CTRL_ENABLE; - - i2c_write_byte(0xff, 0); - - udelay(2000); -} - -/* - * at88SCxxxx CryptoMemory functions - */ -struct at88_parm { - char *name; - int zones; - int zone_size; - uchar atr[8]; -}; - -struct at88_parm at88_parm_table[] = { - { .name = "at88sc0104c", .zones = 4, .zone_size = 32, .atr = { 0x3b, 0xb2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x01 } }, - { .name = "at88sc0204c", .zones = 4, .zone_size = 64, .atr = { 0x3b, 0xb2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x02 } }, - { .name = "at88sc0404c", .zones = 4, .zone_size = 128, .atr = { 0x3b, 0xb2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x04 } }, - { .name = "at88sc0808c", .zones = 8, .zone_size = 128, .atr = { 0x3b, 0xb2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x08 } }, - { .name = "at88sc1616c", .zones = 16, .zone_size = 128, .atr = { 0x3b, 0xb2, 0x11, 0x00, 0x10, 0x80, 0x00, 0x16 } }, -}; -#define parm_size (sizeof(at88_parm_table) / sizeof(struct at88_parm)) - -struct at88_parm *at88_parm = NULL; - -int set_user_zone(uchar zone) -{ - if(zone >= at88_parm->zones) - return -1; - - i2c_set_slaveid(AT88_SYSTEM_WRITE >> 1); - i2c_write_byte(AT88_SET_USER_ZONE, SEND_START); - i2c_write_byte(zone, 0); - i2c_write_byte(8, SEND_STOP); - - return 0; -} - -/* - * We chose the easy way here and read/write whole zones at once - */ -int read_user_zone(char *buf) -{ - int i; - - i2c_set_slaveid(AT88_READ_USER_ZONE >> 1); - i2c_write_byte(0, SEND_START); - i2c_write_byte(0, 0); - i2c_write_byte(at88_parm->zone_size, 0); - - for(i=0; i < at88_parm->zone_size; i++) - buf[i] = i2c_read_byte( i==at88_parm->zone_size - 1 ? SEND_STOP : 0); - - return 0; -} - -#define BLK_SIZE 16 -int write_user_zone(char *buf) -{ - int i,block; - - for(block=0; block < at88_parm->zone_size/16; block++) { - i2c_set_slaveid(AT88_WRITE_USER_ZONE >> 1); - i2c_write_byte(0, SEND_START); - i2c_write_byte(block * BLK_SIZE, 0); - i2c_write_byte(BLK_SIZE, 0); - - for(i=0; i<BLK_SIZE; i++) - i2c_write_byte( buf[block * BLK_SIZE + i], i == BLK_SIZE - 1 ? SEND_STOP : 0); - - udelay(16000); - } - - return 0; -} - -struct netx_cm_userarea netx_cm_userarea; - -struct netx_cm_userarea* netx_cm_get_userarea(void) -{ - set_user_zone(1); - if( read_user_zone((char *)&netx_cm_userarea.area_1) ) - return NULL; - - set_user_zone(2); - if( read_user_zone((char *)&netx_cm_userarea.area_2) ) - return NULL; - - set_user_zone(3); - if( read_user_zone((char *)&netx_cm_userarea.area_2) ) - return NULL; - - return &netx_cm_userarea; -} - -int netx_cm_write_userarea(struct netx_cm_userarea *area) -{ - set_user_zone(1); - if( write_user_zone( (char *)&area->area_1 ) ) - return -1; - - set_user_zone(2); - if( write_user_zone( (char *)&area->area_2 ) ) - return -1; - - set_user_zone(3); - if( write_user_zone( (char *)&area->area_2 ) ) - return -1; - return 0; -} - - -unsigned short crc16(unsigned short crc, unsigned int data) -{ - crc = (crc >> 8) | ((crc & 0xff) << 8); - crc ^= data; - crc ^= (crc & 0xff) >> 4; - crc ^= (crc & 0x0f) << 12; - crc ^= ((crc & 0xff) << 4) << 1; - - return crc; -} - - -#define ETH_MAC_4321 0x1564 -#define ETH_MAC_65 0x1568 - -int netx_cm_init(void) -{ - int i; - char buf[MAX_USER_ZONE_SIZE]; - struct netx_cm_userarea *area; - - i2c_init(100000); - - i2c_set_slaveid(AT88_SYSTEM_READ >> 1); - i2c_write_byte(AT88_READ_CONFIG_ZONE, SEND_START); - i2c_write_byte(0, 0); /* adr */ - i2c_write_byte(8, 0); /* len */ - - for(i=0;i<8;i++) - buf[i] = i2c_read_byte( i==7 ? SEND_STOP : 0 ); - - for(i=0; i<parm_size; i++) { - if(!memcmp(buf,at88_parm_table[i].atr,8)) { - at88_parm = &at88_parm_table[i]; - break; - } - } - - if(!at88_parm) { - printf("no crypto flash found\n"); - debug("unrecognized atr: "); - for(i=0; i<8; i++) - debug("0x%02x ",buf[i]); - printf("\n"); - return -1; - } - - printf("%s crypto flash found\n",at88_parm->name); - - area = netx_cm_get_userarea(); - - for(i=0;i<4;i++) { - printf("xc%d mac: %02x:%02x:%02x:%02x:%02x:%02x\n", i, - area->area_1.mac[i][0], - area->area_1.mac[i][1], - area->area_1.mac[i][2], - area->area_1.mac[i][3], - area->area_1.mac[i][4], - area->area_1.mac[i][5]); - - XPEC_REG(i, XPEC_RAM_START + ETH_MAC_4321) = - area->area_1.mac[i][0] | - area->area_1.mac[i][1]<<8 | - area->area_1.mac[i][2]<<16 | - area->area_1.mac[i][3]<<24; - - XPEC_REG(i, XPEC_RAM_START + ETH_MAC_65) = - area->area_1.mac[i][4] | - area->area_1.mac[i][5]<<8; - } - - for(i=0; i<6; i++) - gd->bd->bi_enetaddr[i] = area->area_1.mac[CONFIG_DRIVER_NET_NETX_XCNO][i]; - - - sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x", - area->area_1.mac[CONFIG_DRIVER_NET_NETX_XCNO][0], - area->area_1.mac[CONFIG_DRIVER_NET_NETX_XCNO][1], - area->area_1.mac[CONFIG_DRIVER_NET_NETX_XCNO][2], - area->area_1.mac[CONFIG_DRIVER_NET_NETX_XCNO][3], - area->area_1.mac[CONFIG_DRIVER_NET_NETX_XCNO][4], - area->area_1.mac[CONFIG_DRIVER_NET_NETX_XCNO][5]); - - setenv("ethaddr", buf); - - return 0; -} diff --git a/arch/arm/mach-samsung/mem-s3c64xx.c b/arch/arm/mach-samsung/mem-s3c64xx.c index aca2cf5066..c51245a378 100644 --- a/arch/arm/mach-samsung/mem-s3c64xx.c +++ b/arch/arm/mach-samsung/mem-s3c64xx.c @@ -39,7 +39,7 @@ int s3c6410_setup_chipselect(int no, const struct s3c6410_chipselect *c) tacs = DIV_ROUND_UP(c->adr_setup_t, per_t); /* start of CS to read/write assertion (= access setup) */ tcos = DIV_ROUND_UP(c->access_setup_t, per_t); - /* length of read/write assertion (= access lenght) */ + /* length of read/write assertion (= access length) */ tacc = DIV_ROUND_UP(c->access_t, per_t) - 1; /* CS hold after access is finished */ tcoh = DIV_ROUND_UP(c->cs_hold_t, per_t); diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 16a218658a..204cad608f 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -1 +1 @@ -obj- := __dummy__.o +obj-$(CONFIG_BOOTM) := stm32image.o diff --git a/arch/arm/mach-stm32mp/stm32image.c b/arch/arm/mach-stm32mp/stm32image.c new file mode 100644 index 0000000000..84975c5c3b --- /dev/null +++ b/arch/arm/mach-stm32mp/stm32image.c @@ -0,0 +1,50 @@ +#define pr_fmt(fmt) "stm32image: " fmt + +#include <bootm.h> +#include <common.h> +#include <init.h> +#include <memory.h> +#include <linux/sizes.h> + +#define BAREBOX_STAGE2_OFFSET 256 + +static int do_bootm_stm32image(struct image_data *data) +{ + void (*barebox)(void); + resource_size_t start, end; + int ret; + + ret = memory_bank_first_find_space(&start, &end); + if (ret) + return ret; + + ret = bootm_load_os(data, start); + if (ret) + return ret; + + barebox = (void*)start + BAREBOX_STAGE2_OFFSET; + + if (data->verbose) + printf("Loaded barebox image to 0x%08lx\n", + (unsigned long)barebox); + + shutdown_barebox(); + + barebox(); + + return -EIO; +} + +static struct image_handler image_handler_stm32_image_v1_handler = { + .name = "STM32 image (v1)", + .bootm = do_bootm_stm32image, + .filetype = filetype_stm32_image_v1, +}; + +static int stm32mp_register_stm32image_image_handler(void) +{ + register_image_handler(&image_handler_stm32_image_v1_handler); + + return 0; +} +late_initcall(stm32mp_register_stm32image_image_handler); diff --git a/arch/arm/pbl/.gitignore b/arch/arm/pbl/.gitignore deleted file mode 100644 index be604a81bf..0000000000 --- a/arch/arm/pbl/.gitignore +++ /dev/null @@ -1,9 +0,0 @@ -piggy.gzip -piggy.lzo -piggy.lz4 -piggy.xzkern -piggy.shipped -zbarebox -zbarebox.bin -zbarebox.lds -zbarebox.map diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile deleted file mode 100644 index 5d7e85b373..0000000000 --- a/arch/arm/pbl/Makefile +++ /dev/null @@ -1,61 +0,0 @@ - -suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip -suffix_$(CONFIG_IMAGE_COMPRESSION_LZO) = lzo -suffix_$(CONFIG_IMAGE_COMPRESSION_LZ4) = lz4 -suffix_$(CONFIG_IMAGE_COMPRESSION_XZKERN) = xzkern -suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = comp_copy - -OBJCOPYFLAGS_zbarebox.bin = -O binary -piggy_o := piggy.$(suffix_y).o - -targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S \ - $(piggy_o) piggy.$(suffix_y) - -# Make sure files are removed during clean -extra-y += piggy.gzip piggy.lz4 piggy.lzo piggy.lzma piggy.xzkern piggy.shipped zbarebox.map - -ifeq ($(CONFIG_CPU_BIG_ENDIAN),y) -FIX_SIZE=-b -else -FIX_SIZE= -endif - -$(obj)/zbarebox.bin: $(obj)/zbarebox FORCE - $(call if_changed,objcopy) - $(call cmd,check_file_size,$@,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE)) - $(Q)$(kecho) ' Barebox: fix size' - $(Q)$(objtree)/scripts/fix_size -i -f $(objtree)/$@ $(FIX_SIZE) - $(Q)$(kecho) ' Barebox: $@ is ready' - -$(obj)/zbarebox.S: $(obj)/zbarebox FORCE - $(call if_changed,disasm) - -PBL_CPPFLAGS += -fdata-sections -ffunction-sections -LDFLAGS_zbarebox := -Map $(obj)/zbarebox.map --gc-sections -ifdef CONFIG_PBL_RELOCATABLE -LDFLAGS_zbarebox += -pie -else -LDFLAGS_zbarebox += -static -endif - -LDFLAGS_zbarebox += $(call ld-option, --no-dynamic-linker) - -zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o) -zbarebox-lds := $(obj)/zbarebox.lds - -$(zbarebox-lds): $(obj)/../lib/pbl.lds.S FORCE - $(call if_changed_dep,cpp_lds_S) - -quiet_cmd_zbarebox__ ?= LD $@ - cmd_zbarebox__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \ - -e pbl_start -T $(zbarebox-lds) \ - --start-group $(zbarebox-common) --end-group \ - $(filter-out $(zbarebox-lds) $(zbarebox-common) FORCE ,$^) - -$(obj)/zbarebox: $(zbarebox-lds) $(zbarebox-common) FORCE - $(call if_changed,zbarebox__) - -$(obj)/piggy.$(suffix_y): $(obj)/../../../barebox.bin FORCE - $(call if_changed,$(suffix_y)) - -$(obj)/$(piggy_o): $(obj)/piggy.$(suffix_y) FORCE diff --git a/arch/arm/pbl/piggy.comp_copy.S b/arch/arm/pbl/piggy.comp_copy.S deleted file mode 100644 index 2b5a812ded..0000000000 --- a/arch/arm/pbl/piggy.comp_copy.S +++ /dev/null @@ -1,6 +0,0 @@ - .section .piggydata,#alloc - .globl input_data -input_data: - .incbin "arch/arm/pbl/piggy.comp_copy" - .globl input_data_end -input_data_end: diff --git a/arch/arm/pbl/piggy.gzip.S b/arch/arm/pbl/piggy.gzip.S deleted file mode 100644 index 4a623c0c57..0000000000 --- a/arch/arm/pbl/piggy.gzip.S +++ /dev/null @@ -1,6 +0,0 @@ - .section .piggydata,#alloc - .globl input_data -input_data: - .incbin "arch/arm/pbl/piggy.gzip" - .globl input_data_end -input_data_end: diff --git a/arch/arm/pbl/piggy.lz4.S b/arch/arm/pbl/piggy.lz4.S deleted file mode 100644 index fa9b2469e1..0000000000 --- a/arch/arm/pbl/piggy.lz4.S +++ /dev/null @@ -1,6 +0,0 @@ - .section .piggydata,#alloc - .globl input_data -input_data: - .incbin "arch/arm/pbl/piggy.lz4" - .globl input_data_end -input_data_end: diff --git a/arch/arm/pbl/piggy.lzo.S b/arch/arm/pbl/piggy.lzo.S deleted file mode 100644 index e0484c7d5c..0000000000 --- a/arch/arm/pbl/piggy.lzo.S +++ /dev/null @@ -1,6 +0,0 @@ - .section .piggydata,#alloc - .globl input_data -input_data: - .incbin "arch/arm/pbl/piggy.lzo" - .globl input_data_end -input_data_end: diff --git a/arch/arm/pbl/piggy.xzkern.S b/arch/arm/pbl/piggy.xzkern.S deleted file mode 100644 index a7c0259590..0000000000 --- a/arch/arm/pbl/piggy.xzkern.S +++ /dev/null @@ -1,6 +0,0 @@ - .section .piggydata,#alloc - .globl input_data -input_data: - .incbin "arch/arm/pbl/piggy.xzkern" - .globl input_data_end -input_data_end: |