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-rw-r--r--arch/powerpc/boards/pcm030/Makefile2
-rw-r--r--arch/powerpc/boards/pcm030/barebox.lds.S127
-rw-r--r--arch/powerpc/boards/pcm030/config.h33
-rw-r--r--arch/powerpc/boards/pcm030/eeprom.c118
-rw-r--r--arch/powerpc/boards/pcm030/env/init/mtdparts-nor6
-rw-r--r--arch/powerpc/boards/pcm030/env/nv/linux.bootargs.console1
-rw-r--r--arch/powerpc/boards/pcm030/mt46v32m16-75.h42
-rw-r--r--arch/powerpc/boards/pcm030/pcm030.c211
8 files changed, 540 insertions, 0 deletions
diff --git a/arch/powerpc/boards/pcm030/Makefile b/arch/powerpc/boards/pcm030/Makefile
new file mode 100644
index 0000000000..4e5dc4f57b
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/Makefile
@@ -0,0 +1,2 @@
+obj-y += pcm030.o eeprom.o
+extra-y += barebox.lds
diff --git a/arch/powerpc/boards/pcm030/barebox.lds.S b/arch/powerpc/boards/pcm030/barebox.lds.S
new file mode 100644
index 0000000000..6fd8b43c6e
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/barebox.lds.S
@@ -0,0 +1,127 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm-generic/barebox.lds.h>
+
+OUTPUT_ARCH("powerpc")
+ENTRY(_start)
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ . = TEXT_BASE;
+
+ .text :
+ {
+ _text = .;
+ _stext = .;
+ arch/powerpc/mach-mpc5xxx/start.o (.text)
+ *(.text*)
+ *(.got1*)
+ . = ALIGN(16);
+ *(.rodata*)
+ *(.rodata1*)
+ *(.rodata.str1.4)
+ RO_DATA_SECTION
+ }
+
+ /* Read-only sections, merged into text segment: */
+/*
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+*/
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _etext = .;
+ PROVIDE (erotext = .);
+ _sdata = .;
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+
+ .data :
+ {
+ *(.data*)
+ *(.data1*)
+ *(.sdata*)
+ *(.sdata2*)
+ *(.dynamic*)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __init_size = __init_end - _start;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss*) *(.scommon*)
+ *(.dynbss*)
+ *(.bss*)
+ *(COMMON)
+ }
+ __bss_stop = .;
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/arch/powerpc/boards/pcm030/config.h b/arch/powerpc/boards/pcm030/config.h
new file mode 100644
index 0000000000..3fe1f286d9
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/config.h
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2003-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2006
+ * Eric Schumann, Phytec Messatechnik GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <mach/mpc5xxx.h>
+
+#define CFG_MPC5XXX_CLKIN 33333000 /* ... running at 33.333MHz */
+
+#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL HID0_ICE
+
+#endif /* __CONFIG_H */
diff --git a/arch/powerpc/boards/pcm030/eeprom.c b/arch/powerpc/boards/pcm030/eeprom.c
new file mode 100644
index 0000000000..aa00f361cd
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/eeprom.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright (C) 2015 Juergen Borleis <kernel@pengutronix.de>
+ *
+ * Based on code from:
+ * Copyright (C) 2013 Jan Luebbe <j.luebbe@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <common.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <fs.h>
+#include <globalvar.h>
+#include <xfuncs.h>
+#include <init.h>
+#include <net.h>
+
+#define PCM030_EEPROM_DEVICE "/dev/eeprom0"
+
+/*
+ * The first 2048 bytes contain the U-Boot environment shipped with the boards.
+ * After that an area begins where some board specific and partially unique data
+ * is stored. All of this data is plain test, string delimiter is the semicolon.
+ * the last string terminates with a '\0'.
+ * One example found in the 'product' area: PCM-030-02REI;017822;0050C2875974\0
+ * The first string seems to be the product type, the second string some kind
+ * of serial number and the last string the boards unique MAC.
+ */
+struct pcm030_eeprom {
+ char env[0x800]; /* u-boot environment */
+ char product[0x80]; /* <product>;<serno>;<mac>\0 */
+} __attribute__((packed));
+
+static void pcm030_read_factory_data(const struct pcm030_eeprom *buf)
+{
+ unsigned u, l;
+ char *board, *serial;
+ char *full_mac = "xx:xx:xx:xx:xx:xx";
+ u8 enetaddr[6];
+
+ u = 0;
+
+ for (l = 0; (l + u) < sizeof(buf->product); l++) {
+ if (buf->product[u + l] != ';')
+ continue;
+ board = xstrndup(&buf->product[u], l);
+ u += l + 1;
+ globalvar_add_simple("model.type", board);
+ free(board);
+ }
+
+ for (l = 0; (l + u) < sizeof(buf->product); l++) {
+ if (buf->product[u + l] != ';')
+ continue;
+ serial = xstrndup(&buf->product[u], l);
+ u += l + 1;
+ globalvar_add_simple("model.serial", serial);
+ free(serial);
+ }
+
+ /* for the MAC do a simple duck test */
+ if (buf->product[u] != ';' && buf->product[u + 12] == '\0') {
+ full_mac[0] = buf->product[u + 0];
+ full_mac[1] = buf->product[u + 1];
+ full_mac[3] = buf->product[u + 2];
+ full_mac[4] = buf->product[u + 3];
+ full_mac[6] = buf->product[u + 4];
+ full_mac[7] = buf->product[u + 5];
+ full_mac[9] = buf->product[u + 6];
+ full_mac[10] = buf->product[u + 7];
+ full_mac[12] = buf->product[u + 8];
+ full_mac[13] = buf->product[u + 9];
+ full_mac[15] = buf->product[u + 10];
+ full_mac[16] = buf->product[u + 11];
+ string_to_ethaddr(full_mac, enetaddr);
+ eth_register_ethaddr(0, enetaddr);
+ return;
+ }
+
+ printf("EEPROM contains no ethernet MAC\n");
+}
+
+static int pcm030_eeprom_read(void)
+{
+ int fd, ret;
+ struct pcm030_eeprom *buf;
+
+ fd = open(PCM030_EEPROM_DEVICE, O_RDONLY);
+ if (fd < 0) {
+ perror("failed to open " PCM030_EEPROM_DEVICE);
+ return fd;
+ }
+
+ buf = xmalloc(sizeof(struct pcm030_eeprom));
+
+ ret = pread(fd, buf, sizeof(struct pcm030_eeprom), 0);
+ if (ret < sizeof(struct pcm030_eeprom)) {
+ perror("failed to read " PCM030_EEPROM_DEVICE);
+ goto out;
+ }
+
+ pcm030_read_factory_data(buf);
+ ret = 0;
+out:
+ free(buf);
+ close(fd);
+
+ return ret;
+}
+late_initcall(pcm030_eeprom_read);
diff --git a/arch/powerpc/boards/pcm030/env/init/mtdparts-nor b/arch/powerpc/boards/pcm030/env/init/mtdparts-nor
new file mode 100644
index 0000000000..44c07ead21
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/env/init/mtdparts-nor
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+mtdparts="512k(nor0.bareboxlow),4M(nor0.kernel),512k(nor0.oftree),26M(nor0.root),512k(nor0.barebox),512k(nor0.bareboxenv)"
+kernelname="physmap-flash.0"
+
+mtdparts-add -d nor0 -k ${kernelname} -p ${mtdparts}
diff --git a/arch/powerpc/boards/pcm030/env/nv/linux.bootargs.console b/arch/powerpc/boards/pcm030/env/nv/linux.bootargs.console
new file mode 100644
index 0000000000..31ce0e71eb
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/env/nv/linux.bootargs.console
@@ -0,0 +1 @@
+console=ttyPSC0,115200
diff --git a/arch/powerpc/boards/pcm030/mt46v32m16-75.h b/arch/powerpc/boards/pcm030/mt46v32m16-75.h
new file mode 100644
index 0000000000..60ea09eebc
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/mt46v32m16-75.h
@@ -0,0 +1,42 @@
+/*
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * Eric Schumann, Phytec Messtechnik
+ * adapted for mt46v32m16-75 DDR-RAM
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#define SDRAM_DDR 1 /* is DDR */
+
+/* Settings for XLB = 132 MHz */
+#define SDRAM_MODE 0x018D0000
+#define SDRAM_EMODE 0x40090000
+#define SDRAM_CONTROL 0x715f0f00
+#define SDRAM_CONFIG1 0x73722930
+#define SDRAM_CONFIG2 0x47770000
+
+
+/* Settings for XLB = 99 MHz */
+/*
+#define SDRAM_MODE 0x008D0000
+#define SDRAM_EMODE 0x40090000
+#define SDRAM_CONTROL 0x714b0f00
+#define SDRAM_CONFIG1 0x63611730
+#define SDRAM_CONFIG2 0x47670000
+*/
+
+#define SDRAM_TAPDELAY 0x10000000 /* reserved Bit in MPC5200 B3-Step */
diff --git a/arch/powerpc/boards/pcm030/pcm030.c b/arch/powerpc/boards/pcm030/pcm030.c
new file mode 100644
index 0000000000..05c1ce9ca8
--- /dev/null
+++ b/arch/powerpc/boards/pcm030/pcm030.c
@@ -0,0 +1,211 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * (C) Copyright 2006
+ * Eric Schumann, Phytec Messtechnik GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <platform_data/eth-fec.h>
+#include <types.h>
+#include <partition.h>
+#include <memory.h>
+#include <linux/sizes.h>
+#include <linux/stat.h>
+#include <asm/io.h>
+#include <fs.h>
+#include <i2c/i2c.h>
+
+static struct fec_platform_data fec_info = {
+ .xcv_type = PHY_INTERFACE_MODE_MII,
+};
+
+static struct i2c_board_info pcm030_i2c_devices[] = {
+ { I2C_BOARD_INFO("pcf8563", 0x51), },
+ { I2C_BOARD_INFO("24c32", 0x52), },
+};
+
+struct i2c_platform_data pcm030_i2c_plat = {
+ .bitrate = 100000,
+};
+
+static int devices_init (void)
+{
+ struct stat s;
+ int ret;
+
+ /*
+ * Flash can be 16MB or 32MB, setup for the last 32MB no matter
+ * what we find later.
+ */
+ mpc5200_setup_cs(MPC5200_BOOTCS, 0xfe000000, SZ_32M, 0x0008fd00);
+ add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0xfe000000, 32 * 1024 * 1024, 0);
+
+ add_generic_device("fec_mpc5xxx", DEVICE_ID_DYNAMIC, NULL, MPC5XXX_FEC, 0x200,
+ IORESOURCE_MEM, &fec_info);
+ i2c_register_board_info(0, pcm030_i2c_devices, ARRAY_SIZE(pcm030_i2c_devices));
+ add_generic_device("i2c-fsl", DEVICE_ID_DYNAMIC, NULL, MPC5XXX_I2C2, 0x100,
+ IORESOURCE_MEM, &pcm030_i2c_plat);
+
+ ret = stat("/dev/nor0", &s);
+ if (ret)
+ return 0;
+
+ devfs_add_partition("nor0", s.st_size - SZ_1M, SZ_512K, DEVFS_PARTITION_FIXED, "self0");
+ devfs_add_partition("nor0", s.st_size - SZ_512K, SZ_512K, DEVFS_PARTITION_FIXED, "env0");
+
+ return 0;
+}
+
+device_initcall(devices_init);
+
+static int console_init(void)
+{
+ barebox_set_model("Phytec phyCORE MPC5200 tiny");
+ barebox_set_hostname("mpc5200");
+
+ add_generic_device("mpc5xxx_serial", DEVICE_ID_DYNAMIC, NULL, MPC5XXX_PSC3, 0x200,
+ IORESOURCE_MEM, NULL);
+ add_generic_device("mpc5xxx_serial", DEVICE_ID_DYNAMIC, NULL, MPC5XXX_PSC6, 0x200,
+ IORESOURCE_MEM, NULL);
+ return 0;
+}
+
+console_initcall(console_init);
+
+static int mem_init(void)
+{
+ unsigned long sdramsize;
+
+ sdramsize = mpc5200_get_sdram_size(0) + mpc5200_get_sdram_size(1);
+
+ barebox_add_memory_bank("ram0", 0x0, sdramsize);
+
+ return 0;
+}
+mem_initcall(mem_init);
+
+#include "mt46v32m16-75.h"
+
+static void sdram_start (int hi_addr)
+{
+ long hi_addr_bit = hi_addr ? 0x01000000 : 0;
+
+ /* unlock mode register */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+ /* precharge all banks */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+#if SDRAM_DDR
+ /* set mode register: extended mode */
+ *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
+ __asm__ volatile ("sync");
+
+ /* set mode register: reset DLL */
+ *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
+ __asm__ volatile ("sync");
+#endif
+
+ /* precharge all banks */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+ /* auto refresh */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
+ __asm__ volatile ("sync");
+
+ /* set mode register */
+ *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
+ __asm__ volatile ("sync");
+
+ /* normal operation */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
+ __asm__ volatile ("sync");
+}
+
+void initdram (int board_type)
+{
+ ulong dramsize = 0;
+
+ ulong test1, test2;
+
+ /* Setup pin multiplexing */
+
+ /* PSC6=UART, PSC3=UART ; Ether=100MBit with MD */
+ *(vu_long *)MPC5XXX_GPS_PORT_CONFIG = 0x00559c10;
+ *(vu_long *)MPC5XXX_CS_BURST = 0x00000000;
+ *(vu_long *)MPC5XXX_CS_DEADCYCLE = 0x33333333;
+
+ /*
+ * Make USB work due to the special base crystal frequency:
+ * 33,3330MHz * 16 = 533,328MHz main clock, but should be 528 MHz Clock
+ */
+ out_be32((void *)MPC5XXX_CDM_48_FDC, 0x00015555);
+
+ mpc5200_setup_bus_clocks(1, 4);
+
+ if (get_pc() > SZ_128M) {
+ /* setup SDRAM chip selects */
+ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */
+ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */
+ __asm__ volatile ("sync");
+
+ /* setup config registers */
+ *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
+ *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
+ __asm__ volatile ("sync");
+
+#if SDRAM_DDR && SDRAM_TAPDELAY
+ /* set tap delay */
+ *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
+ __asm__ volatile ("sync");
+#endif
+
+ /* find RAM size using SDRAM CS0 only */
+ sdram_start(0);
+ test1 = get_ram_size((ulong *)0, 0x10000000);
+ sdram_start(1);
+ test2 = get_ram_size((ulong *)0, 0x10000000);
+ if (test1 > test2) {
+ sdram_start(0);
+ dramsize = test1;
+ } else {
+ dramsize = test2;
+ }
+
+ /* memory smaller than 1MB is impossible */
+ if (dramsize < (1 << 20)) {
+ dramsize = 0;
+ }
+
+ /* set SDRAM CS0 size according to the amount of RAM found */
+ if (dramsize > 0) {
+ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
+ } else {
+ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
+ }
+ }
+}