1 files changed, 129 insertions, 0 deletions
diff --git a/arch/riscv/boards/riscvemu/overlay-of-sram.dts b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
new file mode 100644
index 0000000000..506d45bde9
--- /dev/null
+++ b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
@@ -0,0 +1,129 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target-path = "/soc";
+		__overlay__ {
+			#address-cells = <2>;
+			#size-cells = <2>;
+			sram@0 {
+				compatible = "mtd-ram";
+				reg = <0 0x1000 0 0x10000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partitions {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					partition@0 {
+						label = "bootrom";
+						reg = <0x0 0x40>;
+					};
+
+					partition@40 {
+						label = "fdt";
+						reg = <0x40 0x1fc0>;
+					};
+
+					environment_sram: partition@3000 {
+						label = "barebox-environment";
+						reg = <0x3000 0xb000>;
+					};
+
+					backend_state_sram: partition@e000 {
+						label = "barebox-state";
+						reg = <0xe000 0x1000>;
+					};
+				};
+			};
+		};
+	};
+
+	fragment@2 {
+		target-path = "/chosen";
+		__overlay__ {
+			environment {
+				compatible = "barebox,environment";
+				device-path = "/soc/sram@0/partitions/partition@3000";
+			};
+		};
+	};
+
+	fragment@3 {
+		target-path = "/";
+		__overlay__ {
+			aliases {
+				state = "/state";
+			};
+
+			state {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "barebox,state";
+				magic = <0x290cf8c6>;
+				backend-type = "raw";
+				backend = <&backend_state_sram>;
+				backend-stridesize = <64>;
+
+				bootstate {
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					system0 {
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						remaining_attempts@0 {
+							reg = <0x0 0x4>;
+							type = "uint32";
+							default = <3>;
+						};
+
+						priority@4 {
+							reg = <0x4 0x4>;
+							type = "uint32";
+							default = <20>;
+						};
+					};
+
+					system1 {
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						remaining_attempts@8 {
+							reg = <0x8 0x4>;
+							type = "uint32";
+							default = <3>;
+						};
+
+						priority@c {
+							reg = <0xc 0x4>;
+							type = "uint32";
+							default = <21>;
+						};
+					};
+
+					last_chosen@10 {
+						reg = <0x10 0x4>;
+						type = "uint32";
+					};
+				};
+			};
+		};
+	};
+
+	fragment@4 {
+		target-path = "/htif";
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		__overlay__ {
+			reg = <0 0x40008000 0 0x8>;
+		};
+	};
+};