diff options
Diffstat (limited to 'arch/riscv/include/asm')
| -rw-r--r-- | arch/riscv/include/asm/barebox.h | 1 | ||||
| -rw-r--r-- | arch/riscv/include/asm/bitops.h | 32 | ||||
| -rw-r--r-- | arch/riscv/include/asm/bitsperlong.h | 10 | ||||
| -rw-r--r-- | arch/riscv/include/asm/byteorder.h | 6 | ||||
| -rw-r--r-- | arch/riscv/include/asm/common.h | 6 | ||||
| -rw-r--r-- | arch/riscv/include/asm/debug_ll_ns16550.h | 182 | ||||
| -rw-r--r-- | arch/riscv/include/asm/elf.h | 11 | ||||
| -rw-r--r-- | arch/riscv/include/asm/io.h | 8 | ||||
| -rw-r--r-- | arch/riscv/include/asm/mmu.h | 6 | ||||
| -rw-r--r-- | arch/riscv/include/asm/posix_types.h | 1 | ||||
| -rw-r--r-- | arch/riscv/include/asm/riscv_nmon.h | 234 | ||||
| -rw-r--r-- | arch/riscv/include/asm/sections.h | 1 | ||||
| -rw-r--r-- | arch/riscv/include/asm/string.h | 1 | ||||
| -rw-r--r-- | arch/riscv/include/asm/swab.h | 6 | ||||
| -rw-r--r-- | arch/riscv/include/asm/types.h | 60 | ||||
| -rw-r--r-- | arch/riscv/include/asm/unaligned.h | 19 |
16 files changed, 584 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/barebox.h b/arch/riscv/include/asm/barebox.h new file mode 100644 index 0000000000..2997587d82 --- /dev/null +++ b/arch/riscv/include/asm/barebox.h @@ -0,0 +1 @@ +/* dummy */ diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h new file mode 100644 index 0000000000..b4a2f5f0b7 --- /dev/null +++ b/arch/riscv/include/asm/bitops.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * This file is part of barebox. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _ASM_BITOPS_H_ +#define _ASM_BITOPS_H_ + +#include <asm-generic/bitops/__ffs.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/ffs.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/ffz.h> +#include <asm-generic/bitops/hweight.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/find.h> +#include <asm-generic/bitops/ops.h> + +#define set_bit(x, y) __set_bit(x, y) +#define clear_bit(x, y) __clear_bit(x, y) +#define change_bit(x, y) __change_bit(x, y) +#define test_and_set_bit(x, y) __test_and_set_bit(x, y) +#define test_and_clear_bit(x, y) __test_and_clear_bit(x, y) +#define test_and_change_bit(x, y) __test_and_change_bit(x, y) + +#endif /* _ASM_BITOPS_H_ */ diff --git a/arch/riscv/include/asm/bitsperlong.h b/arch/riscv/include/asm/bitsperlong.h new file mode 100644 index 0000000000..4641e7e485 --- /dev/null +++ b/arch/riscv/include/asm/bitsperlong.h @@ -0,0 +1,10 @@ +#ifndef __ASM_BITSPERLONG_H +#define __ASM_BITSPERLONG_H + +#ifdef __riscv64 +#define BITS_PER_LONG 64 +#else +#define BITS_PER_LONG 32 +#endif + +#endif /* __ASM_BITSPERLONG_H */ diff --git a/arch/riscv/include/asm/byteorder.h b/arch/riscv/include/asm/byteorder.h new file mode 100644 index 0000000000..0be826927b --- /dev/null +++ b/arch/riscv/include/asm/byteorder.h @@ -0,0 +1,6 @@ +#ifndef _ASM_RISCV_BYTEORDER_H +#define _ASM_RISCV_BYTEORDER_H + +#include <linux/byteorder/little_endian.h> + +#endif /* _ASM_RISCV_BYTEORDER_H */ diff --git a/arch/riscv/include/asm/common.h b/arch/riscv/include/asm/common.h new file mode 100644 index 0000000000..bc8a17e30b --- /dev/null +++ b/arch/riscv/include/asm/common.h @@ -0,0 +1,6 @@ +#ifndef ASM_RISCV_COMMON_H +#define ASM_RISCV_COMMON_H + +/* nothing special yet */ + +#endif /* ASM_RISCV_COMMON_H */ diff --git a/arch/riscv/include/asm/debug_ll_ns16550.h b/arch/riscv/include/asm/debug_ll_ns16550.h new file mode 100644 index 0000000000..e891cbda25 --- /dev/null +++ b/arch/riscv/include/asm/debug_ll_ns16550.h @@ -0,0 +1,182 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2016, 2017 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +/** @file + * This file contains declaration for early output support + */ +#ifndef __INCLUDE_RISCV_ASM_DEBUG_LL_NS16550_H__ +#define __INCLUDE_RISCV_ASM_DEBUG_LL_NS16550_H__ + +#include <linux/kconfig.h> + +#ifdef CONFIG_DEBUG_LL + +#ifndef DEBUG_LL_UART_ADDR +#error DEBUG_LL_UART_ADDR is undefined! +#endif + +#ifndef DEBUG_LL_UART_SHIFT +#error DEBUG_LL_UART_SHIFT is undefined! +#endif + +#ifndef DEBUG_LL_UART_DIVISOR +#error DEBUG_LL_UART_DIVISOR is undefined! +#endif + +#endif /* CONFIG_DEBUG_LL */ + +#define UART_THR (0x0 << DEBUG_LL_UART_SHIFT) +#define UART_RBR (0x0 << DEBUG_LL_UART_SHIFT) +#define UART_DLL (0x0 << DEBUG_LL_UART_SHIFT) +#define UART_DLM (0x1 << DEBUG_LL_UART_SHIFT) +#define UART_LCR (0x3 << DEBUG_LL_UART_SHIFT) +#define UART_LSR (0x5 << DEBUG_LL_UART_SHIFT) + +#define UART_LCR_W 0x07 /* Set UART to 8,N,2 & DLAB = 0 */ +#define UART_LCR_DLAB 0x87 /* Set UART to 8,N,2 & DLAB = 1 */ + +#define UART_LSR_DR 0x01 /* UART received data present */ +#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ + +#if defined(DEBUG_LL_UART_IOSIZE32) +#define UART_REG_L lw +#define UART_REG_S sw +#elif defined(DEBUG_LL_UART_IOSIZE8) +#define UART_REG_L lbu +#define UART_REG_S sb +#else +#error "Please define DEBUG_LL_UART_IOSIZE{8,32}" +#endif + +#ifndef __ASSEMBLY__ +/* + * C macros + */ + +#include <asm/io.h> + +static inline void PUTC_LL(char ch) +{ +#ifdef CONFIG_DEBUG_LL + while (!(__raw_readl((u8 *)DEBUG_LL_UART_ADDR + UART_LSR) & UART_LSR_THRE)) + ; + __raw_writel(ch, (u8 *)DEBUG_LL_UART_ADDR + UART_THR); +#endif /* CONFIG_DEBUG_LL */ +} + +static inline void debug_ll_ns16550_init(void) +{ +#ifdef CONFIG_DEBUG_LL + __raw_writel(UART_LCR_DLAB, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR); + __raw_writel(DEBUG_LL_UART_DIVISOR & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLL); + __raw_writel((DEBUG_LL_UART_DIVISOR >> 8) & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLM); + __raw_writel(UART_LCR_W, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR); +#endif /* CONFIG_DEBUG_LL */ +} +#else /* __ASSEMBLY__ */ +/* + * Macros for use in assembly language code + */ + +.macro debug_ll_ns16550_init +#ifdef CONFIG_DEBUG_LL + li t0, DEBUG_LL_UART_ADDR + + li t1, UART_LCR_DLAB /* DLAB on */ + UART_REG_S t1, UART_LCR(t0) /* Write it out */ + + li t1, DEBUG_LL_UART_DIVISOR + UART_REG_S t1, UART_DLL(t0) /* write low order byte */ + srl t1, t1, 8 + UART_REG_S t1, UART_DLM(t0) /* write high order byte */ + + li t1, UART_LCR_W /* DLAB off */ + UART_REG_S t1, UART_LCR(t0) /* Write it out */ +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * output a character in a0 + */ +.macro debug_ll_outc_a0 +#ifdef CONFIG_DEBUG_LL + + li t0, DEBUG_LL_UART_ADDR + +201: + UART_REG_L t1, UART_LSR(t0) /* get line status */ + andi t1, t1, UART_LSR_THRE /* check for transmitter empty */ + beqz t1, 201b /* try again */ + + UART_REG_S a0, UART_THR(t0) /* write the character */ + +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * output a character + */ +.macro debug_ll_outc chr +#ifdef CONFIG_DEBUG_LL + li a0, \chr + debug_ll_outc_a0 +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * output CR + NL + */ +.macro debug_ll_ns16550_outnl +#ifdef CONFIG_DEBUG_LL + debug_ll_outc '\r' + debug_ll_outc '\n' +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * check character in input buffer + * return value: + * v0 = 0 no character in input buffer + * v0 != 0 character in input buffer + */ +.macro debug_ll_tstc +#ifdef CONFIG_DEBUG_LL + li t0, DEBUG_LL_UART_ADDR + + /* get line status and check for data present */ + UART_REG_L s0, UART_LSR(t0) + andi s0, s0, UART_LSR_DR + +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * get character to v0 + */ +.macro debug_ll_getc +#ifdef CONFIG_DEBUG_LL + +204: + debug_ll_tstc + + /* try again */ + beqz s0, 204b + + /* read a character */ + UART_REG_L s0, UART_RBR(t0) + +#endif /* CONFIG_DEBUG_LL */ +.endm +#endif /* __ASSEMBLY__ */ + +#endif /* __INCLUDE_RISCV_ASM_DEBUG_LL_NS16550_H__ */ diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h new file mode 100644 index 0000000000..7134fa0582 --- /dev/null +++ b/arch/riscv/include/asm/elf.h @@ -0,0 +1,11 @@ +#ifndef __ASM_RISCV_ELF_H__ +#define __ASM_RISCV_ELF_H__ + +#if __SIZEOF_POINTER__ == 8 +#define ELF_CLASS ELFCLASS64 +#define CONFIG_PHYS_ADDR_T_64BIT +#else +#define ELF_CLASS ELFCLASS32 +#endif + +#endif /* __ASM_RISCV_ELF_H__ */ diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h new file mode 100644 index 0000000000..3cdea7fcac --- /dev/null +++ b/arch/riscv/include/asm/io.h @@ -0,0 +1,8 @@ +#ifndef __ASM_RISCV_IO_H +#define __ASM_RISCV_IO_H + +#define IO_SPACE_LIMIT 0 + +#include <asm-generic/io.h> + +#endif /* __ASM_RISCV_IO_H */ diff --git a/arch/riscv/include/asm/mmu.h b/arch/riscv/include/asm/mmu.h new file mode 100644 index 0000000000..95af871420 --- /dev/null +++ b/arch/riscv/include/asm/mmu.h @@ -0,0 +1,6 @@ +#ifndef __ASM_MMU_H +#define __ASM_MMU_H + +#define MAP_ARCH_DEFAULT MAP_UNCACHED + +#endif /* __ASM_MMU_H */ diff --git a/arch/riscv/include/asm/posix_types.h b/arch/riscv/include/asm/posix_types.h new file mode 100644 index 0000000000..22cae6230c --- /dev/null +++ b/arch/riscv/include/asm/posix_types.h @@ -0,0 +1 @@ +#include <asm-generic/posix_types.h> diff --git a/arch/riscv/include/asm/riscv_nmon.h b/arch/riscv/include/asm/riscv_nmon.h new file mode 100644 index 0000000000..caf213cdd8 --- /dev/null +++ b/arch/riscv/include/asm/riscv_nmon.h @@ -0,0 +1,234 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * nano-monitor for RISC-V CPU + * + * Copyright (C) 2016, 2017 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __ASM_RISCV_NMON_H +#define __ASM_RISCV_NMON_H + +#define CODE_ESC 0x1b + +.macro nmon_outs msg + + la a1, \msg + + jal _nmon_outs + +.endm + +/* + * output a 32-bit value in hex + */ +.macro debug_ll_outhexw +#ifdef CONFIG_DEBUG_LL + move t6, a0 + li t5, 32 + +202: + addi t5, t5, -4 + srl a0, t6, t5 + + /* output one hex digit */ + andi a0, a0, 15 + li t4, 10 + blt a0, t4, 203f + + addi a0, a0, ('a' - '9' - 1) + +203: + addi a0, a0, '0' + + debug_ll_outc_a0 + + li t4, 1 + bge t5, t4, 202b + +#endif /* CONFIG_DEBUG_LL */ +.endm + +.macro riscv_nmon + +#ifdef CONFIG_NMON + +nmon_main_help: +#ifdef CONFIG_NMON_HELP + nmon_outs msg_nmon_help +#endif /* CONFIG_NMON_HELP */ + +nmon_main: + nmon_outs msg_prompt + + debug_ll_getc + + li a0, 'q' + bne s0, a0, 3f + + jal _nmon_outc_a0 + + j nmon_exit + +3: + li a0, 'd' + beq s0, a0, nmon_cmd_d + + li a0, 'w' + beq s0, a0, nmon_cmd_w + + li a0, 'g' + beq s0, a0, nmon_cmd_g + + j nmon_main_help + +nmon_cmd_d: + jal _nmon_outc_a0 + + li a0, ' ' + jal _nmon_outc_a0 + + jal _nmon_gethexw + + nmon_outs msg_nl + + lw a0, (s0) + debug_ll_outhexw + + j nmon_main + +nmon_cmd_w: + jal _nmon_outc_a0 + + li a0, ' ' + jal _nmon_outc_a0 + + jal _nmon_gethexw + move s2, s0 + + li a0, ' ' + jal _nmon_outc_a0 + jal _nmon_gethexw + + sw s0, 0(s2) + j nmon_main + +nmon_cmd_g: + jal _nmon_outc_a0 + + li a0, ' ' + jal _nmon_outc_a0 + + jal _nmon_gethexw + move s2, s0 + + nmon_outs msg_nl + + jalr s2 + j nmon_main + +_nmon_outc_a0: + debug_ll_outc_a0 + jr ra + +_nmon_outs: + + lb a0, 0(a1) + addi a1, a1, 1 + beqz a0, _nmon_jr_ra_exit + + debug_ll_outc_a0 + + j _nmon_outs + +_nmon_gethexw: + + li t3, 8 + li t2, 0 + +_get_hex_digit: + debug_ll_getc + + li s1, CODE_ESC + beq s0, s1, nmon_main + + li s1, '0' + bge s0, s1, 0f + j _get_hex_digit + +0: + li s1, '9' + ble s0, s1, 9f + + li s1, 'f' + ble s0, s1, 1f + j _get_hex_digit + +1: + li s1, 'a' + bge s0, s1, 8f + + j _get_hex_digit + +8: /* s0 \in {'a', 'b' ... 'f'} */ + sub a3, s0, s1 + addi a3, a3, 0xa + j 0f + +9: /* s0 \in {'0', '1' ... '9'} */ + li a3, '0' + sub a3, s0, a3 + +0: move a0, s0 + debug_ll_outc_a0 + + sll t2, t2, 4 + or t2, t2, a3 + li t0, 1 + sub t3, t3, t0 + + beqz t3, 0f + + j _get_hex_digit + +0: + move s0, t2 + +_nmon_jr_ra_exit: + jr ra + +msg_prompt: + .asciz "\r\nnmon> " + +msg_nl: + .asciz "\r\n" + +msg_bsp: + .asciz "\b \b" + +#ifdef CONFIG_NMON_HELP +msg_nmon_help: + .ascii "\r\n\r\nnmon commands:\r\n" + .ascii " q - quit\r\n" + .ascii " d <addr> - read 32-bit word from <addr>\r\n" + .ascii " w <addr> <val> - write 32-bit word to <addr>\r\n" + .ascii " g <addr> - jump to <addr>\r\n" + .asciz " use <ESC> key to interrupt current command\r\n" +#endif /* CONFIG_NMON_HELP */ + + .align 2 +nmon_exit: + nmon_outs msg_nl + +#endif /* CONFIG_NMON */ + +.endm + +#endif /* __ASM_RISCV_NMON_H */ diff --git a/arch/riscv/include/asm/sections.h b/arch/riscv/include/asm/sections.h new file mode 100644 index 0000000000..2b8c516038 --- /dev/null +++ b/arch/riscv/include/asm/sections.h @@ -0,0 +1 @@ +#include <asm-generic/sections.h> diff --git a/arch/riscv/include/asm/string.h b/arch/riscv/include/asm/string.h new file mode 100644 index 0000000000..2997587d82 --- /dev/null +++ b/arch/riscv/include/asm/string.h @@ -0,0 +1 @@ +/* dummy */ diff --git a/arch/riscv/include/asm/swab.h b/arch/riscv/include/asm/swab.h new file mode 100644 index 0000000000..60a90120b6 --- /dev/null +++ b/arch/riscv/include/asm/swab.h @@ -0,0 +1,6 @@ +#ifndef _ASM_SWAB_H +#define _ASM_SWAB_H + +/* nothing. use generic functions */ + +#endif /* _ASM_SWAB_H */ diff --git a/arch/riscv/include/asm/types.h b/arch/riscv/include/asm/types.h new file mode 100644 index 0000000000..ba386ab4c5 --- /dev/null +++ b/arch/riscv/include/asm/types.h @@ -0,0 +1,60 @@ +#ifndef __ASM_RISCV_TYPES_H +#define __ASM_RISCV_TYPES_H + +#ifdef __riscv64 +/* + * This is used in dlmalloc. On RISCV64 we need it to be 64 bit + */ +#define INTERNAL_SIZE_T unsigned long + +/* + * This is a Kconfig variable in the Kernel, but we want to detect + * this during compile time, so we set it here. + */ +#define CONFIG_PHYS_ADDR_T_64BIT + +#endif + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) && !defined(__STRICT_ANSI__) +typedef __signed__ long long __s64; +typedef unsigned long long __u64; +#endif + +/* + * These aren't exported outside the kernel to avoid name space clashes + */ +#ifdef __KERNEL__ + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + +#include <asm/bitsperlong.h> + +#endif /* __KERNEL__ */ + +#endif /* __ASM_RISCV_TYPES_H */ diff --git a/arch/riscv/include/asm/unaligned.h b/arch/riscv/include/asm/unaligned.h new file mode 100644 index 0000000000..aaebc06411 --- /dev/null +++ b/arch/riscv/include/asm/unaligned.h @@ -0,0 +1,19 @@ +#ifndef _ASM_RISCV_UNALIGNED_H +#define _ASM_RISCV_UNALIGNED_H + +/* + * FIXME: this file is copy-n-pasted from sandbox's unaligned.h + */ + +#include <linux/unaligned/access_ok.h> +#include <linux/unaligned/generic.h> + +#if __BYTE_ORDER == __LITTLE_ENDIAN +#define get_unaligned __get_unaligned_le +#define put_unaligned __put_unaligned_le +#else +#define get_unaligned __get_unaligned_be +#define put_unaligned __put_unaligned_be +#endif + +#endif /* _ASM_RISCV_UNALIGNED_H */ |