diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boards/friendlyarm-tiny210/lowlevel.c | 3 | ||||
-rw-r--r-- | arch/arm/boards/imx233-olinuxino/lowlevel.c | 2 | ||||
-rw-r--r-- | arch/arm/boards/kindle3/kindle3.c | 2 | ||||
-rw-r--r-- | arch/arm/boards/phytec-phycard-imx27/lowlevel.c | 2 | ||||
-rw-r--r-- | arch/arm/boards/phytec-phycard-omap3/lowlevel.c | 4 | ||||
-rw-r--r-- | arch/arm/crypto/sha1_glue.c | 4 | ||||
-rw-r--r-- | arch/arm/crypto/sha256_glue.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-highbank/reset.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/external-nand-boot.c | 28 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/bbu.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-mxs/mem-init.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-netx/clocksource.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-netx/generic.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/clocksource.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-samsung/clocks-s3c64xx.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-samsung/clocks-s5pcxx.c | 4 |
16 files changed, 32 insertions, 47 deletions
diff --git a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c index 4b9ba87d70..290cf57225 100644 --- a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c +++ b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c @@ -53,7 +53,8 @@ static inline void __bare_init debug_led(int led, bool state) #define ADDR_V210_SDMMC_BASE 0xD0037488 #define ADDR_CopySDMMCtoMem 0xD0037F98 -int __bare_init s5p_irom_load_mmc(void *dest, uint32_t start_block, uint16_t block_count) +static int __bare_init s5p_irom_load_mmc(void *dest, uint32_t start_block, + uint16_t block_count) { typedef uint32_t (*func_t) (int32_t, uint32_t, uint16_t, uint32_t*, int8_t); uint32_t chbase = readl(ADDR_V210_SDMMC_BASE); diff --git a/arch/arm/boards/imx233-olinuxino/lowlevel.c b/arch/arm/boards/imx233-olinuxino/lowlevel.c index 5f36c17e52..07a2a0e293 100644 --- a/arch/arm/boards/imx233-olinuxino/lowlevel.c +++ b/arch/arm/boards/imx233-olinuxino/lowlevel.c @@ -115,7 +115,7 @@ static const uint32_t pad_setup[] = { /* Fine-tune the DRAM configuration. */ -void imx23_olinuxino_adjust_memory_params(uint32_t *dram_vals) +static void imx23_olinuxino_adjust_memory_params(uint32_t *dram_vals) { /* Enable Auto Precharge. */ dram_vals[3] |= 1 << 8; diff --git a/arch/arm/boards/kindle3/kindle3.c b/arch/arm/boards/kindle3/kindle3.c index e06b3d70ce..5f1b06aeb2 100644 --- a/arch/arm/boards/kindle3/kindle3.c +++ b/arch/arm/boards/kindle3/kindle3.c @@ -86,7 +86,7 @@ BAREBOX_MAGICVAR_NAMED(global_atags_revision16, global.board.revision16, /* The Kindle3 Kernel expects two custom ATAGs, ATAG_REVISION16 describing * the board and ATAG_SERIAL16 to identify the individual device. */ -struct tag *kindle3_append_atags(struct tag *params) +static struct tag *kindle3_append_atags(struct tag *params) { params = setup_16char_tag(params, ATAG_SERIAL16, get_env_16char_tag("global.board.serial16")); diff --git a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c index 1e96c0893f..09994e4492 100644 --- a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c @@ -77,7 +77,7 @@ static void sdram_init(int sdram) MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0); } -void __bare_init __naked phytec_phycard_imx27_common_init(void *fdt, int sdram) +static void __bare_init __naked phytec_phycard_imx27_common_init(void *fdt, int sdram) { unsigned long r; diff --git a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c index 27b56b1e0c..d48c02625c 100644 --- a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c @@ -48,7 +48,7 @@ struct sdrc_config { /********************************************************************* * init_sdram_ddr() - Init DDR controller. *********************************************************************/ -void init_sdram_ddr(void) +static void init_sdram_ddr(void) { /* reset sdrc controller */ writel(SOFTRESET, OMAP3_SDRC_REG(SYSCONFIG)); @@ -67,7 +67,7 @@ void init_sdram_ddr(void) /********************************************************************* * config_sdram_ddr() - Init DDR on dev board. *********************************************************************/ -void config_sdram_ddr(u8 cs, u8 cfg) +static void config_sdram_ddr(u8 cs, u8 cfg) { writel(sdrc_config[cfg].mcfg, OMAP3_SDRC_REG(MCFG_0) + (0x30 * cs)); diff --git a/arch/arm/crypto/sha1_glue.c b/arch/arm/crypto/sha1_glue.c index cc032f6af2..6a0e482aaa 100644 --- a/arch/arm/crypto/sha1_glue.c +++ b/arch/arm/crypto/sha1_glue.c @@ -63,7 +63,7 @@ static int __sha1_update(struct sha1_state *sctx, const u8 *data, } -int sha1_update_arm(struct digest *desc, const void *data, +static int sha1_update_arm(struct digest *desc, const void *data, unsigned long len) { struct sha1_state *sctx = digest_ctx(desc); @@ -79,8 +79,6 @@ int sha1_update_arm(struct digest *desc, const void *data, res = __sha1_update(sctx, data, len, partial); return res; } -EXPORT_SYMBOL_GPL(sha1_update_arm); - /* Add padding and return the message digest. */ static int sha1_final(struct digest *desc, u8 *out) diff --git a/arch/arm/crypto/sha256_glue.c b/arch/arm/crypto/sha256_glue.c index d8a72a2cb9..3876f9adc9 100644 --- a/arch/arm/crypto/sha256_glue.c +++ b/arch/arm/crypto/sha256_glue.c @@ -26,7 +26,7 @@ void sha256_block_data_order(u32 *digest, const void *data, unsigned int num_blks); -int sha256_init(struct digest *desc) +static int sha256_init(struct digest *desc) { struct sha256_state *sctx = digest_ctx(desc); @@ -43,7 +43,7 @@ int sha256_init(struct digest *desc) return 0; } -int sha224_init(struct digest *desc) +static int sha224_init(struct digest *desc) { struct sha256_state *sctx = digest_ctx(desc); @@ -60,7 +60,7 @@ int sha224_init(struct digest *desc) return 0; } -int __sha256_update(struct digest *desc, const u8 *data, unsigned int len, +static int __sha256_update(struct digest *desc, const u8 *data, unsigned int len, unsigned int partial) { struct sha256_state *sctx = digest_ctx(desc); @@ -86,7 +86,7 @@ int __sha256_update(struct digest *desc, const u8 *data, unsigned int len, return 0; } -int sha256_update(struct digest *desc, const void *data, +static int sha256_update(struct digest *desc, const void *data, unsigned long len) { struct sha256_state *sctx = digest_ctx(desc); diff --git a/arch/arm/mach-highbank/reset.c b/arch/arm/mach-highbank/reset.c index b60f34452e..d73a0a76a5 100644 --- a/arch/arm/mach-highbank/reset.c +++ b/arch/arm/mach-highbank/reset.c @@ -21,7 +21,7 @@ static void __noreturn highbank_restart_soc(struct restart_handler *rst) hang(); } -void __noreturn highbank_poweroff(struct poweroff_handler *handler) +static void __noreturn highbank_poweroff(struct poweroff_handler *handler) { shutdown_barebox(); diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c index 745a129b23..1a98878868 100644 --- a/arch/arm/mach-imx/external-nand-boot.c +++ b/arch/arm/mach-imx/external-nand-boot.c @@ -134,8 +134,8 @@ static noinline void __bare_init imx_nandboot_get_page(void *regs, int v1, imx_nandboot_send_page(regs, v1, NFC_OUTPUT, pagesize_2k); } -void __bare_init imx_nand_load_image(void *dest, int v1, int size, void __iomem *base, - int pagesize_2k) +static void __bare_init imx_nand_load_image(void *dest, int v1, int size, + void __iomem *base, int pagesize_2k) { u32 tmp, page, block, blocksize, pagesize, badblocks; int bbt = 0; @@ -239,44 +239,30 @@ void __bare_init imx_nand_load_image(void *dest, int v1, int size, void __iomem } } -void BARE_INIT_FUNCTION(imx21_nand_load_image)(void *dest, int size, - void __iomem *base, int pagesize_2k) -{ - imx_nand_load_image(dest, 1, size, base, pagesize_2k); -} - -void BARE_INIT_FUNCTION(imx25_nand_load_image)(void *dest, int size, +static void BARE_INIT_FUNCTION(imx25_nand_load_image)(void *dest, int size, void __iomem *base, int pagesize_2k) { imx_nand_load_image(dest, 0, size, base, pagesize_2k); } -void BARE_INIT_FUNCTION(imx27_nand_load_image)(void *dest, int size, +static void BARE_INIT_FUNCTION(imx27_nand_load_image)(void *dest, int size, void __iomem *base, int pagesize_2k) { imx_nand_load_image(dest, 1, size, base, pagesize_2k); } -void BARE_INIT_FUNCTION(imx31_nand_load_image)(void *dest, int size, +static void BARE_INIT_FUNCTION(imx31_nand_load_image)(void *dest, int size, void __iomem *base, int pagesize_2k) { imx_nand_load_image(dest, 1, size, base, pagesize_2k); } -void BARE_INIT_FUNCTION(imx35_nand_load_image)(void *dest, int size, +static void BARE_INIT_FUNCTION(imx35_nand_load_image)(void *dest, int size, void __iomem *base, int pagesize_2k) { imx_nand_load_image(dest, 0, size, base, pagesize_2k); } -static inline int imx21_pagesize_2k(void) -{ - if (readl(MX21_SYSCTRL_BASE_ADDR + 0x14) & (1 << 5)) - return 1; - else - return 0; -} - static inline int imx25_pagesize_2k(void) { if (readl(MX25_CCM_BASE_ADDR + MX25_CCM_RCSR) & (1 << 8)) @@ -318,7 +304,7 @@ static inline int imx35_pagesize_2k(void) #define DEFINE_EXTERNAL_NAND_ENTRY(soc) \ \ -void __noreturn BARE_INIT_FUNCTION(imx##soc##_boot_nand_external_cont) \ +static void __noreturn BARE_INIT_FUNCTION(imx##soc##_boot_nand_external_cont) \ (void *boarddata) \ { \ unsigned long nfc_base = MX##soc##_NFC_BASE_ADDR; \ diff --git a/arch/arm/mach-mvebu/include/mach/bbu.h b/arch/arm/mach-mvebu/include/mach/bbu.h index a06db2b144..f23c3269c0 100644 --- a/arch/arm/mach-mvebu/include/mach/bbu.h +++ b/arch/arm/mach-mvebu/include/mach/bbu.h @@ -3,7 +3,7 @@ int mvebu_bbu_flash_register_handler(const char *name, char *devicefile, int version, bool isdefault); #else -int mvebu_bbu_flash_register_handler(const char *name, +static inline int mvebu_bbu_flash_register_handler(const char *name, char *devicefile, int version, bool isdefault) { diff --git a/arch/arm/mach-mxs/mem-init.c b/arch/arm/mach-mxs/mem-init.c index 568db81302..44785c2bfc 100644 --- a/arch/arm/mach-mxs/mem-init.c +++ b/arch/arm/mach-mxs/mem-init.c @@ -30,8 +30,8 @@ #define MXS_BLOCK_SFTRST (1 << 31) #define MXS_BLOCK_CLKGATE (1 << 30) -int mxs_early_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned - int timeout) +static int mxs_early_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, + unsigned int timeout) { while (--timeout) { if ((readl(®->reg) & mask) == mask) @@ -42,8 +42,8 @@ int mxs_early_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned return !timeout; } -int mxs_early_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned - int timeout) +static int mxs_early_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, + unsigned int timeout) { while (--timeout) { if ((readl(®->reg) & mask) == 0) @@ -54,7 +54,7 @@ int mxs_early_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned return !timeout; } -int mxs_early_reset_block(struct mxs_register_32 *reg) +static int mxs_early_reset_block(struct mxs_register_32 *reg) { /* Clear SFTRST */ writel(MXS_BLOCK_SFTRST, ®->reg_clr); diff --git a/arch/arm/mach-netx/clocksource.c b/arch/arm/mach-netx/clocksource.c index 263547242e..1eb977d3c9 100644 --- a/arch/arm/mach-netx/clocksource.c +++ b/arch/arm/mach-netx/clocksource.c @@ -23,7 +23,7 @@ #include <clock.h> #include <mach/netx-regs.h> -uint64_t netx_clocksource_read(void) +static uint64_t netx_clocksource_read(void) { return GPIO_REG(GPIO_COUNTER_CURRENT(0)); } diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 6c3b953d1f..e818f97013 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c @@ -115,7 +115,7 @@ int loadxc(int xcno) return 0; } -int do_loadxc(int argc, char *argv[]) +static int do_loadxc(int argc, char *argv[]) { int xcno; diff --git a/arch/arm/mach-pxa/clocksource.c b/arch/arm/mach-pxa/clocksource.c index c941f154d4..5a890acb3c 100644 --- a/arch/arm/mach-pxa/clocksource.c +++ b/arch/arm/mach-pxa/clocksource.c @@ -22,7 +22,7 @@ #define OSCR 0x40A00010 -uint64_t pxa_clocksource_read(void) +static uint64_t pxa_clocksource_read(void) { return readl(OSCR); } diff --git a/arch/arm/mach-samsung/clocks-s3c64xx.c b/arch/arm/mach-samsung/clocks-s3c64xx.c index cf7d0716fe..3c13f52d2e 100644 --- a/arch/arm/mach-samsung/clocks-s3c64xx.c +++ b/arch/arm/mach-samsung/clocks-s3c64xx.c @@ -322,7 +322,7 @@ void s3c_set_hsmmc_clk(int id, int src, unsigned div) writel(readl(S3C_SCLK_GATE) | S3C_SCLK_GATE_MMC(id), S3C_SCLK_GATE); } -int s3c64xx_dump_clocks(void) +static int s3c64xx_dump_clocks(void) { printf("refclk: %7d kHz\n", S3C64XX_CLOCK_REFERENCE / 1000); printf("apll: %7d kHz\n", s3c_get_apllclk() / 1000); diff --git a/arch/arm/mach-samsung/clocks-s5pcxx.c b/arch/arm/mach-samsung/clocks-s5pcxx.c index 1f4790bc07..4a1574bd89 100644 --- a/arch/arm/mach-samsung/clocks-s5pcxx.c +++ b/arch/arm/mach-samsung/clocks-s5pcxx.c @@ -38,7 +38,7 @@ uint32_t s3c_get_mpllclk(void) return m * ((S5PCXX_CLOCK_REFERENCE) / (p << s)); } -uint32_t s3c_get_apllclk(void) +static uint32_t s3c_get_apllclk(void) { uint32_t m, p, s; uint32_t reg = readl(S5P_xPLL_CON + S5P_APLL); @@ -84,7 +84,7 @@ unsigned s3c_get_uart_clk(unsigned src) { return (src & 1) ? s3c_get_uart_clk_uclk1() : s3c_get_pclk(); } -int s5pcxx_dump_clocks(void) +static int s5pcxx_dump_clocks(void) { printf("refclk: %7d kHz\n", S5PCXX_CLOCK_REFERENCE / 1000); printf("apll: %7d kHz\n", s3c_get_apllclk() / 1000); |