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-rw-r--r--drivers/ata/Kconfig1
-rw-r--r--drivers/ata/Makefile1
-rw-r--r--drivers/ata/ahci.c250
-rw-r--r--drivers/ata/ahci.h65
-rw-r--r--drivers/ata/disk_ata_drive.c46
-rw-r--r--drivers/ata/ide-sff.c11
-rw-r--r--drivers/ata/intf_platform_ide.c22
-rw-r--r--drivers/ata/pata-imx.c23
-rw-r--r--drivers/ata/sata-imx.c10
-rw-r--r--drivers/ata/sata_mv.c117
10 files changed, 320 insertions, 226 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 50d3ba7f3a..010b7ad732 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-only
menuconfig DISK
select BLOCK
select PARTITION
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index d3f5a0b57e..aeccf89ac1 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-only
# drive types
obj-$(CONFIG_DISK_IDE_SFF) += ide-sff.o
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 6d251f248a..de67482881 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1,20 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) Freescale Semiconductor, Inc. 2006.
* Author: Jason Jin<Jason.jin@freescale.com>
* Zhang Wei<wei.zhang@freescale.com>
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * with the reference on libata and ahci drvier in kernel
- *
+ * with the reference on libata and ahci driver in kernel
*/
#include <common.h>
@@ -111,7 +101,7 @@ static inline void __iomem *ahci_port_base(void __iomem *base, int port)
static int ahci_link_ok(struct ahci_port *ahci_port, int verbose)
{
- u32 val = ahci_port_read(ahci_port, PORT_SCR_STAT) & 0xf;
+ u32 val = ahci_port_read(ahci_port, PORT_SCR_STAT) & PORT_SCR_STAT_DET;
if (val == 0x3)
return true;
@@ -127,11 +117,13 @@ static void ahci_fill_cmd_slot(struct ahci_port *ahci_port, u32 opts)
ahci_port->cmd_slot->opts = cpu_to_le32(opts);
ahci_port->cmd_slot->status = 0;
ahci_port->cmd_slot->tbl_addr =
- cpu_to_le32((unsigned long)ahci_port->cmd_tbl & 0xffffffff);
- ahci_port->cmd_slot->tbl_addr_hi = 0;
+ cpu_to_le32(lower_32_bits(ahci_port->cmd_tbl_dma));
+ if (ahci_port->ahci->cap & HOST_CAP_64)
+ ahci_port->cmd_slot->tbl_addr_hi =
+ cpu_to_le32(upper_32_bits(ahci_port->cmd_tbl_dma));
}
-static int ahci_fill_sg(struct ahci_port *ahci_port, const void *buf, int buf_len)
+static int ahci_fill_sg(struct ahci_port *ahci_port, dma_addr_t buf_dma, int buf_len)
{
struct ahci_sg *ahci_sg = ahci_port->cmd_tbl_sg;
u32 sg_count;
@@ -143,12 +135,14 @@ static int ahci_fill_sg(struct ahci_port *ahci_port, const void *buf, int buf_le
while (buf_len) {
unsigned int now = min(AHCI_MAX_DATA_BYTE_COUNT, buf_len);
- ahci_sg->addr = cpu_to_le32((u32)buf);
- ahci_sg->addr_hi = 0;
+ ahci_sg->addr = cpu_to_le32(lower_32_bits(buf_dma));
+ if (ahci_port->ahci->cap & HOST_CAP_64)
+ ahci_sg->addr_hi = cpu_to_le32(upper_32_bits(buf_dma));
ahci_sg->flags_size = cpu_to_le32(now - 1);
buf_len -= now;
- buf += now;
+ buf_dma += now;
+ ahci_sg++;
}
return sg_count;
@@ -160,40 +154,39 @@ static int ahci_io(struct ahci_port *ahci_port, u8 *fis, int fis_len, void *rbuf
u32 opts;
int sg_count;
int ret;
+ void *buf;
+ dma_addr_t buf_dma;
+ enum dma_data_direction dma_dir;
if (!ahci_link_ok(ahci_port, 1))
return -EIO;
- if (wbuf)
- dma_sync_single_for_device((unsigned long)wbuf, buf_len,
- DMA_TO_DEVICE);
- if (rbuf)
- dma_sync_single_for_device((unsigned long)rbuf, buf_len,
- DMA_FROM_DEVICE);
+ if (wbuf) {
+ buf = (void *)wbuf;
+ dma_dir = DMA_TO_DEVICE;
+ } else {
+ buf = rbuf;
+ dma_dir = DMA_FROM_DEVICE;
+ }
+
+ buf_dma = dma_map_single(ahci_port->ahci->dev, buf, buf_len, dma_dir);
- memcpy((unsigned char *)ahci_port->cmd_tbl, fis, fis_len);
+ memcpy(ahci_port->cmd_tbl, fis, fis_len);
- sg_count = ahci_fill_sg(ahci_port, rbuf ? rbuf : wbuf, buf_len);
+ sg_count = ahci_fill_sg(ahci_port, buf_dma, buf_len);
opts = (fis_len >> 2) | (sg_count << 16);
if (wbuf)
- opts |= 1 << 6;
+ opts |= CMD_LIST_OPTS_WRITE;
ahci_fill_cmd_slot(ahci_port, opts);
ahci_port_write_f(ahci_port, PORT_CMD_ISSUE, 1);
ret = wait_on_timeout(WAIT_DATAIO,
- (readl(ahci_port->port_mmio + PORT_CMD_ISSUE) & 0x1) == 0);
- if (ret)
- return -ETIMEDOUT;
+ (ahci_port_read(ahci_port, PORT_CMD_ISSUE) & 0x1) == 0);
- if (wbuf)
- dma_sync_single_for_cpu((unsigned long)wbuf, buf_len,
- DMA_TO_DEVICE);
- if (rbuf)
- dma_sync_single_for_cpu((unsigned long)rbuf, buf_len,
- DMA_FROM_DEVICE);
+ dma_unmap_single(ahci_port->ahci->dev, buf_dma, buf_len, dma_dir);
- return 0;
+ return ret;
}
/*
@@ -202,14 +195,12 @@ static int ahci_io(struct ahci_port *ahci_port, u8 *fis, int fis_len, void *rbuf
static int ahci_read_id(struct ata_port *ata, void *buf)
{
struct ahci_port *ahci = container_of(ata, struct ahci_port, ata);
- u8 fis[20];
-
- memset(fis, 0, sizeof(fis));
- /* Construct the FIS */
- fis[0] = 0x27; /* Host to device FIS. */
- fis[1] = 1 << 7; /* Command FIS. */
- fis[2] = ATA_CMD_ID_ATA; /* Command byte. */
+ u8 fis[20] = {
+ 0x27, /* Host to device FIS. */
+ 1 << 7, /* Command FIS. */
+ ATA_CMD_ID_ATA /* Command byte. */
+ };
return ahci_io(ahci, fis, sizeof(fis), buf, NULL, SECTOR_SIZE);
}
@@ -218,16 +209,13 @@ static int ahci_rw(struct ata_port *ata, void *rbuf, const void *wbuf,
sector_t block, blkcnt_t num_blocks)
{
struct ahci_port *ahci = container_of(ata, struct ahci_port, ata);
- u8 fis[20];
+ u8 fis[20] = {
+ 0x27, /* Host to device FIS. */
+ 1 << 7 /* Command FIS. */
+ };
int ret;
int lba48 = ata_id_has_lba48(ata->id);
- memset(fis, 0, sizeof(fis));
-
- /* Construct the FIS */
- fis[0] = 0x27; /* Host to device FIS. */
- fis[1] = 1 << 7; /* Command FIS. */
-
/* Command byte. */
if (lba48)
fis[2] = wbuf ? ATA_CMD_WRITE_EXT : ATA_CMD_READ_EXT;
@@ -284,12 +272,11 @@ static int ahci_write(struct ata_port *ata, const void *buf, sector_t block,
static int ahci_init_port(struct ahci_port *ahci_port)
{
- void __iomem *port_mmio;
u32 val, cmd;
+ void *mem;
+ dma_addr_t mem_dma;
int ret;
- port_mmio = ahci_port->port_mmio;
-
/* make sure port is not active */
val = ahci_port_read(ahci_port, PORT_CMD);
if (val & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON | PORT_CMD_FIS_RX | PORT_CMD_START)) {
@@ -305,46 +292,45 @@ static int ahci_init_port(struct ahci_port *ahci_port)
mdelay(500);
}
+ mem = dma_alloc_coherent(AHCI_PORT_PRIV_DMA_SZ, &mem_dma);
+ if (!mem) {
+ return -ENOMEM;
+ }
+
/*
- * First item in chunk of DMA memory: 32-slot command table,
+ * First item in chunk of DMA memory: 32-slot command list,
* 32 bytes each in size
*/
- ahci_port->cmd_slot = dma_alloc_coherent(AHCI_CMD_SLOT_SZ * 32,
- DMA_ADDRESS_BROKEN);
- if (!ahci_port->cmd_slot) {
- ret = -ENOMEM;
- goto err_alloc;
- }
+ ahci_port->cmd_slot = mem;
+ ahci_port->cmd_slot_dma = mem_dma;
- ahci_port_debug(ahci_port, "cmd_slot = 0x%x\n", (unsigned)ahci_port->cmd_slot);
+ ahci_port_debug(ahci_port, "cmd_slot = 0x%p (0x%pad)\n",
+ ahci_port->cmd_slot, &ahci_port->cmd_slot_dma);
/*
* Second item: Received-FIS area
*/
- ahci_port->rx_fis = (unsigned long)dma_alloc_coherent(AHCI_RX_FIS_SZ,
- DMA_ADDRESS_BROKEN);
- if (!ahci_port->rx_fis) {
- ret = -ENOMEM;
- goto err_alloc1;
- }
+ ahci_port->rx_fis = mem + AHCI_CMD_LIST_SZ;
+ ahci_port->rx_fis_dma = mem_dma + AHCI_CMD_LIST_SZ;
/*
* Third item: data area for storing a single command
* and its scatter-gather table
*/
- ahci_port->cmd_tbl = dma_alloc_coherent(AHCI_CMD_TBL_SZ,
- DMA_ADDRESS_BROKEN);
- if (!ahci_port->cmd_tbl) {
- ret = -ENOMEM;
- goto err_alloc2;
- }
+ ahci_port->cmd_tbl = mem + AHCI_CMD_LIST_SZ + AHCI_RX_FIS_SZ;
+ ahci_port->cmd_tbl_dma = mem_dma + AHCI_CMD_LIST_SZ + AHCI_RX_FIS_SZ;
- ahci_port_debug(ahci_port, "cmd_tbl_dma = 0x%p\n", ahci_port->cmd_tbl);
+ ahci_port_debug(ahci_port, "cmd_tbl = 0x%p (0x%pad)\n",
+ ahci_port->cmd_tbl, &ahci_port->cmd_tbl_dma);
ahci_port->cmd_tbl_sg = ahci_port->cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
- ahci_port_write_f(ahci_port, PORT_LST_ADDR, (u32)ahci_port->cmd_slot);
- ahci_port_write_f(ahci_port, PORT_FIS_ADDR, ahci_port->rx_fis);
+ ahci_port_write_f(ahci_port, PORT_LST_ADDR, lower_32_bits(ahci_port->cmd_slot_dma));
+ if (ahci_port->ahci->cap & HOST_CAP_64)
+ ahci_port_write_f(ahci_port, PORT_LST_ADDR_HI, upper_32_bits(ahci_port->cmd_slot_dma));
+ ahci_port_write_f(ahci_port, PORT_FIS_ADDR, lower_32_bits(ahci_port->rx_fis_dma));
+ if (ahci_port->ahci->cap & HOST_CAP_64)
+ ahci_port_write_f(ahci_port, PORT_FIS_ADDR_HI, upper_32_bits(ahci_port->rx_fis_dma));
/*
* Add the spinup command to whatever mode bits may
@@ -368,7 +354,7 @@ static int ahci_init_port(struct ahci_port *ahci_port)
* rarely has it taken between 1-2 ms. Never seen it above 2 ms.
*/
ret = wait_on_timeout(WAIT_LINKUP,
- (ahci_port_read(ahci_port, PORT_SCR_STAT) & 0xf) == 0x3);
+ (ahci_port_read(ahci_port, PORT_SCR_STAT) & PORT_SCR_STAT_DET) == 0x3);
if (ret) {
ahci_port_info(ahci_port, "SATA link timeout\n");
ret = -ETIMEDOUT;
@@ -385,16 +371,17 @@ static int ahci_init_port(struct ahci_port *ahci_port)
ahci_port_info(ahci_port, "Spinning up device...\n");
ret = wait_on_timeout(WAIT_SPINUP,
- ((readl(port_mmio + PORT_TFDATA) &
- (ATA_STATUS_BUSY | ATA_STATUS_DRQ)) == 0)
- || ((readl(port_mmio + PORT_SCR_STAT) & 0xf) == 1));
+ ((ahci_port_read(ahci_port, PORT_TFDATA) &
+ (ATA_STATUS_BUSY | ATA_STATUS_DRQ)) == 0) ||
+ ((ahci_port_read(ahci_port, PORT_SCR_STAT) &
+ PORT_SCR_STAT_DET) == 1));
if (ret) {
ahci_port_info(ahci_port, "timeout.\n");
ret = -ENODEV;
goto err_init;
}
- if ((readl(port_mmio + PORT_SCR_STAT) & 0xf) == 1) {
+ if ((ahci_port_read(ahci_port, PORT_SCR_STAT) & PORT_SCR_STAT_DET) == 1) {
ahci_port_info(ahci_port, "down.\n");
ret = -ENODEV;
goto err_init;
@@ -421,18 +408,13 @@ static int ahci_init_port(struct ahci_port *ahci_port)
ahci_port_debug(ahci_port, "status: 0x%08x\n", val);
- if ((val & 0xf) == 0x03)
+ if ((val & PORT_SCR_STAT_DET) == 0x3)
return 0;
ret = -ENODEV;
err_init:
- dma_free_coherent(ahci_port->cmd_tbl, 0, AHCI_CMD_TBL_SZ);
-err_alloc2:
- dma_free_coherent((void *)ahci_port->rx_fis, 0, AHCI_RX_FIS_SZ);
-err_alloc1:
- dma_free_coherent(ahci_port->cmd_slot, 0, AHCI_CMD_SLOT_SZ * 32);
-err_alloc:
+ dma_free_coherent(mem, mem_dma, AHCI_PORT_PRIV_DMA_SZ);
return ret;
}
@@ -511,7 +493,7 @@ void ahci_print_info(struct ahci_device *ahci)
cap2 = ahci_ioread(ahci, HOST_CAP2);
impl = ahci->port_map;
- speed = (cap >> 20) & 0xf;
+ speed = (cap & HOST_CAP_ISS) >> 20;
if (speed == 1)
speed_s = "1.5";
else if (speed == 2)
@@ -529,49 +511,55 @@ void ahci_print_info(struct ahci_device *ahci)
(vers >> 16) & 0xff,
(vers >> 8) & 0xff,
vers & 0xff,
- ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
+ ((cap & HOST_CAP_NCS) >> 8) + 1,
+ (cap & HOST_CAP_NP) + 1, speed_s, impl, scc_s);
printf("flags: "
"%s%s%s%s%s%s%s"
"%s%s%s%s%s%s%s"
- "%s%s%s%s%s%s\n",
- cap & (1 << 31) ? "64bit " : "",
- cap & (1 << 30) ? "ncq " : "",
- cap & (1 << 28) ? "ilck " : "",
- cap & (1 << 27) ? "stag " : "",
- cap & (1 << 26) ? "pm " : "",
- cap & (1 << 25) ? "led " : "",
- cap & (1 << 24) ? "clo " : "",
- cap & (1 << 19) ? "nz " : "",
- cap & (1 << 18) ? "only " : "",
- cap & (1 << 17) ? "pmp " : "",
- cap & (1 << 16) ? "fbss " : "",
- cap & (1 << 15) ? "pio " : "",
- cap & (1 << 14) ? "slum " : "",
- cap & (1 << 13) ? "part " : "",
- cap & (1 << 7) ? "ccc " : "",
- cap & (1 << 6) ? "ems " : "",
- cap & (1 << 5) ? "sxs " : "",
- cap2 & (1 << 2) ? "apst " : "",
- cap2 & (1 << 1) ? "nvmp " : "",
- cap2 & (1 << 0) ? "boh " : "");
+ "%s%s%s%s%s%s%s\n",
+ cap & HOST_CAP_64 ? "64bit " : "",
+ cap & HOST_CAP_NCQ ? "ncq " : "",
+ cap & HOST_CAP_SNTF ? "sntf " : "",
+ cap & HOST_CAP_SMPS ? "ilck " : "",
+ cap & HOST_CAP_SSS ? "stag " : "",
+ cap & HOST_CAP_ALPM ? "pm " : "",
+ cap & HOST_CAP_LED ? "led " : "",
+ cap & HOST_CAP_CLO ? "clo " : "",
+ cap & HOST_CAP_RESERVED ? "nz " : "",
+ cap & HOST_CAP_ONLY ? "only " : "",
+ cap & HOST_CAP_SPM ? "pmp " : "",
+ cap & HOST_CAP_FBS ? "fbss " : "",
+ cap & HOST_CAP_PIO_MULTI ? "pio " : "",
+ cap & HOST_CAP_SSC ? "slum " : "",
+ cap & HOST_CAP_PART ? "part " : "",
+ cap & HOST_CAP_CCC ? "ccc " : "",
+ cap & HOST_CAP_EMS ? "ems " : "",
+ cap & HOST_CAP_SXS ? "sxs " : "",
+ cap2 & HOST_CAP2_APST ? "apst " : "",
+ cap2 & HOST_CAP2_NVMHCI ? "nvmp " : "",
+ cap2 & HOST_CAP2_BOH ? "boh " : "");
}
-void ahci_info(struct device_d *dev)
+void ahci_info(struct device *dev)
{
struct ahci_device *ahci = dev->priv;
ahci_print_info(ahci);
}
-static int ahci_detect(struct device_d *dev)
+static int ahci_detect(struct device *dev)
{
struct ahci_device *ahci = dev->priv;
+ int n_ports = max_t(int, ahci->n_ports, fls(ahci->port_map));
int i;
- for (i = 0; i < ahci->n_ports; i++) {
+ for (i = 0; i < n_ports; i++) {
struct ahci_port *ahci_port = &ahci->ports[i];
+ if (!(ahci->port_map & (1 << i)))
+ continue;
+
ata_port_detect(&ahci_port->ata);
}
@@ -580,9 +568,8 @@ static int ahci_detect(struct device_d *dev)
int ahci_add_host(struct ahci_device *ahci)
{
- u8 *mmio = (u8 *)ahci->mmio_base;
u32 tmp, cap_save;
- int i, ret;
+ int n_ports, i, ret;
ahci->host_flags = ATA_FLAG_SATA
| ATA_FLAG_NO_LEGACY
@@ -594,9 +581,9 @@ int ahci_add_host(struct ahci_device *ahci)
ahci_debug(ahci, "ahci_host_init: start\n");
- cap_save = readl(mmio + HOST_CAP);
- cap_save &= ((1 << 28) | (1 << 17));
- cap_save |= (1 << 27); /* Staggered Spin-up. Not needed. */
+ cap_save = ahci_ioread(ahci, HOST_CAP);
+ cap_save &= (HOST_CAP_SMPS | HOST_CAP_SPM);
+ cap_save |= HOST_CAP_SSS; /* Staggered Spin-up. Not needed. */
/* global controller reset */
tmp = ahci_ioread(ahci, HOST_CTL);
@@ -607,9 +594,9 @@ int ahci_add_host(struct ahci_device *ahci)
* reset must complete within 1 second, or
* the hardware should be considered fried.
*/
- ret = wait_on_timeout(SECOND, (readl(mmio + HOST_CTL) & HOST_RESET) == 0);
+ ret = wait_on_timeout(SECOND, (ahci_ioread(ahci, HOST_CTL) & HOST_RESET) == 0);
if (ret) {
- ahci_debug(ahci,"controller reset failed (0x%x)\n", tmp);
+ ahci_debug(ahci, "controller reset failed (0x%x)\n", tmp);
return -ENODEV;
}
@@ -619,19 +606,25 @@ int ahci_add_host(struct ahci_device *ahci)
ahci->cap = ahci_ioread(ahci, HOST_CAP);
ahci->port_map = ahci_ioread(ahci, HOST_PORTS_IMPL);
- ahci->n_ports = (ahci->cap & 0x1f) + 1;
+ ahci->n_ports = (ahci->cap & HOST_CAP_NP) + 1;
ahci_debug(ahci, "cap 0x%x port_map 0x%x n_ports %d\n",
ahci->cap, ahci->port_map, ahci->n_ports);
- for (i = 0; i < ahci->n_ports; i++) {
+ n_ports = max_t(int, ahci->n_ports, fls(ahci->port_map));
+
+ for (i = 0; i < n_ports; i++) {
struct ahci_port *ahci_port = &ahci->ports[i];
+ if (!(ahci->port_map & (1 << i)))
+ continue;
+
ahci_port->num = i;
ahci_port->ahci = ahci;
ahci_port->ata.dev = ahci->dev;
- ahci_port->port_mmio = ahci_port_base(mmio, i);
+ ahci_port->port_mmio = ahci_port_base(ahci->mmio_base, i);
ahci_port->ata.ops = &ahci_ops;
+ ahci_port->ata.ahci = true;
ata_port_register(&ahci_port->ata);
}
@@ -644,7 +637,7 @@ int ahci_add_host(struct ahci_device *ahci)
return 0;
}
-static int ahci_probe(struct device_d *dev)
+static int ahci_probe(struct device *dev)
{
struct resource *iores;
struct ahci_device *ahci;
@@ -677,8 +670,9 @@ static __maybe_unused struct of_device_id ahci_dt_ids[] = {
/* sentinel */
}
};
+MODULE_DEVICE_TABLE(of, ahci_dt_ids);
-static struct driver_d ahci_driver = {
+static struct driver ahci_driver = {
.name = "ahci",
.probe = ahci_probe,
.of_compatible = DRV_OF_COMPAT(ahci_dt_ids),
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index ed318420c3..196bde73c2 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -1,18 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) Freescale Semiconductor, Inc. 2006.
* Author: Jason Jin<Jason.jin@freescale.com>
* Zhang Wei<wei.zhang@freescale.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
*/
#ifndef _AHCI_H_
#define _AHCI_H_
@@ -20,13 +10,15 @@
#define AHCI_PCI_BAR 0x24
#define AHCI_MAX_SG 56 /* hardware max is 64K */
#define AHCI_CMD_SLOT_SZ 32
-#define AHCI_MAX_CMD_SLOT 32
+#define AHCI_MAX_CMDS 32
+#define AHCI_CMD_LIST_SZ (AHCI_CMD_SLOT_SZ * AHCI_MAX_CMDS)
#define AHCI_RX_FIS_SZ 256
#define AHCI_CMD_TBL_HDR_SZ 0x80
#define AHCI_CMD_TBL_CDB 0x40
-#define AHCI_CMD_TBL_SZ AHCI_CMD_TBL_HDR_SZ + (AHCI_MAX_SG * 32)
-#define AHCI_PORT_PRIV_DMA_SZ (AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT + \
- AHCI_CMD_TBL_SZ + AHCI_RX_FIS_SZ)
+#define AHCI_CMD_TBL_ITM_SZ 16
+#define AHCI_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (AHCI_MAX_SG * AHCI_CMD_TBL_ITM_SZ))
+#define AHCI_PORT_PRIV_DMA_SZ (AHCI_CMD_LIST_SZ + AHCI_CMD_TBL_SZ + AHCI_RX_FIS_SZ)
+
#define AHCI_CMD_ATAPI (1 << 5)
#define AHCI_CMD_WRITE (1 << 6)
#define AHCI_CMD_PREFETCH (1 << 7)
@@ -43,6 +35,34 @@
#define HOST_VERSION 0x10 /* AHCI spec. version compliancy */
#define HOST_CAP2 0x24 /* host capabilities, extended */
+/* HOST_CAP bits */
+#define HOST_CAP_64 (1 << 31) /* PCI DAC (64-bit DMA) support */
+#define HOST_CAP_NCQ (1 << 30) /* Native Command Queueing */
+#define HOST_CAP_SNTF (1 << 29) /* SNotification register */
+#define HOST_CAP_SMPS (1 << 28) /* Supports mechanical presence switch */
+#define HOST_CAP_SSS (1 << 27) /* Supports staggered spin-up */
+#define HOST_CAP_ALPM (1 << 26) /* Aggressive Link PM support */
+#define HOST_CAP_LED (1 << 25) /* Supports activity LED */
+#define HOST_CAP_CLO (1 << 24) /* Command List Override support */
+#define HOST_CAP_ISS (0xf << 20) /* Interface Speed Support */
+#define HOST_CAP_RESERVED (1 << 19) /* Reserved bit */
+#define HOST_CAP_ONLY (1 << 18) /* Supports AHCI mode only */
+#define HOST_CAP_SPM (1 << 17) /* Supports port multiplier */
+#define HOST_CAP_FBS (1 << 16) /* FIS-based switching support */
+#define HOST_CAP_PIO_MULTI (1 << 15) /* PIO multiple DRQ support */
+#define HOST_CAP_SSC (1 << 14) /* Slumber state capable */
+#define HOST_CAP_PART (1 << 13) /* Partial state capable */
+#define HOST_CAP_NCS (0x1f << 8) /* Number of Command Slots */
+#define HOST_CAP_CCC (1 << 7) /* Command Completion Coalescing */
+#define HOST_CAP_EMS (1 << 6) /* Enclosure Management support */
+#define HOST_CAP_SXS (1 << 5) /* Supports External SATA */
+#define HOST_CAP_NP (0x1f << 0) /* Number of ports */
+
+/* HOST_CAP2 bits */
+#define HOST_CAP2_APST (1 << 2) /* Automatic partial to slumber */
+#define HOST_CAP2_NVMHCI (1 << 1) /* NVMHCI supported */
+#define HOST_CAP2_BOH (1 << 0) /* BIOS/OS handoff supported */
+
/* HOST_CTL bits */
#define HOST_RESET (1 << 0) /* reset controller; self-clear */
#define HOST_IRQ_EN (1 << 1) /* global IRQ enable */
@@ -108,6 +128,9 @@
#define PORT_CMD_ICC_PARTIAL (0x2 << 28) /* Put i/f in partial state */
#define PORT_CMD_ICC_SLUMBER (0x6 << 28) /* Put i/f in slumber state */
+/* PORT_SCR_STAT bits */
+#define PORT_SCR_STAT_DET (0xf << 0) /* device detection */
+
#define AHCI_MAX_PORTS 32
/* SETFEATURES stuff */
@@ -140,6 +163,9 @@
#define ATA_FLAG_PIO_DMA (1 << 8) /* PIO cmds via DMA */
#define ATA_FLAG_NO_ATAPI (1 << 11) /* No ATAPI support */
+/* Command list entry DW0 bits */
+#define CMD_LIST_OPTS_WRITE (1 << 6) /* the direction is a device write */
+
struct ahci_device;
struct ahci_port {
@@ -149,13 +175,16 @@ struct ahci_port {
unsigned flags;
void __iomem *port_mmio;
struct ahci_cmd_hdr *cmd_slot;
+ dma_addr_t cmd_slot_dma;
struct ahci_sg *cmd_tbl_sg;
void *cmd_tbl;
- u32 rx_fis;
+ dma_addr_t cmd_tbl_dma;
+ void *rx_fis;
+ dma_addr_t rx_fis_dma;
};
struct ahci_device {
- struct device_d *dev;
+ struct device *dev;
struct ahci_port ports[AHCI_MAX_PORTS];
u32 n_ports;
void __iomem *mmio_base;
@@ -168,6 +197,6 @@ struct ahci_device {
int ahci_add_host(struct ahci_device *ahci);
void ahci_print_info(struct ahci_device *ahci);
-void ahci_info(struct device_d *dev);
+void ahci_info(struct device *dev);
#endif
diff --git a/drivers/ata/disk_ata_drive.c b/drivers/ata/disk_ata_drive.c
index 3d9503fe7e..a49acc1641 100644
--- a/drivers/ata/disk_ata_drive.c
+++ b/drivers/ata/disk_ata_drive.c
@@ -1,18 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2011 Juergen Beisert, Pengutronix
*
* Inspired from various soures like http://wiki.osdev.org/ATA_PIO_Mode,
* u-boot and the linux kernel
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <common.h>
@@ -89,9 +80,9 @@ static void __maybe_unused ata_dump_id(uint16_t *id)
ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
printf("Product model number: %s\n\r", product);
- /* Total sectors of device */
+ /* Total sectors of device */
n_sectors = ata_id_n_sectors(id);
- printf("Capablity: %lld sectors\n\r", n_sectors);
+ printf("Capacity: %lld sectors\n\r", n_sectors);
printf ("id[49]: capabilities = 0x%04x\n"
"id[53]: field valid = 0x%04x\n"
@@ -104,12 +95,14 @@ static void __maybe_unused ata_dump_id(uint16_t *id)
id[ATA_ID_PIO_MODES],
id[ATA_ID_QUEUE_DEPTH]);
- printf ("id[76]: sata capablity = 0x%04x\n"
+ printf ("id[76]: sata capabilities 1 = 0x%04x\n"
+ "id[77]: sata capabilities 2 = 0x%04x\n"
"id[78]: sata features supported = 0x%04x\n"
- "id[79]: sata features enable = 0x%04x\n",
- id[76], /* FIXME */
- id[78], /* FIXME */
- id[79]); /* FIXME */
+ "id[79]: sata features enabled = 0x%04x\n",
+ id[ATA_ID_SATA_CAPAB_1],
+ id[ATA_ID_SATA_CAPAB_2],
+ id[ATA_ID_SATA_FEAT_SUPP],
+ id[ATA_ID_SATA_FEAT_ENABLE]);
printf ("id[80]: major version = 0x%04x\n"
"id[81]: minor version = 0x%04x\n"
@@ -117,12 +110,13 @@ static void __maybe_unused ata_dump_id(uint16_t *id)
"id[83]: command set supported 2 = 0x%04x\n"
"id[84]: command set extension = 0x%04x\n",
id[ATA_ID_MAJOR_VER],
- id[81], /* FIXME */
+ id[ATA_ID_MINOR_VER],
id[ATA_ID_COMMAND_SET_1],
id[ATA_ID_COMMAND_SET_2],
id[ATA_ID_CFSSE]);
- printf ("id[85]: command set enable 1 = 0x%04x\n"
- "id[86]: command set enable 2 = 0x%04x\n"
+
+ printf ("id[85]: command set enabled 1 = 0x%04x\n"
+ "id[86]: command set enabled 2 = 0x%04x\n"
"id[87]: command set default = 0x%04x\n"
"id[88]: udma = 0x%04x\n"
"id[93]: hardware reset result = 0x%04x\n",
@@ -205,7 +199,7 @@ static int ata_port_init(struct ata_port *port)
{
int rc;
struct ata_port_operations *ops = port->ops;
- struct device_d *dev = &port->class_dev;
+ struct device *dev = &port->class_dev;
if (ops->init) {
rc = ops->init(port);
@@ -251,6 +245,7 @@ static int ata_port_init(struct ata_port *port)
port->blk.num_blocks = ata_id_n_sectors(port->id);
port->blk.blockbits = SECTOR_SHIFT;
+ port->blk.type = port->ahci ? BLK_TYPE_AHCI : BLK_TYPE_IDE;
rc = blockdevice_register(&port->blk);
if (rc != 0) {
@@ -260,11 +255,6 @@ static int ata_port_init(struct ata_port *port)
dev_info(dev, "registered /dev/%s\n", port->blk.cdev.name);
- /* create partitions on demand */
- rc = parse_partition_table(&port->blk);
- if (rc != 0)
- dev_warn(dev, "No partition table found\n");
-
return 0;
on_error:
@@ -299,14 +289,14 @@ static int ata_set_probe(struct param_d *param, void *priv)
return ata_port_detect(port);
}
-static int ata_detect(struct device_d *dev)
+static int ata_detect(struct device *dev)
{
struct ata_port *port = container_of(dev, struct ata_port, class_dev);
return ata_port_detect(port);
}
-static void ata_info(struct device_d *dev)
+static void ata_info(struct device *dev)
{
struct ata_port *port = container_of(dev, struct ata_port, class_dev);
diff --git a/drivers/ata/ide-sff.c b/drivers/ata/ide-sff.c
index a735c8c32c..f25dfeae43 100644
--- a/drivers/ata/ide-sff.c
+++ b/drivers/ata/ide-sff.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-only
#include <common.h>
#include <ata_drive.h>
#include <io.h>
@@ -25,7 +26,7 @@ static inline uint8_t ata_rd_byte(struct ide_port *ide, void __iomem *addr)
if (ide->io.mmio)
return readb(addr);
else
- return (uint8_t) inb((int) addr);
+ return (uint8_t) inb((ulong)addr);
}
/**
@@ -41,7 +42,7 @@ static inline void ata_wr_byte(struct ide_port *ide, uint8_t value,
if (ide->io.mmio)
writeb(value, addr);
else
- outb(value, (int) addr);
+ outb(value, (ulong)addr);
}
/**
@@ -56,7 +57,7 @@ static inline uint16_t ata_rd_word(struct ide_port *ide,
if (ide->io.mmio)
return readw(addr);
else
- return (uint16_t) inw((int) addr);
+ return (uint16_t) inw((ulong)addr);
}
/**
@@ -72,7 +73,7 @@ static inline void ata_wr_word(struct ide_port *ide, uint16_t value,
if (ide->io.mmio)
writew(value, addr);
else
- outw(value, (int) addr);
+ outw(value, (ulong)addr);
}
/**
@@ -95,7 +96,7 @@ static int ata_wait_busy(struct ide_port *ide, unsigned timeout)
{
uint8_t status;
uint64_t start = get_time_ns();
- uint64_t toffs = timeout * 1000 * 1000;
+ uint64_t toffs = timeout * MSECOND;
do {
status = ata_rd_status(ide);
diff --git a/drivers/ata/intf_platform_ide.c b/drivers/ata/intf_platform_ide.c
index 15f5c0afaa..0d69b4b0c3 100644
--- a/drivers/ata/intf_platform_ide.c
+++ b/drivers/ata/intf_platform_ide.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2011 Juergen Beisert, Pengutronix
*
@@ -5,20 +6,6 @@
* Copyright (C) 2006 - 2007 Paul Mundt
* Based on pata_pcmcia:
* Copyright 2005-2006 Red Hat Inc, all rights reserved.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <common.h>
@@ -78,7 +65,7 @@ static void platform_ide_setup_port(void *reg_base, void *alt_base,
}
}
-static int platform_ide_probe(struct device_d *dev)
+static int platform_ide_probe(struct device *dev)
{
struct resource *iores;
int rc;
@@ -87,7 +74,7 @@ static int platform_ide_probe(struct device_d *dev)
void *reg_base, *alt_base = NULL;
struct resource *reg, *alt;
int mmio = 0;
- struct device_node *dn = dev->device_node;
+ struct device_node *dn = dev->of_node;
u32 ioport_shift = 0;
int dataif_be = 0;
void (*reset)(int) = NULL;
@@ -157,8 +144,9 @@ static __maybe_unused struct of_device_id platform_ide_dt_ids[] = {
/* sentinel */
}
};
+MODULE_DEVICE_TABLE(of, platform_ide_dt_ids);
-static struct driver_d platform_ide_driver = {
+static struct driver platform_ide_driver = {
.name = "ide_intf",
.probe = platform_ide_probe,
.of_compatible = DRV_OF_COMPAT(platform_ide_dt_ids),
diff --git a/drivers/ata/pata-imx.c b/drivers/ata/pata-imx.c
index 4f75048c12..e10babd1bb 100644
--- a/drivers/ata/pata-imx.c
+++ b/drivers/ata/pata-imx.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2011 Juergen Beisert, Pengutronix
* Copyright (C) 2012 Sascha Hauer, Pengutronix
@@ -7,19 +8,6 @@
* Based on pata_pcmcia:
* Copyright 2005-2006 Red Hat Inc, all rights reserved.
*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#include <common.h>
@@ -144,14 +132,14 @@ static void imx_pata_setup_port(void *reg_base, void *alt_base,
}
}
-static int pata_imx_detect(struct device_d *dev)
+static int pata_imx_detect(struct device *dev)
{
struct ide_port *ide = dev->priv;
return ata_port_detect(&ide->port);
}
-static int imx_pata_probe(struct device_d *dev)
+static int imx_pata_probe(struct device *dev)
{
struct resource *iores;
struct ide_port *ide;
@@ -183,7 +171,7 @@ static int imx_pata_probe(struct device_d *dev)
ide->port.dev = dev;
- ide->port.devname = xstrdup(of_alias_get(dev->device_node));
+ ide->port.devname = xstrdup(of_alias_get(dev->of_node));
dev->priv = ide;
dev->detect = pata_imx_detect;
@@ -213,8 +201,9 @@ static __maybe_unused struct of_device_id imx_pata_dt_ids[] = {
/* sentinel */
},
};
+MODULE_DEVICE_TABLE(of, imx_pata_dt_ids);
-static struct driver_d imx_pata_driver = {
+static struct driver imx_pata_driver = {
.name = "imx-pata",
.probe = imx_pata_probe,
.of_compatible = DRV_OF_COMPAT(imx_pata_dt_ids),
diff --git a/drivers/ata/sata-imx.c b/drivers/ata/sata-imx.c
index 7b8036bbf3..5bcbfca5b5 100644
--- a/drivers/ata/sata-imx.c
+++ b/drivers/ata/sata-imx.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-only
#include <common.h>
#include <ata_drive.h>
#include <io.h>
@@ -9,8 +10,8 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <malloc.h>
-#include <mach/imx53-regs.h>
-#include <mach/imx6-regs.h>
+#include <mach/imx/imx53-regs.h>
+#include <mach/imx/imx6-regs.h>
#include <mfd/imx6q-iomuxc-gpr.h>
#include "ahci.h"
@@ -82,7 +83,7 @@ static int imx_sata_init_1ms(struct imx_ahci *imx_ahci)
return 0;
}
-static int imx_sata_probe(struct device_d *dev)
+static int imx_sata_probe(struct device *dev)
{
struct resource *iores;
struct imx_ahci *imx_ahci;
@@ -157,8 +158,9 @@ static __maybe_unused struct of_device_id imx_sata_dt_ids[] = {
/* sentinel */
}
};
+MODULE_DEVICE_TABLE(of, imx_sata_dt_ids);
-static struct driver_d imx_sata_driver = {
+static struct driver imx_sata_driver = {
.name = "imx-sata",
.probe = imx_sata_probe,
.id_table = imx_sata_ids,
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 22b29d08a5..f92d311c4a 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-only
#include <common.h>
#include <clock.h>
#include <driver.h>
@@ -32,15 +33,22 @@ static void ata_ioports_init(struct ata_ioports *io,
/* io->alt_dev_addr is unused */
}
-#define REG_WINDOW_CONTROL(n) ((n) * 0x10 + 0x30)
-#define REG_WINDOW_BASE(n) ((n) * 0x10 + 0x34)
+#define REG_WINDOW_CONTROL(n) ((n) * 0x10 + 0x30)
+#define REG_WINDOW_BASE(n) ((n) * 0x10 + 0x34)
-#define REG_EDMA_COMMAND(n) ((n) * 0x2000 + 0x2028)
+#define REG_EDMA_COMMAND(n) ((n) * 0x2000 + 0x2028)
+#define EDMA_EN (1 << 0) /* enable EDMA */
+#define EDMA_DS (1 << 1) /* disable EDMA; self-negated */
#define REG_EDMA_COMMAND__EATARST 0x00000004
-
-#define REG_ATA_BASE 0x2100
-#define REG_SSTATUS(n) ((n) * 0x2000 + 0x2300)
-#define REG_SCONTROL(n) ((n) * 0x2000 + 0x2308)
+#define REG_EDMA_IORDY_TMOUT(n) ((n) * 0x2000 + 0x2034)
+#define REG_SATA_IFCFG(n) ((n) * 0x2000 + 0x2050)
+#define REG_SATA_IFCFG_GEN2EN (1 << 7)
+
+#define REG_ATA_BASE 0x2100
+#define REG_SSTATUS(n) ((n) * 0x2000 + 0x2300)
+#define REG_SERROR(n) ((n) * 0x2000 + 0x2304)
+#define REG_SERROR_MASK 0x03fe0000
+#define REG_SCONTROL(n) ((n) * 0x2000 + 0x2308)
#define REG_SCONTROL__DET 0x0000000f
#define REG_SCONTROL__DET__INIT 0x00000001
#define REG_SCONTROL__DET__PHYOK 0x00000002
@@ -48,13 +56,49 @@ static void ata_ioports_init(struct ata_ioports *io,
#define REG_SCONTROL__IPM__PARTIAL 0x00000100
#define REG_SCONTROL__IPM__SLUMBER 0x00000200
-static int mv_sata_probe(struct device_d *dev)
+#define PHY_MODE3 0x310
+#define PHY_MODE4 0x314 /* requires read-after-write */
+#define PHY_MODE9_GEN2 0x398
+#define PHY_MODE9_GEN1 0x39c
+
+static void mv_soc_65n_phy_errata(void __iomem *base)
+{
+ u32 reg;
+
+ reg = readl(base + PHY_MODE3);
+ reg &= ~(0x3 << 27); /* SELMUPF (bits 28:27) to 1 */
+ reg |= (0x1 << 27);
+ reg &= ~(0x3 << 29); /* SELMUPI (bits 30:29) to 1 */
+ reg |= (0x1 << 29);
+ writel(reg, base + PHY_MODE3);
+
+ reg = readl(base + PHY_MODE4);
+ reg &= ~0x1; /* SATU_OD8 (bit 0) to 0, reserved bit 16 must be set */
+ reg |= (0x1 << 16);
+ writel(reg, base + PHY_MODE4);
+
+ reg = readl(base + PHY_MODE9_GEN2);
+ reg &= ~0xf; /* TXAMP[3:0] (bits 3:0) to 8 */
+ reg |= 0x8;
+ reg &= ~(0x1 << 14); /* TXAMP[4] (bit 14) to 0 */
+ writel(reg, base + PHY_MODE9_GEN2);
+
+ reg = readl(base + PHY_MODE9_GEN1);
+ reg &= ~0xf; /* TXAMP[3:0] (bits 3:0) to 8 */
+ reg |= 0x8;
+ reg &= ~(0x1 << 14); /* TXAMP[4] (bit 14) to 0 */
+ writel(reg, base + PHY_MODE9_GEN1);
+}
+
+static int mv_sata_probe(struct device *dev)
{
struct resource *iores;
void __iomem *base;
struct ide_port *ide;
+ u32 try_again = 0;
u32 scontrol;
int ret, i;
+ u32 tmp;
iores = dev_request_mem_resource(dev, 0);
if (IS_ERR(iores)) {
@@ -73,6 +117,31 @@ static int mv_sata_probe(struct device_d *dev)
writel(0x7fff0e01, base + REG_WINDOW_CONTROL(0));
writel(0, base + REG_WINDOW_BASE(0));
+again:
+ /* Clear SError */
+ writel(0x0, base + REG_SERROR(0));
+ /* disable EDMA */
+ writel(EDMA_DS, base + REG_EDMA_COMMAND(0));
+ /* Wait for the chip to confirm eDMA is off. */
+ ret = wait_on_timeout(10 * MSECOND,
+ (readl(base + REG_EDMA_COMMAND(0)) & EDMA_EN) == 0);
+ if (ret) {
+ dev_err(dev, "Failed to wait for eDMA off (sstatus=0x%08x)\n",
+ readl(base + REG_SSTATUS(0)));
+ return ret;
+ }
+
+ /* increase IORdy signal timeout */
+ writel(0x800, base + REG_EDMA_IORDY_TMOUT(0));
+ /* set GEN2i Speed */
+ tmp = readl(base + REG_SATA_IFCFG(0));
+ tmp |= REG_SATA_IFCFG_GEN2EN;
+ writel(tmp, base + REG_SATA_IFCFG(0));
+
+ mv_soc_65n_phy_errata(base);
+
+ /* strobe for hard-reset */
+ writel(REG_EDMA_COMMAND__EATARST, base + REG_EDMA_COMMAND(0));
writel(REG_EDMA_COMMAND__EATARST, base + REG_EDMA_COMMAND(0));
udelay(25);
writel(0x0, base + REG_EDMA_COMMAND(0));
@@ -103,10 +172,39 @@ static int mv_sata_probe(struct device_d *dev)
dev->priv = ide;
+ /* enable EDMA */
+ writel(EDMA_EN, base + REG_EDMA_COMMAND(0));
+
ret = ide_port_register(ide);
if (ret)
free(ide);
+ /*
+ * Under most conditions the above is enough and works as expected.
+ * With some specific hardware combinations, the setup fails however
+ * leading to an unusable SATA drive. From the error status bits it
+ * was not obvious what exactly went wrong.
+ * The ARMADA-XP datasheet advices to hard-reset the SATA core and
+ * drive and try again.
+ * When this happens, just try again multiple times, to give the drive
+ * some time to reach a stable state. If after 5 (randomly chosen) tries,
+ * the drive still doesn't work, just give up on it.
+ */
+ tmp = readl(base + REG_SERROR(0));
+ if (tmp & REG_SERROR_MASK) {
+ try_again++;
+ if (try_again > 5)
+ return -ENODEV;
+ dev_dbg(dev, "PHY layer error. Try again. (serror=0x%08x)\n", tmp);
+ if (ide->port.initialized) {
+ blockdevice_unregister(&ide->port.blk);
+ unregister_device(&ide->port.class_dev);
+ }
+
+ mdelay(100);
+ goto again;
+ }
+
return ret;
}
@@ -117,8 +215,9 @@ static const struct of_device_id mv_sata_dt_ids[] = {
/* sentinel */
}
};
+MODULE_DEVICE_TABLE(of, mv_sata_dt_ids);
-static struct driver_d mv_sata_driver = {
+static struct driver mv_sata_driver = {
.name = "mv_sata",
.probe = mv_sata_probe,
.of_compatible = mv_sata_dt_ids,
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-01 11:35:06 +0000