diff options
Diffstat (limited to 'drivers/clk/tegra/clk-divider.c')
| -rw-r--r-- | drivers/clk/tegra/clk-divider.c | 38 |
1 files changed, 15 insertions, 23 deletions
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 0ddd64ecd6..f1a913d983 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -1,25 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de> * * Based on the Linux Tegra clock code - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include <common.h> #include <io.h> #include <malloc.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <linux/clk.h> #include <linux/err.h> @@ -57,21 +46,22 @@ static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate, if (flags & TEGRA_DIVIDER_INT) divider_ux1 *= mul; - divider_ux1 -= mul; - - if (divider_ux1 < 0) + if (divider_ux1 < mul) return 0; + divider_ux1 -= mul; + if (divider_ux1 > get_max_div(divider)) return -EINVAL; return divider_ux1; } -static unsigned long clk_frac_div_recalc_rate(struct clk *hw, +static unsigned long clk_frac_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { - struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); + struct clk *clk = clk_hw_to_clk(hw); + struct tegra_clk_frac_div *divider = to_clk_frac_div(clk); u32 reg; int div, mul; u64 rate = parent_rate; @@ -89,10 +79,11 @@ static unsigned long clk_frac_div_recalc_rate(struct clk *hw, return rate; } -static long clk_frac_div_round_rate(struct clk *hw, unsigned long rate, +static long clk_frac_div_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { - struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); + struct clk *clk = clk_hw_to_clk(hw); + struct tegra_clk_frac_div *divider = to_clk_frac_div(clk); int div, mul; unsigned long output_rate = *prate; @@ -108,10 +99,11 @@ static long clk_frac_div_round_rate(struct clk *hw, unsigned long rate, return DIV_ROUND_UP(output_rate * mul, div + mul); } -static int clk_frac_div_set_rate(struct clk *hw, unsigned long rate, +static int clk_frac_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { - struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); + struct clk *clk = clk_hw_to_clk(hw); + struct tegra_clk_frac_div *divider = to_clk_frac_div(clk); int div; u32 val; @@ -191,7 +183,7 @@ struct clk *tegra_clk_register_divider(const char *name, reg, flags, clk_divider_flags, shift, width, frac_width)); - ret = clk_register(÷r->hw); + ret = bclk_register(÷r->hw); if (ret) { kfree(divider); return ERR_PTR(ret); |