diff options
Diffstat (limited to 'drivers/mfd')
| -rw-r--r-- | drivers/mfd/Kconfig | 15 | ||||
| -rw-r--r-- | drivers/mfd/Makefile | 3 | ||||
| -rw-r--r-- | drivers/mfd/da9063.c | 139 | ||||
| -rw-r--r-- | drivers/mfd/fintek-superio.c | 122 | ||||
| -rw-r--r-- | drivers/mfd/smsc-superio.c | 115 | ||||
| -rw-r--r-- | drivers/mfd/superio.c | 98 |
6 files changed, 492 insertions, 0 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 7d924cfca1..f4cc71ef0e 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -67,4 +67,19 @@ config MFD_STPMIC1 help Select this to support communication with the STPMIC1. +config MFD_SUPERIO + bool + +config FINTEK_SUPERIO + bool "Fintek Super I/O chip" + select MFD_SUPERIO + help + Select this to probe for IO-port connected Fintek Super I/O chips. + +config SMSC_SUPERIO + bool "SMSC Super I/O chip" + select MFD_SUPERIO + help + Select this to probe for IO-port connected SMSC Super I/O chips. + endmenu diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 16a74abd77..0c24493e3d 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -12,3 +12,6 @@ obj-$(CONFIG_MFD_TWL4030) += twl4030.o obj-$(CONFIG_MFD_TWL6030) += twl6030.o obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o obj-$(CONFIG_MFD_STPMIC1) += stpmic1.o +obj-$(CONFIG_MFD_SUPERIO) += superio.o +obj-$(CONFIG_FINTEK_SUPERIO) += fintek-superio.o +obj-$(CONFIG_SMSC_SUPERIO) += smsc-superio.o diff --git a/drivers/mfd/da9063.c b/drivers/mfd/da9063.c index 5f77e5935b..b61e764876 100644 --- a/drivers/mfd/da9063.c +++ b/drivers/mfd/da9063.c @@ -15,8 +15,10 @@ #include <common.h> #include <driver.h> +#include <gpio.h> #include <restart.h> #include <i2c/i2c.h> +#include <linux/bitops.h> #include <malloc.h> #include <notifier.h> #include <reset_source.h> @@ -25,6 +27,7 @@ struct da9063 { struct restart_handler restart; struct watchdog wd; + struct gpio_chip gpio; struct i2c_client *client; /* dummy client for accessing bank #1 */ struct i2c_client *client1; @@ -61,6 +64,19 @@ struct da9063 { /* DA9063_REG_CONTROL_I (addr=0x10e) */ #define DA9062_WATCHDOG_SD BIT(3) +#define DA9062AA_STATUS_B 0x002 +#define DA9062AA_GPIO_0_1 0x015 +#define DA9062AA_GPIO_MODE0_4 0x01D + +/* DA9062AA_GPIO_0_1 (addr=0x015) */ +#define DA9062AA_GPIO0_PIN_MASK 0x03 + +#define DA9062_PIN_SHIFT(offset) (4 * (offset % 2)) +#define DA9062_PIN_ALTERNATE 0x00 /* gpio alternate mode */ +#define DA9062_PIN_GPI 0x01 /* gpio in */ +#define DA9062_PIN_GPO_OD 0x02 /* gpio out open-drain */ +#define DA9062_PIN_GPO_PP 0x03 /* gpio out push-pull */ + struct da906x_device_data { int (*init)(struct da9063 *priv); }; @@ -104,6 +120,118 @@ static int da906x_reg_update(struct da9063 *priv, unsigned int reg, return 0; } +static inline struct da9063 *to_da9063(struct gpio_chip *chip) +{ + return container_of(chip, struct da9063, gpio); +} + +static int da9063_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +{ + struct da9063 *priv = to_da9063(chip); + u8 mask, mode; + + mode = DA9062_PIN_GPI << DA9062_PIN_SHIFT(offset); + mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset); + + return da906x_reg_update(priv, DA9062AA_GPIO_0_1 + (offset >> 1), + mask, mode); +} + +static int da9063_gpio_direction_output(struct gpio_chip *chip, unsigned offset, + int value) +{ + struct da9063 *priv = to_da9063(chip); + + return da906x_reg_update(priv, DA9062AA_GPIO_MODE0_4, BIT(offset), + value << offset); +} + +static int da9063_gpio_get_pin_mode(struct da9063 *priv, unsigned offset) +{ + int ret; + u8 val; + + ret = i2c_read_reg(priv->client, DA9062AA_GPIO_0_1 + (offset >> 1), + &val, 1); + if (ret < 0) + return ret; + + val >>= DA9062_PIN_SHIFT(offset); + val &= DA9062AA_GPIO0_PIN_MASK; + + return val; +} + +static int da9063_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct da9063 *priv = to_da9063(chip); + int gpio_dir; + int ret; + u8 val; + + gpio_dir = da9063_gpio_get_pin_mode(priv, offset); + if (gpio_dir < 0) + return gpio_dir; + + switch (gpio_dir) { + case DA9062_PIN_ALTERNATE: + return -ENOTSUPP; + case DA9062_PIN_GPI: + ret = i2c_read_reg(priv->client, DA9062AA_STATUS_B, &val, 1); + if (ret < 0) + return ret; + break; + case DA9062_PIN_GPO_OD: + /* falltrough */ + case DA9062_PIN_GPO_PP: + ret = i2c_read_reg(priv->client, DA9062AA_GPIO_MODE0_4, &val, 1); + if (ret < 0) + return ret; + } + + return val & BIT(offset); +} + +static int da9063_gpio_get_direction(struct gpio_chip *chip, unsigned offset) +{ + struct da9063 *priv = to_da9063(chip); + int gpio_dir; + + gpio_dir = da9063_gpio_get_pin_mode(priv, offset); + if (gpio_dir < 0) + return gpio_dir; + + switch (gpio_dir) { + case DA9062_PIN_ALTERNATE: + return -ENOTSUPP; + case DA9062_PIN_GPI: + return 1; + case DA9062_PIN_GPO_OD: + /* falltrough */ + case DA9062_PIN_GPO_PP: + return 0; + } + + return -EINVAL; +} + +static void da9063_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + struct da9063 *priv = to_da9063(chip); + + da906x_reg_update(priv, DA9062AA_GPIO_MODE0_4, BIT(offset), + value << offset); + +} + +static struct gpio_ops da9063_gpio_ops = { + .direction_input = da9063_gpio_direction_input, + .direction_output = da9063_gpio_direction_output, + .get_direction = da9063_gpio_get_direction, + .get = da9063_gpio_get, + .set = da9063_gpio_set, +}; + static int da9063_watchdog_ping(struct da9063 *priv) { int ret; @@ -262,6 +390,17 @@ static int da9063_probe(struct device_d *dev) restart_handler_register(&priv->restart); + priv->gpio.base = -1; + priv->gpio.ngpio = 5; + priv->gpio.ops = &da9063_gpio_ops; + priv->gpio.dev = dev; + ret = gpiochip_add(&priv->gpio); + if (ret) + goto on_error; + + if (IS_ENABLED(CONFIG_OFDEVICE) && dev->device_node) + return of_platform_populate(dev->device_node, NULL, dev); + return 0; on_error: diff --git a/drivers/mfd/fintek-superio.c b/drivers/mfd/fintek-superio.c new file mode 100644 index 0000000000..60785bce27 --- /dev/null +++ b/drivers/mfd/fintek-superio.c @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix + */ + +#define pr_fmt(fmt) "fintek-superio: " fmt + +#include <superio.h> +#include <init.h> +#include <asm/io.h> +#include <common.h> + +#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ +#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ + +#define SIO_REG_LDSEL 0x07 /* Logical device select */ + +#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ + +#define SIO_F71808_ID 0x0901 +#define SIO_F71858_ID 0x0507 +#define SIO_F71862_ID 0x0601 +#define SIO_F71868_ID 0x1106 +#define SIO_F71869_ID 0x0814 +#define SIO_F71869A_ID 0x1007 +#define SIO_F71882_ID 0x0541 +#define SIO_F71889_ID 0x0723 +#define SIO_F71889A_ID 0x1005 +#define SIO_F81865_ID 0x0704 +#define SIO_F81866_ID 0x1010 + +static void superio_enter(u16 sioaddr) +{ + /* according to the datasheet the key must be sent twice! */ + outb(SIO_UNLOCK_KEY, sioaddr); + outb(SIO_UNLOCK_KEY, sioaddr); +} + +static void superio_exit(u16 sioaddr) +{ + outb(SIO_LOCK_KEY, sioaddr); +} + +static void fintek_superio_find(u16 sioaddr) +{ + struct superio_chip *chip; + u16 vid; + + superio_enter(sioaddr); + + vid = superio_inw(sioaddr, SIO_REG_MANID); + if (vid != SIO_FINTEK_ID) { + pr_debug("Not a Fintek device (port=0x%02x, vid=0x%04x)\n", + sioaddr, vid); + return; + } + + chip = xzalloc(sizeof(*chip)); + + chip->devid = superio_inw(sioaddr, SIO_REG_DEVID); + chip->vid = vid; + chip->sioaddr = sioaddr; + chip->enter = superio_enter; + chip->exit = superio_exit; + + superio_chip_add(chip); + + switch (chip->devid) { + case SIO_F71808_ID: + superio_func_add(chip, "f71808fg_wdt"); + break; + case SIO_F71862_ID: + superio_func_add(chip, "f71862fg_wdt"); + break; + case SIO_F71868_ID: + superio_func_add(chip, "f71868_wdt"); + break; + case SIO_F71869_ID: + superio_func_add(chip, "f71869_wdt"); + superio_func_add(chip, "gpio-f71869"); + break; + case SIO_F71869A_ID: + superio_func_add(chip, "f71869_wdt"); + superio_func_add(chip, "gpio-f71869a"); + break; + case SIO_F71882_ID: + superio_func_add(chip, "f71882fg_wdt"); + superio_func_add(chip, "gpio-f71882fg"); + break; + case SIO_F71889_ID: + superio_func_add(chip, "f71889fg_wdt"); + superio_func_add(chip, "gpio-f71889f"); + break; + case SIO_F71889A_ID: + superio_func_add(chip, "f71889fg_wdt"); + superio_func_add(chip, "gpio-f71889a"); + break; + case SIO_F71858_ID: + /* Confirmed (by datasheet) not to have a watchdog. */ + break; + case SIO_F81865_ID: + superio_func_add(chip, "f81865_wdt"); + break; + case SIO_F81866_ID: + superio_func_add(chip, "f81866_wdt"); + superio_func_add(chip, "gpio-f81866"); + break; + default: + pr_info("Unrecognized Fintek device: 0x%04x\n", chip->devid); + } + + superio_exit(sioaddr); +} + +static int fintek_superio_detect(void) +{ + fintek_superio_find(0x2e); + fintek_superio_find(0x4e); + + return 0; +} +coredevice_initcall(fintek_superio_detect); diff --git a/drivers/mfd/smsc-superio.c b/drivers/mfd/smsc-superio.c new file mode 100644 index 0000000000..349c878cef --- /dev/null +++ b/drivers/mfd/smsc-superio.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix + */ + +#define pr_fmt(fmt) "smsc-superio: " fmt + +#include <superio.h> +#include <init.h> +#include <asm/io.h> +#include <common.h> + +#define SIO_UNLOCK_KEY 0x55 /* Key to enable Super-I/O */ +#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ + +#define SMSC_ID 0x10b8 /* Standard Microsystems Corp PCI ID */ + +static void superio_enter(u16 sioaddr) +{ + outb(SIO_UNLOCK_KEY, sioaddr); + mdelay(1); + outb(SIO_UNLOCK_KEY, sioaddr); +} + +static void superio_exit(u16 sioaddr) +{ + outb(SIO_LOCK_KEY, sioaddr); +} + +static void smsc_superio_find(u16 sioaddr, u16 id_reg) +{ + struct superio_chip *chip; + u16 devid; + + superio_enter(sioaddr); + + devid = superio_inw(sioaddr, id_reg); + switch(devid >> 8) { + case 0x02: + case 0x03: + case 0x07: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0e: + case 0x14: + case 0x30: + case 0x40: + case 0x42: + case 0x43: + case 0x44: + case 0x46: + case 0x47: + case 0x4c: + case 0x4d: + case 0x51: + case 0x52: + case 0x54: + case 0x56: + case 0x57: + case 0x59: + case 0x5d: + case 0x5f: + case 0x60: + case 0x62: + case 0x67: + case 0x6b: + case 0x6e: + case 0x6f: + case 0x74: + case 0x76: + case 0x77: + case 0x78: + case 0x79: + case 0x7a: + case 0x7c: + case 0x7d: + case 0x7f: + case 0x81: + case 0x83: + case 0x85: + case 0x86: + case 0x89: + case 0x8c: + case 0x90: + break; + default: + pr_debug("Not a SMSC device (port=0x%02x, devid=0x%04x)\n", + sioaddr, devid); + return; + } + + chip = xzalloc(sizeof(*chip)); + + chip->devid = devid; + chip->vid = SMSC_ID; + chip->sioaddr = sioaddr; + chip->enter = superio_enter; + chip->exit = superio_exit; + + superio_chip_add(chip); + + superio_exit(sioaddr); +} + +static int smsc_superio_detect(void) +{ + u16 ports[] = { 0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370 }; + + for (int i = 0; i < ARRAY_SIZE(ports); i++) + smsc_superio_find(ports[i], SIO_REG_DEVID); + + return 0; +} +coredevice_initcall(smsc_superio_detect); diff --git a/drivers/mfd/superio.c b/drivers/mfd/superio.c new file mode 100644 index 0000000000..0f08d56cb3 --- /dev/null +++ b/drivers/mfd/superio.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix + */ + +#define pr_fmt(fmt) "superio: " fmt + +#include <common.h> +#include <superio.h> +#include <regmap.h> + +struct device_d *superio_func_add(struct superio_chip *siochip, const char *name) +{ + struct device_d *dev; + int ret; + + dev = device_alloc(name, DEVICE_ID_DYNAMIC); + dev->parent = siochip->dev; + + + ret = platform_device_register(dev); + if (ret) + return NULL; + + return dev; +} +EXPORT_SYMBOL(superio_func_add) + +static int superio_reg_read(void *ctx, unsigned int reg, unsigned int *val) +{ + struct superio_chip *siochip = ctx; + + siochip->enter(siochip->sioaddr); + + *val = superio_inb(siochip->sioaddr, reg); + + siochip->exit(siochip->sioaddr); + + return 0; +} + +static int superio_reg_write(void *ctx, unsigned int reg, unsigned int val) +{ + struct superio_chip *siochip = ctx; + + siochip->enter(siochip->sioaddr); + + superio_outb(siochip->sioaddr, reg, val); + + siochip->exit(siochip->sioaddr); + + return 0; +} + +static struct regmap_bus superio_regmap_bus = { + .reg_write = superio_reg_write, + .reg_read = superio_reg_read, +}; + +static struct regmap_config superio_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, + .max_register = 0xff, +}; + +void superio_chip_add(struct superio_chip *siochip) +{ + struct regmap *regmap; + char *chipname; + char str[5]; + int ret; + + chipname = xasprintf("superio-%04x:%04x@%02x", + siochip->vid, siochip->devid, siochip->sioaddr); + siochip->dev = add_generic_device(chipname, DEVICE_ID_SINGLE, NULL, + siochip->sioaddr, 2, IORESOURCE_IO, + NULL); + + siochip->dev->priv = siochip; + + sprintf(str, "%04x", siochip->vid); + dev_add_param_fixed(siochip->dev, "vendor", str); + sprintf(str, "%04x", siochip->devid); + dev_add_param_fixed(siochip->dev, "device", str); + + regmap = regmap_init(siochip->dev, &superio_regmap_bus, siochip, + &superio_regmap_config); + if (IS_ERR(regmap)) + pr_warn("creating %s regmap failed: %s\n", + chipname, strerror(-PTR_ERR(regmap))); + + ret = regmap_register_cdev(regmap, chipname); + if (ret) + pr_warn("registering %s regmap cdev failed: %s\n", + chipname, strerror(-ret)); +} +EXPORT_SYMBOL(superio_chip_add) |