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-rw-r--r--dts/Bindings/arm/coresight-cpu-debug.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/dts/Bindings/arm/coresight-cpu-debug.txt b/dts/Bindings/arm/coresight-cpu-debug.txt
index 298291211e..f1de3247c1 100644
--- a/dts/Bindings/arm/coresight-cpu-debug.txt
+++ b/dts/Bindings/arm/coresight-cpu-debug.txt
@@ -26,8 +26,8 @@ Required properties:
processor core is clocked by the internal CPU clock, so it
is enabled with CPU clock by default.
-- cpu : the CPU phandle the debug module is affined to. When omitted
- the module is considered to belong to CPU0.
+- cpu : the CPU phandle the debug module is affined to. Do not assume it
+ to default to CPU0 if omitted.
Optional properties: