diff options
Diffstat (limited to 'dts/Bindings/arm')
140 files changed, 3042 insertions, 2942 deletions
diff --git a/dts/Bindings/arm/altera.yaml b/dts/Bindings/arm/altera.yaml index 3eee03aa93..8c75754554 100644 --- a/dts/Bindings/arm/altera.yaml +++ b/dts/Bindings/arm/altera.yaml @@ -31,6 +31,7 @@ properties: - description: Mercury+ AA1 boards items: - enum: + - enclustra,mercury-pe1 - google,chameleon-v3 - const: enclustra,mercury-aa1 - const: altr,socfpga-arria10 diff --git a/dts/Bindings/arm/amd,pensando.yaml b/dts/Bindings/arm/amd,pensando.yaml new file mode 100644 index 0000000000..e5c2591834 --- /dev/null +++ b/dts/Bindings/arm/amd,pensando.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/amd,pensando.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD Pensando SoC Platforms + +maintainers: + - Brad Larson <blarson@amd.com> + +properties: + $nodename: + const: "/" + compatible: + oneOf: + + - description: Boards with Pensando Elba SoC + items: + - enum: + - amd,pensando-elba-ortano + - const: amd,pensando-elba + +additionalProperties: true + +... diff --git a/dts/Bindings/arm/amlogic.yaml b/dts/Bindings/arm/amlogic.yaml index 9fda2436c6..949537cea6 100644 --- a/dts/Bindings/arm/amlogic.yaml +++ b/dts/Bindings/arm/amlogic.yaml @@ -4,22 +4,14 @@ $id: http://devicetree.org/schemas/arm/amlogic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Amlogic MesonX +title: Amlogic SoC based Platforms maintainers: + - Neil Armstrong <neil.armstrong@linaro.org> + - Martin Blumenstingl <martin.blumenstingl@googlemail.com> + - Jerome Brunet <jbrunet@baylibre.com> - Kevin Hilman <khilman@baylibre.com> -description: |+ - Work in progress statement: - - Device tree files and bindings applying to Amlogic SoCs and boards are - considered "unstable". Any Amlogic device tree binding may change at - any time. Be sure to use a device tree binary and a kernel image - generated from the same source tree. - - Please refer to Documentation/devicetree/bindings/ABI.rst for a definition of a - stable binding/ABI. - properties: $nodename: const: '/' @@ -146,6 +138,7 @@ properties: - enum: - amediatech,x96-max - amlogic,u200 + - freebox,fbx8am - radxa,zero - seirobotics,sei510 - const: amlogic,g12a @@ -153,7 +146,18 @@ properties: - description: Boards with the Amlogic Meson G12B A311D SoC items: - enum: + - bananapi,bpi-m2s - khadas,vim3 + - libretech,aml-a311d-cc + - radxa,zero2 + - const: amlogic,a311d + - const: amlogic,g12b + + - description: Boards using the BPI-CM4 module with Amlogic Meson G12B A311D SoC + items: + - enum: + - bananapi,bpi-cm4io + - const: bananapi,bpi-cm4 - const: amlogic,a311d - const: amlogic,g12b @@ -163,7 +167,10 @@ properties: - azw,gsking-x - azw,gtking - azw,gtking-pro + - bananapi,bpi-m2s + - hardkernel,odroid-go-ultra - hardkernel,odroid-n2 + - hardkernel,odroid-n2l - hardkernel,odroid-n2-plus - khadas,vim3 - ugoos,am6 @@ -175,6 +182,7 @@ properties: - enum: - amediatech,x96-air - amediatech,x96-air-gbit + - bananapi,bpi-m2-pro - bananapi,bpi-m5 - cyx,a95xf3-air - cyx,a95xf3-air-gbit @@ -182,6 +190,7 @@ properties: - hardkernel,odroid-hc4 - haochuangyi,h96-max - khadas,vim3l + - libretech,aml-s905d3-cc - seirobotics,sei610 - const: amlogic,sm1 @@ -189,14 +198,30 @@ properties: items: - enum: - amlogic,ad401 + - amlogic,ad402 - const: amlogic,a1 + - description: Boards with the Amlogic C3 C302X/C308L SoC + items: + - enum: + - amlogic,aw409 + - amlogic,aw419 + - const: amlogic,c3 + - description: Boards with the Amlogic Meson S4 S805X2 SoC items: - enum: - amlogic,aq222 - const: amlogic,s4 + - description: Boards with the Amlogic T7 A311D2 SoC + items: + - enum: + - amlogic,an400 + - khadas,vim4 + - const: amlogic,a311d2 + - const: amlogic,t7 + additionalProperties: true ... diff --git a/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml b/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml index 1748f1605c..7dff32f373 100644 --- a/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml +++ b/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml @@ -2,8 +2,8 @@ # Copyright 2019 BayLibre, SAS %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic Meson Firmware registers Interface diff --git a/dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml index eee7cda9f9..09b27e98d4 100644 --- a/dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml +++ b/dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface diff --git a/dts/Bindings/arm/apple.yaml b/dts/Bindings/arm/apple.yaml index 7262f3c098..883fd67e37 100644 --- a/dts/Bindings/arm/apple.yaml +++ b/dts/Bindings/arm/apple.yaml @@ -19,12 +19,20 @@ description: | - MacBook Air (M1, 2020) - iMac (24-inch, M1, 2021) - And devices based on the "M1 Pro" and "M1 Max" SoCs: + Devices based on the "M2" SoC: + + - MacBook Air (M2, 2022) + - MacBook Pro (13-inch, M2, 2022) + - Mac mini (M2, 2023) + + And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: - MacBook Pro (14-inch, M1 Pro, 2021) - MacBook Pro (14-inch, M1 Max, 2021) - MacBook Pro (16-inch, M1 Pro, 2021) - MacBook Pro (16-inch, M1 Max, 2021) + - Mac Studio (M1 Max, 2022) + - Mac Studio (M1 Ultra, 2022) The compatible property should follow this format: @@ -67,6 +75,16 @@ properties: - apple,j457 # iMac (24-inch, 2x USB-C, M1, 2021) - const: apple,t8103 - const: apple,arm-platform + + - description: Apple M2 SoC based platforms + items: + - enum: + - apple,j413 # MacBook Air (M2, 2022) + - apple,j473 # Mac mini (M2, 2023) + - apple,j493 # MacBook Pro (13-inch, M2, 2022) + - const: apple,t8112 + - const: apple,arm-platform + - description: Apple M1 Pro SoC based platforms items: - enum: @@ -74,14 +92,23 @@ properties: - apple,j316s # MacBook Pro (16-inch, M1 Pro, 2021) - const: apple,t6000 - const: apple,arm-platform + - description: Apple M1 Max SoC based platforms items: - enum: - apple,j314c # MacBook Pro (14-inch, M1 Max, 2021) - apple,j316c # MacBook Pro (16-inch, M1 Max, 2021) + - apple,j375c # Mac Studio (M1 Max, 2022) - const: apple,t6001 - const: apple,arm-platform + - description: Apple M1 Ultra SoC based platforms + items: + - enum: + - apple,j375d # Mac Studio (M1 Ultra, 2022) + - const: apple,t6002 + - const: apple,arm-platform + additionalProperties: true ... diff --git a/dts/Bindings/arm/apple/apple,pmgr.yaml b/dts/Bindings/arm/apple/apple,pmgr.yaml index 0dc957a56d..673277a7a2 100644 --- a/dts/Bindings/arm/apple/apple,pmgr.yaml +++ b/dts/Bindings/arm/apple/apple,pmgr.yaml @@ -23,6 +23,7 @@ properties: items: - enum: - apple,t8103-pmgr + - apple,t8112-pmgr - apple,t6000-pmgr - const: apple,pmgr - const: syscon diff --git a/dts/Bindings/arm/arm,coresight-cti.yaml b/dts/Bindings/arm/arm,coresight-cti.yaml index 0c5b875cb6..2d5545a2b4 100644 --- a/dts/Bindings/arm/arm,coresight-cti.yaml +++ b/dts/Bindings/arm/arm,coresight-cti.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause # Copyright 2019 Linaro Ltd. %YAML 1.2 --- @@ -92,11 +92,8 @@ properties: maxItems: 1 cpu: - $ref: /schemas/types.yaml#/definitions/phandle description: - Handle to cpu this device is associated with. This must appear in the - base cti node if compatible string arm,coresight-cti-v8-arch is used, - or may appear in a trig-conns child node when appropriate. + Handle to cpu this CTI is associated with. power-domains: maxItems: 1 @@ -113,12 +110,12 @@ properties: description: defines a phandle reference to an associated CoreSight trace device. When the associated trace device is enabled, then the respective CTI - will be enabled. Use in a trig-conns node, or in CTI base node when - compatible string arm,coresight-cti-v8-arch used. If the associated - device has not been registered then the node name will be stored as - the connection name for later resolution. If the associated device is - not a CoreSight device or not registered then the node name will remain - the connection name and automatic enabling will not occur. + will be enabled. Use in CTI base node when compatible string + arm,coresight-cti-v8-arch used. If the associated device has not been + registered then the node name will be stored as the connection name for + later resolution. If the associated device is not a CoreSight device or + not registered then the node name will remain the connection name and + automatic enabling will not occur. # size cells and address cells required if trig-conns node present. "#size-cells": @@ -130,6 +127,8 @@ properties: patternProperties: '^trig-conns@([0-9]+)$': type: object + additionalProperties: false + description: A trigger connections child node which describes the trigger signals between this CTI and another hardware device. This device may be a CPU, @@ -141,6 +140,21 @@ patternProperties: reg: maxItems: 1 + cpu: + description: + Handle to cpu this trigger connection is associated with. + + arm,cs-dev-assoc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + defines a phandle reference to an associated CoreSight trace device. + When the associated trace device is enabled, then the respective CTI + will be enabled. If the associated device has not been registered + then the node name will be stored as the connection name for later + resolution. If the associated device is not a CoreSight device or + not registered then the node name will remain the connection name + and automatic enabling will not occur. + arm,trig-in-sigs: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 1 @@ -287,7 +301,7 @@ examples: arm,trig-in-sigs = <0 1>; arm,trig-in-types = <PE_DBGTRIGGER PE_PMUIRQ>; - arm,trig-out-sigs=<0 1 2 >; + arm,trig-out-sigs = <0 1 2 >; arm,trig-out-types = <PE_EDBGREQ PE_DBGRESTART PE_CTIIRQ>; @@ -309,24 +323,24 @@ examples: trig-conns@0 { reg = <0>; - arm,trig-in-sigs=<0>; - arm,trig-in-types=<GEN_INTREQ>; - arm,trig-out-sigs=<0>; - arm,trig-out-types=<GEN_HALTREQ>; + arm,trig-in-sigs = <0>; + arm,trig-in-types = <GEN_INTREQ>; + arm,trig-out-sigs = <0>; + arm,trig-out-types = <GEN_HALTREQ>; arm,trig-conn-name = "sys_profiler"; }; trig-conns@1 { reg = <1>; - arm,trig-out-sigs=<2 3>; - arm,trig-out-types=<GEN_HALTREQ GEN_RESTARTREQ>; + arm,trig-out-sigs = <2 3>; + arm,trig-out-types = <GEN_HALTREQ GEN_RESTARTREQ>; arm,trig-conn-name = "watchdog"; }; trig-conns@2 { reg = <2>; - arm,trig-in-sigs=<1 6>; - arm,trig-in-types=<GEN_HALTREQ GEN_RESTARTREQ>; + arm,trig-in-sigs = <1 6>; + arm,trig-in-types = <GEN_HALTREQ GEN_RESTARTREQ>; arm,trig-conn-name = "g_counter"; }; }; diff --git a/dts/Bindings/arm/arm,coresight-dummy-sink.yaml b/dts/Bindings/arm/arm,coresight-dummy-sink.yaml new file mode 100644 index 0000000000..c960c8e0a9 --- /dev/null +++ b/dts/Bindings/arm/arm,coresight-dummy-sink.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Coresight Dummy sink component + +description: | + CoreSight components are compliant with the ARM CoreSight architecture + specification and can be connected in various topologies to suit a particular + SoCs tracing needs. These trace components can generally be classified as + sinks, links and sources. Trace data produced by one or more sources flows + through the intermediate links connecting the source to the currently selected + sink. + + The Coresight dummy sink component is for the specific coresight sink devices + kernel don't have permission to access or configure, e.g., CoreSight EUD on + Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based + debug and trace capabilities. For this device, a dummy driver is needed to + register it as Coresight sink device in kernel side, so that path can be + created in the driver. Then the trace flow would be transferred to EUD via + coresight link of AP processor. It provides Coresight API for operations on + dummy source devices, such as enabling and disabling them. It also provides + the Coresight dummy source paths for debugging. + + The primary use case of the coresight dummy sink is to build path in kernel + side for dummy sink component. + +maintainers: + - Mike Leach <mike.leach@linaro.org> + - Suzuki K Poulose <suzuki.poulose@arm.com> + - James Clark <james.clark@arm.com> + - Mao Jinlong <quic_jinlmao@quicinc.com> + - Hao Zhang <quic_hazha@quicinc.com> + +properties: + compatible: + enum: + - arm,coresight-dummy-sink + + in-ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port: + description: Input connection from the Coresight Trace bus to + dummy sink, such as Embedded USB debugger(EUD). + + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - in-ports + +additionalProperties: false + +examples: + # Minimum dummy sink definition. Dummy sink connect to coresight replicator. + - | + sink { + compatible = "arm,coresight-dummy-sink"; + + in-ports { + port { + eud_in_replicator_swao: endpoint { + remote-endpoint = <&replicator_swao_out_eud>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/arm/arm,coresight-dummy-source.yaml b/dts/Bindings/arm/arm,coresight-dummy-source.yaml new file mode 100644 index 0000000000..6745b4cc8f --- /dev/null +++ b/dts/Bindings/arm/arm,coresight-dummy-source.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Coresight Dummy source component + +description: | + CoreSight components are compliant with the ARM CoreSight architecture + specification and can be connected in various topologies to suit a particular + SoCs tracing needs. These trace components can generally be classified as + sinks, links and sources. Trace data produced by one or more sources flows + through the intermediate links connecting the source to the currently selected + sink. + + The Coresight dummy source component is for the specific coresight source + devices kernel don't have permission to access or configure. For some SOCs, + there would be Coresight source trace components on sub-processor which + are conneted to AP processor via debug bus. For these devices, a dummy driver + is needed to register them as Coresight source devices, so that paths can be + created in the driver. It provides Coresight API for operations on dummy + source devices, such as enabling and disabling them. It also provides the + Coresight dummy source paths for debugging. + + The primary use case of the coresight dummy source is to build path in kernel + side for dummy source component. + +maintainers: + - Mike Leach <mike.leach@linaro.org> + - Suzuki K Poulose <suzuki.poulose@arm.com> + - James Clark <james.clark@arm.com> + - Mao Jinlong <quic_jinlmao@quicinc.com> + - Hao Zhang <quic_hazha@quicinc.com> + +properties: + compatible: + enum: + - arm,coresight-dummy-source + + out-ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port: + description: Output connection from the source to Coresight + Trace bus. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - out-ports + +additionalProperties: false + +examples: + # Minimum dummy source definition. Dummy source connect to coresight funnel. + - | + source { + compatible = "arm,coresight-dummy-source"; + + out-ports { + port { + dummy_riscv_out_funnel_swao: endpoint { + remote-endpoint = <&funnel_swao_in_dummy_riscv>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/arm/arm,embedded-trace-extension.yaml b/dts/Bindings/arm/arm,embedded-trace-extension.yaml index 108460627d..f725e69409 100644 --- a/dts/Bindings/arm/arm,embedded-trace-extension.yaml +++ b/dts/Bindings/arm/arm,embedded-trace-extension.yaml @@ -1,9 +1,9 @@ -# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause # Copyright 2021, Arm Ltd %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM Embedded Trace Extensions diff --git a/dts/Bindings/arm/arm,integrator.yaml b/dts/Bindings/arm/arm,integrator.yaml index 98ff5698ae..1bdbd1b7ee 100644 --- a/dts/Bindings/arm/arm,integrator.yaml +++ b/dts/Bindings/arm/arm,integrator.yaml @@ -40,45 +40,6 @@ properties: items: - const: arm,integrator-sp - core-module@10000000: - type: object - description: the root node in the Integrator platforms must contain - a core module child node. They are always at physical address - 0x10000000 in all the Integrator variants. - properties: - compatible: - items: - - const: arm,core-module-integrator - - const: syscon - - const: simple-mfd - reg: - maxItems: 1 - - required: - - compatible - - reg - -patternProperties: - "^syscon@[0-9a-f]+$": - description: All Integrator boards must provide a system controller as a - node in the root of the device tree. - type: object - properties: - compatible: - items: - - enum: - - arm,integrator-ap-syscon - - arm,integrator-cp-syscon - - arm,integrator-sp-syscon - - const: syscon - reg: - maxItems: 1 - - required: - - compatible - - reg - - required: - compatible - core-module@10000000 diff --git a/dts/Bindings/arm/arm,realview.yaml b/dts/Bindings/arm/arm,realview.yaml index 8d3ed2e4ed..3c5f1688db 100644 --- a/dts/Bindings/arm/arm,realview.yaml +++ b/dts/Bindings/arm/arm,realview.yaml @@ -10,9 +10,9 @@ maintainers: - Linus Walleij <linus.walleij@linaro.org> description: |+ - The ARM RealView series of reference designs were built to explore the ARM - 11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to - the earlier CPUs such as TrustZone and multicore (MPCore). + The ARM RealView series of reference designs were built to explore the Arm11, + Cortex-A8, and Cortex-A9 CPUs. This included new features compared to the + earlier CPUs such as TrustZone and multicore (MPCore). properties: $nodename: @@ -75,43 +75,6 @@ properties: type: object description: All RealView boards must provide a syscon system controller node inside the soc node. - properties: - compatible: - oneOf: - - items: - - const: arm,realview-eb11mp-revb-syscon - - const: arm,realview-eb-syscon - - const: syscon - - const: simple-mfd - - items: - - const: arm,realview-eb11mp-revc-syscon - - const: arm,realview-eb-syscon - - const: syscon - - const: simple-mfd - - items: - - const: arm,realview-eb-syscon - - const: syscon - - const: simple-mfd - - items: - - const: arm,realview-pb1176-syscon - - const: syscon - - const: simple-mfd - - items: - - const: arm,realview-pb11mp-syscon - - const: syscon - - const: simple-mfd - - items: - - const: arm,realview-pba8-syscon - - const: syscon - - const: simple-mfd - - items: - - const: arm,realview-pbx-syscon - - const: syscon - - const: simple-mfd - - required: - - compatible - - reg required: - compatible diff --git a/dts/Bindings/arm/arm,trace-buffer-extension.yaml b/dts/Bindings/arm/arm,trace-buffer-extension.yaml index b132265806..87128e7b7d 100644 --- a/dts/Bindings/arm/arm,trace-buffer-extension.yaml +++ b/dts/Bindings/arm/arm,trace-buffer-extension.yaml @@ -1,9 +1,9 @@ -# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause # Copyright 2021, Arm Ltd %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/arm,trace-buffer-extension.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/arm,trace-buffer-extension.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM Trace Buffer Extensions @@ -19,7 +19,8 @@ description: | properties: $nodename: - const: "trbe" + const: trbe + compatible: items: - const: arm,trace-buffer-extension diff --git a/dts/Bindings/arm/arm,versatile-sysreg.yaml b/dts/Bindings/arm/arm,versatile-sysreg.yaml index 491eef1e1b..3b060c36b9 100644 --- a/dts/Bindings/arm/arm,versatile-sysreg.yaml +++ b/dts/Bindings/arm/arm,versatile-sysreg.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/arm/arm,versatile-sysreg.yaml# diff --git a/dts/Bindings/arm/arm,versatile.yaml b/dts/Bindings/arm/arm,versatile.yaml index 13e52ba920..7a3caf6af2 100644 --- a/dts/Bindings/arm/arm,versatile.yaml +++ b/dts/Bindings/arm/arm,versatile.yaml @@ -14,6 +14,14 @@ description: |+ with various pluggable interface boards, in essence the Versatile PB version is a superset of the Versatile AB version. + The root node in the Versatile platforms must contain a core module child + node. They are always at physical address 0x10000000 in all the Versatile + variants. + + When fitted with the IB2 Interface Board, the Versatile AB will present an + optional system controller node which controls the extra peripherals on the + interface board. + properties: $nodename: const: '/' @@ -32,38 +40,6 @@ properties: items: - const: arm,versatile-pb - core-module@10000000: - type: object - description: the root node in the Versatile platforms must contain - a core module child node. They are always at physical address - 0x10000000 in all the Versatile variants. - properties: - compatible: - items: - - const: arm,core-module-versatile - - const: syscon - - const: simple-mfd - reg: - maxItems: 1 - - required: - - compatible - - reg - -patternProperties: - "^syscon@[0-9a-f]+$": - type: object - description: When fitted with the IB2 Interface Board, the Versatile - AB will present an optional system controller node which controls the - extra peripherals on the interface board. - properties: - compatible: - contains: - const: arm,versatile-ib2-syscon - required: - - compatible - - reg - required: - compatible - core-module@10000000 diff --git a/dts/Bindings/arm/arm,vexpress-juno.yaml b/dts/Bindings/arm/arm,vexpress-juno.yaml index eec190a962..8dd6b64463 100644 --- a/dts/Bindings/arm/arm,vexpress-juno.yaml +++ b/dts/Bindings/arm/arm,vexpress-juno.yaml @@ -122,14 +122,14 @@ properties: arm,vexpress,position: description: When daughterboards are stacked on one site, their position in the stack be be described this attribute. - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 3 arm,vexpress,dcc: description: When describing tiles consisting of more than one DCC, its number can be specified with this attribute. - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 3 @@ -143,7 +143,8 @@ patternProperties: "simple-bus". If the compatible is placed in the "motherboard-bus" node, it is stricter and always has two compatibles. type: object - $ref: '/schemas/simple-bus.yaml' + $ref: /schemas/simple-bus.yaml + unevaluatedProperties: false properties: compatible: @@ -179,13 +180,13 @@ patternProperties: - const: simple-bus arm,v2m-memory-map: description: This describes the memory map type. - $ref: '/schemas/types.yaml#/definitions/string' + $ref: /schemas/types.yaml#/definitions/string enum: - rs1 - rs2 arm,hbi: - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 description: This indicates the ARM HBI (Hardware Board ID), this is ARM's unique board model ID, visible on the PCB's silkscreen. @@ -196,7 +197,7 @@ patternProperties: property, describing the physical location of the children nodes. 0 means motherboard site, while 1 and 2 are daughterboard sites, and 0xf means "sisterboard" which is the site containing the main CPU tile. - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 15 diff --git a/dts/Bindings/arm/aspeed/aspeed,sbc.yaml b/dts/Bindings/arm/aspeed/aspeed,sbc.yaml index c72aab7064..b8c5cacb09 100644 --- a/dts/Bindings/arm/aspeed/aspeed,sbc.yaml +++ b/dts/Bindings/arm/aspeed/aspeed,sbc.yaml @@ -2,8 +2,8 @@ # Copyright 2021 Joel Stanley, IBM Corp. %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/aspeed/aspeed,sbc.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/aspeed/aspeed,sbc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: ASPEED Secure Boot Controller diff --git a/dts/Bindings/arm/aspeed/aspeed.yaml b/dts/Bindings/arm/aspeed/aspeed.yaml index 217a1d6748..749ee54a3f 100644 --- a/dts/Bindings/arm/aspeed/aspeed.yaml +++ b/dts/Bindings/arm/aspeed/aspeed.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/arm/aspeed/aspeed.yaml# @@ -17,6 +17,7 @@ properties: - description: AST2400 based boards items: - enum: + - delta,ahe50dc-bmc - facebook,galaxy100-bmc - facebook,wedge100-bmc - facebook,wedge40-bmc @@ -77,13 +78,18 @@ properties: - facebook,cloudripper-bmc - facebook,elbert-bmc - facebook,fuji-bmc + - facebook,greatlakes-bmc + - facebook,minerva-cmc + - facebook,yosemite4-bmc - ibm,everest-bmc - ibm,rainier-bmc - ibm,tacoma-bmc + - inventec,starscream-bmc - inventec,transformer-bmc - jabil,rbp-bmc - - nuvia,dc-scm-bmc + - qcom,dc-scm-v1-bmc - quanta,s6q-bmc + - ufispace,ncplite-bmc - const: aspeed,ast2600 additionalProperties: true diff --git a/dts/Bindings/arm/atmel-at91.yaml b/dts/Bindings/arm/atmel-at91.yaml index 2224b18801..82f37328cc 100644 --- a/dts/Bindings/arm/atmel-at91.yaml +++ b/dts/Bindings/arm/atmel-at91.yaml @@ -79,6 +79,13 @@ properties: - const: atmel,sama5d2 - const: atmel,sama5 + - description: Microchip SAMA5D29 Curiosity + items: + - const: microchip,sama5d29-curiosity + - const: atmel,sama5d29 + - const: atmel,sama5d2 + - const: atmel,sama5 + - items: - const: atmel,sama5d27 - const: atmel,sama5d2 @@ -91,9 +98,11 @@ properties: - const: atmel,sama5d2 - const: atmel,sama5 - - description: SAM9X60-EK board + - description: Microchip SAM9X60 Evaluation Boards items: - - const: microchip,sam9x60ek + - enum: + - microchip,sam9x60ek + - microchip,sam9x60-curiosity - const: microchip,sam9x60 - const: atmel,at91sam9 @@ -170,6 +179,12 @@ properties: - const: microchip,sama7g5 - const: microchip,sama7 + - description: Microchip SAMA7G54 Curiosity Board + items: + - const: microchip,sama7g54-curiosity + - const: microchip,sama7g5 + - const: microchip,sama7 + - description: Microchip LAN9662 Evaluation Boards. items: - enum: diff --git a/dts/Bindings/arm/atmel-sysregs.txt b/dts/Bindings/arm/atmel-sysregs.txt index ab1b352344..67a66bf748 100644 --- a/dts/Bindings/arm/atmel-sysregs.txt +++ b/dts/Bindings/arm/atmel-sysregs.txt @@ -52,100 +52,6 @@ Example: reg = <0xe3804000 0x1000>; }; -SHDWC Shutdown Controller - -required properties: -- compatible: Should be "atmel,<chip>-shdwc". - <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". -- reg: Should contain registers location and length -- clocks: phandle to input clock. - -optional properties: -- atmel,wakeup-mode: String, operation mode of the wakeup mode. - Supported values are: "none", "high", "low", "any". -- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). - -optional at91sam9260 properties: -- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. - -optional at91sam9rl properties: -- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. -- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. - -optional at91sam9x5 properties: -- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. - -Example: - - shdwc@fffffd10 { - compatible = "atmel,at91sam9260-shdwc"; - reg = <0xfffffd10 0x10>; - clocks = <&clk32k>; - }; - -SHDWC SAMA5D2-Compatible Shutdown Controller - -1) shdwc node - -required properties: -- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or - "microchip,sama7g5-shdwc" -- reg: should contain registers location and length -- clocks: phandle to input clock. -- #address-cells: should be one. The cell is the wake-up input index. -- #size-cells: should be zero. - -optional properties: - -- debounce-delay-us: minimum wake-up inputs debouncer period in - microseconds. It's usually a board-related property. -- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up. - -optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties: -- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. - -The node contains child nodes for each wake-up input that the platform uses. - -2) input nodes - -Wake-up input nodes are usually described in the "board" part of the Device -Tree. Note also that input 0 is linked to the wake-up pin and is frequently -used. - -Required properties: -- reg: should contain the wake-up input index [0 - 15]. - -Optional properties: -- atmel,wakeup-active-high: boolean, the corresponding wake-up input described - by the child, forces the wake-up of the core power supply on a high level. - The default is to be active low. - -Example: - -On the SoC side: - shdwc@f8048010 { - compatible = "atmel,sama5d2-shdwc"; - reg = <0xf8048010 0x10>; - clocks = <&clk32k>; - #address-cells = <1>; - #size-cells = <0>; - atmel,wakeup-rtc-timer; - }; - -On the board side: - shdwc@f8048010 { - debounce-delay-us = <976>; - - input@0 { - reg = <0>; - }; - - input@1 { - reg = <1>; - atmel,wakeup-active-high; - }; - }; - Special Function Registers (SFR) Special Function Registers (SFR) manage specific aspects of the integrated diff --git a/dts/Bindings/arm/bcm/bcm2835.yaml b/dts/Bindings/arm/bcm/bcm2835.yaml index 8051a75c2c..162a39dab2 100644 --- a/dts/Bindings/arm/bcm/bcm2835.yaml +++ b/dts/Bindings/arm/bcm/bcm2835.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings +title: Broadcom BCM2711/BCM2835 Platforms maintainers: - Eric Anholt <eric@anholt.net> diff --git a/dts/Bindings/arm/bcm/brcm,bcm11351.yaml b/dts/Bindings/arm/bcm/brcm,bcm11351.yaml index c603243574..f2bcac0096 100644 --- a/dts/Bindings/arm/bcm/brcm,bcm11351.yaml +++ b/dts/Bindings/arm/bcm/brcm,bcm11351.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm11351.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM11351 device tree bindings +title: Broadcom BCM11351 maintainers: - Florian Fainelli <f.fainelli@gmail.com> diff --git a/dts/Bindings/arm/bcm/brcm,bcm21664.yaml b/dts/Bindings/arm/bcm/brcm,bcm21664.yaml index b302075738..cf4e254e32 100644 --- a/dts/Bindings/arm/bcm/brcm,bcm21664.yaml +++ b/dts/Bindings/arm/bcm/brcm,bcm21664.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm21664.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM21664 device tree bindings +title: Broadcom BCM21664 maintainers: - Florian Fainelli <f.fainelli@gmail.com> diff --git a/dts/Bindings/arm/bcm/brcm,bcm23550.yaml b/dts/Bindings/arm/bcm/brcm,bcm23550.yaml index 37f3a6fcde..eafec29ba7 100644 --- a/dts/Bindings/arm/bcm/brcm,bcm23550.yaml +++ b/dts/Bindings/arm/bcm/brcm,bcm23550.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm23550.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM23550 device tree bindings +title: Broadcom BCM23550 maintainers: - Florian Fainelli <f.fainelli@gmail.com> diff --git a/dts/Bindings/arm/bcm/brcm,bcm4708.yaml b/dts/Bindings/arm/bcm/brcm,bcm4708.yaml index 958df32b48..4cc4e67546 100644 --- a/dts/Bindings/arm/bcm/brcm,bcm4708.yaml +++ b/dts/Bindings/arm/bcm/brcm,bcm4708.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4708.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM4708 device tree bindings +title: Broadcom BCM4708 description: Broadcom BCM4708/47081/4709/47094/53012 Wi-Fi/network SoCs based @@ -25,13 +25,15 @@ properties: - enum: - asus,rt-ac56u - asus,rt-ac68u + - buffalo,wzr-1166dhp + - buffalo,wzr-1166dhp2 - buffalo,wzr-1750dhp - linksys,ea6300-v1 - linksys,ea6500-v2 - - luxul,xap-1510v1 + - luxul,xap-1510-v1 - luxul,xwc-1000 - - netgear,r6250v1 - - netgear,r6300v2 + - netgear,r6250-v1 + - netgear,r6300-v2 - smartrg,sr400ac - brcm,bcm94708 - const: brcm,bcm4708 @@ -42,8 +44,8 @@ properties: - asus,rt-n18u - buffalo,wzr-600dhp2 - buffalo,wzr-900dhp - - luxul,xap-1410v1 - - luxul,xwr-1200v1 + - luxul,xap-1410-v1 + - luxul,xwr-1200-v1 - tplink,archer-c5-v2 - const: brcm,bcm47081 - const: brcm,bcm4708 @@ -64,14 +66,16 @@ properties: - description: BCM47094 based boards items: - enum: + - asus,rt-ac3100 - asus,rt-ac88u - dlink,dir-885l + - dlink,dir-890l - linksys,panamera - luxul,abr-4500-v1 - luxul,xap-1610-v1 - luxul,xbr-4500-v1 - luxul,xwc-2000-v1 - - luxul,xwr-3100v1 + - luxul,xwr-3100-v1 - luxul,xwr-3150-v1 - netgear,r8500 - phicomm,k3 @@ -97,6 +101,7 @@ properties: - description: BCM53016 based boards items: - enum: + - dlink,dwl-8610ap - meraki,mr32 - const: brcm,bcm53016 - const: brcm,bcm4708 diff --git a/dts/Bindings/arm/bcm/brcm,bcm53573.yaml b/dts/Bindings/arm/bcm/brcm,bcm53573.yaml new file mode 100644 index 0000000000..81b9a4a641 --- /dev/null +++ b/dts/Bindings/arm/bcm/brcm,bcm53573.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm53573.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM53573 SoCs family + +description: + Broadcom BCM53573 / BCM47189 Wi-Fi SoCs derived from Northstar. + +maintainers: + - Rafał Miłecki <rafal@milecki.pl> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: BCM53573 based boards + items: + - enum: + - tenda,ac6-v1 + - tenda,w15e-v1 + - const: brcm,bcm53573 + + - description: BCM47189 based boards + items: + - enum: + - brcm,bcm947189acdbmr + - luxul,xap-810-v1 + - luxul,xap-1440-v1 + - tenda,ac9 + - const: brcm,bcm47189 + - const: brcm,bcm53573 + +additionalProperties: true + +... diff --git a/dts/Bindings/arm/bcm/brcm,bcmbca.yaml b/dts/Bindings/arm/bcm/brcm,bcmbca.yaml index 84866e29ca..07892cbdd2 100644 --- a/dts/Bindings/arm/bcm/brcm,bcmbca.yaml +++ b/dts/Bindings/arm/bcm/brcm,bcmbca.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,bcmbca.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom Broadband SoC device tree bindings +title: Broadcom Broadband SoC description: Broadcom Broadband SoCs include family of high performance DSL/PON/Wireless diff --git a/dts/Bindings/arm/bcm/brcm,cygnus.yaml b/dts/Bindings/arm/bcm/brcm,cygnus.yaml index 432ccf990f..a0a3f32db5 100644 --- a/dts/Bindings/arm/bcm/brcm,cygnus.yaml +++ b/dts/Bindings/arm/bcm/brcm,cygnus.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,cygnus.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom Cygnus device tree bindings +title: Broadcom Cygnus maintainers: - Ray Jui <rjui@broadcom.com> diff --git a/dts/Bindings/arm/bcm/brcm,hr2.yaml b/dts/Bindings/arm/bcm/brcm,hr2.yaml index 294948399f..cc6add0e93 100644 --- a/dts/Bindings/arm/bcm/brcm,hr2.yaml +++ b/dts/Bindings/arm/bcm/brcm,hr2.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,hr2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom Hurricane 2 device tree bindings +title: Broadcom Hurricane 2 description: Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs diff --git a/dts/Bindings/arm/bcm/brcm,ns2.yaml b/dts/Bindings/arm/bcm/brcm,ns2.yaml index c4847abbec..6696598eca 100644 --- a/dts/Bindings/arm/bcm/brcm,ns2.yaml +++ b/dts/Bindings/arm/bcm/brcm,ns2.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,ns2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom North Star 2 (NS2) device tree bindings +title: Broadcom North Star 2 (NS2) maintainers: - Ray Jui <rjui@broadcom.com> diff --git a/dts/Bindings/arm/bcm/brcm,nsp.yaml b/dts/Bindings/arm/bcm/brcm,nsp.yaml index 7d184ba7d1..a43b2d4d93 100644 --- a/dts/Bindings/arm/bcm/brcm,nsp.yaml +++ b/dts/Bindings/arm/bcm/brcm,nsp.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,nsp.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom Northstar Plus device tree bindings +title: Broadcom Northstar Plus description: Broadcom Northstar Plus family of SoCs are used for switching control diff --git a/dts/Bindings/arm/bcm/brcm,stingray.yaml b/dts/Bindings/arm/bcm/brcm,stingray.yaml index c638e04eba..c6ccb78aab 100644 --- a/dts/Bindings/arm/bcm/brcm,stingray.yaml +++ b/dts/Bindings/arm/bcm/brcm,stingray.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,stingray.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom Stingray device tree bindings +title: Broadcom Stingray maintainers: - Ray Jui <rjui@broadcom.com> diff --git a/dts/Bindings/arm/bcm/brcm,vulcan-soc.yaml b/dts/Bindings/arm/bcm/brcm,vulcan-soc.yaml index 4eba182abd..3f441352fb 100644 --- a/dts/Bindings/arm/bcm/brcm,vulcan-soc.yaml +++ b/dts/Bindings/arm/bcm/brcm,vulcan-soc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom Vulcan device tree bindings +title: Broadcom Vulcan maintainers: - Robert Richter <rrichter@marvell.com> diff --git a/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml index b369b374fc..39e3c248f5 100644 --- a/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +++ b/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml @@ -30,6 +30,7 @@ properties: clocks: type: object + additionalProperties: false properties: compatible: @@ -47,6 +48,7 @@ properties: reset: type: object + additionalProperties: false properties: compatible: @@ -63,6 +65,7 @@ properties: pwm: type: object + additionalProperties: false properties: compatible: @@ -76,8 +79,6 @@ properties: - compatible - "#pwm-cells" - additionalProperties: false - required: - compatible - mboxes diff --git a/dts/Bindings/arm/calxeda/l2ecc.yaml b/dts/Bindings/arm/calxeda/l2ecc.yaml index a9fe01238a..76b65ea149 100644 --- a/dts/Bindings/arm/calxeda/l2ecc.yaml +++ b/dts/Bindings/arm/calxeda/l2ecc.yaml @@ -16,7 +16,7 @@ maintainers: properties: compatible: - const: "calxeda,hb-sregs-l2-ecc" + const: calxeda,hb-sregs-l2-ecc reg: maxItems: 1 diff --git a/dts/Bindings/arm/cci-control-port.yaml b/dts/Bindings/arm/cci-control-port.yaml index c911486621..c29d250a6d 100644 --- a/dts/Bindings/arm/cci-control-port.yaml +++ b/dts/Bindings/arm/cci-control-port.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/cci-control-port.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: CCI Interconnect Bus Masters binding +title: CCI Interconnect Bus Masters maintainers: - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> diff --git a/dts/Bindings/arm/cpu-capacity.txt b/dts/Bindings/arm/cpu-capacity.txt deleted file mode 100644 index cc5e190390..0000000000 --- a/dts/Bindings/arm/cpu-capacity.txt +++ /dev/null @@ -1,238 +0,0 @@ -========================================== -ARM CPUs capacity bindings -========================================== - -========================================== -1 - Introduction -========================================== - -ARM systems may be configured to have cpus with different power/performance -characteristics within the same chip. In this case, additional information has -to be made available to the kernel for it to be aware of such differences and -take decisions accordingly. - -========================================== -2 - CPU capacity definition -========================================== - -CPU capacity is a number that provides the scheduler information about CPUs -heterogeneity. Such heterogeneity can come from micro-architectural differences -(e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run -(e.g., SMP systems with multiple frequency domains). Heterogeneity in this -context is about differing performance characteristics; this binding tries to -capture a first-order approximation of the relative performance of CPUs. - -CPU capacities are obtained by running a suitable benchmark. This binding makes -no guarantees on the validity or suitability of any particular benchmark, the -final capacity should, however, be: - -* A "single-threaded" or CPU affine benchmark -* Divided by the running frequency of the CPU executing the benchmark -* Not subject to dynamic frequency scaling of the CPU - -For the time being we however advise usage of the Dhrystone benchmark. What -above thus becomes: - -CPU capacities are obtained by running the Dhrystone benchmark on each CPU at -max frequency (with caches enabled). The obtained DMIPS score is then divided -by the frequency (in MHz) at which the benchmark has been run, so that -DMIPS/MHz are obtained. Such values are then normalized w.r.t. the highest -score obtained in the system. - -========================================== -3 - capacity-dmips-mhz -========================================== - -capacity-dmips-mhz is an optional cpu node [1] property: u32 value -representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the -maximum frequency available to the cpu is then used to calculate the capacity -value internally used by the kernel. - -capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu -node, it has to be specified for every other cpu nodes, or the system will -fall back to the default capacity value for every CPU. If cpufreq is not -available, final capacities are calculated by directly using capacity-dmips- -mhz values (normalized w.r.t. the highest value found while parsing the DT). - -=========================================== -4 - Examples -=========================================== - -Example 1 (ARM 64-bit, 6-cpu system, two clusters): -The capacities-dmips-mhz or DMIPS/MHz values (scaled to 1024) -are 1024 and 578 for cluster0 and cluster1. Further normalization -is done by the operating system based on cluster0@max-freq=1100 and -cluster1@max-freq=850, final capacities are 1024 for cluster0 and -446 for cluster1 (578*850/1100). - -cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&A57_0>; - }; - core1 { - cpu = <&A57_1>; - }; - }; - - cluster1 { - core0 { - cpu = <&A53_0>; - }; - core1 { - cpu = <&A53_1>; - }; - core2 { - cpu = <&A53_2>; - }; - core3 { - cpu = <&A53_3>; - }; - }; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <100>; - exit-latency-us = <250>; - min-residency-us = <150>; - }; - - CLUSTER_SLEEP_0: cluster-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x1010000>; - local-timer-stop; - entry-latency-us = <800>; - exit-latency-us = <700>; - min-residency-us = <2500>; - }; - }; - - A57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0 0x0>; - device_type = "cpu"; - enable-method = "psci"; - next-level-cache = <&A57_L2>; - clocks = <&scpi_dvfs 0>; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - }; - - A57_1: cpu@1 { - compatible = "arm,cortex-a57"; - reg = <0x0 0x1>; - device_type = "cpu"; - enable-method = "psci"; - next-level-cache = <&A57_L2>; - clocks = <&scpi_dvfs 0>; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - }; - - A53_0: cpu@100 { - compatible = "arm,cortex-a53"; - reg = <0x0 0x100>; - device_type = "cpu"; - enable-method = "psci"; - next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <578>; - }; - - A53_1: cpu@101 { - compatible = "arm,cortex-a53"; - reg = <0x0 0x101>; - device_type = "cpu"; - enable-method = "psci"; - next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <578>; - }; - - A53_2: cpu@102 { - compatible = "arm,cortex-a53"; - reg = <0x0 0x102>; - device_type = "cpu"; - enable-method = "psci"; - next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <578>; - }; - - A53_3: cpu@103 { - compatible = "arm,cortex-a53"; - reg = <0x0 0x103>; - device_type = "cpu"; - enable-method = "psci"; - next-level-cache = <&A53_L2>; - clocks = <&scpi_dvfs 1>; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <578>; - }; - - A57_L2: l2-cache0 { - compatible = "cache"; - }; - - A53_L2: l2-cache1 { - compatible = "cache"; - }; -}; - -Example 2 (ARM 32-bit, 4-cpu system, two clusters, - cpus 0,1@1GHz, cpus 2,3@500MHz): -capacities-dmips-mhz are scaled w.r.t. 2 (cpu@0 and cpu@1), this means that first -cpu@0 and cpu@1 are twice fast than cpu@2 and cpu@3 (at the same frequency) - -cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - capacity-dmips-mhz = <2>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - capacity-dmips-mhz = <2>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x100>; - capacity-dmips-mhz = <1>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x101>; - capacity-dmips-mhz = <1>; - }; -}; - -=========================================== -5 - References -=========================================== - -[1] ARM Linux Kernel documentation - CPUs bindings - Documentation/devicetree/bindings/arm/cpus.yaml diff --git a/dts/Bindings/arm/cpus.yaml b/dts/Bindings/arm/cpus.yaml index 5c13b73e4d..cc5a21b47e 100644 --- a/dts/Bindings/arm/cpus.yaml +++ b/dts/Bindings/arm/cpus.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/cpus.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM CPUs bindings +title: ARM CPUs maintainers: - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> @@ -85,6 +85,8 @@ properties: compatible: enum: + - apple,avalanche + - apple,blizzard - apple,icestorm - apple,firestorm - arm,arm710t @@ -139,8 +141,12 @@ properties: - arm,cortex-a77 - arm,cortex-a78 - arm,cortex-a78ae + - arm,cortex-a78c - arm,cortex-a510 + - arm,cortex-a520 - arm,cortex-a710 + - arm,cortex-a715 + - arm,cortex-a720 - arm,cortex-m0 - arm,cortex-m0+ - arm,cortex-m1 @@ -149,8 +155,12 @@ properties: - arm,cortex-r4 - arm,cortex-r5 - arm,cortex-r7 + - arm,cortex-r52 - arm,cortex-x1 + - arm,cortex-x1c - arm,cortex-x2 + - arm,cortex-x3 + - arm,cortex-x4 - arm,neoverse-e1 - arm,neoverse-n1 - arm,neoverse-n2 @@ -178,17 +188,21 @@ properties: - qcom,kryo250 - qcom,kryo260 - qcom,kryo280 + - qcom,kryo360 - qcom,kryo385 + - qcom,kryo465 - qcom,kryo468 - qcom,kryo485 - qcom,kryo560 - qcom,kryo570 + - qcom,kryo660 - qcom,kryo685 - qcom,kryo780 + - qcom,oryon - qcom,scorpion enable-method: - $ref: '/schemas/types.yaml#/definitions/string' + $ref: /schemas/types.yaml#/definitions/string oneOf: # On ARM v8 64-bit this property is required - enum: @@ -237,8 +251,8 @@ properties: cpu-release-addr: oneOf: - - $ref: '/schemas/types.yaml#/definitions/uint32' - - $ref: '/schemas/types.yaml#/definitions/uint64' + - $ref: /schemas/types.yaml#/definitions/uint32 + - $ref: /schemas/types.yaml#/definitions/uint64 description: The DT specification defines this as 64-bit always, but some 32-bit Arm systems have used a 32-bit value which must be supported. @@ -246,7 +260,7 @@ properties: property value of "spin-table". cpu-idle-states: - $ref: '/schemas/types.yaml#/definitions/phandle-array' + $ref: /schemas/types.yaml#/definitions/phandle-array items: maxItems: 1 description: | @@ -255,14 +269,14 @@ properties: capacity-dmips-mhz: description: - u32 value representing CPU capacity (see ./cpu-capacity.txt) in + u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in DMIPS/MHz, relative to highest capacity-dmips-mhz in the system. cci-control-port: true dynamic-power-coefficient: - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 description: A u32 value that represents the running time dynamic power coefficient in units of uW/MHz/V^2. The @@ -296,10 +310,12 @@ properties: power-domains property. For PSCI based platforms, the name corresponding to the index of the PSCI - PM domain provider, must be "psci". + PM domain provider, must be "psci". For SCMI based platforms, the name + corresponding to the index of an SCMI performance domain provider, must be + "perf". qcom,saw: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: | Specifies the SAW* node associated with this CPU. @@ -309,7 +325,7 @@ properties: * arm/msm/qcom,saw2.txt qcom,acc: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: | Specifies the ACC* node associated with this CPU. @@ -320,7 +336,7 @@ properties: * arm/msm/qcom,kpss-acc.txt rockchip,pmu: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: | Specifies the syscon node controlling the cpu core power domains. @@ -330,7 +346,7 @@ properties: the cpu-core power-domains. secondary-boot-reg: - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 description: | Required for systems that have an "enable-method" property value of "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp". diff --git a/dts/Bindings/arm/firmware/linaro,optee-tz.yaml b/dts/Bindings/arm/firmware/linaro,optee-tz.yaml index 9a426110a1..5d033570b5 100644 --- a/dts/Bindings/arm/firmware/linaro,optee-tz.yaml +++ b/dts/Bindings/arm/firmware/linaro,optee-tz.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/firmware/linaro,optee-tz.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: OP-TEE Device Tree Bindings +title: OP-TEE maintainers: - Jens Wiklander <jens.wiklander@linaro.org> @@ -28,7 +28,8 @@ properties: maxItems: 1 description: | This interrupt which is used to signal an event by the secure world - software is expected to be edge-triggered. + software is expected to be either a per-cpu interrupt or an + edge-triggered peripheral interrupt. method: enum: [smc, hvc] diff --git a/dts/Bindings/arm/firmware/tlm,trusted-foundations.yaml b/dts/Bindings/arm/firmware/tlm,trusted-foundations.yaml index 9d1857c0aa..e3980b659f 100644 --- a/dts/Bindings/arm/firmware/tlm,trusted-foundations.yaml +++ b/dts/Bindings/arm/firmware/tlm,trusted-foundations.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/firmware/tlm,trusted-foundations.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/firmware/tlm,trusted-foundations.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Trusted Foundations diff --git a/dts/Bindings/arm/fsl.yaml b/dts/Bindings/arm/fsl.yaml index fbfc4f99c0..0027201e19 100644 --- a/dts/Bindings/arm/fsl.yaml +++ b/dts/Bindings/arm/fsl.yaml @@ -25,8 +25,11 @@ properties: - description: i.MX23 based Boards items: - enum: + - creative,x-fi3 - fsl,imx23-evk + - fsl,stmp378x-devb - olimex,imx23-olinuxino + - sandisk,sansa_fuze_plus - const: fsl,imx23 - description: i.MX25 Product Development Kit @@ -88,12 +91,56 @@ properties: items: - enum: - armadeus,imx28-apf28 # APF28 SoM - - armadeus,imx28-apf28dev # APF28 SoM on APF28Dev board + - bluegiga,apx4devkit # Bluegiga APx4 SoM on dev board + - crystalfontz,cfa10036 # Crystalfontz CFA-10036 SoM + - eukrea,mbmx28lc - fsl,imx28-evk - i2se,duckbill - i2se,duckbill-2 + - karo,tx28 # Ka-Ro electronics TX28 module + - lwn,imx28-xea + - msr,m28cu3 # M28 SoM with custom base board + - schulercontrol,imx28-sps1 - technologic,imx28-ts4600 - const: fsl,imx28 + + - description: i.MX28 Aries M28 SoM Board + items: + - const: aries,m28 + - const: denx,m28 + - const: fsl,imx28 + + - description: i.MX28 Aries M28EVK Board + items: + - const: aries,m28evk + - const: denx,m28evk + - const: fsl,imx28 + + - description: i.MX28 Armadeus Systems APF28Dev Board + items: + - const: armadeus,imx28-apf28dev + - const: armadeus,imx28-apf28 + - const: fsl,imx28 + + - description: i.MX28 Crystalfontz CFA-10036 based Boards + items: + - enum: + - crystalfontz,cfa10037 + - crystalfontz,cfa10049 + - crystalfontz,cfa10057 + - crystalfontz,cfa10058 + - const: crystalfontz,cfa10036 + - const: fsl,imx28 + + - description: i.MX28 Crystalfontz CFA-10037 based Boards + items: + - enum: + - crystalfontz,cfa10055 + - crystalfontz,cfa10056 + - const: crystalfontz,cfa10037 + - const: crystalfontz,cfa10036 + - const: fsl,imx28 + - description: i.MX28 Duckbill 2 based Boards items: - enum: @@ -103,6 +150,19 @@ properties: - const: i2se,duckbill-2 - const: fsl,imx28 + - description: i.MX28 Eukrea Electromatique MBMX283LC Board + items: + - const: eukrea,mbmx283lc + - const: eukrea,mbmx28lc + - const: fsl,imx28 + + - description: i.MX28 Eukrea Electromatique MBMX287LC Board + items: + - const: eukrea,mbmx287lc + - const: eukrea,mbmx283lc + - const: eukrea,mbmx28lc + - const: fsl,imx28 + - description: i.MX31 based Boards items: - enum: @@ -173,6 +233,7 @@ properties: - kiebackpeter,imx53-ddc # K+P imx53 DDC - kiebackpeter,imx53-hsc # K+P imx53 HSC - menlo,m53menlo # i.MX53 Menlo board + - starterkit,sk-imx53 - voipac,imx53-dmm-668 # Voipac i.MX53 X53-DMM-668 - const: fsl,imx53 @@ -242,6 +303,7 @@ properties: - variscite,dt6customboard - wand,imx6q-wandboard # Wandboard i.MX6 Quad Board - ysoft,imx6q-yapp4-crux # i.MX6 Quad Y Soft IOTA Crux board + - ysoft,imx6q-yapp4-pegasus # i.MX6 Quad Y Soft IOTA Pegasus board - zealz,imx6q-gk802 # Zealz GK802 - zii,imx6q-zii-rdu2 # ZII RDU2 Board - const: fsl,imx6q @@ -322,10 +384,17 @@ properties: - toradex,apalis_imx6q-ixora # Apalis iMX6Q/D Module on Ixora Carrier Board - toradex,apalis_imx6q-ixora-v1.1 # Apalis iMX6Q/D Module on Ixora V1.1 Carrier Board - toradex,apalis_imx6q-ixora-v1.2 # Apalis iMX6Q/D Module on Ixora V1.2 Carrier Board - - toradex,apalis_imx6q-eval # Apalis iMX6Q/D Module on Apalis Evaluation Board + - toradex,apalis_imx6q-eval # Apalis iMX6Q/D Module on Apalis Evaluation Board v1.0/v1.1 + - toradex,apalis_imx6q-eval-v1.2 # Apalis iMX6Q/D Module on Apalis Evaluation Board v1.2 - const: toradex,apalis_imx6q - const: fsl,imx6q + - description: i.MX6Q Variscite VAR-SOM-MX6 Boards + items: + - const: variscite,mx6customboard + - const: variscite,var-som-imx6q + - const: fsl,imx6q + - description: TQ-Systems TQMa6Q SoM (variant A) on MBa6x items: - const: tq,imx6q-mba6x-a @@ -352,6 +421,7 @@ properties: - prt,prtwd3 # Protonic WD3 board - wand,imx6qp-wandboard # Wandboard i.MX6 QuadPlus Board - ysoft,imx6qp-yapp4-crux-plus # i.MX6 Quad Plus Y Soft IOTA Crux+ board + - ysoft,imx6qp-yapp4-pegasus-plus # i.MX6 Quad Plus Y Soft IOTA Pegasus+ board - zii,imx6qp-zii-rdu2 # ZII RDU2+ Board - const: fsl,imx6qp @@ -400,6 +470,7 @@ properties: - prt,prtvt7 # Protonic VT7 board - rex,imx6dl-rex-basic # Rex Basic i.MX6 Dual Lite Board - riot,imx6s-riotboard # RIoTboard i.MX6S + - sielaff,imx6dl-board # Sielaff i.MX6 Solo Board - skov,imx6dl-skov-revc-lt2 # SKOV IMX6 CPU SoloCore lt2 - skov,imx6dl-skov-revc-lt6 # SKOV IMX6 CPU SoloCore lt6 - solidrun,cubox-i/dl # SolidRun Cubox-i Solo/DualLite @@ -416,9 +487,11 @@ properties: - udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board - vdl,lanmcu # Van der Laan LANMCU board - wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board - - ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board + - ysoft,imx6dl-yapp4-draco # i.MX6 Solo Y Soft IOTA Draco board - ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board + - ysoft,imx6dl-yapp4-lynx # i.MX6 DualLite Y Soft IOTA Lynx board - ysoft,imx6dl-yapp4-orion # i.MX6 DualLite Y Soft IOTA Orion board + - ysoft,imx6dl-yapp4-phoenix # i.MX6 DualLite Y Soft IOTA Phoenix board - ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board - const: fsl,imx6dl @@ -520,8 +593,10 @@ properties: items: - enum: - fsl,imx6sl-evk # i.MX6 SoloLite EVK Board + - kobo,aura2 - kobo,tolino-shine2hd - kobo,tolino-shine3 + - kobo,tolino-vision - kobo,tolino-vision5 - revotics,imx6sl-warp # Revotics WaRP Board - const: fsl,imx6sl @@ -635,6 +710,7 @@ properties: - toradex,colibri-imx6ull # Colibri iMX6ULL Modules - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module - toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Modules + - uni-t,uti260b # UNI-T UTi260B Thermal Camera - const: fsl,imx6ull - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board @@ -643,6 +719,31 @@ properties: - const: armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM - const: fsl,imx6ull + - description: i.MX6ULL chargebyte Tarragon Boards + items: + - enum: + - chargebyte,imx6ull-tarragon-master + - chargebyte,imx6ull-tarragon-micro + - chargebyte,imx6ull-tarragon-slave + - chargebyte,imx6ull-tarragon-slavext + - const: fsl,imx6ull + + - description: i.MX6ULL DHCOM SoM based Boards + items: + - enum: + - dh,imx6ull-dhcom-drc02 + - dh,imx6ull-dhcom-pdk2 + - dh,imx6ull-dhcom-picoitx + - const: dh,imx6ull-dhcom-som # The DHCOR is soldered on the DHCOM + - const: dh,imx6ull-dhcor-som + - const: fsl,imx6ull + + - description: i.MX6ULL DHCOR SoM based Boards + items: + - const: marantec,imx6ull-dhcor-maveo-box + - const: dh,imx6ull-dhcor-som + - const: fsl,imx6ull + - description: i.MX6ULL PHYTEC phyBOARD-Segin items: - enum: @@ -818,16 +919,18 @@ properties: - emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board - fsl,imx8mm-evk # i.MX8MM EVK Board + - fsl,imx8mm-evkb # i.MX8MM EVKB Board - gateworks,imx8mm-gw7904 + - gateworks,imx8mm-gw7905-0x # i.MX8MM Gateworks Board - gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit - gw,imx8mm-gw72xx-0x # i.MX8MM Gateworks Development Kit - gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit - gw,imx8mm-gw7901 # i.MX8MM Gateworks Board - gw,imx8mm-gw7902 # i.MX8MM Gateworks Board - gw,imx8mm-gw7903 # i.MX8MM Gateworks Board + - innocomm,wb15-evk # i.MX8MM Innocomm EVK board with WB15 SoM - kontron,imx8mm-sl # i.MX8MM Kontron SL (N801X) SOM - kontron,imx8mm-osm-s # i.MX8MM Kontron OSM-S (N802X) SOM - - menlo,mx8menlo # i.MX8MM Menlo board with Verdin SoM - toradex,verdin-imx8mm # Verdin iMX8M Mini Modules - toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Modules without Wi-Fi / BT - toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Modules @@ -835,6 +938,12 @@ properties: - prt,prt8mm # i.MX8MM Protonic PRT8MM Board - const: fsl,imx8mm + - description: Emtop i.MX8MM based Boards + items: + - const: ees,imx8mm-emtop-baseboard # i.MX8MM Emtop SoM on i.MX8M Mini Baseboard V1 + - const: ees,imx8mm-emtop-som # i.MX8MM Emtop SOM-IMX8MMLPD4 module + - const: fsl,imx8mm + - description: Engicam i.Core MX8M Mini SoM based boards items: - enum: @@ -858,8 +967,11 @@ properties: - description: Toradex Boards with Verdin iMX8M Mini Modules items: - enum: + - menlo,mx8menlo # Verdin iMX8M Mini Module on i.MX8MM Menlo board - toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia - toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board + - toradex,verdin-imx8mm-nonwifi-mallow # Verdin iMX8M Mini Module on Mallow + - toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module - const: fsl,imx8mm @@ -869,13 +981,17 @@ properties: - enum: - toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia - toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B. + - toradex,verdin-imx8mm-wifi-mallow # Verdin iMX8M Mini Wi-Fi / BT Module on Mallow + - toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module - const: fsl,imx8mm - description: PHYTEC phyCORE-i.MX8MM SoM based boards items: - - const: phytec,imx8mm-phyboard-polis-rdk # phyBOARD-Polis RDK + - enum: + - phytec,imx8mm-phyboard-polis-rdk # phyBOARD-Polis RDK + - phytec,imx8mm-phygate-tauri-l # phyGATE-Tauri-L Gateway - const: phytec,imx8mm-phycore-som # phyCORE-i.MX8MM SoM - const: fsl,imx8mm @@ -892,6 +1008,7 @@ properties: one compatible is needed. items: - enum: + - cloos,imx8mm-phg # i.MX8MM Cloos PHG Board - tq,imx8mm-tqma8mqml-mba8mx # TQ-Systems GmbH i.MX8MM TQMa8MQML SOM on MBa8Mx - const: tq,imx8mm-tqma8mqml # TQ-Systems GmbH i.MX8MM TQMa8MQML SOM - const: fsl,imx8mm @@ -910,7 +1027,10 @@ properties: - description: Variscite VAR-SOM-MX8MN based boards items: - - const: variscite,var-som-mx8mn-symphony + - enum: + - dimonoff,gateway-evk # i.MX8MN Dimonoff Gateway EVK Board + - rve,gateway # i.MX8MN RVE Gateway Board + - variscite,var-som-mx8mn-symphony - const: variscite,var-som-mx8mn - const: fsl,imx8mn @@ -928,10 +1048,17 @@ properties: - description: i.MX8MP based Boards items: - enum: - - dh,imx8mp-dhcom-som # i.MX8MP DHCOM SoM - - dh,imx8mp-dhcom-pdk2 # i.MX8MP DHCOM SoM on PDK2 board + - beacon,imx8mp-beacon-kit # i.MX8MP Beacon Development Kit + - dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC - fsl,imx8mp-evk # i.MX8MP EVK Board + - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board + - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board + - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board - gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board + - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board + - skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel + - skov,imx8mp-skov-revb-lt6 # SKOV i.MX8MP climate control with 7” panel + - skov,imx8mp-skov-revb-mi1010ait-1cp1 # SKOV i.MX8MP climate control with 10.1" panel - toradex,verdin-imx8mp # Verdin iMX8M Plus Modules - toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT - toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules @@ -944,6 +1071,14 @@ properties: - const: avnet,sm2s-imx8mp # SM2S-IMX8PLUS SoM - const: fsl,imx8mp + - description: i.MX8MP DHCOM based Boards + items: + - enum: + - dh,imx8mp-dhcom-pdk2 # i.MX8MP DHCOM SoM on PDK2 board + - dh,imx8mp-dhcom-pdk3 # i.MX8MP DHCOM SoM on PDK3 board + - const: dh,imx8mp-dhcom-som # i.MX8MP DHCOM SoM + - const: fsl,imx8mp + - description: Engicam i.Core MX8M Plus SoM based boards items: - enum: @@ -957,11 +1092,27 @@ properties: - const: phytec,imx8mp-phycore-som # phyCORE-i.MX8MP SoM - const: fsl,imx8mp + - description: Polyhex DEBIX i.MX8MP based SBCs + items: + - enum: + - polyhex,imx8mp-debix-model-a # Polyhex Debix Model A Board + - const: polyhex,imx8mp-debix # Polyhex i.MX8MP Debix SBCs + - const: fsl,imx8mp + + - description: Polyhex DEBIX i.MX8MP SOM A based boards + items: + - enum: + - polyhex,imx8mp-debix-som-a-bmb-08 # Polyhex Debix SOM A on SOM A I/O board + - const: polyhex,imx8mp-debix-som-a # Polyhex Debix SOM A + - const: fsl,imx8mp + - description: Toradex Boards with Verdin iMX8M Plus Modules items: - enum: - toradex,verdin-imx8mp-nonwifi-dahlia # Verdin iMX8M Plus Module on Dahlia - toradex,verdin-imx8mp-nonwifi-dev # Verdin iMX8M Plus Module on Verdin Development Board + - toradex,verdin-imx8mp-nonwifi-mallow # Verdin iMX8M Plus Module on Mallow + - toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia - const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module - const: fsl,imx8mp @@ -971,6 +1122,8 @@ properties: - enum: - toradex,verdin-imx8mp-wifi-dahlia # Verdin iMX8M Plus Wi-Fi / BT Module on Dahlia - toradex,verdin-imx8mp-wifi-dev # Verdin iMX8M Plus Wi-Fi / BT M. on Verdin Development B. + - toradex,verdin-imx8mp-wifi-mallow # Verdin iMX8M Plus Wi-Fi / BT Module on Mallow + - toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia - const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module - const: fsl,imx8mp @@ -996,12 +1149,17 @@ properties: - fsl,imx8mq-evk # i.MX8MQ EVK Board - google,imx8mq-phanbell # Google Coral Edge TPU - kontron,pitx-imx8m # Kontron pITX-imx8m Board - - mntre,reform2 # MNT Reform2 Laptop - purism,librem5-devkit # Purism Librem5 devkit - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk - const: fsl,imx8mq + - description: i.MX8MQ NITROGEN SoM based Boards + items: + - const: mntre,reform2 # MNT Reform2 Laptop + - const: boundary,imx8mq-nitrogen8m-som # i.MX8MQ NITROGEN SoM + - const: fsl,imx8mq + - description: Purism Librem5 phones items: - enum: @@ -1032,6 +1190,27 @@ properties: items: - enum: - fsl,imx8qm-mek # i.MX8QM MEK Board + - toradex,apalis-imx8 # Apalis iMX8 Modules + - toradex,apalis-imx8-v1.1 # Apalis iMX8 V1.1 Modules + - const: fsl,imx8qm + + - description: i.MX8QM Boards with Toradex Apalis iMX8 Modules + items: + - enum: + - toradex,apalis-imx8-eval # Apalis iMX8 Module on Apalis Evaluation V1.0/V1.1 Board + - toradex,apalis-imx8-eval-v1.2 # Apalis iMX8 Module on Apalis Evaluation V1.2 Board + - toradex,apalis-imx8-ixora-v1.1 # Apalis iMX8 Module on Ixora V1.1 Carrier Board + - const: toradex,apalis-imx8 + - const: fsl,imx8qm + + - description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules + items: + - enum: + - toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Module on Apalis Eval. V1.0/V1.1 Board + - toradex,apalis-imx8-v1.1-eval-v1.2 # Apalis iMX8 V1.1 Module on Apalis Eval. V1.2 Board + - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board + - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board + - const: toradex,apalis-imx8-v1.1 - const: fsl,imx8qm - description: i.MX8QXP based Boards @@ -1048,13 +1227,32 @@ properties: - fsl,imx8dxl-evk # i.MX8DXL EVK Board - const: fsl,imx8dxl - - description: i.MX8QXP Boards with Toradex Coilbri iMX8X Modules + - description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules items: - enum: + - toradex,colibri-imx8x-aster # Colibri iMX8X Module on Aster Board - toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Colibri Evaluation Board V3 + - toradex,colibri-imx8x-iris # Colibri iMX8X Module on Iris Board + - toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Iris Board V2 - const: toradex,colibri-imx8x - const: fsl,imx8qxp + - description: + TQMa8Xx is a series of SOM featuring NXP i.MX8X system-on-chip + variants. It is designed to be clicked on different carrier boards + MBa8Xx is the starterkit + oneOf: + - items: + - enum: + - tq,imx8dxp-tqma8xdp-mba8xx # TQ-Systems GmbH TQMa8XDP SOM on MBa8Xx + - const: tq,imx8dxp-tqma8xdp # TQ-Systems GmbH TQMa8XDP SOM (with i.MX8DXP) + - const: fsl,imx8dxp + - items: + - enum: + - tq,imx8qxp-tqma8xqp-mba8xx # TQ-Systems GmbH TQMa8XQP SOM on MBa8Xx + - const: tq,imx8qxp-tqma8xqp # TQ-Systems GmbH TQMa8XQP SOM (with i.MX8QXP) + - const: fsl,imx8qxp + - description: i.MX8ULP based Boards items: - enum: @@ -1067,12 +1265,55 @@ properties: - fsl,imx93-11x11-evk # i.MX93 11x11 EVK Board - const: fsl,imx93 + - description: i.MXRT1050 based Boards + items: + - enum: + - fsl,imxrt1050-evk # i.MXRT1050 EVK Board + - const: fsl,imxrt1050 + + - description: i.MXRT1170 based Boards + items: + - enum: + - fsl,imxrt1170-evk # i.MXRT1170 EVK Board + - const: fsl,imxrt1170 + + - description: + TQMa93xxLA and TQMa93xxCA are two series of feature compatible SOM + using NXP i.MX93 SOC in 11x11 mm package. + TQMa93xxLA is designed to be soldered on different carrier boards. + TQMa93xxCA is a compatible variant using board to board connectors. + All SOM and CPU variants use the same device tree hence only one + compatible is needed. Bootloader disables all features not present + in the assembled SOC. + MBa93xxCA mainboard can be used as starterkit for the SOM + soldered on an adapter board or for the connector variant + MBa93xxLA mainboard is a single board computer using the solderable + SOM variant + items: + - enum: + - tq,imx93-tqma9352-mba93xxca # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM on MBa93xxCA + - tq,imx93-tqma9352-mba93xxla # TQ-Systems GmbH i.MX93 TQMa93xxLA SOM on MBa93xxLA SBC + - const: tq,imx93-tqma9352 # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM + - const: fsl,imx93 + + - description: PHYTEC phyCORE-i.MX93 SoM based boards + items: + - const: phytec,imx93-phyboard-segin # phyBOARD-Segin with i.MX93 + - const: phytec,imx93-phycore-som # phyCORE-i.MX93 SoM + - const: fsl,imx93 + + - description: Variscite VAR-SOM-MX93 based boards + items: + - const: variscite,var-som-mx93-symphony + - const: variscite,var-som-mx93 + - const: fsl,imx93 + - description: Freescale Vybrid Platform Device Tree Bindings - For the Vybrid SoC familiy all variants with DDR controller are supported, + For the Vybrid SoC family all variants with DDR controller are supported, which is the VF5xx and VF6xx series. Out of historical reasons, in most - places the kernel uses vf610 to refer to the whole familiy. + places the kernel uses vf610 to refer to the whole family. The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4 core support. items: @@ -1137,6 +1378,16 @@ properties: - fsl,ls1021a-twr - const: fsl,ls1021a + - description: + TQ-Systems TQMLS102xA is a series of socketable SOM featuring + LS102x system-on-chip variants. MBLS102xA mainboard can be used as + starterkit. + items: + - enum: + - tq,ls1021a-tqmls1021a-mbls102xa + - const: tq,ls1021a-tqmls1021a + - const: fsl,ls1021a + - description: LS1028A based Boards items: - enum: @@ -1192,6 +1443,13 @@ properties: - fsl,ls1043a-qds - const: fsl,ls1043a + - description: TQ-Systems LS1043A based Boards + items: + - enum: + - tq,ls1043a-tqmls1043a-mbls10xxa + - const: tq,ls1043a-tqmls1043a + - const: fsl,ls1043a + - description: LS1046A based Boards items: - enum: @@ -1200,6 +1458,13 @@ properties: - fsl,ls1046a-rdb - const: fsl,ls1046a + - description: TQ-Systems LS1046A based Boards + items: + - enum: + - tq,ls1046a-tqmls1046a-mbls10xxa + - const: tq,ls1046a-tqmls1046a + - const: fsl,ls1046a + - description: LS1088A based Boards items: - enum: @@ -1207,6 +1472,13 @@ properties: - fsl,ls1088a-rdb - const: fsl,ls1088a + - description: TQ-Systems LS1088A based Boards + items: + - enum: + - tq,ls1088a-tqmls1088a-mbls10xxa + - const: tq,ls1088a-tqmls1088a + - const: fsl,ls1088a + - description: LS2080A based Boards items: - enum: @@ -1232,7 +1504,7 @@ properties: - fsl,lx2162a-qds - const: fsl,lx2160a - - description: SolidRun LX2160A based Boards + - description: SolidRun LX2160A CEX-7 based Boards items: - enum: - solidrun,clearfog-cx @@ -1240,6 +1512,23 @@ properties: - const: solidrun,lx2160a-cex7 - const: fsl,lx2160a + - description: SolidRun LX2162A SoM based Boards + items: + - enum: + - solidrun,lx2162a-clearfog + - const: solidrun,lx2162a-som + - const: fsl,lx2160a + + - description: + TQ-Systems TQMLX2160A is a series of socketable SOM featuring + LX2160A system-on-chip variants. MBLX2160A mainboard can be used a + starterkit. + items: + - enum: + - tq,lx2160a-tqmlx2160a-mblx2160a + - const: tq,lx2160a-tqmlx2160a + - const: fsl,lx2160a + - description: S32G2 based Boards items: - enum: diff --git a/dts/Bindings/arm/google.yaml b/dts/Bindings/arm/google.yaml new file mode 100644 index 0000000000..e20b5c9b16 --- /dev/null +++ b/dts/Bindings/arm/google.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/google.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Tensor platforms + +maintainers: + - Peter Griffin <peter.griffin@linaro.org> + +description: | + ARM platforms using SoCs designed by Google branded "Tensor" used in Pixel + devices. + + Currently upstream this is devices using "gs101" SoC which is found in Pixel + 6, Pixel 6 Pro and Pixel 6a. + + Google have a few different names for the SoC: + - Marketing name ("Tensor") + - Codename ("Whitechapel") + - SoC ID ("gs101") + - Die ID ("S5P9845") + + Likewise there are a couple of names for the actual device + - Marketing name ("Pixel 6") + - Codename ("Oriole") + + Devicetrees should use the lowercased SoC ID and lowercased board codename, + e.g. gs101 and gs101-oriole. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Google Pixel 6 / Oriole + items: + - enum: + - google,gs101-oriole + - const: google,gs101 + + # Bootloader requires empty ect node to be present + ect: + type: object + additionalProperties: false + +required: + - ect + +additionalProperties: true + +... diff --git a/dts/Bindings/arm/hisilicon/controller/cpuctrl.yaml b/dts/Bindings/arm/hisilicon/controller/cpuctrl.yaml index 528dad4cde..4fc208d399 100644 --- a/dts/Bindings/arm/hisilicon/controller/cpuctrl.yaml +++ b/dts/Bindings/arm/hisilicon/controller/cpuctrl.yaml @@ -29,6 +29,26 @@ properties: ranges: true +patternProperties: + "^clock@[0-9a-f]+$": + type: object + additionalProperties: false + + properties: + compatible: + const: hisilicon,hix5hd2-clock + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + required: + - compatible + - reg + - "#clock-cells" + required: - compatible - reg diff --git a/dts/Bindings/arm/hisilicon/controller/sysctrl.yaml b/dts/Bindings/arm/hisilicon/controller/sysctrl.yaml index 5a53d433b6..7a221e1c09 100644 --- a/dts/Bindings/arm/hisilicon/controller/sysctrl.yaml +++ b/dts/Bindings/arm/hisilicon/controller/sysctrl.yaml @@ -82,6 +82,23 @@ properties: ranges: true +patternProperties: + '^clock@': + type: object + additionalProperties: false + + properties: + compatible: + enum: + - hisilicon,hi3620-clock + - hisilicon,hi3620-mmc-clock + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + required: - compatible - reg diff --git a/dts/Bindings/arm/hisilicon/hisilicon.yaml b/dts/Bindings/arm/hisilicon/hisilicon.yaml index b384580229..5408763220 100644 --- a/dts/Bindings/arm/hisilicon/hisilicon.yaml +++ b/dts/Bindings/arm/hisilicon/hisilicon.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/hisilicon/hisilicon.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Hisilicon Platforms Device Tree Bindings +title: Hisilicon Platforms maintainers: - Wei Xu <xuwei5@hisilicon.com> diff --git a/dts/Bindings/arm/intel,socfpga.yaml b/dts/Bindings/arm/intel,socfpga.yaml index 4b4dcf551e..2ee0c740eb 100644 --- a/dts/Bindings/arm/intel,socfpga.yaml +++ b/dts/Bindings/arm/intel,socfpga.yaml @@ -21,6 +21,11 @@ properties: - intel,socfpga-agilex-n6000 - intel,socfpga-agilex-socdk - const: intel,socfpga-agilex + - description: Agilex5 boards + items: + - enum: + - intel,socfpga-agilex5-socdk + - const: intel,socfpga-agilex5 additionalProperties: true diff --git a/dts/Bindings/arm/intel-ixp4xx.yaml b/dts/Bindings/arm/intel-ixp4xx.yaml index 553dcbc70e..d60792b1d9 100644 --- a/dts/Bindings/arm/intel-ixp4xx.yaml +++ b/dts/Bindings/arm/intel-ixp4xx.yaml @@ -16,12 +16,28 @@ properties: oneOf: - items: - enum: + - adieng,coyote + - arcom,vulcan + - dlink,dsm-g600-a + - freecom,fsg-3 + - gateway,7001 + - gateworks,gw2348 + - goramo,multilink-router + - intel,ixdp425 + - intel,ixdpg425 + - iom,nas-100d - linksys,nslu2 + - netgear,wg302v1 + - netgear,wg302v2 + - usr,8200 - welltech,epbx100 + - linksys,wrv54g + - gemtek,gtwx5715 - const: intel,ixp42x - items: - enum: - gateworks,gw2358 + - intel,kixrp435 - const: intel,ixp43x additionalProperties: true diff --git a/dts/Bindings/arm/keystone/ti,k3-sci-common.yaml b/dts/Bindings/arm/keystone/ti,k3-sci-common.yaml index 5cbcacaeb4..4a323e8c78 100644 --- a/dts/Bindings/arm/keystone/ti,k3-sci-common.yaml +++ b/dts/Bindings/arm/keystone/ti,k3-sci-common.yaml @@ -1,10 +1,10 @@ -# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Common K3 TI-SCI bindings +title: Common K3 TI-SCI maintainers: - Nishanth Menon <nm@ti.com> diff --git a/dts/Bindings/arm/keystone/ti,sci.yaml b/dts/Bindings/arm/keystone/ti,sci.yaml index 34f5f877d4..c24ad0968f 100644 --- a/dts/Bindings/arm/keystone/ti,sci.yaml +++ b/dts/Bindings/arm/keystone/ti,sci.yaml @@ -1,10 +1,10 @@ -# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/arm/keystone/ti,sci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: TI-SCI controller device node bindings +title: TI-SCI controller maintainers: - Nishanth Menon <nm@ti.com> @@ -96,8 +96,8 @@ examples: compatible = "ti,k2g-sci"; ti,system-reboot-controller; mbox-names = "rx", "tx"; - mboxes= <&msgmgr 5 2>, - <&msgmgr 0 0>; + mboxes = <&msgmgr 5 2>, + <&msgmgr 0 0>; reg-names = "debug_messages"; reg = <0x02921800 0x800>; }; @@ -107,8 +107,8 @@ examples: compatible = "ti,k2g-sci"; ti,host-id = <12>; mbox-names = "rx", "tx"; - mboxes= <&secure_proxy_main 11>, - <&secure_proxy_main 13>; + mboxes = <&secure_proxy_main 11>, + <&secure_proxy_main 13>; reg-names = "debug_messages"; reg = <0x44083000 0x1000>; diff --git a/dts/Bindings/arm/l2c2x0.yaml b/dts/Bindings/arm/l2c2x0.yaml deleted file mode 100644 index 6b8f4d4fa5..0000000000 --- a/dts/Bindings/arm/l2c2x0.yaml +++ /dev/null @@ -1,242 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/l2c2x0.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: ARM L2 Cache Controller - -maintainers: - - Rob Herring <robh@kernel.org> - -description: |+ - ARM cores often have a separate L2C210/L2C220/L2C310 (also known as PL210/ - PL220/PL310 and variants) based level 2 cache controller. All these various - implementations of the L2 cache controller have compatible programming - models (Note 1). Some of the properties that are just prefixed "cache-*" are - taken from section 3.7.3 of the Devicetree Specification which can be found - at: - https://www.devicetree.org/specifications/ - - Note 1: The description in this document doesn't apply to integrated L2 - cache controllers as found in e.g. Cortex-A15/A7/A57/A53. These - integrated L2 controllers are assumed to be all preconfigured by - early secure boot code. Thus no need to deal with their configuration - in the kernel at all. - -allOf: - - $ref: /schemas/cache-controller.yaml# - -properties: - compatible: - oneOf: - - enum: - - arm,pl310-cache - - arm,l220-cache - - arm,l210-cache - # DEPRECATED by "brcm,bcm11351-a2-pl310-cache" - - bcm,bcm11351-a2-pl310-cache - # For Broadcom bcm11351 chipset where an - # offset needs to be added to the address before passing down to the L2 - # cache controller - - brcm,bcm11351-a2-pl310-cache - # Marvell Controller designed to be - # compatible with the ARM one, with system cache mode (meaning - # maintenance operations on L1 are broadcasted to the L2 and L2 - # performs the same operation). - - marvell,aurora-system-cache - # Marvell Controller designed to be - # compatible with the ARM one with outer cache mode. - - marvell,aurora-outer-cache - - items: - # Marvell Tauros3 cache controller, compatible - # with arm,pl310-cache controller. - - const: marvell,tauros3-cache - - const: arm,pl310-cache - - cache-level: - const: 2 - - cache-unified: true - cache-size: true - cache-sets: true - cache-block-size: true - cache-line-size: true - - reg: - maxItems: 1 - - arm,data-latency: - description: Cycles of latency for Data RAM accesses. Specifies 3 cells of - read, write and setup latencies. Minimum valid values are 1. Controllers - without setup latency control should use a value of 0. - $ref: /schemas/types.yaml#/definitions/uint32-array - minItems: 2 - maxItems: 3 - items: - minimum: 0 - maximum: 8 - - arm,tag-latency: - description: Cycles of latency for Tag RAM accesses. Specifies 3 cells of - read, write and setup latencies. Controllers without setup latency control - should use 0. Controllers without separate read and write Tag RAM latency - values should only use the first cell. - $ref: /schemas/types.yaml#/definitions/uint32-array - minItems: 1 - maxItems: 3 - items: - minimum: 0 - maximum: 8 - - arm,dirty-latency: - description: Cycles of latency for Dirty RAMs. This is a single cell. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 1 - maximum: 8 - - arm,filter-ranges: - description: <start length> Starting address and length of window to - filter. Addresses in the filter window are directed to the M1 port. Other - addresses will go to the M0 port. - $ref: /schemas/types.yaml#/definitions/uint32-array - items: - minItems: 2 - maxItems: 2 - - arm,io-coherent: - description: indicates that the system is operating in an hardware - I/O coherent mode. Valid only when the arm,pl310-cache compatible - string is used. - type: boolean - - interrupts: - # Either a single combined interrupt or up to 9 individual interrupts - minItems: 1 - maxItems: 9 - - cache-id-part: - description: cache id part number to be used if it is not present - on hardware - $ref: /schemas/types.yaml#/definitions/uint32 - - wt-override: - description: If present then L2 is forced to Write through mode - type: boolean - - arm,double-linefill: - description: Override double linefill enable setting. Enable if - non-zero, disable if zero. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - arm,double-linefill-incr: - description: Override double linefill on INCR read. Enable - if non-zero, disable if zero. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - arm,double-linefill-wrap: - description: Override double linefill on WRAP read. Enable - if non-zero, disable if zero. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - arm,prefetch-drop: - description: Override prefetch drop enable setting. Enable if non-zero, - disable if zero. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - arm,prefetch-offset: - description: Override prefetch offset value. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2, 3, 4, 5, 6, 7, 15, 23, 31] - - arm,shared-override: - description: The default behavior of the L220 or PL310 cache - controllers with respect to the shareable attribute is to transform "normal - memory non-cacheable transactions" into "cacheable no allocate" (for reads) - or "write through no write allocate" (for writes). - On systems where this may cause DMA buffer corruption, this property must - be specified to indicate that such transforms are precluded. - type: boolean - - arm,parity-enable: - description: enable parity checking on the L2 cache (L220 or PL310). - type: boolean - - arm,parity-disable: - description: disable parity checking on the L2 cache (L220 or PL310). - type: boolean - - marvell,ecc-enable: - description: enable ECC protection on the L2 cache - type: boolean - - arm,outer-sync-disable: - description: disable the outer sync operation on the L2 cache. - Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that - will randomly hang unless outer sync operations are disabled. - type: boolean - - prefetch-data: - description: | - Data prefetch. Value: <0> (forcibly disable), <1> - (forcibly enable), property absent (retain settings set by firmware) - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - prefetch-instr: - description: | - Instruction prefetch. Value: <0> (forcibly disable), - <1> (forcibly enable), property absent (retain settings set by - firmware) - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - arm,dynamic-clock-gating: - description: | - L2 dynamic clock gating. Value: <0> (forcibly - disable), <1> (forcibly enable), property absent (OS specific behavior, - preferably retain firmware settings) - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - arm,standby-mode: - description: L2 standby mode enable. Value <0> (forcibly disable), - <1> (forcibly enable), property absent (OS specific behavior, - preferably retain firmware settings) - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - arm,early-bresp-disable: - description: Disable the CA9 optimization Early BRESP (PL310) - type: boolean - - arm,full-line-zero-disable: - description: Disable the CA9 optimization Full line of zero - write (PL310) - type: boolean - -required: - - compatible - - cache-unified - - reg - -additionalProperties: false - -examples: - - | - cache-controller@fff12000 { - compatible = "arm,pl310-cache"; - reg = <0xfff12000 0x1000>; - arm,data-latency = <1 1 1>; - arm,tag-latency = <2 2 2>; - arm,filter-ranges = <0x80000000 0x8000000>; - cache-unified; - cache-level = <2>; - interrupts = <45>; - }; - -... diff --git a/dts/Bindings/arm/marvell/armada-38x.txt b/dts/Bindings/arm/marvell/armada-38x.txt deleted file mode 100644 index 202953f188..0000000000 --- a/dts/Bindings/arm/marvell/armada-38x.txt +++ /dev/null @@ -1,27 +0,0 @@ -Marvell Armada 38x Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 38x family shall have the -following property: - -Required root node property: - - - compatible: must contain "marvell,armada380" - -In addition, boards using the Marvell Armada 385 SoC shall have the -following property before the previous one: - -Required root node property: - -compatible: must contain "marvell,armada385" - -In addition, boards using the Marvell Armada 388 SoC shall have the -following property before the previous one: - -Required root node property: - -compatible: must contain "marvell,armada388" - -Example: - -compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380"; diff --git a/dts/Bindings/arm/marvell/armada-38x.yaml b/dts/Bindings/arm/marvell/armada-38x.yaml new file mode 100644 index 0000000000..cdf805b5db --- /dev/null +++ b/dts/Bindings/arm/marvell/armada-38x.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/armada-38x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 38x Platforms + +maintainers: + - Gregory CLEMENT <gregory.clement@bootlin.com> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: + Netgear Armada 380 GS110EM Managed Switch. + items: + - const: netgear,gs110emx + - const: marvell,armada380 + + - description: + Marvell Armada 385 Development Boards. + items: + - enum: + - marvell,a385-db-amc + - marvell,a385-db-ap + - const: marvell,armada385 + - const: marvell,armada380 + + - description: + SolidRun Armada 385 based single-board computers. + items: + - enum: + - solidrun,clearfog-gtr-l8 + - solidrun,clearfog-gtr-s4 + - const: marvell,armada385 + - const: marvell,armada380 + + - description: + Kobol Armada 388 based Helios-4 NAS. + items: + - const: kobol,helios4 + - const: marvell,armada388 + - const: marvell,armada385 + - const: marvell,armada380 + + - description: + Marvell Armada 388 Development Boards. + items: + - enum: + - marvell,a388-gp + - const: marvell,armada388 + - const: marvell,armada385 + - const: marvell,armada380 + + - description: + SolidRun Armada 388 clearfog family single-board computers. + items: + - enum: + - solidrun,clearfog-base-a1 + - solidrun,clearfog-pro-a1 + - const: solidrun,clearfog-a1 + - const: marvell,armada388 + - const: marvell,armada385 + - const: marvell,armada380 + +additionalProperties: true diff --git a/dts/Bindings/arm/marvell/armada-7k-8k.yaml b/dts/Bindings/arm/marvell/armada-7k-8k.yaml index e9bf305452..16d2e132d3 100644 --- a/dts/Bindings/arm/marvell/armada-7k-8k.yaml +++ b/dts/Bindings/arm/marvell/armada-7k-8k.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Marvell Armada 7K/8K Platforms Device Tree Bindings +title: Marvell Armada 7K/8K Platforms maintainers: - Gregory CLEMENT <gregory.clement@bootlin.com> @@ -60,4 +60,26 @@ properties: - const: marvell,armada-ap807-quad - const: marvell,armada-ap807 + - description: + Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus + Armada CN9130 COM Express CPU module + items: + - const: marvell,cn9130-ac5x-carrier + - const: marvell,rd-ac5x-carrier + - const: marvell,cn9130-cpu-module + - const: marvell,cn9130 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + + - description: + Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus + Armada CN9131 COM Express CPU module + items: + - const: marvell,cn9131-ac5x-carrier + - const: marvell,rd-ac5x-carrier + - const: marvell,cn9131-cpu-module + - const: marvell,cn9131 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + additionalProperties: true diff --git a/dts/Bindings/arm/marvell/cp110-system-controller.txt b/dts/Bindings/arm/marvell/cp110-system-controller.txt index d84105c7c9..9d5d70c980 100644 --- a/dts/Bindings/arm/marvell/cp110-system-controller.txt +++ b/dts/Bindings/arm/marvell/cp110-system-controller.txt @@ -21,13 +21,13 @@ The Device Tree node representing this System Controller 0 provides a number of clocks: - a set of core clocks - - a set of gatable clocks + - a set of gateable clocks Those clocks can be referenced by other Device Tree nodes using two cells: - The first cell must be 0 or 1. 0 for the core clocks and 1 for the - gatable clocks. - - The second cell identifies the particular core clock or gatable + gateable clocks. + - The second cell identifies the particular core clock or gateable clocks. The following clocks are available: @@ -38,7 +38,7 @@ The following clocks are available: - 0 3 Core - 0 4 NAND core - 0 5 SDIO core - - Gatable clocks + - Gateable clocks - 1 0 Audio - 1 1 Comm Unit - 1 2 NAND diff --git a/dts/Bindings/arm/mediatek.yaml b/dts/Bindings/arm/mediatek.yaml index d76ce4c381..09f9ffd3ff 100644 --- a/dts/Bindings/arm/mediatek.yaml +++ b/dts/Bindings/arm/mediatek.yaml @@ -17,6 +17,7 @@ properties: const: '/' compatible: oneOf: + # Sort by SoC (last) compatible, then board compatible - items: - enum: - mediatek,mt2701-evb @@ -58,6 +59,7 @@ properties: - items: - enum: - mediatek,mt6795-evb + - sony,xperia-m5 - const: mediatek,mt6795 - items: - enum: @@ -83,6 +85,12 @@ properties: - const: mediatek,mt7629 - items: - enum: + - xiaomi,ax3000t + - const: mediatek,mt7981b + - items: + - enum: + - acelink,ew-7886cax + - bananapi,bpi-r3 - mediatek,mt7986a-rfb - const: mediatek,mt7986a - items: @@ -91,6 +99,10 @@ properties: - const: mediatek,mt7986b - items: - enum: + - bananapi,bpi-r4 + - const: mediatek,mt7988a + - items: + - enum: - mediatek,mt8127-moose - const: mediatek,mt8127 - items: @@ -127,60 +139,10 @@ properties: - enum: - mediatek,mt8173-evb - const: mediatek,mt8173 - - items: - - enum: - - mediatek,mt8183-evb - - const: mediatek,mt8183 - - description: Google Hayato - items: - - const: google,hayato-rev1 - - const: google,hayato - - const: mediatek,mt8192 - - description: Google Spherion (Acer Chromebook 514) - items: - - const: google,spherion-rev3 - - const: google,spherion-rev2 - - const: google,spherion-rev1 - - const: google,spherion-rev0 - - const: google,spherion - - const: mediatek,mt8192 - - description: Acer Tomato (Acer Chromebook Spin 513 CP513-2H) - items: - - enum: - - google,tomato-rev2 - - google,tomato-rev1 - - const: google,tomato - - const: mediatek,mt8195 - - description: Acer Tomato rev3 - 4 (Acer Chromebook Spin 513 CP513-2H) - items: - - const: google,tomato-rev4 - - const: google,tomato-rev3 - - const: google,tomato - - const: mediatek,mt8195 - - items: - - enum: - - mediatek,mt8186-evb - - const: mediatek,mt8186 - - items: - - enum: - - mediatek,mt8192-evb - - const: mediatek,mt8192 - - items: - - enum: - - mediatek,mt8195-demo - - mediatek,mt8195-evb - - const: mediatek,mt8195 - description: Google Burnet (HP Chromebook x360 11MK G3 EE) items: - const: google,burnet - const: mediatek,mt8183 - - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) - items: - - enum: - - google,krane-sku0 - - google,krane-sku176 - - const: google,krane - - const: mediatek,mt8183 - description: Google Cozmo (Acer Chromebook 314) items: - const: google,cozmo @@ -222,6 +184,13 @@ properties: items: - const: google,kappa - const: mediatek,mt8183 + - description: Google Katsu (ASUS Chromebook Detachable CZ1) + items: + - enum: + - google,katsu-sku32 + - google,katsu-sku38 + - const: google,katsu + - const: mediatek,mt8183 - description: Google Kodama (Lenovo 10e Chromebook Tablet) items: - enum: @@ -231,6 +200,27 @@ properties: - google,kodama-sku32 - const: google,kodama - const: mediatek,mt8183 + - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) + items: + - enum: + - google,krane-sku0 + - google,krane-sku176 + - const: google,krane + - const: mediatek,mt8183 + - description: Google Makomo (Lenovo 100e Chromebook 2nd Gen MTK 2) + items: + - enum: + - google,makomo-sku0 + - google,makomo-sku1 + - const: google,makomo + - const: mediatek,mt8183 + - description: Google Pico (Acer Chromebook Spin 311) + items: + - enum: + - google,pico-sku1 + - google,pico-sku2 + - const: google,pico + - const: mediatek,mt8183 - description: Google Willow (Acer Chromebook 311 C722/C722T) items: - enum: @@ -240,8 +230,133 @@ properties: - const: mediatek,mt8183 - items: - enum: + - mediatek,mt8183-evb + - const: mediatek,mt8183 + - items: + - enum: - mediatek,mt8183-pumpkin - const: mediatek,mt8183 + - description: Google Magneton (Lenovo IdeaPad Slim 3 Chromebook (14M868)) + items: + - const: google,steelix-sku393219 + - const: google,steelix-sku393216 + - const: google,steelix + - const: mediatek,mt8186 + - description: Google Magneton (Lenovo IdeaPad Slim 3 Chromebook (14M868)) + items: + - const: google,steelix-sku393220 + - const: google,steelix-sku393217 + - const: google,steelix + - const: mediatek,mt8186 + - description: Google Magneton (Lenovo IdeaPad Slim 3 Chromebook (14M868)) + items: + - const: google,steelix-sku393221 + - const: google,steelix-sku393218 + - const: google,steelix + - const: mediatek,mt8186 + - description: Google Rusty (Lenovo 100e Chromebook Gen 4) + items: + - const: google,steelix-sku196609 + - const: google,steelix-sku196608 + - const: google,steelix + - const: mediatek,mt8186 + - description: Google Steelix (Lenovo 300e Yoga Chromebook Gen 4) + items: + - enum: + - google,steelix-sku131072 + - google,steelix-sku131073 + - const: google,steelix + - const: mediatek,mt8186 + - description: Google Tentacruel (ASUS Chromebook CM14 Flip CM1402F) + items: + - const: google,tentacruel-sku262147 + - const: google,tentacruel-sku262146 + - const: google,tentacruel-sku262145 + - const: google,tentacruel-sku262144 + - const: google,tentacruel + - const: mediatek,mt8186 + - description: Google Tentacruel (ASUS Chromebook CM14 Flip CM1402F) + items: + - const: google,tentacruel-sku262151 + - const: google,tentacruel-sku262150 + - const: google,tentacruel-sku262149 + - const: google,tentacruel-sku262148 + - const: google,tentacruel + - const: mediatek,mt8186 + - description: Google Tentacool (ASUS Chromebook CM14 CM1402C) + items: + - const: google,tentacruel-sku327681 + - const: google,tentacruel + - const: mediatek,mt8186 + - description: Google Tentacool (ASUS Chromebook CM14 CM1402C) + items: + - const: google,tentacruel-sku327683 + - const: google,tentacruel + - const: mediatek,mt8186 + - items: + - enum: + - mediatek,mt8186-evb + - const: mediatek,mt8186 + - items: + - enum: + - mediatek,mt8188-evb + - const: mediatek,mt8188 + - description: Google Hayato + items: + - const: google,hayato-rev1 + - const: google,hayato + - const: mediatek,mt8192 + - description: Google Hayato rev5 + items: + - const: google,hayato-rev5-sku2 + - const: google,hayato-sku2 + - const: google,hayato + - const: mediatek,mt8192 + - description: Google Spherion (Acer Chromebook 514) + items: + - const: google,spherion-rev3 + - const: google,spherion-rev2 + - const: google,spherion-rev1 + - const: google,spherion-rev0 + - const: google,spherion + - const: mediatek,mt8192 + - description: Google Spherion rev4 (Acer Chromebook 514) + items: + - const: google,spherion-rev4 + - const: google,spherion + - const: mediatek,mt8192 + - items: + - enum: + - mediatek,mt8192-evb + - const: mediatek,mt8192 + - description: Acer Tomato (Acer Chromebook Spin 513 CP513-2H) + items: + - enum: + - google,tomato-rev2 + - google,tomato-rev1 + - const: google,tomato + - const: mediatek,mt8195 + - description: Acer Tomato rev3 - 4 (Acer Chromebook Spin 513 CP513-2H) + items: + - const: google,tomato-rev4 + - const: google,tomato-rev3 + - const: google,tomato + - const: mediatek,mt8195 + - items: + - enum: + - mediatek,mt8195-demo + - mediatek,mt8195-evb + - const: mediatek,mt8195 + - items: + - enum: + - mediatek,mt8365-evk + - const: mediatek,mt8365 + - items: + - enum: + - mediatek,mt8395-evk + - radxa,nio-12l + - const: mediatek,mt8395 + - const: mediatek,mt8195 - items: - enum: - mediatek,mt8516-pumpkin diff --git a/dts/Bindings/arm/mediatek/mediatek,audsys.txt b/dts/Bindings/arm/mediatek/mediatek,audsys.txt deleted file mode 100644 index 699776be1d..0000000000 --- a/dts/Bindings/arm/mediatek/mediatek,audsys.txt +++ /dev/null @@ -1,39 +0,0 @@ -MediaTek AUDSYS controller -============================ - -The MediaTek AUDSYS controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be one of: - - "mediatek,mt2701-audsys", "syscon" - - "mediatek,mt6765-audsys", "syscon" - - "mediatek,mt6779-audio", "syscon" - - "mediatek,mt7622-audsys", "syscon" - - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" - - "mediatek,mt8167-audiosys", "syscon" - - "mediatek,mt8183-audiosys", "syscon" - - "mediatek,mt8192-audsys", "syscon" - - "mediatek,mt8516-audsys", "syscon" -- #clock-cells: Must be 1 - -The AUDSYS controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Required sub-nodes: -------- -For common binding part and usage, refer to -../sonud/mt2701-afe-pcm.txt. - -Example: - - audsys: clock-controller@11220000 { - compatible = "mediatek,mt7622-audsys", "syscon"; - reg = <0 0x11220000 0 0x2000>; - #clock-cells = <1>; - - afe: audio-controller { - ... - }; - }; diff --git a/dts/Bindings/arm/mediatek/mediatek,audsys.yaml b/dts/Bindings/arm/mediatek/mediatek,audsys.yaml new file mode 100644 index 0000000000..45d4a66200 --- /dev/null +++ b/dts/Bindings/arm/mediatek/mediatek,audsys.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,audsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek AUDSYS controller + +maintainers: + - Eugen Hristev <eugen.hristev@collabora.com> + +description: + The MediaTek AUDSYS controller provides various clocks to the system. + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2701-audsys + - mediatek,mt6765-audsys + - mediatek,mt6779-audsys + - mediatek,mt7622-audsys + - mediatek,mt8167-audsys + - mediatek,mt8173-audsys + - mediatek,mt8183-audsys + - mediatek,mt8186-audsys + - mediatek,mt8192-audsys + - mediatek,mt8516-audsys + - const: syscon + - items: + # Special case for mt7623 for backward compatibility + - const: mediatek,mt7623-audsys + - const: mediatek,mt2701-audsys + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + audio-controller: + $ref: /schemas/sound/mediatek,mt2701-audio.yaml# + type: object + +required: + - compatible + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/mt2701-power.h> + #include <dt-bindings/clock/mt2701-clk.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + audsys: clock-controller@11220000 { + compatible = "mediatek,mt7622-audsys", "syscon"; + reg = <0 0x11220000 0 0x2000>; + #clock-cells = <1>; + + afe: audio-controller { + compatible = "mediatek,mt2701-audio"; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "afe", "asys"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + + clocks = <&infracfg CLK_INFRA_AUDIO>, + <&topckgen CLK_TOP_AUD_MUX1_SEL>, + <&topckgen CLK_TOP_AUD_MUX2_SEL>, + <&topckgen CLK_TOP_AUD_48K_TIMING>, + <&topckgen CLK_TOP_AUD_44K_TIMING>, + <&topckgen CLK_TOP_AUD_K1_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K2_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K3_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K4_SRC_SEL>, + <&topckgen CLK_TOP_AUD_K1_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K2_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K3_SRC_DIV>, + <&topckgen CLK_TOP_AUD_K4_SRC_DIV>, + <&topckgen CLK_TOP_AUD_I2S1_MCLK>, + <&topckgen CLK_TOP_AUD_I2S2_MCLK>, + <&topckgen CLK_TOP_AUD_I2S3_MCLK>, + <&topckgen CLK_TOP_AUD_I2S4_MCLK>, + <&audsys CLK_AUD_I2SO1>, + <&audsys CLK_AUD_I2SO2>, + <&audsys CLK_AUD_I2SO3>, + <&audsys CLK_AUD_I2SO4>, + <&audsys CLK_AUD_I2SIN1>, + <&audsys CLK_AUD_I2SIN2>, + <&audsys CLK_AUD_I2SIN3>, + <&audsys CLK_AUD_I2SIN4>, + <&audsys CLK_AUD_ASRCO1>, + <&audsys CLK_AUD_ASRCO2>, + <&audsys CLK_AUD_ASRCO3>, + <&audsys CLK_AUD_ASRCO4>, + <&audsys CLK_AUD_AFE>, + <&audsys CLK_AUD_AFE_CONN>, + <&audsys CLK_AUD_A1SYS>, + <&audsys CLK_AUD_A2SYS>, + <&audsys CLK_AUD_AFE_MRGIF>; + + clock-names = "infra_sys_audio_clk", + "top_audio_mux1_sel", + "top_audio_mux2_sel", + "top_audio_a1sys_hp", + "top_audio_a2sys_hp", + "i2s0_src_sel", + "i2s1_src_sel", + "i2s2_src_sel", + "i2s3_src_sel", + "i2s0_src_div", + "i2s1_src_div", + "i2s2_src_div", + "i2s3_src_div", + "i2s0_mclk_en", + "i2s1_mclk_en", + "i2s2_mclk_en", + "i2s3_mclk_en", + "i2so0_hop_ck", + "i2so1_hop_ck", + "i2so2_hop_ck", + "i2so3_hop_ck", + "i2si0_hop_ck", + "i2si1_hop_ck", + "i2si2_hop_ck", + "i2si3_hop_ck", + "asrc0_out_ck", + "asrc1_out_ck", + "asrc2_out_ck", + "asrc3_out_ck", + "audio_afe_pd", + "audio_afe_conn_pd", + "audio_a1sys_pd", + "audio_a2sys_pd", + "audio_mrgif_pd"; + + assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>, + <&topckgen CLK_TOP_AUD_MUX2_SEL>, + <&topckgen CLK_TOP_AUD_MUX1_DIV>, + <&topckgen CLK_TOP_AUD_MUX2_DIV>; + assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>, + <&topckgen CLK_TOP_AUD2PLL_90M>; + assigned-clock-rates = <0>, <0>, <49152000>, <45158400>; + }; + }; + }; diff --git a/dts/Bindings/arm/mediatek/mediatek,ethsys.txt b/dts/Bindings/arm/mediatek/mediatek,ethsys.txt deleted file mode 100644 index 0502db7368..0000000000 --- a/dts/Bindings/arm/mediatek/mediatek,ethsys.txt +++ /dev/null @@ -1,28 +0,0 @@ -Mediatek ethsys controller -============================ - -The Mediatek ethsys controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt2701-ethsys", "syscon" - - "mediatek,mt7622-ethsys", "syscon" - - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon" - - "mediatek,mt7629-ethsys", "syscon" - - "mediatek,mt7986-ethsys", "syscon" -- #clock-cells: Must be 1 -- #reset-cells: Must be 1 - -The ethsys controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -ethsys: clock-controller@1b000000 { - compatible = "mediatek,mt2701-ethsys", "syscon"; - reg = <0 0x1b000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/dts/Bindings/arm/mediatek/mediatek,hifsys.txt b/dts/Bindings/arm/mediatek/mediatek,hifsys.txt deleted file mode 100644 index 323905af82..0000000000 --- a/dts/Bindings/arm/mediatek/mediatek,hifsys.txt +++ /dev/null @@ -1,26 +0,0 @@ -Mediatek hifsys controller -============================ - -The Mediatek hifsys controller provides various clocks and reset -outputs to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt2701-hifsys", "syscon" - - "mediatek,mt7622-hifsys", "syscon" - - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" -- #clock-cells: Must be 1 - -The hifsys controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -hifsys: clock-controller@1a000000 { - compatible = "mediatek,mt2701-hifsys", "syscon"; - reg = <0 0x1a000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/dts/Bindings/arm/mediatek/mediatek,infracfg.yaml b/dts/Bindings/arm/mediatek/mediatek,infracfg.yaml index 1d7c837d93..230b5188a8 100644 --- a/dts/Bindings/arm/mediatek/mediatek,infracfg.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,infracfg.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Infrastructure System Configuration Controller @@ -28,7 +28,9 @@ properties: - mediatek,mt6797-infracfg - mediatek,mt7622-infracfg - mediatek,mt7629-infracfg + - mediatek,mt7981-infracfg - mediatek,mt7986-infracfg + - mediatek,mt7988-infracfg - mediatek,mt8135-infracfg - mediatek,mt8167-infracfg - mediatek,mt8173-infracfg diff --git a/dts/Bindings/arm/mediatek/mediatek,mipi0a.txt b/dts/Bindings/arm/mediatek/mediatek,mipi0a.txt index 8be5978f38..1c671943ce 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mipi0a.txt +++ b/dts/Bindings/arm/mediatek/mediatek,mipi0a.txt @@ -16,7 +16,7 @@ The available clocks are defined in dt-bindings/clock/mt*-clk.h. The mipi0a controller also uses the common power domain from Documentation/devicetree/bindings/soc/mediatek/scpsys.txt -The available power doamins are defined in dt-bindings/power/mt*-power.h. +The available power domains are defined in dt-bindings/power/mt*-power.h. Example: diff --git a/dts/Bindings/arm/mediatek/mediatek,mmsys.yaml b/dts/Bindings/arm/mediatek/mediatek,mmsys.yaml index eb451bec23..b3c6888c14 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mmsys.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek mmsys controller @@ -31,15 +31,34 @@ properties: - mediatek,mt8173-mmsys - mediatek,mt8183-mmsys - mediatek,mt8186-mmsys + - mediatek,mt8188-vdosys0 + - mediatek,mt8188-vdosys1 + - mediatek,mt8188-vppsys0 + - mediatek,mt8188-vppsys1 - mediatek,mt8192-mmsys - - mediatek,mt8195-mmsys + - mediatek,mt8195-vdosys1 + - mediatek,mt8195-vppsys0 + - mediatek,mt8195-vppsys1 - mediatek,mt8365-mmsys - const: syscon + + - description: vdosys0 and vdosys1 are 2 display HW pipelines, + so mt8195 binding should be deprecated. + deprecated: true + items: + - const: mediatek,mt8195-mmsys + - const: syscon + - items: - const: mediatek,mt7623-mmsys - const: mediatek,mt2701-mmsys - const: syscon + - items: + - const: mediatek,mt8195-vdosys0 + - const: mediatek,mt8195-mmsys + - const: syscon + reg: maxItems: 1 diff --git a/dts/Bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml b/dts/Bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml index 9fbeb626ab..d89848a8f4 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek PCIE Mirror Controller for MT7622 diff --git a/dts/Bindings/arm/mediatek/mediatek,mt7622-wed.yaml b/dts/Bindings/arm/mediatek/mediatek,mt7622-wed.yaml index 84fb0a146b..e7720caf31 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt7622-wed.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt7622-wed.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Wireless Ethernet Dispatch Controller for MT7622 @@ -20,7 +20,9 @@ properties: items: - enum: - mediatek,mt7622-wed + - mediatek,mt7981-wed - mediatek,mt7986-wed + - mediatek,mt7988-wed - const: syscon reg: @@ -29,6 +31,38 @@ properties: interrupts: maxItems: 1 + memory-region: + items: + - description: firmware EMI region + - description: firmware ILM region + - description: firmware DLM region + - description: firmware CPU DATA region + - description: firmware BOOT region + + memory-region-names: + items: + - const: wo-emi + - const: wo-ilm + - const: wo-dlm + - const: wo-data + - const: wo-boot + + mediatek,wo-ccif: + $ref: /schemas/types.yaml#/definitions/phandle + description: mediatek wed-wo controller interface. + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt7622-wed + then: + properties: + memory-region-names: false + memory-region: false + mediatek,wo-ccif: false + required: - compatible - reg @@ -49,3 +83,23 @@ examples: interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>; }; }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + wed@15010000 { + compatible = "mediatek,mt7986-wed", "syscon"; + reg = <0 0x15010000 0 0x1000>; + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; + + memory-region = <&wo_emi>, <&wo_ilm>, <&wo_dlm>, + <&wo_data>, <&wo_boot>; + memory-region-names = "wo-emi", "wo-ilm", "wo-dlm", + "wo-data", "wo-boot"; + mediatek,wo-ccif = <&wo_ccif0>; + }; + }; diff --git a/dts/Bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml b/dts/Bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml index 96221f51c1..82f64469a6 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wed-pcie.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wed-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek PCIE WED Controller for MT7986 diff --git a/dts/Bindings/arm/mediatek/mediatek,mt8186-clock.yaml b/dts/Bindings/arm/mediatek/mediatek,mt8186-clock.yaml index cf1002c3ef..7cd14b163a 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt8186-clock.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt8186-clock.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-clock.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Functional Clock Controller for MT8186 diff --git a/dts/Bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml b/dts/Bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml index 661047d26e..64c7694166 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-sys-clock.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-sys-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek System Clock Controller for MT8186 diff --git a/dts/Bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/dts/Bindings/arm/mediatek/mediatek,mt8192-clock.yaml index b57cc2e69e..dff4c8e8fd 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt8192-clock.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt8192-clock.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-clock.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Functional Clock Controller for MT8192 diff --git a/dts/Bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml b/dts/Bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml index 27f79175c6..8d608fddf3 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-sys-clock.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-sys-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek System Clock Controller for MT8192 diff --git a/dts/Bindings/arm/mediatek/mediatek,mt8195-clock.yaml b/dts/Bindings/arm/mediatek/mediatek,mt8195-clock.yaml index 17fcbb45d1..d17164b0b1 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt8195-clock.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt8195-clock.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-clock.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Functional Clock Controller for MT8195 @@ -28,11 +28,9 @@ properties: - mediatek,mt8195-imp_iic_wrap_s - mediatek,mt8195-imp_iic_wrap_w - mediatek,mt8195-mfgcfg - - mediatek,mt8195-vppsys0 - mediatek,mt8195-wpesys - mediatek,mt8195-wpesys_vpp0 - mediatek,mt8195-wpesys_vpp1 - - mediatek,mt8195-vppsys1 - mediatek,mt8195-imgsys - mediatek,mt8195-imgsys1_dip_top - mediatek,mt8195-imgsys1_dip_nr @@ -93,13 +91,6 @@ examples: }; - | - vppsys0: clock-controller@14000000 { - compatible = "mediatek,mt8195-vppsys0"; - reg = <0x14000000 0x1000>; - #clock-cells = <1>; - }; - - - | wpesys: clock-controller@14e00000 { compatible = "mediatek,mt8195-wpesys"; reg = <0x14e00000 0x1000>; @@ -121,13 +112,6 @@ examples: }; - | - vppsys1: clock-controller@14f00000 { - compatible = "mediatek,mt8195-vppsys1"; - reg = <0x14f00000 0x1000>; - #clock-cells = <1>; - }; - - - | imgsys: clock-controller@15000000 { compatible = "mediatek,mt8195-imgsys"; reg = <0x15000000 0x1000>; diff --git a/dts/Bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml b/dts/Bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml index 95b6bdf999..066c9b3d6a 100644 --- a/dts/Bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-sys-clock.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-sys-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek System Clock Controller for MT8195 diff --git a/dts/Bindings/arm/mediatek/mediatek,pciesys.txt b/dts/Bindings/arm/mediatek/mediatek,pciesys.txt deleted file mode 100644 index d179a61536..0000000000 --- a/dts/Bindings/arm/mediatek/mediatek,pciesys.txt +++ /dev/null @@ -1,25 +0,0 @@ -MediaTek PCIESYS controller -============================ - -The MediaTek PCIESYS controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt7622-pciesys", "syscon" - - "mediatek,mt7629-pciesys", "syscon" -- #clock-cells: Must be 1 -- #reset-cells: Must be 1 - -The PCIESYS controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -pciesys: pciesys@1a100800 { - compatible = "mediatek,mt7622-pciesys", "syscon"; - reg = <0 0x1a100800 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/dts/Bindings/arm/mediatek/mediatek,pericfg.yaml b/dts/Bindings/arm/mediatek/mediatek,pericfg.yaml index ef62cbb135..33c94c4918 100644 --- a/dts/Bindings/arm/mediatek/mediatek,pericfg.yaml +++ b/dts/Bindings/arm/mediatek/mediatek,pericfg.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,pericfg.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,pericfg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Peripheral Configuration Controller @@ -28,6 +28,7 @@ properties: - mediatek,mt8173-pericfg - mediatek,mt8183-pericfg - mediatek,mt8186-pericfg + - mediatek,mt8188-pericfg - mediatek,mt8195-pericfg - mediatek,mt8516-pericfg - const: syscon diff --git a/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt b/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt deleted file mode 100644 index 29ca7a10b3..0000000000 --- a/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt +++ /dev/null @@ -1,25 +0,0 @@ -MediaTek SGMIISYS controller -============================ - -The MediaTek SGMIISYS controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt7622-sgmiisys", "syscon" - - "mediatek,mt7629-sgmiisys", "syscon" - - "mediatek,mt7986-sgmiisys_0", "syscon" - - "mediatek,mt7986-sgmiisys_1", "syscon" -- #clock-cells: Must be 1 - -The SGMIISYS controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -sgmiisys: sgmiisys@1b128000 { - compatible = "mediatek,mt7622-sgmiisys", "syscon"; - reg = <0 0x1b128000 0 0x1000>; - #clock-cells = <1>; -}; diff --git a/dts/Bindings/arm/mediatek/mediatek,ssusbsys.txt b/dts/Bindings/arm/mediatek/mediatek,ssusbsys.txt deleted file mode 100644 index 7cb02c9306..0000000000 --- a/dts/Bindings/arm/mediatek/mediatek,ssusbsys.txt +++ /dev/null @@ -1,25 +0,0 @@ -MediaTek SSUSBSYS controller -============================ - -The MediaTek SSUSBSYS controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt7622-ssusbsys", "syscon" - - "mediatek,mt7629-ssusbsys", "syscon" -- #clock-cells: Must be 1 -- #reset-cells: Must be 1 - -The SSUSBSYS controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -ssusbsys: ssusbsys@1a000000 { - compatible = "mediatek,mt7622-ssusbsys", "syscon"; - reg = <0 0x1a000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/dts/Bindings/arm/mediatek/mediatek,vcodecsys.txt b/dts/Bindings/arm/mediatek/mediatek,vcodecsys.txt index c877bcc1a5..f090147b7f 100644 --- a/dts/Bindings/arm/mediatek/mediatek,vcodecsys.txt +++ b/dts/Bindings/arm/mediatek/mediatek,vcodecsys.txt @@ -15,7 +15,7 @@ The available clocks are defined in dt-bindings/clock/mt*-clk.h. The vcodecsys controller also uses the common power domain from Documentation/devicetree/bindings/soc/mediatek/scpsys.txt -The available power doamins are defined in dt-bindings/power/mt*-power.h. +The available power domains are defined in dt-bindings/power/mt*-power.h. Example: diff --git a/dts/Bindings/arm/mrvl/feroceon.txt b/dts/Bindings/arm/mrvl/feroceon.txt deleted file mode 100644 index 0d244b999d..0000000000 --- a/dts/Bindings/arm/mrvl/feroceon.txt +++ /dev/null @@ -1,16 +0,0 @@ -* Marvell Feroceon Cache - -Required properties: -- compatible : Should be either "marvell,feroceon-cache" or - "marvell,kirkwood-cache". - -Optional properties: -- reg : Address of the L2 cache control register. Mandatory for - "marvell,kirkwood-cache", not used by "marvell,feroceon-cache" - - -Example: - l2: l2-cache@20128 { - compatible = "marvell,kirkwood-cache"; - reg = <0x20128 0x4>; - }; diff --git a/dts/Bindings/arm/mrvl/mrvl.yaml b/dts/Bindings/arm/mrvl/mrvl.yaml index d581161361..4c43eaf363 100644 --- a/dts/Bindings/arm/mrvl/mrvl.yaml +++ b/dts/Bindings/arm/mrvl/mrvl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/mrvl/mrvl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Marvell Platforms Device Tree Bindings +title: Marvell Platforms maintainers: - Lubomir Rintel <lkundrak@v3.sk> diff --git a/dts/Bindings/arm/mrvl/tauros2.txt b/dts/Bindings/arm/mrvl/tauros2.txt deleted file mode 100644 index 31af1cbb60..0000000000 --- a/dts/Bindings/arm/mrvl/tauros2.txt +++ /dev/null @@ -1,17 +0,0 @@ -* Marvell Tauros2 Cache - -Required properties: -- compatible : Should be "marvell,tauros2-cache". -- marvell,tauros2-cache-features : Specify the features supported for the - tauros2 cache. - The features including - CACHE_TAUROS2_PREFETCH_ON (1 << 0) - CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1) - The definition can be found at - arch/arm/include/asm/hardware/cache-tauros2.h - -Example: - L2: l2-cache { - compatible = "marvell,tauros2-cache"; - marvell,tauros2-cache-features = <0x3>; - }; diff --git a/dts/Bindings/arm/msm/qcom,idle-state.txt b/dts/Bindings/arm/msm/qcom,idle-state.txt deleted file mode 100644 index 606b4b1b70..0000000000 --- a/dts/Bindings/arm/msm/qcom,idle-state.txt +++ /dev/null @@ -1,84 +0,0 @@ -QCOM Idle States for cpuidle driver - -ARM provides idle-state node to define the cpuidle states, as defined in [1]. -cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle -states. Idle states have different enter/exit latency and residency values. -The idle states supported by the QCOM SoC are defined as - - - * Standby - * Retention - * Standalone Power Collapse (Standalone PC or SPC) - * Power Collapse (PC) - -Standby: Standby does a little more in addition to architectural clock gating. -When the WFI instruction is executed the ARM core would gate its internal -clocks. In addition to gating the clocks, QCOM cpus use this instruction as a -trigger to execute the SPM state machine. The SPM state machine waits for the -interrupt to trigger the core back in to active. This triggers the cache -hierarchy to enter standby states, when all cpus are idle. An interrupt brings -the SPM state machine out of its wait, the next step is to ensure that the -cache hierarchy is also out of standby, and then the cpu is allowed to resume -execution. This state is defined as a generic ARM WFI state by the ARM cpuidle -driver and is not defined in the DT. The SPM state machine should be -configured to execute this state by default and after executing every other -state below. - -Retention: Retention is a low power state where the core is clock gated and -the memory and the registers associated with the core are retained. The -voltage may be reduced to the minimum value needed to keep the processor -registers active. The SPM should be configured to execute the retention -sequence and would wait for interrupt, before restoring the cpu to execution -state. Retention may have a slightly higher latency than Standby. - -Standalone PC: A cpu can power down and warmboot if there is a sufficient time -between the time it enters idle and the next known wake up. SPC mode is used -to indicate a core entering a power down state without consulting any other -cpu or the system resources. This helps save power only on that core. The SPM -sequence for this idle state is programmed to power down the supply to the -core, wait for the interrupt, restore power to the core, and ensure the -system state including cache hierarchy is ready before allowing core to -resume. Applying power and resetting the core causes the core to warmboot -back into Elevation Level (EL) which trampolines the control back to the -kernel. Entering a power down state for the cpu, needs to be done by trapping -into a EL. Failing to do so, would result in a crash enforced by the warm boot -code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to -be flushed in s/w, before powering down the core. - -Power Collapse: This state is similar to the SPC mode, but distinguishes -itself in that the cpu acknowledges and permits the SoC to enter deeper sleep -modes. In a hierarchical power domain SoC, this means L2 and other caches can -be flushed, system bus, clocks - lowered, and SoC main XO clock gated and -voltages reduced, provided all cpus enter this state. Since the span of low -power modes possible at this state is vast, the exit latency and the residency -of this low power mode would be considered high even though at a cpu level, -this essentially is cpu power down. The SPM in this state also may handshake -with the Resource power manager (RPM) processor in the SoC to indicate a -complete application processor subsystem shut down. - -The idle-state for QCOM SoCs are distinguished by the compatible property of -the idle-states device node. - -The devicetree representation of the idle state should be - - -Required properties: - -- compatible: Must be one of - - "qcom,idle-state-ret", - "qcom,idle-state-spc", - "qcom,idle-state-pc", - and "arm,idle-state". - -Other required and optional properties are specified in [1]. - -Example: - - idle-states { - CPU_SPC: spc { - compatible = "qcom,idle-state-spc", "arm,idle-state"; - entry-latency-us = <150>; - exit-latency-us = <200>; - min-residency-us = <2000>; - }; - }; - -[1]. Documentation/devicetree/bindings/cpu/idle-states.yaml diff --git a/dts/Bindings/arm/msm/qcom,kpss-acc.txt b/dts/Bindings/arm/msm/qcom,kpss-acc.txt deleted file mode 100644 index 7f696362a4..0000000000 --- a/dts/Bindings/arm/msm/qcom,kpss-acc.txt +++ /dev/null @@ -1,49 +0,0 @@ -Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) - -The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. -There is one ACC register region per CPU within the KPSS remapped region as -well as an alias register region that remaps accesses to the ACC associated -with the CPU accessing the region. - -PROPERTIES - -- compatible: - Usage: required - Value type: <string> - Definition: should be one of: - "qcom,kpss-acc-v1" - "qcom,kpss-acc-v2" - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: the first element specifies the base address and size of - the register region. An optional second element specifies - the base address and size of the alias register region. - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: reference to the pll parents. - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: must be "pll8_vote", "pxo". - -- clock-output-names: - Usage: optional - Value type: <string> - Definition: Name of the output clock. Typically acpuX_aux where X is a - CPU number starting at 0. - -Example: - - clock-controller@2088000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0x02088000 0x1000>, - <0x02008000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu0_aux"; - }; diff --git a/dts/Bindings/arm/msm/qcom,kpss-gcc.txt b/dts/Bindings/arm/msm/qcom,kpss-gcc.txt deleted file mode 100644 index e628758950..0000000000 --- a/dts/Bindings/arm/msm/qcom,kpss-gcc.txt +++ /dev/null @@ -1,44 +0,0 @@ -Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) - -PROPERTIES - -- compatible: - Usage: required - Value type: <string> - Definition: should be one of the following. The generic compatible - "qcom,kpss-gcc" should also be included. - "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: base address and size of the register region - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: reference to the pll parents. - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: must be "pll8_vote", "pxo". - -- clock-output-names: - Usage: required - Value type: <string> - Definition: Name of the output clock. Typically acpu_l2_aux indicating - an L2 cache auxiliary clock. - -Example: - - l2cc: clock-controller@2011000 { - compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; - reg = <0x2011000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu_l2_aux"; - }; diff --git a/dts/Bindings/arm/msm/qcom,llcc.yaml b/dts/Bindings/arm/msm/qcom,llcc.yaml deleted file mode 100644 index 5ea506412b..0000000000 --- a/dts/Bindings/arm/msm/qcom,llcc.yaml +++ /dev/null @@ -1,64 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Last Level Cache Controller - -maintainers: - - Rishabh Bhatnagar <rishabhb@codeaurora.org> - - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> - -description: | - LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, - that can be shared by multiple clients. Clients here are different cores in the - SoC, the idea is to minimize the local caches at the clients and migrate to - common pool of memory. Cache memory is divided into partitions called slices - which are assigned to clients. Clients can query the slice details, activate - and deactivate them. - -properties: - compatible: - enum: - - qcom,sc7180-llcc - - qcom,sc7280-llcc - - qcom,sc8180x-llcc - - qcom,sc8280xp-llcc - - qcom,sdm845-llcc - - qcom,sm6350-llcc - - qcom,sm8150-llcc - - qcom,sm8250-llcc - - qcom,sm8350-llcc - - qcom,sm8450-llcc - - reg: - items: - - description: LLCC base register region - - description: LLCC broadcast base register region - - reg-names: - items: - - const: llcc_base - - const: llcc_broadcast_base - - interrupts: - maxItems: 1 - -required: - - compatible - - reg - - reg-names - -additionalProperties: false - -examples: - - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - - system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; - }; diff --git a/dts/Bindings/arm/msm/qcom,saw2.txt b/dts/Bindings/arm/msm/qcom,saw2.txt deleted file mode 100644 index c0e3c3a42b..0000000000 --- a/dts/Bindings/arm/msm/qcom,saw2.txt +++ /dev/null @@ -1,58 +0,0 @@ -SPM AVS Wrapper 2 (SAW2) - -The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the -Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable -power-controller that transitions a piece of hardware (like a processor or -subsystem) into and out of low power modes via a direct connection to -the PMIC. It can also be wired up to interact with other processors in the -system, notifying them when a low power state is entered or exited. - -Multiple revisions of the SAW hardware are supported using these Device Nodes. -SAW2 revisions differ in the register offset and configuration data. Also, the -same revision of the SAW in different SoCs may have different configuration -data due the differences in hardware capabilities. Hence the SoC name, the -version of the SAW hardware in that SoC and the distinction between cpu (big -or Little) or cache, may be needed to uniquely identify the SAW register -configuration and initialization data. The compatible string is used to -indicate this parameter. - -PROPERTIES - -- compatible: - Usage: required - Value type: <string> - Definition: Must have - "qcom,saw2" - A more specific value could be one of: - "qcom,apq8064-saw2-v1.1-cpu" - "qcom,msm8226-saw2-v2.1-cpu" - "qcom,msm8974-saw2-v2.1-cpu" - "qcom,apq8084-saw2-v2.1-cpu" - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: the first element specifies the base address and size of - the register region. An optional second element specifies - the base address and size of the alias register region. - -- regulator: - Usage: optional - Value type: boolean - Definition: Indicates that this SPM device acts as a regulator device - device for the core (CPU or Cache) the SPM is attached - to. - -Example 1: - - power-controller@2099000 { - compatible = "qcom,saw2"; - reg = <0x02099000 0x1000>, <0x02009000 0x1000>; - regulator; - }; - -Example 2: - saw0: power-controller@f9089000 { - compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2"; - reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>; - }; diff --git a/dts/Bindings/arm/msm/ssbi.txt b/dts/Bindings/arm/msm/ssbi.txt deleted file mode 100644 index 54fd5ced34..0000000000 --- a/dts/Bindings/arm/msm/ssbi.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Qualcomm SSBI - -Some Qualcomm MSM devices contain a point-to-point serial bus used to -communicate with a limited range of devices (mostly power management -chips). - -These require the following properties: - -- compatible: "qcom,ssbi" - -- qcom,controller-type - indicates the SSBI bus variant the controller should use to talk - with the slave device. This should be one of "ssbi", "ssbi2", or - "pmic-arbiter". The type chosen is determined by the attached - slave. - -The slave device should be the single child node of the ssbi device -with a compatible field. diff --git a/dts/Bindings/arm/mstar/mstar,l3bridge.yaml b/dts/Bindings/arm/mstar/mstar,l3bridge.yaml index 6816bd68f9..a8ac4a2d67 100644 --- a/dts/Bindings/arm/mstar/mstar,l3bridge.yaml +++ b/dts/Bindings/arm/mstar/mstar,l3bridge.yaml @@ -2,8 +2,8 @@ # Copyright 2020 thingy.jp. %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mstar/mstar,l3bridge.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mstar/mstar,l3bridge.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MStar/SigmaStar Armv7 SoC l3bridge diff --git a/dts/Bindings/arm/mstar/mstar,smpctrl.yaml b/dts/Bindings/arm/mstar/mstar,smpctrl.yaml index 599c65980f..5739848000 100644 --- a/dts/Bindings/arm/mstar/mstar,smpctrl.yaml +++ b/dts/Bindings/arm/mstar/mstar,smpctrl.yaml @@ -2,8 +2,8 @@ # Copyright 2020 thingy.jp. %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: MStar/SigmaStar Armv7 SoC SMP control registers diff --git a/dts/Bindings/arm/mstar/mstar.yaml b/dts/Bindings/arm/mstar/mstar.yaml index 8892eb6bd3..937059fcc7 100644 --- a/dts/Bindings/arm/mstar/mstar.yaml +++ b/dts/Bindings/arm/mstar/mstar.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/mstar/mstar.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MStar platforms device tree bindings +title: MStar platforms maintainers: - Daniel Palmer <daniel@thingy.jp> diff --git a/dts/Bindings/arm/npcm/nuvoton,gcr.yaml b/dts/Bindings/arm/npcm/nuvoton,gcr.yaml deleted file mode 100644 index 94e72f25b3..0000000000 --- a/dts/Bindings/arm/npcm/nuvoton,gcr.yaml +++ /dev/null @@ -1,50 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Global Control Registers block in Nuvoton SoCs - -maintainers: - - Jonathan Neuschäfer <j.neuschaefer@gmx.net> - - Tomer Maimon <tmaimon77@gmail.com> - -description: - The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs - that expose misc functionality such as chip model and version information or - pinmux settings. - -properties: - compatible: - items: - - enum: - - nuvoton,wpcm450-gcr - - nuvoton,npcm750-gcr - - nuvoton,npcm845-gcr - - const: syscon - - const: simple-mfd - - reg: - maxItems: 1 - -required: - - compatible - - reg - -additionalProperties: - type: object - -examples: - - | - gcr: syscon@800000 { - compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd"; - reg = <0x800000 0x1000>; - - mux-controller { - compatible = "mmio-mux"; - #mux-control-cells = <1>; - mux-reg-masks = <0x38 0x07>; - idle-states = <2>; - }; - }; diff --git a/dts/Bindings/arm/nuvoton/nuvoton,ma35d1.yaml b/dts/Bindings/arm/nuvoton/nuvoton,ma35d1.yaml new file mode 100644 index 0000000000..fb190db615 --- /dev/null +++ b/dts/Bindings/arm/nuvoton/nuvoton,ma35d1.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/nuvoton/nuvoton,ma35d1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton MA35 series SoC based platforms + +maintainers: + - Jacky Huang <ychuang3@nuvoton.com> + +description: | + Boards with an ARMv8 based Nuvoton MA35 series SoC shall have + the following properties. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: MA35D1 based boards + items: + - enum: + - nuvoton,ma35d1-iot + - nuvoton,ma35d1-som + - const: nuvoton,ma35d1 + +additionalProperties: true +... diff --git a/dts/Bindings/arm/npcm/npcm.yaml b/dts/Bindings/arm/nuvoton/nuvoton,npcm.yaml index 43409e5721..d386744c88 100644 --- a/dts/Bindings/arm/npcm/npcm.yaml +++ b/dts/Bindings/arm/nuvoton/nuvoton,npcm.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/arm/npcm/npcm.yaml# +$id: http://devicetree.org/schemas/arm/nuvoton/nuvoton,npcm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NPCM Platforms Device Tree Bindings +title: NPCM Platforms maintainers: - Jonathan Neuschäfer <j.neuschaefer@gmx.net> diff --git a/dts/Bindings/arm/nvidia,tegra194-ccplex.yaml b/dts/Bindings/arm/nvidia,tegra194-ccplex.yaml index b6f57d79a7..84dc6b7512 100644 --- a/dts/Bindings/arm/nvidia,tegra194-ccplex.yaml +++ b/dts/Bindings/arm/nvidia,tegra194-ccplex.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: NVIDIA Tegra194 CPU Complex @@ -25,7 +25,7 @@ properties: - nvidia,tegra194-ccplex nvidia,bpmp: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: | Specifies the bpmp node that needs to be queried to get operating point data for all CPUs. diff --git a/dts/Bindings/arm/nxp/lpc32xx.yaml b/dts/Bindings/arm/nxp/lpc32xx.yaml index 214c97bc30..f1bd6f50e7 100644 --- a/dts/Bindings/arm/nxp/lpc32xx.yaml +++ b/dts/Bindings/arm/nxp/lpc32xx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/nxp/lpc32xx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NXP LPC32xx Platforms Device Tree Bindings +title: NXP LPC32xx Platforms maintainers: - Roland Stigge <stigge@antcom.de> diff --git a/dts/Bindings/arm/omap/ctrl.txt b/dts/Bindings/arm/omap/ctrl.txt index f35b779207..0ce6665df4 100644 --- a/dts/Bindings/arm/omap/ctrl.txt +++ b/dts/Bindings/arm/omap/ctrl.txt @@ -8,7 +8,7 @@ control module driver itself. See [2] for documentation about clock/clockdomain nodes. -[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml [2] Documentation/devicetree/bindings/clock/ti/* Required properties: diff --git a/dts/Bindings/arm/omap/omap.txt b/dts/Bindings/arm/omap/omap.txt index fa8b31660c..c863ec07cb 100644 --- a/dts/Bindings/arm/omap/omap.txt +++ b/dts/Bindings/arm/omap/omap.txt @@ -41,14 +41,6 @@ SoC Type (optional): SoC Families: -- OMAP2 generic - defaults to OMAP2420 - compatible = "ti,omap2" -- OMAP3 generic - compatible = "ti,omap3" -- OMAP4 generic - defaults to OMAP4430 - compatible = "ti,omap4" -- OMAP5 generic - defaults to OMAP5430 - compatible = "ti,omap5" - DRA7 generic - defaults to DRA742 compatible = "ti,dra7" - AM33x generic @@ -58,32 +50,6 @@ SoC Families: SoCs: -- OMAP2420 - compatible = "ti,omap2420", "ti,omap2" -- OMAP2430 - compatible = "ti,omap2430", "ti,omap2" - -- OMAP3430 - compatible = "ti,omap3430", "ti,omap3" - legacy: "ti,omap34xx" - please do not use any more -- AM3517 - compatible = "ti,am3517", "ti,omap3" -- OMAP3630 - compatible = "ti,omap3630", "ti,omap3" - legacy: "ti,omap36xx" - please do not use any more -- AM335x - compatible = "ti,am33xx" - -- OMAP4430 - compatible = "ti,omap4430", "ti,omap4" -- OMAP4460 - compatible = "ti,omap4460", "ti,omap4" - -- OMAP5430 - compatible = "ti,omap5430", "ti,omap5" -- OMAP5432 - compatible = "ti,omap5432", "ti,omap5" - - DRA762 compatible = "ti,dra762", "ti,dra7" @@ -116,65 +82,6 @@ SoCs: Boards (incomplete list of examples): -- OMAP3 BeagleBoard : Low cost community board - compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3" - -- OMAP3 BeagleBoard A to B4 : Early BeagleBoard revisions A to B4 with a timer quirk - compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3" - -- OMAP3 Tobi with Overo : Commercial expansion board with daughter board - compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3" - -- OMAP4 SDP : Software Development Board - compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4" - -- OMAP4 PandaBoard : Low cost community board - compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4" - -- OMAP4 DuoVero with Parlor : Commercial expansion board with daughter board - compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; - -- OMAP4 VAR-STK-OM44 : Commercial dev kit with VAR-OM44CustomBoard and VAR-SOM-OM44 w/WLAN - compatible = "variscite,var-stk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; - -- OMAP4 VAR-DVK-OM44 : Commercial dev kit with VAR-OM44CustomBoard, VAR-SOM-OM44 w/WLAN and LCD touchscreen - compatible = "variscite,var-dvk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; - -- OMAP3 EVM : Software Development Board for OMAP35x, AM/DM37x - compatible = "ti,omap3-evm", "ti,omap3630", "ti,omap3" - -- AM335X EVM : Software Development Board for AM335x - compatible = "ti,am335x-evm", "ti,am33xx" - -- AM335X Bone : Low cost community board - compatible = "ti,am335x-bone", "ti,am33xx" - -- AM3359 ICEv2 : Low cost Industrial Communication Engine EVM. - compatible = "ti,am3359-icev2", "ti,am33xx" - -- AM335X OrionLXm : Substation Automation Platform - compatible = "novatech,am335x-lxm", "ti,am33xx" - -- AM335X phyBOARD-WEGA: Single Board Computer dev kit - compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx" - -- AM335X CM-T335 : System On Module, built around the Sitara AM3352/4 - compatible = "compulab,cm-t335", "ti,am33xx" - -- AM335X SBC-T335 : single board computer, built around the Sitara AM3352/4 - compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx" - -- AM335X phyCORE-AM335x: Development kit - compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx" - -- AM335x phyBOARD-REGOR: Single Board Computer - compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx" - -- AM335X UC-8100-ME-T: Communication-centric industrial computing platform - compatible = "moxa,uc-8100-me-t", "ti,am33xx"; - -- OMAP5 EVM : Evaluation Module - compatible = "ti,omap5-evm", "ti,omap5" - AM437x CM-T43 compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43" @@ -217,9 +124,3 @@ Boards (incomplete list of examples): - DRA718 EVM: Software Development Board for DRA718 compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7" - -- DM3730 Logic PD Torpedo + Wireless: Commercial System on Module with WiFi and Bluetooth - compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3" - -- DM3730 Logic PD SOM-LV: Commercial System on Module with WiFi and Bluetooth - compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3" diff --git a/dts/Bindings/arm/oxnas.txt b/dts/Bindings/arm/oxnas.txt deleted file mode 100644 index ac64e60f99..0000000000 --- a/dts/Bindings/arm/oxnas.txt +++ /dev/null @@ -1,14 +0,0 @@ -Oxford Semiconductor OXNAS SoCs Family device tree bindings -------------------------------------------- - -Boards with the OX810SE SoC shall have the following properties: - Required root node property: - compatible: "oxsemi,ox810se" - -Boards with the OX820 SoC shall have the following properties: - Required root node property: - compatible: "oxsemi,ox820" - -Board compatible values: - - "wd,mbwe" (OX810SE) - - "cloudengines,pogoplugv3" (OX820) diff --git a/dts/Bindings/arm/pmu.yaml b/dts/Bindings/arm/pmu.yaml index dbb6f3dc5a..99b5e95307 100644 --- a/dts/Bindings/arm/pmu.yaml +++ b/dts/Bindings/arm/pmu.yaml @@ -20,6 +20,8 @@ properties: items: - enum: - apm,potenza-pmu + - apple,avalanche-pmu + - apple,blizzard-pmu - apple,firestorm-pmu - apple,icestorm-pmu - arm,armv8-pmuv3 # Only for s/w models @@ -47,9 +49,14 @@ properties: - arm,cortex-a77-pmu - arm,cortex-a78-pmu - arm,cortex-a510-pmu + - arm,cortex-a520-pmu - arm,cortex-a710-pmu + - arm,cortex-a715-pmu + - arm,cortex-a720-pmu - arm,cortex-x1-pmu - arm,cortex-x2-pmu + - arm,cortex-x3-pmu + - arm,cortex-x4-pmu - arm,neoverse-e1-pmu - arm,neoverse-n1-pmu - arm,neoverse-n2-pmu diff --git a/dts/Bindings/arm/psci.yaml b/dts/Bindings/arm/psci.yaml index 3a2c908ff2..cbb012e217 100644 --- a/dts/Bindings/arm/psci.yaml +++ b/dts/Bindings/arm/psci.yaml @@ -100,7 +100,8 @@ properties: patternProperties: "^power-domain-": - $ref: "../power/power-domain.yaml#" + $ref: /schemas/power/power-domain.yaml# + unevaluatedProperties: false type: object description: | diff --git a/dts/Bindings/arm/qcom,coresight-remote-etm.yaml b/dts/Bindings/arm/qcom,coresight-remote-etm.yaml new file mode 100644 index 0000000000..4fd5752978 --- /dev/null +++ b/dts/Bindings/arm/qcom,coresight-remote-etm.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-remote-etm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell) + +maintainers: + - Jinlong Mao <quic_jinlmao@quicinc.com> + - Tao Zhang <quic_taozha@quicinc.com> + +description: + Support for ETM trace collection on remote processor using coresight + framework. Enabling this will allow turning on ETM tracing on remote + processor like modem processor via sysfs and collecting the trace + via coresight TMC sinks. + +properties: + compatible: + const: qcom,coresight-remote-etm + + out-ports: + $ref: /schemas/graph.yaml#/properties/ports + additionalProperties: false + + properties: + port: + description: Output connection to the CoreSight Trace bus. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - out-ports + +additionalProperties: false + +examples: + - | + etm { + compatible = "qcom,coresight-remote-etm"; + + out-ports { + port { + modem_etm0_out_funnel_modem: endpoint { + remote-endpoint = <&funnel_modem_in_modem_etm0>; + }; + }; + }; + }; +... diff --git a/dts/Bindings/arm/qcom,coresight-tpda.yaml b/dts/Bindings/arm/qcom,coresight-tpda.yaml new file mode 100644 index 0000000000..ea3c5db6b5 --- /dev/null +++ b/dts/Bindings/arm/qcom,coresight-tpda.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Trace, Profiling and Diagnostics Aggregator - TPDA + +description: | + TPDAs are responsible for packetization and timestamping of data sets + utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or + more attached TPDM and pushing the resultant (packetized) data out a + master ATB interface. Performing an arbitrated ATB interleaving (funneling) + task for free-flowing data from TPDM (i.e. CMB and DSB data set flows). + + There is no strict binding between TPDM and TPDA. TPDA can have multiple + TPDMs connect to it. But There must be only one TPDA in the path from the + TPDM source to TMC sink. TPDM can directly connect to TPDA's inport or + connect to funnel which will connect to TPDA's inport. + + We can use the commands are similar to the below to validate TPDMs. + Enable coresight sink first. + + echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink + echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source + echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test + echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test + + The test data will be collected in the coresight sink which is enabled. + If rwp register of the sink is keeping updating when do integration_test + (by cat tmc_etf0/mgmt/rwp), it means there is data generated from TPDM + to sink. + +maintainers: + - Mao Jinlong <quic_jinlmao@quicinc.com> + - Tao Zhang <quic_taozha@quicinc.com> + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + enum: + - qcom,coresight-tpda + required: + - compatible + +properties: + $nodename: + pattern: "^tpda(@[0-9a-f]+)$" + compatible: + items: + - const: qcom,coresight-tpda + - const: arm,primecell + + reg: + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + in-ports: + type: object + description: | + Input connections from TPDM to TPDA + $ref: /schemas/graph.yaml#/properties/ports + + out-ports: + type: object + description: | + Output connections from the TPDA to legacy CoreSight trace bus. + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port: + description: + Output connection from the TPDA to legacy CoreSight Trace bus. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - clocks + - clock-names + - in-ports + - out-ports + +additionalProperties: false + +examples: + # minimum tpda definition. + - | + tpda@6004000 { + compatible = "qcom,coresight-tpda", "arm,primecell"; + reg = <0x6004000 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_qdss_0_in_tpdm_dcc: endpoint { + remote-endpoint = + <&tpdm_dcc_out_tpda_qdss_0>; + }; + }; + }; + + out-ports { + port { + tpda_qdss_out_funnel_in0: endpoint { + remote-endpoint = + <&funnel_in0_in_tpda_qdss>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/arm/qcom,coresight-tpdm.yaml b/dts/Bindings/arm/qcom,coresight-tpdm.yaml new file mode 100644 index 0000000000..8eec07d9d4 --- /dev/null +++ b/dts/Bindings/arm/qcom,coresight-tpdm.yaml @@ -0,0 +1,147 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Trace, Profiling and Diagnostics Monitor - TPDM + +description: | + The TPDM or Monitor serves as data collection component for various dataset + types specified in the QPMDA spec. It covers Implementation defined ((ImplDef), + Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete + Single Bit (DSB). It performs data collection in the data producing clock + domain and transfers it to the data collection time domain, generally ATB + clock domain. + + The primary use case of the TPDM is to collect data from different data + sources and send it to a TPDA for packetization, timestamping, and funneling. + +maintainers: + - Mao Jinlong <quic_jinlmao@quicinc.com> + - Tao Zhang <quic_taozha@quicinc.com> + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + enum: + - qcom,coresight-tpdm + required: + - compatible + +properties: + $nodename: + pattern: "^tpdm(@[0-9a-f]+)$" + compatible: + items: + - const: qcom,coresight-tpdm + - const: arm,primecell + + reg: + minItems: 1 + maxItems: 2 + + qcom,dsb-element-bits: + description: + Specifies the DSB(Discrete Single Bit) element size supported by + the monitor. The associated aggregator will read this size before it + is enabled. DSB element size currently only supports 32-bit and 64-bit. + enum: [32, 64] + + qcom,cmb-element-bits: + description: + Specifies the CMB(Continuous Multi-Bit) element size supported by + the monitor. The associated aggregator will read this size before it + is enabled. CMB element size currently only supports 8-bit, 32-bit + and 64-bit. + enum: [8, 32, 64] + + qcom,dsb-msrs-num: + description: + Specifies the number of DSB(Discrete Single Bit) MSR(mux select register) + registers supported by the monitor. If this property is not configured + or set to 0, it means this DSB TPDM doesn't support MSR. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 32 + + qcom,cmb-msrs-num: + description: + Specifies the number of CMB MSR(mux select register) registers supported + by the monitor. If this property is not configured or set to 0, it means + this TPDM doesn't support CMB MSR. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 32 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + out-ports: + description: | + Output connections from the TPDM to coresight funnel/TPDA. + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port: + description: Output connection from the TPDM to coresight + funnel/TPDA. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + # minimum TPDM definition. TPDM connect to coresight TPDA. + - | + tpdm@684c000 { + compatible = "qcom,coresight-tpdm", "arm,primecell"; + reg = <0x0684c000 0x1000>; + + qcom,dsb-element-bits = <32>; + qcom,dsb-msrs-num = <16>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_prng_out_tpda_qdss: endpoint { + remote-endpoint = + <&tpda_qdss_in_tpdm_prng>; + }; + }; + }; + }; + + tpdm@6c29000 { + compatible = "qcom,coresight-tpdm", "arm,primecell"; + reg = <0x06c29000 0x1000>; + + qcom,cmb-element-bits = <64>; + qcom,cmb-msrs-num = <32>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_ipcc_out_funnel_center: endpoint { + remote-endpoint = <&funnel_center_in_tpdm_ipcc>; + }; + }; + }; + }; +... diff --git a/dts/Bindings/arm/qcom-soc.yaml b/dts/Bindings/arm/qcom-soc.yaml new file mode 100644 index 0000000000..d0751a572a --- /dev/null +++ b/dts/Bindings/arm/qcom-soc.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom-soc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SoC compatibles naming convention + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + +description: | + Guidelines for new compatibles for SoC blocks/components. + When adding new compatibles in new bindings, use the format:: + qcom,SoC-IP + + For example:: + qcom,sdm845-llcc-bwmon + + When adding new compatibles to existing bindings, use the format in the + existing binding, even if it contradicts the above. + +select: + properties: + compatible: + pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" + required: + - compatible + +properties: + compatible: + oneOf: + # Preferred naming style for compatibles of SoC components: + - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+(pro)?-.*$" + - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$" + + # Legacy namings - variations of existing patterns/compatibles are OK, + # but do not add completely new entries to these: + - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" + - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$" + - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" + - enum: + - qcom,dsi-ctrl-6g-qcm2290 + - qcom,gpucc-sdm630 + - qcom,gpucc-sdm660 + - qcom,lcc-apq8064 + - qcom,lcc-ipq8064 + - qcom,lcc-mdm9615 + - qcom,lcc-msm8960 + - qcom,lpass-cpu-apq8016 + - qcom,usb-ss-ipq4019-phy + - qcom,usb-hs-ipq4019-phy + - qcom,vqmmc-ipq4019-regulator + + # Legacy compatibles with wild-cards - list cannot grow with new bindings: + - enum: + - qcom,ipq806x-gmac + - qcom,ipq806x-nand + - qcom,ipq806x-sata-phy + - qcom,ipq806x-usb-phy-ss + - qcom,ipq806x-usb-phy-hs + +additionalProperties: true diff --git a/dts/Bindings/arm/qcom.yaml b/dts/Bindings/arm/qcom.yaml index 1b5ac6b02b..66beaac60e 100644 --- a/dts/Bindings/arm/qcom.yaml +++ b/dts/Bindings/arm/qcom.yaml @@ -10,17 +10,10 @@ maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> description: | - Some qcom based bootloaders identify the dtb blob based on a set of - device properties like SoC and platform and revisions of those components. - To support this scheme, we encode this information into the board compatible - string. - - Each board must specify a top-level board compatible string with the following - format: - - compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]" - - The 'SoC' and 'board' elements are required. All other elements are optional. + For devices using the Qualcomm SoC the "compatible" properties consists of + one or several "manufacturer,model" strings, describing the device itself, + followed by one or several "qcom,<SoC>" strings, describing the SoC used in + the device. The 'SoC' element must be one of the following strings: @@ -29,77 +22,71 @@ description: | apq8074 apq8084 apq8096 + ipq4018 + ipq5018 + ipq5332 ipq6018 ipq8074 + ipq9574 mdm9615 msm8226 msm8916 + msm8939 + msm8953 + msm8956 + msm8960 msm8974 + msm8976 msm8992 msm8994 msm8996 msm8998 qcs404 + qcm2290 + qcm6490 + qdu1000 + qrb2210 + qrb4210 + qru1000 sa8155p sa8540p + sa8775p sc7180 sc7280 sc8180x sc8280xp sda660 + sdm450 sdm630 sdm632 sdm636 sdm660 + sdm670 sdm845 sdx55 sdx65 + sdx75 + sm4250 + sm4450 + sm6115 + sm6115p sm6125 sm6350 + sm6375 + sm7125 sm7225 sm8150 sm8250 sm8350 sm8450 - - The 'board' element must be one of the following strings: - - adp - cdp - cp01-c1 - dragonboard - hk01 - hk10-c1 - hk10-c2 - idp - liquid - mtp - qrd - sbc - - The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor> - where the minor number may be omitted when it's zero, i.e. v1.0 is the same - as v1. If all versions of the 'board_version' elements match, then a - wildcard '*' should be used, e.g. 'v*'. - - The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9. - - Examples: - - "qcom,msm8916-v1-cdp-pm8916-v2.1" - - A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version - 2.1. - - "qcom,apq8074-v2.0-2-dragonboard/1-v0.1" - - A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in - foundry 2. + sm8550 + sm8650 + x1e80100 There are many devices in the list below that run the standard ChromeOS bootloader setup and use the open source depthcharge bootloader to boot the - OS. These devices do not use the scheme described above. For details, see: - https://docs.kernel.org/arm/google/chromebook-boot-flow.html + OS. These devices use the bootflow explained at + https://docs.kernel.org/arch/arm/google/chromebook-boot-flow.html properties: $nodename: @@ -114,7 +101,9 @@ properties: - items: - enum: - asus,sparrow + - huawei,sturgeon - lg,lenok + - samsung,matisse-wifi - const: qcom,apq8026 - items: @@ -145,43 +134,90 @@ properties: - items: - enum: + - microsoft,dempsey + - microsoft,makepeace + - microsoft,moneypenny - samsung,s3ve3g - const: qcom,msm8226 - items: - enum: + - htc,memul + - microsoft,superman-lte + - microsoft,tesla + - motorola,peregrine + - samsung,matisselte + - const: qcom,msm8926 + - const: qcom,msm8226 + + - items: + - enum: + - huawei,kiwi + - longcheer,l9100 + - samsung,a7 + - sony,kanuti-tulip + - square,apq8039-t2 + - const: qcom,msm8939 + + - items: + - enum: + - sony,kugo-row + - sony,suzu-row + - const: qcom,msm8956 + + - items: + - enum: - qcom,msm8960-cdp + - samsung,expressatt - const: qcom,msm8960 - items: - enum: - - fairphone,fp2 - lge,hammerhead - - samsung,klte - sony,xperia-amami - - sony,xperia-castor - sony,xperia-honami - const: qcom,msm8974 - items: + - enum: + - fairphone,fp2 + - oneplus,bacon + - samsung,klte + - sony,xperia-castor + - const: qcom,msm8974pro + - const: qcom,msm8974 + + - items: - const: qcom,msm8916-mtp - const: qcom,msm8916-mtp/1 - const: qcom,msm8916 - items: - enum: + - acer,a1-724 - alcatel,idol347 - asus,z00l + - gplus,fl8005a - huawei,g7 - longcheer,l8910 - samsung,a3u-eur - samsung,a5u-eur - samsung,e5 - samsung,e7 + - samsung,fortuna3g + - samsung,gprimeltecan - samsung,grandmax + - samsung,grandprimelte + - samsung,gt510 + - samsung,gt58 - samsung,j5 + - samsung,j5x + - samsung,rossa - samsung,serranove + - thwc,uf896 + - thwc,ufi001c - wingtech,wt88047 + - yiming,uz801-v3 - const: qcom,msm8916 - items: @@ -191,6 +227,15 @@ properties: - items: - enum: + - motorola,potter + - xiaomi,daisy + - xiaomi,mido + - xiaomi,tissot + - xiaomi,vince + - const: qcom,msm8953 + + - items: + - enum: - lg,bullhead - microsoft,talkman - xiaomi,libra @@ -221,13 +266,20 @@ properties: - items: - enum: + - oneplus,oneplus3 + - oneplus,oneplus3t - qcom,msm8996-mtp - sony,dora-row - sony,kagura-row - sony,keyaki-row - xiaomi,gemini + - const: qcom,msm8996 + + - items: + - enum: - xiaomi,natrium - xiaomi,scorpio + - const: qcom,msm8996pro - const: qcom,msm8996 - items: @@ -242,10 +294,17 @@ properties: - sony,xperia-lilac - sony,xperia-maple - sony,xperia-poplar + - xiaomi,sagit - const: qcom,msm8998 - items: - enum: + - 8dev,jalapeno + - alfa-network,ap120c-ac + - const: qcom,ipq4018 + + - items: + - enum: - qcom,ipq4019-ap-dk01.1-c1 - qcom,ipq4019-ap-dk04.1-c3 - qcom,ipq4019-ap-dk07.1-c1 @@ -255,6 +314,20 @@ properties: - items: - enum: + - qcom,ipq5018-rdp432-c2 + - const: qcom,ipq5018 + + - items: + - enum: + - qcom,ipq5332-ap-mi01.2 + - qcom,ipq5332-ap-mi01.3 + - qcom,ipq5332-ap-mi01.6 + - qcom,ipq5332-ap-mi01.9 + - const: qcom,ipq5332 + + - items: + - enum: + - mikrotik,rb3011 - qcom,ipq8064-ap148 - const: qcom,ipq8064 @@ -265,9 +338,51 @@ properties: - qcom,ipq8074-hk10-c2 - const: qcom,ipq8074 - - description: Qualcomm Technologies, Inc. SC7180 IDP + - items: + - enum: + - qcom,ipq9574-ap-al02-c2 + - qcom,ipq9574-ap-al02-c6 + - qcom,ipq9574-ap-al02-c7 + - qcom,ipq9574-ap-al02-c8 + - qcom,ipq9574-ap-al02-c9 + - const: qcom,ipq9574 + + - description: Sierra Wireless MangOH Green with WP8548 Module + items: + - const: swir,mangoh-green-wp8548 + - const: swir,wp8548 + - const: qcom,mdm9615 + + - description: Qualcomm Technologies, Inc. Robotics RB1 + items: + - enum: + - qcom,qrb2210-rb1 + - const: qcom,qrb2210 + - const: qcom,qcm2290 + + - items: + - enum: + - fairphone,fp5 + - qcom,qcm6490-idp + - qcom,qcs6490-rb3gen2 + - const: qcom,qcm6490 + + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform items: - enum: + - qcom,qdu1000-idp + - qcom,qdu1000-x100 + - const: qcom,qdu1000 + + - description: Qualcomm Technologies, Inc. Radio Unit 1000 platform + items: + - enum: + - qcom,qru1000-idp + - const: qcom,qru1000 + + - items: + - enum: + - acer,aspire1 - qcom,sc7180-idp - const: qcom,sc7180 @@ -340,6 +455,11 @@ properties: - const: google,lazor-rev8 - const: qcom,sc7180 + - description: Acer Chromebook Spin 513 (rev9) + items: + - const: google,lazor-rev9 + - const: qcom,sc7180 + - description: Acer Chromebook Spin 513 (newest rev) items: - const: google,lazor @@ -361,6 +481,11 @@ properties: - const: google,lazor-rev8-sku2 - const: qcom,sc7180 + - description: Acer Chromebook Spin 513 with KB Backlight (rev9) + items: + - const: google,lazor-rev9-sku2 + - const: qcom,sc7180 + - description: Acer Chromebook Spin 513 with KB Backlight (newest rev) items: - const: google,lazor-sku2 @@ -382,9 +507,16 @@ properties: - const: google,lazor-rev8-sku0 - const: qcom,sc7180 + - description: Acer Chromebook Spin 513 with LTE (rev9) + items: + - const: google,lazor-rev9-sku0 + - const: google,lazor-rev9-sku10 + - const: qcom,sc7180 + - description: Acer Chromebook Spin 513 with LTE (newest rev) items: - const: google,lazor-sku0 + - const: google,lazor-sku10 - const: qcom,sc7180 - description: Acer Chromebook 511 (rev4 - rev8) @@ -396,9 +528,16 @@ properties: - const: google,lazor-rev8-sku4 - const: qcom,sc7180 + - description: Acer Chromebook 511 (rev9) + items: + - const: google,lazor-rev9-sku4 + - const: google,lazor-rev9-sku15 + - const: qcom,sc7180 + - description: Acer Chromebook 511 (newest rev) items: - const: google,lazor-sku4 + - const: google,lazor-sku15 - const: qcom,sc7180 - description: Acer Chromebook 511 without Touchscreen (rev4) @@ -415,9 +554,16 @@ properties: - const: google,lazor-rev8-sku6 - const: qcom,sc7180 + - description: Acer Chromebook 511 without Touchscreen (rev9) + items: + - const: google,lazor-rev9-sku6 + - const: google,lazor-rev9-sku18 + - const: qcom,sc7180 + - description: Acer Chromebook 511 without Touchscreen (newest rev) items: - const: google,lazor-sku6 + - const: google,lazor-sku18 - const: qcom,sc7180 - description: Google Mrbland with AUO panel (rev0) @@ -463,6 +609,17 @@ properties: - const: google,pazquel-sku2 - const: qcom,sc7180 + - description: Google Pazquel360 with LTE (newest rev) + items: + - const: google,pazquel-sku22 + - const: google,pazquel-sku20 + - const: qcom,sc7180 + + - description: Google Pazquel360 with WiFi (newest rev) + items: + - const: google,pazquel-sku21 + - const: qcom,sc7180 + - description: Sharp Dynabook Chromebook C1 (rev1) items: - const: google,pompom-rev1 @@ -558,6 +715,12 @@ properties: - const: google,hoglin - const: qcom,sc7280 + - description: Qualcomm Technologies, Inc. sc7280 CRD Pro platform (newest rev) + items: + - const: google,zoglin-sku1536 + - const: google,hoglin-sku1536 + - const: qcom,sc7280 + - description: Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform items: - const: qcom,sc7280-idp @@ -575,6 +738,11 @@ properties: - const: google,evoker - const: qcom,sc7280 + - description: Google Evoker with LTE (newest rev) + items: + - const: google,evoker-sku512 + - const: qcom,sc7280 + - description: Google Herobrine (newest rev) items: - const: google,herobrine @@ -595,6 +763,28 @@ properties: - const: google,villager-sku512 - const: qcom,sc7280 + - description: Google Zombie (newest rev) + items: + - const: google,zombie + - const: qcom,sc7280 + + - description: Google Zombie with LTE (newest rev) + items: + - const: google,zombie-sku512 + - const: qcom,sc7280 + + - description: Google Zombie with NVMe (newest rev) + items: + - const: google,zombie-sku2 + - const: google,zombie-sku3 + - const: google,zombie-sku515 + - const: qcom,sc7280 + + - description: Google Zombie with LTE and NVMe (newest rev) + items: + - const: google,zombie-sku514 + - const: qcom,sc7280 + - items: - enum: - lenovo,flex-5g @@ -611,6 +801,11 @@ properties: - items: - enum: + - motorola,ali + - const: qcom,sdm450 + + - items: + - enum: - sony,discovery-row - sony,kirin-row - sony,pioneer-row @@ -625,6 +820,7 @@ properties: - items: - enum: - fairphone,fp3 + - motorola,ocean - const: qcom,sdm632 - items: @@ -639,6 +835,11 @@ properties: - items: - enum: + - google,sargo + - const: qcom,sdm670 + + - items: + - enum: - qcom,sdx55-mtp - qcom,sdx55-telit-fn980-tlb - qcom,sdx55-t55 @@ -651,6 +852,11 @@ properties: - items: - enum: + - qcom,sdx75-idp + - const: qcom,sdx75 + + - items: + - enum: - qcom,ipq6018-cp01 - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 @@ -670,10 +876,19 @@ properties: - items: - enum: - qcom,sa8295p-adp + - qcom,sa8540p-ride - const: qcom,sa8540p - items: - enum: + - qcom,sa8775p-ride + - const: qcom,sa8775p + + - items: + - enum: + - google,cheza + - google,cheza-rev1 + - google,cheza-rev2 - lenovo,yoga-c630 - lg,judyln - lg,judyp @@ -681,18 +896,48 @@ properties: - oneplus,fajita - qcom,sdm845-mtp - shift,axolotl + - samsung,starqltechn - samsung,w737 - sony,akari-row - sony,akatsuki-row - sony,apollo-row - thundercomm,db845c - xiaomi,beryllium + - xiaomi,beryllium-ebbg - xiaomi,polaris - const: qcom,sdm845 - items: - enum: + - oneplus,billie2 + - const: qcom,sm4250 + + - items: + - enum: + - qcom,qrb4210-rb2 + - const: qcom,qrb4210 + - const: qcom,sm4250 + + - items: + - enum: + - qcom,sm4450-qrd + - const: qcom,sm4450 + + - items: + - enum: + - fxtec,pro1x + - const: qcom,sm6115 + + - items: + - enum: + - lenovo,j606f + - const: qcom,sm6115p + - const: qcom,sm6115 + + - items: + - enum: - sony,pdx201 + - xiaomi,laurel-sprout - const: qcom,sm6125 - items: @@ -702,6 +947,17 @@ properties: - items: - enum: + - sony,pdx225 + - const: qcom,sm6375 + + - items: + - enum: + - xiaomi,curtana + - xiaomi,joyeuse + - const: qcom,sm7125 + + - items: + - enum: - fairphone,fp4 - const: qcom,sm7225 @@ -721,6 +977,8 @@ properties: - qcom,sm8250-mtp - sony,pdx203-generic - sony,pdx206-generic + - xiaomi,elish + - xiaomi,pipa - const: qcom,sm8250 - items: @@ -737,8 +995,159 @@ properties: - qcom,sm8450-hdk - qcom,sm8450-qrd - sony,pdx223 + - sony,pdx224 - const: qcom,sm8450 + - items: + - enum: + - qcom,sm8550-hdk + - qcom,sm8550-mtp + - qcom,sm8550-qrd + - const: qcom,sm8550 + + - items: + - enum: + - qcom,sm8650-mtp + - qcom,sm8650-qrd + - const: qcom,sm8650 + + - items: + - enum: + - qcom,x1e80100-crd + - qcom,x1e80100-qcp + - const: qcom,x1e80100 + + # Board compatibles go above + + qcom,msm-id: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + maxItems: 8 + items: + items: + - description: | + MSM chipset ID - an exact match value consisting of two bitfields:: + - bits 0-15 - The unique MSM chipset ID + - bits 16-31 - Reserved; should be 0 + - description: | + Hardware revision ID - a chipset specific 32-bit ID representing + the version of the chipset. It is best a match value - the + bootloader will look for the closest possible match. + deprecated: true + description: + The MSM chipset and hardware revision used Qualcomm bootloaders. It + can optionally be an array of these to indicate multiple hardware that + use the same device tree. It is expected that the bootloader will use + this information at boot-up to decide which device tree to use when given + multiple device trees, some of which may not be compatible with the + actual hardware. It is the bootloader's responsibility to pass the + correct device tree to the kernel. + The property is deprecated. + + qcom,board-id: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + maxItems: 8 + oneOf: + - items: + - items: + - description: | + Board ID consisting of three bitfields:: + - bits 31-24 - Unused + - bits 23-16 - Platform Version Major + - bits 15-8 - Platform Version Minor + - bits 7-0 - Platform Type + Platform Type field is an exact match value. The + Platform Major/Minor field is a best match. The bootloader will + look for the closest possible match. + - description: | + Subtype ID unique to a Platform Type/Chipset ID. For a given + Platform Type, there will typically only be a single board and the + subtype_id will be 0. However in some cases board variants may + need to be distinguished by different subtype_id values. + - items: + # OnePlus uses a variant of board-id with four elements: + - items: + - const: 8 + - const: 0 + - description: OnePlus board ID + - description: OnePlus subtype ID + deprecated: true + description: + The board type and revision information. It can optionally be an array + of these to indicate multiple boards that use the same device tree. It + is expected that the bootloader will use this information at boot-up to + decide which device tree to use when given multiple device trees, some of + which may not be compatible with the actual hardware. It is the + bootloader's responsibility to pass the correct device tree to the + kernel + The property is deprecated. + +allOf: + # Explicit allow-list for older SoCs. The legacy properties are not allowed + # on newer SoCs. + - if: + properties: + compatible: + contains: + enum: + - qcom,apq8026 + - qcom,apq8094 + - qcom,apq8096 + - qcom,msm8939 + - qcom,msm8953 + - qcom,msm8956 + - qcom,msm8992 + - qcom,msm8994 + - qcom,msm8996 + - qcom,msm8998 + - qcom,sdm450 + - qcom,sdm630 + - qcom,sdm632 + - qcom,sdm636 + - qcom,sdm845 + - qcom,sdx55 + - qcom,sdx65 + - qcom,sdx75 + - qcom,sm4250 + - qcom,sm6115 + - qcom,sm6125 + - qcom,sm6350 + - qcom,sm7125 + - qcom,sm7225 + - qcom,sm8150 + - qcom,sm8250 + then: + properties: + qcom,board-id: true + qcom,msm-id: true + else: + properties: + qcom,board-id: false + qcom,msm-id: false + + - if: + properties: + compatible: + contains: + enum: + - oneplus,cheeseburger + - oneplus,dumpling + - oneplus,enchilada + - oneplus,fajita + - oneplus,oneplus3 + - oneplus,oneplus3t + then: + properties: + qcom,board-id: + items: + minItems: 4 + else: + properties: + qcom,board-id: + items: + maxItems: 2 + additionalProperties: true ... diff --git a/dts/Bindings/arm/renesas.yaml b/dts/Bindings/arm/renesas.yaml deleted file mode 100644 index f51464a08a..0000000000 --- a/dts/Bindings/arm/renesas.yaml +++ /dev/null @@ -1,471 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/renesas.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Renesas SH-Mobile, R-Mobile, and R-Car Platform - -maintainers: - - Geert Uytterhoeven <geert+renesas@glider.be> - -properties: - $nodename: - const: '/' - compatible: - oneOf: - - description: Emma Mobile EV2 - items: - - enum: - - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual - - const: renesas,emev2 - - - description: RZ/A1H (R7S72100) - items: - - enum: - - renesas,genmai # Genmai (RTK772100BC00000BR) - - renesas,gr-peach # GR-Peach (X28A-M01-E/F) - - renesas,rskrza1 # RSKRZA1 (YR0K77210C000BE) - - const: renesas,r7s72100 - - - description: RZ/A2 (R7S9210) - items: - - enum: - - renesas,rza2mevb # RZ/A2M Eval Board (RTK7921053S00000BE) - - const: renesas,r7s9210 - - - description: SH-Mobile AG5 (R8A73A00/SH73A0) - items: - - enum: - - renesas,kzm9g # Kyoto Microcomputer Co. KZM-A9-GT - - const: renesas,sh73a0 - - - description: R-Mobile APE6 (R8A73A40) - items: - - enum: - - renesas,ape6evm - - const: renesas,r8a73a4 - - - description: R-Mobile A1 (R8A77400) - items: - - enum: - - renesas,armadillo800eva # Atmark Techno Armadillo-800 EVA - - const: renesas,r8a7740 - - - description: RZ/G1H (R8A77420) - items: - - enum: - # iWave Systems RZ/G1H Qseven System On Module (iW-RainboW-G21M-Qseven) - - iwave,g21m - - const: renesas,r8a7742 - - - items: - - enum: - # iWave Systems RZ/G1H Qseven Development Platform (iW-RainboW-G21D-Qseven) - - iwave,g21d - - const: iwave,g21m - - const: renesas,r8a7742 - - - description: RZ/G1M (R8A77430) - items: - - enum: - # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven) - - iwave,g20d - - const: iwave,g20m - - const: renesas,r8a7743 - - - items: - - enum: - # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) - - iwave,g20m - - renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE) - - const: renesas,r8a7743 - - - description: RZ/G1N (R8A77440) - items: - - enum: - # iWave Systems RZ/G1N Qseven Development Platform (iW-RainboW-G20D-Qseven) - - iwave,g20d - - const: iwave,g20m - - const: renesas,r8a7744 - - - items: - - enum: - # iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven) - - iwave,g20m - - const: renesas,r8a7744 - - - description: RZ/G1E (R8A77450) - items: - - enum: - - iwave,g22m # iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) - - renesas,sk-rzg1e # SK-RZG1E (YR8A77450S000BE) - - const: renesas,r8a7745 - - - description: iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D) - items: - - const: iwave,g22d - - const: iwave,g22m - - const: renesas,r8a7745 - - - description: RZ/G1C (R8A77470) - items: - - enum: - - iwave,g23s #iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S) - - const: renesas,r8a77470 - - - description: RZ/G2M (R8A774A1) - items: - - enum: - - hoperun,hihope-rzg2m # HopeRun HiHope RZ/G2M platform - - beacon,beacon-rzg2m # Beacon EmbeddedWorks RZ/G2M Kit - - const: renesas,r8a774a1 - - - items: - - enum: - - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms - - const: hoperun,hihope-rzg2m - - const: renesas,r8a774a1 - - - description: RZ/G2N (R8A774B1) - items: - - enum: - - beacon,beacon-rzg2n # Beacon EmbeddedWorks RZ/G2N Kit - - hoperun,hihope-rzg2n # HopeRun HiHope RZ/G2N platform - - const: renesas,r8a774b1 - - - items: - - enum: - - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms - - const: hoperun,hihope-rzg2n - - const: renesas,r8a774b1 - - - description: RZ/G2E (R8A774C0) - items: - - enum: - - si-linux,cat874 # Silicon Linux RZ/G2E 96board platform (CAT874) - - const: renesas,r8a774c0 - - - items: - - enum: - - si-linux,cat875 # Silicon Linux sub board for CAT874 (CAT875) - - const: si-linux,cat874 - - const: renesas,r8a774c0 - - - description: RZ/G2H (R8A774E1) - items: - - enum: - - beacon,beacon-rzg2h # Beacon EmbeddedWorks RZ/G2H Kit - - hoperun,hihope-rzg2h # HopeRun HiHope RZ/G2H platform - - const: renesas,r8a774e1 - - - items: - - enum: - - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms - - const: hoperun,hihope-rzg2h - - const: renesas,r8a774e1 - - - description: R-Car M1A (R8A77781) - items: - - enum: - - renesas,bockw - - const: renesas,r8a7778 - - - description: R-Car H1 (R8A77790) - items: - - enum: - - renesas,marzen # Marzen (R0P7779A00010S) - - const: renesas,r8a7779 - - - description: R-Car H2 (R8A77900) - items: - - enum: - - renesas,lager # Lager (RTP0RC7790SEB00010S) - - renesas,stout # Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD) - - const: renesas,r8a7790 - - - description: R-Car M2-W (R8A77910) - items: - - enum: - - renesas,henninger - - renesas,koelsch # Koelsch (RTP0RC7791SEB00010S) - - renesas,porter # Porter (M2-LCDP) - - const: renesas,r8a7791 - - - description: R-Car V2H (R8A77920) - items: - - enum: - - renesas,blanche # Blanche (RTP0RC7792SEB00010S) - - renesas,wheat # Wheat (RTP0RC7792ASKB0000JE) - - const: renesas,r8a7792 - - - description: R-Car M2-N (R8A77930) - items: - - enum: - - renesas,gose # Gose (RTP0RC7793SEB00010S) - - const: renesas,r8a7793 - - - description: R-Car E2 (R8A77940) - items: - - enum: - - renesas,alt # Alt (RTP0RC7794SEB00010S) - - renesas,silk # SILK (RTP0RC7794LCB00011S) - - const: renesas,r8a7794 - - - description: R-Car H3 (R8A77950) - items: - - enum: - # H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1)) - # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0)) - - renesas,h3ulcb - - renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S) - - const: renesas,r8a7795 - - - description: R-Car M3-W (R8A77960) - items: - - enum: - - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0)) - - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S) - - const: renesas,r8a7796 - - - description: R-Car M3-W+ (R8A77961) - items: - - enum: - - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP8J77961ASKB0SK0SA05A (M3 ES3.0)) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012SA5A) - - const: renesas,r8a77961 - - - description: Kingfisher (SBEV-RCAR-KF-M03) - oneOf: - - items: - - const: shimafuji,kingfisher - - enum: - - renesas,h3ulcb - - renesas,m3ulcb - - renesas,m3nulcb - - enum: - - renesas,r8a7795 - - renesas,r8a7796 - - renesas,r8a77961 - - renesas,r8a77965 - - items: - - const: shimafuji,kingfisher - - enum: - - renesas,h3ulcb - - renesas,m3ulcb - - renesas,m3nulcb - - enum: - - renesas,r8a779m0 - - renesas,r8a779m1 - - renesas,r8a779m2 - - renesas,r8a779m3 - - renesas,r8a779m4 - - renesas,r8a779m5 - - renesas,r8a779m8 - - renesas,r8a779mb - - enum: - - renesas,r8a7795 - - renesas,r8a77961 - - renesas,r8a77965 - - - description: R-Car M3-N (R8A77965) - items: - - enum: - - renesas,m3nulcb # M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1)) - - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S (M3-N)) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S) - - const: renesas,r8a77965 - - - description: R-Car V3M (R8A77970) - items: - - enum: - - renesas,eagle # Eagle (RTP0RC77970SEB0010S) - - renesas,v3msk # V3MSK (Y-ASK-RCAR-V3M-WS10) - - const: renesas,r8a77970 - - - description: R-Car V3H (R8A77980) - items: - - enum: - - renesas,condor # Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01) - - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10) - - const: renesas,r8a77980 - - - description: R-Car V3H2 (R8A77980A) - items: - - enum: - - renesas,condor-i # Condor-I (RTP0RC77980SEBS012SA01) - - const: renesas,r8a77980a - - const: renesas,r8a77980 - - - description: R-Car E3 (R8A77990) - items: - - enum: - - renesas,ebisu # Ebisu (RTP0RC77990SEB0010S) - - const: renesas,r8a77990 - - - description: R-Car D3 (R8A77995) - items: - - enum: - - renesas,draak # Draak (RTP0RC77995SEB0010S) - - const: renesas,r8a77995 - - - description: R-Car V3U (R8A779A0) - items: - - enum: - - renesas,falcon-cpu # Falcon CPU board (RTP0RC779A0CPB0010S) - - const: renesas,r8a779a0 - - - items: - - enum: - - renesas,falcon-breakout # Falcon BreakOut board (RTP0RC779A0BOB0010S) - - const: renesas,falcon-cpu - - const: renesas,r8a779a0 - - - description: R-Car S4-8 (R8A779F0) - items: - - enum: - - renesas,spider-cpu # Spider CPU board (RTP8A779F0ASKB0SC2S) - - const: renesas,r8a779f0 - - - items: - - enum: - - renesas,spider-breakout # Spider BreakOut board (RTP8A779F0ASKB0SB0S) - - const: renesas,spider-cpu - - const: renesas,r8a779f0 - - - description: R-Car V4H (R8A779G0) - items: - - enum: - - renesas,white-hawk-cpu # White Hawk CPU board (RTP8A779G0ASKB0FC0SA000) - - const: renesas,r8a779g0 - - - items: - - enum: - - renesas,white-hawk-breakout # White Hawk BreakOut board (RTP8A779G0ASKB0SB0SA000) - - const: renesas,white-hawk-cpu - - const: renesas,r8a779g0 - - - description: R-Car H3e (R8A779M0) - items: - - enum: - - renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779m0 - - const: renesas,r8a7795 - - - description: R-Car H3e-2G (R8A779M1) - items: - - enum: - - renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779m1 - - const: renesas,r8a7795 - - - description: R-Car M3e (R8A779M2) - items: - - enum: - - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779m2 - - const: renesas,r8a77961 - - - description: R-Car M3e-2G (R8A779M3) - items: - - enum: - - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779m3 - - const: renesas,r8a77961 - - - description: R-Car M3Ne (R8A779M4) - items: - - enum: - - renesas,m3nulcb # M3NULCB (R-Car Starter Kit Pro) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779m4 - - const: renesas,r8a77965 - - - description: R-Car M3Ne-2G (R8A779M5) - items: - - enum: - - renesas,m3nulcb # M3NULCB (R-Car Starter Kit Pro) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779m5 - - const: renesas,r8a77965 - - - description: R-Car E3e (R8A779M6) - items: - - enum: - - renesas,ebisu # Ebisu - - const: renesas,r8a779m6 - - const: renesas,r8a77990 - - - description: R-Car D3e (R8A779M7) - items: - - enum: - - renesas,draak # Draak - - const: renesas,r8a779m7 - - const: renesas,r8a77995 - - - description: R-Car H3Ne (R8A779M8) - items: - - enum: - - renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779m8 - - const: renesas,r8a7795 - - - description: R-Car H3Ne-1.7G (R8A779MB) - items: - - enum: - - renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier) - - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) - - const: renesas,r8a779mb - - const: renesas,r8a7795 - - - description: RZ/N1D (R9A06G032) - items: - - enum: - - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) - - const: renesas,r9a06g032 - - - description: RZ/G2UL (R9A07G043) - items: - - enum: - - renesas,smarc-evk # SMARC EVK - - enum: - - renesas,r9a07g043u11 # RZ/G2UL Type-1 - - renesas,r9a07g043u12 # RZ/G2UL Type-2 - - const: renesas,r9a07g043 - - - description: RZ/G2{L,LC} (R9A07G044) - items: - - enum: - - renesas,smarc-evk # SMARC EVK - - enum: - - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC - - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC - - renesas,r9a07g044l1 # Single Cortex-A55 RZ/G2L - - renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L - - const: renesas,r9a07g044 - - - description: RZ/V2L (R9A07G054) - items: - - enum: - - renesas,smarc-evk # SMARC EVK - - enum: - - renesas,r9a07g054l1 # Single Cortex-A55 RZ/V2L - - renesas,r9a07g054l2 # Dual Cortex-A55 RZ/V2L - - const: renesas,r9a07g054 - - - description: RZ/V2M (R9A09G011) - items: - - enum: - - renesas,rzv2mevk2 # RZ/V2M Eval Board v2.0 - - const: renesas,r9a09g011 - -additionalProperties: true - -... diff --git a/dts/Bindings/arm/rockchip.yaml b/dts/Bindings/arm/rockchip.yaml index c6c69a4e37..fcf7316ecd 100644 --- a/dts/Bindings/arm/rockchip.yaml +++ b/dts/Bindings/arm/rockchip.yaml @@ -30,14 +30,23 @@ properties: - const: amarula,vyasa-rk3288 - const: rockchip,rk3288 - - description: Anbernic RG353P + - description: Anbernic RK3326 Handheld Gaming Console items: - - const: anbernic,rg353p - - const: rockchip,rk3566 + - enum: + - anbernic,rg351m + - anbernic,rg351v + - const: rockchip,rk3326 - - description: Anbernic RG503 + - description: Anbernic RK3566 Handheld Gaming Console items: - - const: anbernic,rg503 + - enum: + - anbernic,rg353p + - anbernic,rg353ps + - anbernic,rg353v + - anbernic,rg353vs + - anbernic,rg503 + - anbernic,rg-arc-d + - anbernic,rg-arc-s - const: rockchip,rk3566 - description: Asus Tinker board @@ -75,11 +84,47 @@ properties: - const: chipspark,rayeager-px2 - const: rockchip,rk3066a + - description: Cool Pi Compute Module 5(CM5) EVB + items: + - enum: + - coolpi,pi-cm5-evb + - const: coolpi,pi-cm5 + - const: rockchip,rk3588 + + - description: Cool Pi 4 Model B + items: + - const: coolpi,pi-4b + - const: rockchip,rk3588s + + - description: Edgeble Neural Compute Module 2(Neu2) SoM based boards + items: + - const: edgeble,neural-compute-module-2-io # Edgeble Neural Compute Module 2 IO Board + - const: edgeble,neural-compute-module-2 # Edgeble Neural Compute Module 2 SoM + - const: rockchip,rv1126 + + - description: Edgeble Neural Compute Module 6(Neu6) SoM based boards + items: + - const: edgeble,neural-compute-module-6a-io # Edgeble NCM6A-IO Board + - enum: + - edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM + - edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM + - const: rockchip,rk3588 + - description: Elgin RV1108 R1 items: - const: elgin,rv1108-r1 - const: rockchip,rv1108 + - description: EmbedFire LubanCat 1 + items: + - const: embedfire,lubancat-1 + - const: rockchip,rk3566 + + - description: EmbedFire LubanCat 2 + items: + - const: embedfire,lubancat-2 + - const: rockchip,rk3568 + - description: Engicam PX30.Core C.TOUCH 2.0 items: - const: engicam,px30-core-ctouch2 @@ -148,9 +193,17 @@ properties: - const: firefly,rk3566-roc-pc - const: rockchip,rk3566 - - description: FriendlyElec NanoPi R2S + - description: Firefly Station P2 + items: + - const: firefly,rk3568-roc-pc + - const: rockchip,rk3568 + + - description: FriendlyElec NanoPi R2 series boards items: - - const: friendlyarm,nanopi-r2s + - enum: + - friendlyarm,nanopi-r2c + - friendlyarm,nanopi-r2c-plus + - friendlyarm,nanopi-r2s - const: rockchip,rk3328 - description: FriendlyElec NanoPi4 series boards @@ -164,11 +217,35 @@ properties: - friendlyarm,nanopi-r4s-enterprise - const: rockchip,rk3399 + - description: FriendlyElec NanoPi R5 series boards + items: + - enum: + - friendlyarm,nanopi-r5c + - friendlyarm,nanopi-r5s + - const: rockchip,rk3568 + + - description: FriendlyElec NanoPi R6 series boards + items: + - enum: + - friendlyarm,nanopi-r6c + - friendlyarm,nanopi-r6s + - const: rockchip,rk3588s + + - description: FriendlyElec NanoPC T6 + items: + - const: friendlyarm,nanopc-t6 + - const: rockchip,rk3588 + - description: GeekBuying GeekBox items: - const: geekbuying,geekbox - const: rockchip,rk3368 + - description: Geniatech XPI-3128 + items: + - const: geniatech,xpi-3128 + - const: rockchip,rk3128 + - description: Google Bob (Asus Chromebook Flip C101PA) items: - const: google,bob-rev13 @@ -468,11 +545,31 @@ properties: - const: hardkernel,rk3326-odroid-go2 - const: rockchip,rk3326 + - description: Hardkernel Odroid Go Advance Black Edition + items: + - const: hardkernel,rk3326-odroid-go2-v11 + - const: rockchip,rk3326 + + - description: Hardkernel Odroid Go Super + items: + - const: hardkernel,rk3326-odroid-go3 + - const: rockchip,rk3326 + + - description: Hardkernel Odroid M1 + items: + - const: rockchip,rk3568-odroid-m1 + - const: rockchip,rk3568 + - description: Hugsun X99 TV Box items: - const: hugsun,x99 - const: rockchip,rk3399 + - description: Indiedroid Nova SBC + items: + - const: indiedroid,nova + - const: rockchip,rk3588s + - description: Khadas Edge series boards items: - enum: @@ -481,6 +578,11 @@ properties: - khadas,edge-v - const: rockchip,rk3399 + - description: Khadas Edge2 series boards + items: + - const: khadas,edge2 + - const: rockchip,rk3588s + - description: Kobol Helios64 items: - const: kobol,helios64 @@ -496,6 +598,13 @@ properties: - const: leez,p710 - const: rockchip,rk3399 + - description: Lunzn FastRhino R66S / R68S + items: + - enum: + - lunzn,fastrhino-r66s + - lunzn,fastrhino-r68s + - const: rockchip,rk3568 + - description: mqmaker MiQi items: - const: mqmaker,miqi @@ -511,9 +620,9 @@ properties: - const: openailab,eaidk-610 - const: rockchip,rk3399 - - description: Orange Pi RK3399 board + - description: Xunlong Orange Pi RK3399 board items: - - const: rockchip,rk3399-orangepi + - const: xunlong,rk3399-orangepi - const: rockchip,rk3399 - description: Phytec phyCORE-RK3288 Rapid Development Kit @@ -540,6 +649,14 @@ properties: - const: pine64,pinephone-pro - const: rockchip,rk3399 + - description: Pine64 PineTab2 + items: + - enum: + - pine64,pinetab2-v0.1 + - pine64,pinetab2-v2.0 + - const: pine64,pinetab2 + - const: rockchip,rk3566 + - description: Pine64 Rock64 items: - const: pine64,rock64 @@ -560,13 +677,48 @@ properties: - pine64,quartz64-b - const: rockchip,rk3566 + - description: Pine64 QuartzPro64 + items: + - const: pine64,quartzpro64 + - const: rockchip,rk3588 + - description: Pine64 SoQuartz SoM items: - enum: + - pine64,soquartz-blade - pine64,soquartz-cm4io + - pine64,soquartz-model-a - const: pine64,soquartz - const: rockchip,rk3566 + - description: Powkiddy RK3566 Handheld Gaming Console + items: + - enum: + - powkiddy,rgb10max3 + - powkiddy,rgb30 + - powkiddy,rk2023 + - powkiddy,x55 + - const: rockchip,rk3566 + + - description: QNAP TS-433-4G 4-Bay NAS + items: + - const: qnap,ts433 + - const: rockchip,rk3568 + + - description: Radxa Compute Module 3(CM3) + items: + - enum: + - radxa,cm3-io + - const: radxa,cm3 + - const: rockchip,rk3566 + + - description: Radxa CM3 Industrial + items: + - enum: + - radxa,e25 + - const: radxa,cm3i + - const: rockchip,rk3568 + - description: Radxa Rock items: - const: radxa,rock @@ -588,6 +740,11 @@ properties: - const: radxa,rock-4c-plus - const: rockchip,rk3399 + - description: Radxa ROCK 4SE + items: + - const: radxa,rock-4se + - const: rockchip,rk3399 + - description: Radxa ROCK Pi E items: - const: radxa,rockpi-e @@ -620,6 +777,16 @@ properties: - const: radxa,rock3a - const: rockchip,rk3568 + - description: Radxa ROCK 5 Model A + items: + - const: radxa,rock-5a + - const: rockchip,rk3588s + + - description: Radxa ROCK 5 Model B + items: + - const: radxa,rock-5b + - const: rockchip,rk3588 + - description: Rikomagic MK808 v1 items: - const: rikomagic,mk808 @@ -657,6 +824,11 @@ properties: - const: rockchip,rk3036-evb - const: rockchip,rk3036 + - description: Rockchip RK3128 Evaluation board + items: + - const: rockchip,rk3128-evb + - const: rockchip,rk3128 + - description: Rockchip RK3228 Evaluation board items: - const: rockchip,rk3228-evb @@ -704,11 +876,26 @@ properties: - const: rockchip,rk3399-sapphire-excavator - const: rockchip,rk3399 + - description: Rockchip RK3588 Evaluation board + items: + - const: rockchip,rk3588-evb1-v10 + - const: rockchip,rk3588 + - description: Rockchip RV1108 Evaluation board items: - const: rockchip,rv1108-evb - const: rockchip,rv1108 + - description: Rockchip Toybrick TB-RK3588X board + items: + - const: rockchip,rk3588-toybrick-x0 + - const: rockchip,rk3588 + + - description: Theobroma Systems PX30-uQ7 with Haikou baseboard + items: + - const: tsd,px30-ringneck-haikou + - const: rockchip,px30 + - description: Theobroma Systems RK3368-uQ7 with Haikou baseboard items: - const: tsd,rk3368-lion-haikou @@ -719,26 +906,71 @@ properties: - const: tsd,rk3399-puma-haikou - const: rockchip,rk3399 + - description: Theobroma Systems RK3588-SBC Jaguar + items: + - const: tsd,rk3588-jaguar + - const: rockchip,rk3588 + + - description: Theobroma Systems RK3588-Q7 with Haikou baseboard + items: + - const: tsd,rk3588-tiger-haikou + - const: tsd,rk3588-tiger + - const: rockchip,rk3588 + - description: Tronsmart Orion R68 Meta items: - const: tronsmart,orion-r68-meta - const: rockchip,rk3368 + - description: Turing RK1 + items: + - const: turing,rk1 + - const: rockchip,rk3588 + + - description: Xunlong Orange Pi 5 Plus + items: + - const: xunlong,orangepi-5-plus + - const: rockchip,rk3588 + + - description: Xunlong Orange Pi R1 Plus / LTS + items: + - enum: + - xunlong,orangepi-r1-plus + - xunlong,orangepi-r1-plus-lts + - const: rockchip,rk3328 + + - description: Xunlong Orange Pi 5 + items: + - const: xunlong,orangepi-5 + - const: rockchip,rk3588s + - description: Zkmagic A95X Z2 items: - const: zkmagic,a95x-z2 - const: rockchip,rk3318 + - description: Rockchip RK3566 BOX Evaluation Demo board + items: + - const: rockchip,rk3566-box-demo + - const: rockchip,rk3566 + - description: Rockchip RK3568 Evaluation board items: - const: rockchip,rk3568-evb1-v10 - const: rockchip,rk3568 - - description: Rockchip RK3568 Banana Pi R2 Pro + - description: Sinovoip RK3568 Banana Pi R2 Pro items: - - const: rockchip,rk3568-bpi-r2pro + - const: sinovoip,rk3568-bpi-r2pro - const: rockchip,rk3568 + - description: Sonoff iHost Smart Home Hub + items: + - const: itead,sonoff-ihost + - enum: + - rockchip,rv1126 + - rockchip,rv1109 + additionalProperties: true ... diff --git a/dts/Bindings/arm/rockchip/pmu.yaml b/dts/Bindings/arm/rockchip/pmu.yaml index 8c73bc7f40..b79c81cd9f 100644 --- a/dts/Bindings/arm/rockchip/pmu.yaml +++ b/dts/Bindings/arm/rockchip/pmu.yaml @@ -27,6 +27,7 @@ select: - rockchip,rk3399-pmu - rockchip,rk3568-pmu - rockchip,rk3588-pmu + - rockchip,rv1126-pmu required: - compatible @@ -43,6 +44,7 @@ properties: - rockchip,rk3399-pmu - rockchip,rk3568-pmu - rockchip,rk3588-pmu + - rockchip,rv1126-pmu - const: syscon - const: simple-mfd diff --git a/dts/Bindings/arm/samsung/samsung-boards.yaml b/dts/Bindings/arm/samsung/samsung-boards.yaml index faea33e4f7..01dcbd8aa7 100644 --- a/dts/Bindings/arm/samsung/samsung-boards.yaml +++ b/dts/Bindings/arm/samsung/samsung-boards.yaml @@ -72,6 +72,16 @@ properties: - const: samsung,exynos4210 - const: samsung,exynos4 + - description: Samsung Galaxy Tab3 family boards + items: + - enum: + - samsung,t310 # Samsung Galaxy Tab 3 8.0 WiFi (SM-T310) + - samsung,t311 # Samsung Galaxy Tab 3 8.0 3G (SM-T311) + - samsung,t315 # Samsung Galaxy Tab 3 8.0 LTE (SM-T315) + - const: samsung,tab3 + - const: samsung,exynos4212 + - const: samsung,exynos4 + - description: Exynos4412 based boards items: - enum: @@ -171,6 +181,7 @@ properties: - hardkernel,odroid-xu3-lite # Hardkernel Odroid XU3 Lite - hardkernel,odroid-xu4 # Hardkernel Odroid XU4 - hardkernel,odroid-hc1 # Hardkernel Odroid HC1 + - samsung,k3g # Samsung Galaxy S5 (SM-G900H) - const: samsung,exynos5800 - const: samsung,exynos5 @@ -219,6 +230,12 @@ properties: - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK - const: samsung,exynosautov9 + - description: Exynos Auto v920 based boards + items: + - enum: + - samsung,exynosautov920-sadk # Samsung Exynos Auto v920 SADK + - const: samsung,exynosautov920 + required: - compatible diff --git a/dts/Bindings/arm/socionext/milbeaut.yaml b/dts/Bindings/arm/socionext/milbeaut.yaml index aa1d4afbc5..5a428a8857 100644 --- a/dts/Bindings/arm/socionext/milbeaut.yaml +++ b/dts/Bindings/arm/socionext/milbeaut.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/socionext/milbeaut.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Milbeaut platforms device tree bindings +title: Milbeaut platforms maintainers: - Taichi Sugaya <sugaya.taichi@socionext.com> diff --git a/dts/Bindings/arm/socionext/socionext,uniphier-system-cache.yaml b/dts/Bindings/arm/socionext/socionext,uniphier-system-cache.yaml deleted file mode 100644 index 6096c082d5..0000000000 --- a/dts/Bindings/arm/socionext/socionext,uniphier-system-cache.yaml +++ /dev/null @@ -1,101 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/socionext/socionext,uniphier-system-cache.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: UniPhier outer cache controller - -description: | - UniPhier ARM 32-bit SoCs are integrated with a full-custom outer cache - controller system. All of them have a level 2 cache controller, and some - have a level 3 cache controller as well. - -maintainers: - - Masahiro Yamada <yamada.masahiro@socionext.com> - -properties: - compatible: - const: socionext,uniphier-system-cache - - reg: - description: | - should contain 3 regions: control register, revision register, - operation register, in this order. - maxItems: 3 - - interrupts: - description: | - Interrupts can be used to notify the completion of cache operations. - The number of interrupts should match to the number of CPU cores. - The specified interrupts correspond to CPU0, CPU1, ... in this order. - minItems: 1 - maxItems: 4 - - cache-unified: true - - cache-size: true - - cache-sets: true - - cache-line-size: true - - cache-level: - minimum: 2 - maximum: 3 - - next-level-cache: true - -allOf: - - $ref: /schemas/cache-controller.yaml# - -additionalProperties: false - -required: - - compatible - - reg - - interrupts - - cache-unified - - cache-size - - cache-sets - - cache-line-size - - cache-level - -examples: - - | - // System with L2. - cache-controller@500c0000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; - interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; - cache-unified; - cache-size = <0x140000>; - cache-sets = <512>; - cache-line-size = <128>; - cache-level = <2>; - }; - - | - // System with L2 and L3. - // L2 should specify the next level cache by 'next-level-cache'. - l2: cache-controller@500c0000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>; - interrupts = <0 190 4>, <0 191 4>; - cache-unified; - cache-size = <0x200000>; - cache-sets = <512>; - cache-line-size = <128>; - cache-level = <2>; - next-level-cache = <&l3>; - }; - - l3: cache-controller@500c8000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>; - interrupts = <0 174 4>, <0 175 4>; - cache-unified; - cache-size = <0x200000>; - cache-sets = <512>; - cache-line-size = <256>; - cache-level = <3>; - }; diff --git a/dts/Bindings/arm/socionext/synquacer.yaml b/dts/Bindings/arm/socionext/synquacer.yaml new file mode 100644 index 0000000000..72554a4f1c --- /dev/null +++ b/dts/Bindings/arm/socionext/synquacer.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/socionext/synquacer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext Synquacer platform + +maintainers: + - Masahisa Kojima <masahisa.kojima@linaro.org> + - Jassi Brar <jaswinder.singh@linaro.org> + +description: + Socionext SC2A11B (Synquacer) SoC based boards + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - socionext,developer-box + - const: socionext,synquacer + +additionalProperties: true + +... diff --git a/dts/Bindings/arm/socionext/uniphier.yaml b/dts/Bindings/arm/socionext/uniphier.yaml index 8c0e916584..3e7f3d927e 100644 --- a/dts/Bindings/arm/socionext/uniphier.yaml +++ b/dts/Bindings/arm/socionext/uniphier.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/socionext/uniphier.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Socionext UniPhier platform device tree bindings +title: Socionext UniPhier platform maintainers: - Masahiro Yamada <yamada.masahiro@socionext.com> @@ -26,6 +26,12 @@ properties: - socionext,uniphier-pro4-ref - socionext,uniphier-pro4-sanji - const: socionext,uniphier-pro4 + - description: Pro5 SoC boards + items: + - enum: + - socionext,uniphier-pro5-epcore + - socionext,uniphier-pro5-proex + - const: socionext,uniphier-pro5 - description: sLD8 SoC boards items: - enum: diff --git a/dts/Bindings/arm/sp810.yaml b/dts/Bindings/arm/sp810.yaml index bc8e524aa9..c9094e5ec5 100644 --- a/dts/Bindings/arm/sp810.yaml +++ b/dts/Bindings/arm/sp810.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/sp810.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM Versatile Express SP810 System Controller bindings +title: ARM Versatile Express SP810 System Controller maintainers: - Andre Przywara <andre.przywara@arm.com> diff --git a/dts/Bindings/arm/sprd/sprd.yaml b/dts/Bindings/arm/sprd/sprd.yaml index 2c12e57139..40fc3c8b9d 100644 --- a/dts/Bindings/arm/sprd/sprd.yaml +++ b/dts/Bindings/arm/sprd/sprd.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/arm/sprd/sprd.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Unisoc platforms device tree bindings +title: Unisoc platforms maintainers: - Orson Zhai <orsonzhai@gmail.com> @@ -35,6 +35,11 @@ properties: - sprd,ums512-1h10 - const: sprd,ums512 + - items: + - enum: + - sprd,ums9620-2h10 + - const: sprd,ums9620 + additionalProperties: true ... diff --git a/dts/Bindings/arm/sti.yaml b/dts/Bindings/arm/sti.yaml index 3ca054c643..842def3e3f 100644 --- a/dts/Bindings/arm/sti.yaml +++ b/dts/Bindings/arm/sti.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/arm/sti.yaml# @@ -13,13 +13,20 @@ properties: $nodename: const: '/' compatible: - items: - - enum: - - st,stih415 - - st,stih416 - - st,stih407 - - st,stih410 - - st,stih418 + oneOf: + - items: + - const: st,stih407-b2120 + - const: st,stih407 + - items: + - enum: + - st,stih410-b2120 + - st,stih410-b2260 + - const: st,stih410 + - items: + - enum: + - st,stih418-b2199 + - st,stih418-b2264 + - const: st,stih418 additionalProperties: true diff --git a/dts/Bindings/arm/stm32/st,mlahb.yaml b/dts/Bindings/arm/stm32/st,mlahb.yaml index ecb28e90fd..d2dce238ff 100644 --- a/dts/Bindings/arm/stm32/st,mlahb.yaml +++ b/dts/Bindings/arm/stm32/st,mlahb.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/stm32/st,mlahb.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/stm32/st,mlahb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: STMicroelectronics STM32 ML-AHB interconnect bindings +title: STMicroelectronics STM32 ML-AHB interconnect maintainers: - Fabien Dessenne <fabien.dessenne@foss.st.com> diff --git a/dts/Bindings/arm/stm32/st,stm32-syscon.yaml b/dts/Bindings/arm/stm32/st,stm32-syscon.yaml index 6f846d69c5..d083d8ad48 100644 --- a/dts/Bindings/arm/stm32/st,stm32-syscon.yaml +++ b/dts/Bindings/arm/stm32/st,stm32-syscon.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: STMicroelectronics STM32 Platforms System Controller bindings +title: STMicroelectronics STM32 Platforms System Controller maintainers: - Alexandre Torgue <alexandre.torgue@foss.st.com> @@ -15,11 +15,13 @@ properties: oneOf: - items: - enum: - - st,stm32mp157-syscfg - - st,stm32mp151-pwr-mcu - - st,stm32-syscfg - st,stm32-power-config + - st,stm32-syscfg - st,stm32-tamp + - st,stm32f4-gcan + - st,stm32mp151-pwr-mcu + - st,stm32mp157-syscfg + - st,stm32mp25-syscfg - const: syscon - items: - const: st,stm32-tamp @@ -42,6 +44,7 @@ if: contains: enum: - st,stm32mp157-syscfg + - st,stm32f4-gcan then: required: - clocks diff --git a/dts/Bindings/arm/stm32/stm32.yaml b/dts/Bindings/arm/stm32/stm32.yaml index 4c605bccc4..bc2f43330a 100644 --- a/dts/Bindings/arm/stm32/stm32.yaml +++ b/dts/Bindings/arm/stm32/stm32.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/stm32/stm32.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: STMicroelectronics STM32 Platforms Device Tree Bindings +title: STMicroelectronics STM32 Platforms maintainers: - Alexandre Torgue <alexandre.torgue@foss.st.com> @@ -59,6 +59,12 @@ properties: - prt,prtt1s # Protonic PRTT1S - const: st,stm32mp151 + - description: DH STM32MP151 DHCOR SoM based Boards + items: + - const: dh,stm32mp151a-dhcor-testbench + - const: dh,stm32mp151a-dhcor-som + - const: st,stm32mp151 + - description: DH STM32MP153 DHCOM SoM based Boards items: - const: dh,stm32mp153c-dhcom-drc02 @@ -76,29 +82,19 @@ properties: - shiratech,stm32mp157a-iot-box # IoT Box - shiratech,stm32mp157a-stinger96 # Stinger96 - st,stm32mp157c-ed1 + - st,stm32mp157c-ed1-scmi - st,stm32mp157a-dk1 + - st,stm32mp157a-dk1-scmi - st,stm32mp157c-dk2 + - st,stm32mp157c-dk2-scmi - const: st,stm32mp157 - items: - - const: st,stm32mp157a-dk1-scmi - - const: st,stm32mp157a-dk1 - - const: st,stm32mp157 - - items: - - const: st,stm32mp157c-dk2-scmi - - const: st,stm32mp157c-dk2 - - const: st,stm32mp157 - - items: - - const: st,stm32mp157c-ed1-scmi - - const: st,stm32mp157c-ed1 - - const: st,stm32mp157 - - items: - const: st,stm32mp157c-ev1 - const: st,stm32mp157c-ed1 - const: st,stm32mp157 - items: - const: st,stm32mp157c-ev1-scmi - - const: st,stm32mp157c-ev1 - const: st,stm32mp157c-ed1 - const: st,stm32mp157 @@ -137,7 +133,10 @@ properties: - description: Octavo OSD32MP15x System-in-Package based boards items: - enum: - - lxa,stm32mp157c-mc1 # Linux Automation MC-1 + - lxa,stm32mp157c-mc1 # Linux Automation MC-1 + - lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1) + - lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2) + - oct,stm32mp157c-osd32-red # Octavo OSD32MP1 RED board - const: oct,stm32mp15xx-osd32 - enum: - st,stm32mp157 @@ -149,6 +148,18 @@ properties: - const: seeed,stm32mp157c-odyssey-som - const: st,stm32mp157 + - description: Phytec STM32MP1 SoM based Boards + items: + - const: phytec,phycore-stm32mp1-3 + - const: phytec,phycore-stm32mp157c-som + - const: st,stm32mp157 + + - description: ST STM32MP257 based Boards + items: + - enum: + - st,stm32mp257f-ev1 + - const: st,stm32mp257 + additionalProperties: true ... diff --git a/dts/Bindings/arm/sunxi.yaml b/dts/Bindings/arm/sunxi.yaml index 3ad1cd50e3..09d835db6d 100644 --- a/dts/Bindings/arm/sunxi.yaml +++ b/dts/Bindings/arm/sunxi.yaml @@ -51,6 +51,11 @@ properties: - const: allwinner,parrot - const: allwinner,sun8i-a33 + - description: Anbernic RG-Nano + items: + - const: anbernic,rg-nano + - const: allwinner,sun8i-v3s + - description: Amarula A64 Relic items: - const: amarula,a64-relic @@ -151,6 +156,17 @@ properties: - const: roofull,beelink-x2 - const: allwinner,sun8i-h3 + - description: BigTreeTech Manta M4/8P + items: + - const: bigtreetech,cb1-manta + - const: bigtreetech,cb1 + - const: allwinner,sun50i-h616 + + - description: BigTreeTech Pi + items: + - const: bigtreetech,pi + - const: allwinner,sun50i-h616 + - description: Chuwi V7 CW0825 items: - const: chuwi,v7-cw0825 @@ -305,6 +321,12 @@ properties: - const: allwinner,i12-tvbox - const: allwinner,sun7i-a20 + - description: ICnova A20 ADB4006 + items: + - const: incircuit,icnova-a20-adb4006 + - const: incircuit,icnova-a20 + - const: allwinner,sun7i-a20 + - description: ICNova A20 SWAC items: - const: incircuit,icnova-a20-swac @@ -366,6 +388,12 @@ properties: - const: lamobo,lamobo-r1 - const: allwinner,sun7i-a20 + - description: Lctech Pi F1C200s + items: + - const: lctech,pi-f1c200s + - const: allwinner,suniv-f1c200s + - const: allwinner,suniv-f1c100s + - description: Libre Computer Board ALL-H3-CC H2+ items: - const: libretech,all-h3-cc-h2-plus @@ -529,13 +557,13 @@ properties: - const: msi,primo81 - const: allwinner,sun6i-a31s - - description: Emlid Neutis N5 Developper Board + - description: Emlid Neutis N5 Developer Board items: - const: emlid,neutis-n5-devboard - const: emlid,neutis-n5 - const: allwinner,sun50i-h5 - - description: Emlid Neutis N5H3 Developper Board + - description: Emlid Neutis N5H3 Developer Board items: - const: emlid,neutis-n5h3-devboard - const: emlid,neutis-n5h3 @@ -787,6 +815,12 @@ properties: - const: allwinner,r7-tv-dongle - const: allwinner,sun5i-a10s + - description: Remix Mini PC + items: + - const: jide,remix-mini-pc + - const: allwinner,sun50i-h64 + - const: allwinner,sun50i-a64 + - description: RerVision H3-DVK items: - const: rervision,h3-dvk @@ -807,6 +841,19 @@ properties: - const: sinlinx,sina33 - const: allwinner,sun8i-a33 + - description: Sipeed Longan Pi 3H board for the Sipeed Longan Module 3H + items: + - const: sipeed,longan-pi-3h + - const: sipeed,longan-module-3h + - const: allwinner,sun50i-h618 + + - description: SourceParts PopStick v1.1 + items: + - const: sourceparts,popstick-v1.1 + - const: sourceparts,popstick + - const: allwinner,suniv-f1c200s + - const: allwinner,suniv-f1c100s + - description: SL631 Action Camera with IMX179 items: - const: allwinner,sl631-imx179 @@ -833,6 +880,11 @@ properties: - const: topwise,a721 - const: allwinner,sun4i-a10 + - description: Transpeed 8K618-T + items: + - const: transpeed,8k618-t + - const: allwinner,sun50i-h618 + - description: Utoo P66 items: - const: utoo,p66 @@ -843,6 +895,11 @@ properties: - const: wexler,tab7200 - const: allwinner,sun7i-a20 + - description: MangoPi MQ-R board + items: + - const: widora,mangopi-mq-r-t113 + - const: allwinner,sun8i-t113s + - description: WITS A31 Colombus Evaluation Board items: - const: wits,colombus @@ -973,4 +1030,14 @@ properties: - const: xunlong,orangepi-zero2 - const: allwinner,sun50i-h616 + - description: Xunlong OrangePi Zero 2W + items: + - const: xunlong,orangepi-zero2w + - const: allwinner,sun50i-h618 + + - description: Xunlong OrangePi Zero 3 + items: + - const: xunlong,orangepi-zero3 + - const: allwinner,sun50i-h618 + additionalProperties: true diff --git a/dts/Bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml b/dts/Bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml index f3878e0b3c..d805c4508b 100644 --- a/dts/Bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml +++ b/dts/Bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner CPU Configuration Controller Device Tree Bindings +title: Allwinner CPU Configuration Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/dts/Bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml b/dts/Bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml index 668aadbfe4..644f391afb 100644 --- a/dts/Bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml +++ b/dts/Bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun9i-a80-prcm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 PRCM Device Tree Bindings +title: Allwinner A80 PRCM maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/dts/Bindings/arm/swir.txt b/dts/Bindings/arm/swir.txt deleted file mode 100644 index 042be73a95..0000000000 --- a/dts/Bindings/arm/swir.txt +++ /dev/null @@ -1,12 +0,0 @@ -Sierra Wireless Modules device tree bindings --------------------------------------------- - -Supported Modules : - - WP8548 : Includes MDM9615 and PM8018 in a module - -Sierra Wireless modules shall have the following properties : - Required root node property - - compatible: "swir,wp8548" for the WP8548 CF3 Module - -Board compatible values: - - "swir,mangoh-green-wp8548" for the mangOH green board with the WP8548 module diff --git a/dts/Bindings/arm/syna.txt b/dts/Bindings/arm/syna.txt index 851f48ead9..f53c430f64 100644 --- a/dts/Bindings/arm/syna.txt +++ b/dts/Bindings/arm/syna.txt @@ -6,18 +6,6 @@ berlin SoCs are now Synaptics' SoCs now. --------------------------------------------------------------- -Work in progress statement: - -Device tree files and bindings applying to Marvell Berlin SoCs and boards are -considered "unstable". Any Marvell Berlin device tree binding may change at any -time. Be sure to use a device tree binary and a kernel image generated from the -same source tree. - -Please refer to Documentation/devicetree/bindings/ABI.rst for a definition of a -stable binding/ABI. - ---------------------------------------------------------------- - Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 shall have the following properties: diff --git a/dts/Bindings/arm/tegra.yaml b/dts/Bindings/arm/tegra.yaml index 1f62253f94..8fb4923517 100644 --- a/dts/Bindings/arm/tegra.yaml +++ b/dts/Bindings/arm/tegra.yaml @@ -64,6 +64,14 @@ properties: - items: - const: asus,tf700t - const: nvidia,tegra30 + - description: LG Optimus 4X P880 + items: + - const: lg,p880 + - const: nvidia,tegra30 + - description: LG Optimus Vu P895 + items: + - const: lg,p895 + - const: nvidia,tegra30 - items: - const: toradex,apalis_t30-eval - const: toradex,apalis_t30 @@ -167,5 +175,28 @@ properties: - const: nvidia,p3737-0000+p3701-0000 - const: nvidia,p3701-0000 - const: nvidia,tegra234 + - description: NVIDIA IGX Orin Development Kit + items: + - const: nvidia,p3740-0002+p3701-0008 + - const: nvidia,p3701-0008 + - const: nvidia,tegra234 + - description: Jetson Orin NX + items: + - const: nvidia,p3767-0000 + - const: nvidia,tegra234 + - description: Jetson Orin NX Engineering Reference Developer Kit + items: + - const: nvidia,p3768-0000+p3767-0000 + - const: nvidia,p3767-0000 + - const: nvidia,tegra234 + - description: Jetson Orin Nano + items: + - const: nvidia,p3767-0005 + - const: nvidia,tegra234 + - description: Jetson Orin Nano Developer Kit + items: + - const: nvidia,p3768-0000+p3767-0005 + - const: nvidia,p3767-0005 + - const: nvidia,tegra234 additionalProperties: true diff --git a/dts/Bindings/arm/tegra/nvidia,nvec.txt b/dts/Bindings/arm/tegra/nvidia,nvec.txt deleted file mode 100644 index 5ae601e7f5..0000000000 --- a/dts/Bindings/arm/tegra/nvidia,nvec.txt +++ /dev/null @@ -1,21 +0,0 @@ -NVIDIA compliant embedded controller - -Required properties: -- compatible : should be "nvidia,nvec". -- reg : the iomem of the i2c slave controller -- interrupts : the interrupt line of the i2c slave controller -- clock-frequency : the frequency of the i2c bus -- gpios : the gpio used for ec request -- slave-addr: the i2c address of the slave controller -- clocks : Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names : Must include the following entries: - Tegra20/Tegra30: - - div-clk - - fast-clk - Tegra114: - - div-clk -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: - - i2c diff --git a/dts/Bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/dts/Bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml index 711bb4d08c..36dbd0838f 100644 --- a/dts/Bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml +++ b/dts/Bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: NVIDIA Tegra CPU COMPLEX CLUSTER area device tree bindings +title: NVIDIA Tegra CPU COMPLEX CLUSTER area maintainers: - Sumit Gupta <sumitg@nvidia.com> @@ -29,7 +29,7 @@ properties: maxItems: 1 nvidia,bpmp: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: | Specifies the BPMP node that needs to be queried to get operating point data for all CPUs. @@ -47,5 +47,4 @@ examples: compatible = "nvidia,tegra234-ccplex-cluster"; reg = <0x0e000000 0x5ffff>; nvidia,bpmp = <&bpmp>; - status = "okay"; }; diff --git a/dts/Bindings/arm/tegra/nvidia,tegra186-pmc.yaml b/dts/Bindings/arm/tegra/nvidia,tegra186-pmc.yaml index 0faa403f68..ea4fbf6552 100644 --- a/dts/Bindings/arm/tegra/nvidia,tegra186-pmc.yaml +++ b/dts/Bindings/arm/tegra/nvidia,tegra186-pmc.yaml @@ -27,7 +27,7 @@ properties: - const: pmc - const: wake - const: aotag - - const: scratch + - enum: [ scratch, misc ] - const: misc interrupt-controller: true @@ -41,25 +41,43 @@ properties: description: If present, inverts the PMU interrupt signal. $ref: /schemas/types.yaml#/definitions/flag -if: - properties: - compatible: - contains: - const: nvidia,tegra186-pmc -then: - properties: - reg: - maxItems: 4 - - reg-names: - maxItems: 4 -else: - properties: - reg: - minItems: 5 - - reg-names: - minItems: 5 +allOf: + - if: + properties: + compatible: + contains: + const: nvidia,tegra186-pmc + then: + properties: + reg: + maxItems: 4 + reg-names: + maxItems: 4 + contains: + const: scratch + + - if: + properties: + compatible: + contains: + const: nvidia,tegra194-pmc + then: + properties: + reg: + minItems: 5 + reg-names: + minItems: 5 + + - if: + properties: + compatible: + contains: + const: nvidia,tegra234-pmc + then: + properties: + reg-names: + contains: + const: misc patternProperties: "^[a-z0-9]+-[a-z0-9]+$": diff --git a/dts/Bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml b/dts/Bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml index 788a13f8aa..5e0f1dc542 100644 --- a/dts/Bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml +++ b/dts/Bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: NVIDIA Tegra194 AXI2APB bridge diff --git a/dts/Bindings/arm/tegra/nvidia,tegra194-cbb.yaml b/dts/Bindings/arm/tegra/nvidia,tegra194-cbb.yaml index debb2b0c80..d9c54c32c6 100644 --- a/dts/Bindings/arm/tegra/nvidia,tegra194-cbb.yaml +++ b/dts/Bindings/arm/tegra/nvidia,tegra194-cbb.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: NVIDIA Tegra194 CBB 1.0 bindings +title: NVIDIA Tegra194 CBB 1.0 maintainers: - Sumit Gupta <sumitg@nvidia.com> @@ -64,13 +64,13 @@ properties: - description: secure interrupt nvidia,axi2apb: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: Specifies the node having all axi2apb bridges which need to be checked for any error logged in their status register. nvidia,apbmisc: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: Specifies the apbmisc node which need to be used for reading the ERD register. diff --git a/dts/Bindings/arm/tegra/nvidia,tegra20-ahb.txt b/dts/Bindings/arm/tegra/nvidia,tegra20-ahb.txt deleted file mode 100644 index 9a4295b545..0000000000 --- a/dts/Bindings/arm/tegra/nvidia,tegra20-ahb.txt +++ /dev/null @@ -1,17 +0,0 @@ -NVIDIA Tegra AHB - -Required properties: -- compatible : For Tegra20, must contain "nvidia,tegra20-ahb". For - Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain - '"nvidia,<chip>-ahb", "nvidia,tegra30-ahb"' where <chip> is tegra124, - tegra132, or tegra210. -- reg : Should contain 1 register ranges(address and length). For - Tegra20, Tegra30, and Tegra114 chips, the value must be <0x6000c004 - 0x10c>. For Tegra124, Tegra132 and Tegra210 chips, the value should - be be <0x6000c000 0x150>. - -Example (for a Tegra20 chip): - ahb: ahb@6000c004 { - compatible = "nvidia,tegra20-ahb"; - reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ - }; diff --git a/dts/Bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/dts/Bindings/arm/tegra/nvidia,tegra20-flowctrl.txt deleted file mode 100644 index a855c1bffc..0000000000 --- a/dts/Bindings/arm/tegra/nvidia,tegra20-flowctrl.txt +++ /dev/null @@ -1,18 +0,0 @@ -NVIDIA Tegra Flow Controller - -Required properties: -- compatible: Should contain one of the following: - - "nvidia,tegra20-flowctrl": for Tegra20 - - "nvidia,tegra30-flowctrl": for Tegra30 - - "nvidia,tegra114-flowctrl": for Tegra114 - - "nvidia,tegra124-flowctrl": for Tegra124 - - "nvidia,tegra132-flowctrl", "nvidia,tegra124-flowctrl": for Tegra132 - - "nvidia,tegra210-flowctrl": for Tegra210 -- reg: Should contain one register range (address and length) - -Example: - - flow-controller@60007000 { - compatible = "nvidia,tegra20-flowctrl"; - reg = <0x60007000 0x1000>; - }; diff --git a/dts/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/dts/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml deleted file mode 100644 index 7fd8d47b1b..0000000000 --- a/dts/Bindings/arm/tegra/nvidia,tegra20-pmc.yaml +++ /dev/null @@ -1,389 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Tegra Power Management Controller (PMC) - -maintainers: - - Thierry Reding <thierry.reding@gmail.com> - - Jonathan Hunter <jonathanh@nvidia.com> - -properties: - compatible: - enum: - - nvidia,tegra20-pmc - - nvidia,tegra30-pmc - - nvidia,tegra114-pmc - - nvidia,tegra124-pmc - - nvidia,tegra210-pmc - - reg: - maxItems: 1 - description: - Offset and length of the register set for the device. - - clock-names: - items: - - const: pclk - - const: clk32k_in - description: - Must includes entries pclk and clk32k_in. - pclk is the Tegra clock of that name and clk32k_in is 32KHz clock - input to Tegra. - - clocks: - maxItems: 2 - description: - Must contain an entry for each entry in clock-names. - See ../clocks/clocks-bindings.txt for details. - - '#clock-cells': - const: 1 - description: - Tegra PMC has clk_out_1, clk_out_2, and clk_out_3. - PMC also has blink control which allows 32Khz clock output to - Tegra blink pad. - Consumer of PMC clock should specify the desired clock by having - the clock ID in its "clocks" phandle cell with pmc clock provider. - See include/dt-bindings/soc/tegra-pmc.h for the list of Tegra PMC - clock IDs. - - '#interrupt-cells': - const: 2 - description: - Specifies number of cells needed to encode an interrupt source. - The value must be 2. - - interrupt-controller: true - - nvidia,invert-interrupt: - $ref: /schemas/types.yaml#/definitions/flag - description: Inverts the PMU interrupt signal. - The PMU is an external Power Management Unit, whose interrupt output - signal is fed into the PMC. This signal is optionally inverted, and - then fed into the ARM GIC. The PMC is not involved in the detection - or handling of this interrupt signal, merely its inversion. - - nvidia,core-power-req-active-high: - $ref: /schemas/types.yaml#/definitions/flag - description: Core power request active-high. - - nvidia,sys-clock-req-active-high: - $ref: /schemas/types.yaml#/definitions/flag - description: System clock request active-high. - - nvidia,combined-power-req: - $ref: /schemas/types.yaml#/definitions/flag - description: combined power request for CPU and Core. - - nvidia,cpu-pwr-good-en: - $ref: /schemas/types.yaml#/definitions/flag - description: - CPU power good signal from external PMIC to PMC is enabled. - - nvidia,suspend-mode: - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2] - description: - The suspend mode that the platform should use. - Mode 0 is for LP0, CPU + Core voltage off and DRAM in self-refresh - Mode 1 is for LP1, CPU voltage off and DRAM in self-refresh - Mode 2 is for LP2, CPU voltage off - - nvidia,cpu-pwr-good-time: - $ref: /schemas/types.yaml#/definitions/uint32 - description: CPU power good time in uSec. - - nvidia,cpu-pwr-off-time: - $ref: /schemas/types.yaml#/definitions/uint32 - description: CPU power off time in uSec. - - nvidia,core-pwr-good-time: - $ref: /schemas/types.yaml#/definitions/uint32-array - description: - <Oscillator-stable-time Power-stable-time> - Core power good time in uSec. - - nvidia,core-pwr-off-time: - $ref: /schemas/types.yaml#/definitions/uint32 - description: Core power off time in uSec. - - nvidia,lp0-vec: - $ref: /schemas/types.yaml#/definitions/uint32-array - description: - <start length> Starting address and length of LP0 vector. - The LP0 vector contains the warm boot code that is executed - by AVP when resuming from the LP0 state. - The AVP (Audio-Video Processor) is an ARM7 processor and - always being the first boot processor when chip is power on - or resume from deep sleep mode. When the system is resumed - from the deep sleep mode, the warm boot code will restore - some PLLs, clocks and then brings up CPU0 for resuming the - system. - - i2c-thermtrip: - type: object - description: - On Tegra30, Tegra114 and Tegra124 if i2c-thermtrip subnode exists, - hardware-triggered thermal reset will be enabled. - - properties: - nvidia,i2c-controller-id: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - ID of I2C controller to send poweroff command to PMU. - Valid values are described in section 9.2.148 - "APBDEV_PMC_SCRATCH53_0" of the Tegra K1 Technical Reference - Manual. - - nvidia,bus-addr: - $ref: /schemas/types.yaml#/definitions/uint32 - description: Bus address of the PMU on the I2C bus. - - nvidia,reg-addr: - $ref: /schemas/types.yaml#/definitions/uint32 - description: PMU I2C register address to issue poweroff command. - - nvidia,reg-data: - $ref: /schemas/types.yaml#/definitions/uint32 - description: Poweroff command to write to PMU. - - nvidia,pinmux-id: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - Pinmux used by the hardware when issuing Poweroff command. - Defaults to 0. Valid values are described in section 12.5.2 - "Pinmux Support" of the Tegra4 Technical Reference Manual. - - required: - - nvidia,i2c-controller-id - - nvidia,bus-addr - - nvidia,reg-addr - - nvidia,reg-data - - additionalProperties: false - - powergates: - type: object - description: | - This node contains a hierarchy of power domain nodes, which should - match the powergates on the Tegra SoC. Each powergate node - represents a power-domain on the Tegra SoC that can be power-gated - by the Tegra PMC. - Hardware blocks belonging to a power domain should contain - "power-domains" property that is a phandle pointing to corresponding - powergate node. - The name of the powergate node should be one of the below. Note that - not every powergate is applicable to all Tegra devices and the following - list shows which powergates are applicable to which devices. - Please refer to Tegra TRM for mode details on the powergate nodes to - use for each power-gate block inside Tegra. - Name Description Devices Applicable - 3d 3D Graphics Tegra20/114/124/210 - 3d0 3D Graphics 0 Tegra30 - 3d1 3D Graphics 1 Tegra30 - aud Audio Tegra210 - dfd Debug Tegra210 - dis Display A Tegra114/124/210 - disb Display B Tegra114/124/210 - heg 2D Graphics Tegra30/114/124/210 - iram Internal RAM Tegra124/210 - mpe MPEG Encode All - nvdec NVIDIA Video Decode Engine Tegra210 - nvjpg NVIDIA JPEG Engine Tegra210 - pcie PCIE Tegra20/30/124/210 - sata SATA Tegra30/124/210 - sor Display interfaces Tegra124/210 - ve2 Video Encode Engine 2 Tegra210 - venc Video Encode Engine All - vdec Video Decode Engine Tegra20/30/114/124 - vic Video Imaging Compositor Tegra124/210 - xusba USB Partition A Tegra114/124/210 - xusbb USB Partition B Tegra114/124/210 - xusbc USB Partition C Tegra114/124/210 - - patternProperties: - "^[a-z0-9]+$": - type: object - - properties: - clocks: - minItems: 1 - maxItems: 8 - description: - Must contain an entry for each clock required by the PMC - for controlling a power-gate. - See ../clocks/clock-bindings.txt document for more details. - - resets: - minItems: 1 - maxItems: 8 - description: - Must contain an entry for each reset required by the PMC - for controlling a power-gate. - See ../reset/reset.txt for more details. - - '#power-domain-cells': - const: 0 - description: Must be 0. - - required: - - clocks - - resets - - '#power-domain-cells' - - additionalProperties: false - -patternProperties: - "^[a-f0-9]+-[a-f0-9]+$": - type: object - description: - This is a Pad configuration node. On Tegra SOCs a pad is a set of - pins which are configured as a group. The pin grouping is a fixed - attribute of the hardware. The PMC can be used to set pad power state - and signaling voltage. A pad can be either in active or power down mode. - The support for power state and signaling voltage configuration varies - depending on the pad in question. 3.3V and 1.8V signaling voltages - are supported on pins where software controllable signaling voltage - switching is available. - - The pad configuration state nodes are placed under the pmc node and they - are referred to by the pinctrl client properties. For more information - see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt. - The pad name should be used as the value of the pins property in pin - configuration nodes. - - The following pads are present on Tegra124 and Tegra132 - audio, bb, cam, comp, csia, csb, cse, dsi, dsib, dsic, dsid, hdmi, hsic, - hv, lvds, mipi-bias, nand, pex-bias, pex-clk1, pex-clk2, pex-cntrl, - sdmmc1, sdmmc3, sdmmc4, sys_ddc, uart, usb0, usb1, usb2, usb_bias. - - The following pads are present on Tegra210 - audio, audio-hv, cam, csia, csib, csic, csid, csie, csif, dbg, - debug-nonao, dmic, dp, dsi, dsib, dsic, dsid, emmc, emmc2, gpio, hdmi, - hsic, lvds, mipi-bias, pex-bias, pex-clk1, pex-clk2, pex-cntrl, sdmmc1, - sdmmc3, spi, spi-hv, uart, usb0, usb1, usb2, usb3, usb-bias. - - properties: - pins: - $ref: /schemas/types.yaml#/definitions/string - description: Must contain name of the pad(s) to be configured. - - low-power-enable: - $ref: /schemas/types.yaml#/definitions/flag - description: Configure the pad into power down mode. - - low-power-disable: - $ref: /schemas/types.yaml#/definitions/flag - description: Configure the pad into active mode. - - power-source: - $ref: /schemas/types.yaml#/definitions/uint32 - description: - Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or - TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages. - The values are defined in - include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h. - Power state can be configured on all Tegra124 and Tegra132 - pads. None of the Tegra124 or Tegra132 pads support signaling - voltage switching. - All of the listed Tegra210 pads except pex-cntrl support power - state configuration. Signaling voltage switching is supported - on below Tegra210 pads. - audio, audio-hv, cam, dbg, dmic, gpio, pex-cntrl, sdmmc1, - sdmmc3, spi, spi-hv, and uart. - - required: - - pins - - additionalProperties: false - - core-domain: - type: object - description: | - The vast majority of hardware blocks of Tegra SoC belong to a - Core power domain, which has a dedicated voltage rail that powers - the blocks. - - properties: - operating-points-v2: - description: - Should contain level, voltages and opp-supported-hw property. - The supported-hw is a bitfield indicating SoC speedo or process - ID mask. - - "#power-domain-cells": - const: 0 - - required: - - operating-points-v2 - - "#power-domain-cells" - - additionalProperties: false - - core-supply: - description: - Phandle to voltage regulator connected to the SoC Core power rail. - -required: - - compatible - - reg - - clock-names - - clocks - - '#clock-cells' - -additionalProperties: false - -dependencies: - "nvidia,suspend-mode": ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"] - "nvidia,core-pwr-off-time": ["nvidia,core-pwr-good-time"] - "nvidia,cpu-pwr-off-time": ["nvidia,cpu-pwr-good-time"] - -examples: - - | - - #include <dt-bindings/clock/tegra210-car.h> - #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> - #include <dt-bindings/soc/tegra-pmc.h> - - tegra_pmc: pmc@7000e400 { - compatible = "nvidia,tegra210-pmc"; - reg = <0x7000e400 0x400>; - core-supply = <®ulator>; - clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; - clock-names = "pclk", "clk32k_in"; - #clock-cells = <1>; - - nvidia,invert-interrupt; - nvidia,suspend-mode = <0>; - nvidia,cpu-pwr-good-time = <0>; - nvidia,cpu-pwr-off-time = <0>; - nvidia,core-pwr-good-time = <4587 3876>; - nvidia,core-pwr-off-time = <39065>; - nvidia,core-power-req-active-high; - nvidia,sys-clock-req-active-high; - - pd_core: core-domain { - operating-points-v2 = <&core_opp_table>; - #power-domain-cells = <0>; - }; - - powergates { - pd_audio: aud { - clocks = <&tegra_car TEGRA210_CLK_APE>, - <&tegra_car TEGRA210_CLK_APB2APE>; - resets = <&tegra_car 198>; - power-domains = <&pd_core>; - #power-domain-cells = <0>; - }; - - pd_xusbss: xusba { - clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; - resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; - power-domains = <&pd_core>; - #power-domain-cells = <0>; - }; - }; - }; diff --git a/dts/Bindings/arm/tegra/nvidia,tegra234-cbb.yaml b/dts/Bindings/arm/tegra/nvidia,tegra234-cbb.yaml index 7b1fe50ffb..fcdf031313 100644 --- a/dts/Bindings/arm/tegra/nvidia,tegra234-cbb.yaml +++ b/dts/Bindings/arm/tegra/nvidia,tegra234-cbb.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: NVIDIA Tegra CBB 2.0 bindings +title: NVIDIA Tegra CBB 2.0 maintainers: - Sumit Gupta <sumitg@nvidia.com> diff --git a/dts/Bindings/arm/ti/k3.yaml b/dts/Bindings/arm/ti/k3.yaml index 28b8232e1c..52b51fd704 100644 --- a/dts/Bindings/arm/ti/k3.yaml +++ b/dts/Bindings/arm/ti/k3.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/ti/k3.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Texas Instruments K3 Multicore SoC architecture device tree bindings +title: Texas Instruments K3 Multicore SoC architecture maintainers: - Nishanth Menon <nm@ti.com> @@ -25,10 +25,46 @@ properties: - ti,am62a7-sk - const: ti,am62a7 + - description: K3 AM62P5 SoC and Boards + items: + - enum: + - ti,am62p5-sk + - const: ti,am62p5 + + - description: K3 AM625 SoC PHYTEC phyBOARD-Lyra + items: + - const: phytec,am625-phyboard-lyra-rdk + - const: phytec,am62-phycore-som + - const: ti,am625 + - description: K3 AM625 SoC items: - enum: + - beagle,am625-beagleplay - ti,am625-sk + - ti,am62-lp-sk + - const: ti,am625 + + - description: K3 AM62x SoC Toradex Verdin Modules and Carrier Boards + items: + - enum: + - toradex,verdin-am62-nonwifi-dahlia # Verdin AM62 Module on Dahlia + - toradex,verdin-am62-nonwifi-dev # Verdin AM62 Module on Verdin Development Board + - toradex,verdin-am62-nonwifi-mallow # Verdin AM62 Module on Mallow + - toradex,verdin-am62-nonwifi-yavia # Verdin AM62 Module on Yavia + - const: toradex,verdin-am62-nonwifi # Verdin AM62 Module without Wi-Fi / BT + - const: toradex,verdin-am62 # Verdin AM62 Module + - const: ti,am625 + + - description: K3 AM62x SoC Toradex Verdin Modules and Carrier Boards with Wi-Fi / BT + items: + - enum: + - toradex,verdin-am62-wifi-dahlia # Verdin AM62 Wi-Fi / BT Module on Dahlia + - toradex,verdin-am62-wifi-dev # Verdin AM62 Wi-Fi / BT M. on Verdin Development B. + - toradex,verdin-am62-wifi-mallow # Verdin AM62 Wi-Fi / BT Module on Mallow + - toradex,verdin-am62-wifi-yavia # Verdin AM62 Wi-Fi / BT Module on Yavia + - const: toradex,verdin-am62-wifi # Verdin AM62 Wi-Fi / BT Module + - const: toradex,verdin-am62 # Verdin AM62 Module - const: ti,am625 - description: K3 AM642 SoC @@ -38,11 +74,33 @@ properties: - ti,am642-sk - const: ti,am642 + - description: K3 AM642 SoC PHYTEC phyBOARD-Electra + items: + - const: phytec,am642-phyboard-electra-rdk + - const: phytec,am64-phycore-som + - const: ti,am642 + + - description: K3 AM642 SoC on TQ-Systems TQMaX4XxL SoM + items: + - enum: + - tq,am642-tqma6442l-mbax4xxl # MBaX4XxL base board + - const: tq,am642-tqma6442l + - const: ti,am642 + + - description: K3 AM642 SoC SolidRun SoM based boards + items: + - enum: + - solidrun,am642-hummingboard-t + - const: solidrun,am642-sr-som + - const: ti,am642 + - description: K3 AM654 SoC items: - enum: - siemens,iot2050-advanced + - siemens,iot2050-advanced-m2 - siemens,iot2050-advanced-pg2 + - siemens,iot2050-advanced-sm - siemens,iot2050-basic - siemens,iot2050-basic-pg2 - ti,am654-evm @@ -61,6 +119,7 @@ properties: - const: ti,j721e - items: - enum: + - beagle,j721e-beagleboneai64 - ti,j721e-evm - ti,j721e-sk - const: ti,j721e @@ -68,9 +127,23 @@ properties: - description: K3 J721s2 SoC items: - enum: + - ti,am68-sk - ti,j721s2-evm - const: ti,j721s2 + - description: K3 J722S SoC and Boards + items: + - enum: + - ti,j722s-evm + - const: ti,j722s + + - description: K3 J784s4 SoC + items: + - enum: + - ti,am69-sk + - ti,j784s4-evm + - const: ti,j784s4 + additionalProperties: true ... diff --git a/dts/Bindings/arm/ti/omap.yaml b/dts/Bindings/arm/ti/omap.yaml new file mode 100644 index 0000000000..93e04a109a --- /dev/null +++ b/dts/Bindings/arm/ti/omap.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/omap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments OMAP SoC architecture + +maintainers: + - Tony Lindgren <tony@atomide.com> + +description: Platforms based on Texas Instruments OMAP SoC architecture. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: TI OMAP2420 SoC based platforms + items: + - enum: + - nokia,n800 + - nokia,n810 + - nokia,n810-wimax + - ti,omap2420-h4 + - const: ti,omap2420 + - const: ti,omap2 + + - description: TI OMAP2430 SoC based platforms + items: + - enum: + - ti,omap2430-sdp # TI OMAP2430 SDP + - const: ti,omap2430 + - const: ti,omap2 + + - description: TI OMAP3430 SoC based platforms + items: + - enum: + - compulab,omap3-cm-t3530 + - logicpd,dm3730-som-lv-devkit # LogicPD Zoom OMAP35xx SOM-LV Development Kit + - logicpd,dm3730-torpedo-devkit # LogicPD Zoom OMAP35xx Torpedo Development Kit + - nokia,omap3-n900 + - openpandora,omap3-pandora-600mhz + - ti,omap3430-sdp + - ti,omap3-beagle + - ti,omap3-evm # TI OMAP35XX EVM (TMDSEVM3530) + - ti,omap3-ldp # TI OMAP3430 LDP (Zoom1 Labrador) + - timll,omap3-devkit8000 + - const: ti,omap3430 + - const: ti,omap3 + + - description: Early BeagleBoard revisions A to B4 with a timer quirk + items: + - const: ti,omap3-beagle-ab4 + - const: ti,omap3-beagle + - const: ti,omap3430 + - const: ti,omap3 + + - description: Gumstix Overo TI OMAP 3430/3630 boards + expansion boards + items: + - enum: + - gumstix,omap3-overo-alto35 + - gumstix,omap3-overo-chestnut43 + - gumstix,omap3-overo-gallop43 + - gumstix,omap3-overo-palo35 + - gumstix,omap3-overo-palo43 + - gumstix,omap3-overo-summit + - gumstix,omap3-overo-tobi + - gumstix,omap3-overo-tobiduo + - const: gumstix,omap3-overo + - enum: + - ti,omap3430 + - ti,omap3630 + + - description: TI OMAP3630 SoC based platforms + items: + - enum: + - amazon,omap3-echo # Amazon Echo (first generation) + - compulab,omap3-cm-t3730 + - goldelico,gta04 + - lg,omap3-sniper # LG Optimus Black + - logicpd,dm3730-som-lv-devkit # LogicPD Zoom DM3730 SOM-LV Development Kit + - logicpd,dm3730-torpedo-devkit # LogicPD Zoom DM3730 Torpedo + Wireless Development Kit + - nokia,omap3-n9 + - nokia,omap3-n950 + - openpandora,omap3-pandora-1ghz + - ti,omap3-beagle-xm + - ti,omap3-evm-37xx # TI OMAP37XX EVM (TMDSEVM3730) + - ti,omap3-zoom3 + - const: ti,omap3630 + - const: ti,omap3 + + - description: TI AM35 SoC based platforms + items: + - enum: + - compulab,omap3-sbc-t3517 # CompuLab SBC-T3517 with CM-T3517 + - teejet,mt_ventoux + - ti,am3517-craneboard # TI AM3517 CraneBoard (TMDSEVM3517) + - ti,am3517-evm # TI AM3517 EVM (AM3517/05 TMDSEVM3517) + - const: ti,am3517 + - const: ti,omap3 + + - description: TI AM33 based platform + items: + - enum: + - compulab,cm-t335 + - moxa,uc-8100-me-t + - novatech,am335x-lxm + - ti,am335x-bone + - ti,am335x-evm + - ti,am3359-icev2 + - const: ti,am33xx + + - description: Compulab board variants based on TI AM33 + items: + - enum: + - compulab,sbc-t335 + - const: compulab,cm-t335 + - const: ti,am33xx + + - description: Phytec boards based on TI AM33 + items: + - enum: + - phytec,am335x-wega + - phytec,am335x-pcm-953 + - phytec,am335x-regor + - const: phytec,am335x-phycore-som + - const: ti,am33xx + + - description: TI OMAP4430 SoC based platforms + items: + - enum: + - amazon,omap4-kc1 # Amazon Kindle Fire (first generation) + - motorola,droid4 # Motorola Droid 4 XT894 + - motorola,droid-bionic # Motorola Droid Bionic XT875 + - motorola,xyboard-mz609 + - motorola,xyboard-mz617 + - ti,omap4-panda + - ti,omap4-sdp + - const: ti,omap4430 + - const: ti,omap4 + + - description: OMAP4 DuoVero with Parlor expansion board/daughter board + items: + - const: gumstix,omap4-duovero-parlor + - const: gumstix,omap4-duovero + - const: ti,omap4430 + - const: ti,omap4 + + - description: TI OMAP4460 SoC based platforms + items: + - enum: + - epson,embt2ws # Epson Moverio BT-200 + - ti,omap4-panda-es + - const: ti,omap4460 + - const: ti,omap4 + + - description: VAR-OM44 boards + items: + - enum: + - variscite,var-dvk-om44 + - variscite,var-stk-om44 + - const: variscite,var-som-om44 + - const: ti,omap4460 + - const: ti,omap4 + + - description: TI OMAP5 SoC based platforms + items: + - enum: + - compulab,omap5-cm-t54 + - isee,omap5-igep0050 + - ti,omap5-uevm + - const: ti,omap5 + +additionalProperties: true + +... diff --git a/dts/Bindings/arm/ti/ti,davinci.yaml b/dts/Bindings/arm/ti/ti,davinci.yaml index c022d325fc..1656d1a447 100644 --- a/dts/Bindings/arm/ti/ti,davinci.yaml +++ b/dts/Bindings/arm/ti/ti,davinci.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/ti/ti,davinci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Texas Instruments DaVinci Platforms Device Tree Bindings +title: Texas Instruments DaVinci Platforms maintainers: - Sekhar Nori <nsekhar@ti.com> diff --git a/dts/Bindings/arm/vexpress-config.yaml b/dts/Bindings/arm/vexpress-config.yaml index 09e1adf5ca..b74380da31 100644 --- a/dts/Bindings/arm/vexpress-config.yaml +++ b/dts/Bindings/arm/vexpress-config.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/vexpress-config.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM Versatile Express configuration bus bindings +title: ARM Versatile Express configuration bus maintainers: - Andre Przywara <andre.przywara@arm.com> diff --git a/dts/Bindings/arm/vexpress-sysreg.yaml b/dts/Bindings/arm/vexpress-sysreg.yaml index f04db802a7..be6e3b5425 100644 --- a/dts/Bindings/arm/vexpress-sysreg.yaml +++ b/dts/Bindings/arm/vexpress-sysreg.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/vexpress-sysreg.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM Versatile Express system registers bindings +title: ARM Versatile Express system registers maintainers: - Andre Przywara <andre.przywara@arm.com> diff --git a/dts/Bindings/arm/xen.txt b/dts/Bindings/arm/xen.txt index 61d77acbeb..f925290d46 100644 --- a/dts/Bindings/arm/xen.txt +++ b/dts/Bindings/arm/xen.txt @@ -56,7 +56,7 @@ hypervisor { }; The format and meaning of the "xen,uefi-*" parameters are similar to those in -Documentation/arm/uefi.rst, which are provided by the regular UEFI stub. However +Documentation/arch/arm/uefi.rst, which are provided by the regular UEFI stub. However they differ because they are provided by the Xen hypervisor, together with a set of UEFI runtime services implemented via hypercalls, see http://xenbits.xen.org/docs/unstable/hypercall/x86_64/include,public,platform.h.html. diff --git a/dts/Bindings/arm/xilinx.yaml b/dts/Bindings/arm/xilinx.yaml deleted file mode 100644 index 969cfe6dc4..0000000000 --- a/dts/Bindings/arm/xilinx.yaml +++ /dev/null @@ -1,137 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/xilinx.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Xilinx Zynq Platforms - -maintainers: - - Michal Simek <michal.simek@xilinx.com> - -description: | - Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC - -properties: - $nodename: - const: '/' - compatible: - oneOf: - - items: - - enum: - - adapteva,parallella - - digilent,zynq-zybo - - digilent,zynq-zybo-z7 - - ebang,ebaz4205 - - myir,zynq-zturn-v5 - - myir,zynq-zturn - - xlnx,zynq-cc108 - - xlnx,zynq-zc702 - - xlnx,zynq-zc706 - - xlnx,zynq-zc770-xm010 - - xlnx,zynq-zc770-xm011 - - xlnx,zynq-zc770-xm012 - - xlnx,zynq-zc770-xm013 - - const: xlnx,zynq-7000 - - - items: - - const: avnet,zynq-microzed - - const: xlnx,zynq-microzed - - const: xlnx,zynq-7000 - - - items: - - const: avnet,zynq-zed - - const: xlnx,zynq-zed - - const: xlnx,zynq-7000 - - - items: - - enum: - - xlnx,zynqmp-zc1751 - - const: xlnx,zynqmp - - - description: Xilinx internal board zc1232 - items: - - const: xlnx,zynqmp-zc1232-revA - - const: xlnx,zynqmp-zc1232 - - const: xlnx,zynqmp - - - description: Xilinx internal board zc1254 - items: - - const: xlnx,zynqmp-zc1254-revA - - const: xlnx,zynqmp-zc1254 - - const: xlnx,zynqmp - - - description: Xilinx internal board zc1275 - items: - - const: xlnx,zynqmp-zc1275-revA - - const: xlnx,zynqmp-zc1275 - - const: xlnx,zynqmp - - - description: Xilinx 96boards compatible board zcu100 - items: - - const: xlnx,zynqmp-zcu100-revC - - const: xlnx,zynqmp-zcu100 - - const: xlnx,zynqmp - - - description: Xilinx 96boards compatible board Ultra96 - items: - - const: avnet,ultra96-rev1 - - const: avnet,ultra96 - - const: xlnx,zynqmp-zcu100-revC - - const: xlnx,zynqmp-zcu100 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu102 - items: - - enum: - - xlnx,zynqmp-zcu102-revA - - xlnx,zynqmp-zcu102-revB - - xlnx,zynqmp-zcu102-rev1.0 - - xlnx,zynqmp-zcu102-rev1.1 - - const: xlnx,zynqmp-zcu102 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu104 - items: - - enum: - - xlnx,zynqmp-zcu104-revA - - xlnx,zynqmp-zcu104-revC - - xlnx,zynqmp-zcu104-rev1.0 - - const: xlnx,zynqmp-zcu104 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu106 - items: - - enum: - - xlnx,zynqmp-zcu106-revA - - xlnx,zynqmp-zcu106-rev1.0 - - const: xlnx,zynqmp-zcu106 - - const: xlnx,zynqmp - - - description: Xilinx evaluation board zcu111 - items: - - enum: - - xlnx,zynqmp-zcu111-revA - - xlnx,zynqmp-zcu111-rev1.0 - - const: xlnx,zynqmp-zcu111 - - const: xlnx,zynqmp - - - description: Xilinx Kria SOMs - items: - - const: xlnx,zynqmp-sm-k26-rev1 - - const: xlnx,zynqmp-sm-k26-revB - - const: xlnx,zynqmp-sm-k26-revA - - const: xlnx,zynqmp-sm-k26 - - const: xlnx,zynqmp - - - description: Xilinx Kria SOMs (starter) - items: - - const: xlnx,zynqmp-smk-k26-rev1 - - const: xlnx,zynqmp-smk-k26-revB - - const: xlnx,zynqmp-smk-k26-revA - - const: xlnx,zynqmp-smk-k26 - - const: xlnx,zynqmp - -additionalProperties: true - -... |