summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/clock/fsl,imx93-anatop.yaml
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/clock/fsl,imx93-anatop.yaml')
-rw-r--r--dts/Bindings/clock/fsl,imx93-anatop.yaml42
1 files changed, 42 insertions, 0 deletions
diff --git a/dts/Bindings/clock/fsl,imx93-anatop.yaml b/dts/Bindings/clock/fsl,imx93-anatop.yaml
new file mode 100644
index 0000000000..8a3b247641
--- /dev/null
+++ b/dts/Bindings/clock/fsl,imx93-anatop.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/fsl,imx93-anatop.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX93 ANATOP Clock Module
+
+maintainers:
+ - Peng Fan <peng.fan@nxp.com>
+
+description: |
+ NXP i.MX93 ANATOP module which contains PLL and OSC to Clock Controller
+ Module.
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx93-anatop
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller@44480000 {
+ compatible = "fsl,imx93-anatop";
+ reg = <0x44480000 0x2000>;
+ #clock-cells = <1>;
+ };
+
+...