diff options
Diffstat (limited to 'dts/Bindings/clock/ti')
| -rw-r--r-- | dts/Bindings/clock/ti/adpll.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/apll.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/autoidle.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/clockdomain.txt | 5 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/composite.txt | 5 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/davinci/pll.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/divider.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/dpll.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/dra7-atl.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/fapll.txt | 2 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/fixed-factor-clock.txt | 3 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/gate.txt | 5 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/interface.txt | 5 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/mux.txt | 5 | ||||
| -rw-r--r-- | dts/Bindings/clock/ti/ti,clksel.yaml | 2 |
15 files changed, 16 insertions, 30 deletions
diff --git a/dts/Bindings/clock/ti/adpll.txt b/dts/Bindings/clock/ti/adpll.txt index 4c8a2ce2cd..3122360adc 100644 --- a/dts/Bindings/clock/ti/adpll.txt +++ b/dts/Bindings/clock/ti/adpll.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments ADPLL clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register-mapped ADPLL with two to three selectable input clocks and three to four children. diff --git a/dts/Bindings/clock/ti/apll.txt b/dts/Bindings/clock/ti/apll.txt index ade4dd4c30..bbd505c119 100644 --- a/dts/Bindings/clock/ti/apll.txt +++ b/dts/Bindings/clock/ti/apll.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments APLL clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register-mapped APLL with usually two selectable input clocks (reference clock and bypass clock), with analog phase locked diff --git a/dts/Bindings/clock/ti/autoidle.txt b/dts/Bindings/clock/ti/autoidle.txt index 7c735dde9f..05645a10a9 100644 --- a/dts/Bindings/clock/ti/autoidle.txt +++ b/dts/Bindings/clock/ti/autoidle.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments autoidle clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register mapped clock which can be put to idle automatically by hardware based on the usage and a configuration bit setting. Autoidle clock is never an individual diff --git a/dts/Bindings/clock/ti/clockdomain.txt b/dts/Bindings/clock/ti/clockdomain.txt index cb76b3f2b3..edf0b5d427 100644 --- a/dts/Bindings/clock/ti/clockdomain.txt +++ b/dts/Bindings/clock/ti/clockdomain.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments clockdomain. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1] in consumer role. Every clock on TI SoC belongs to one clockdomain, but software only needs this information for specific clocks which require @@ -17,6 +15,9 @@ Required properties: - #clock-cells : from common clock binding; shall be set to 0. - clocks : link phandles of clocks within this domain +Optional properties: +- clock-output-names : from common clock binding. + Examples: dss_clkdm: dss_clkdm { compatible = "ti,clockdomain"; diff --git a/dts/Bindings/clock/ti/composite.txt b/dts/Bindings/clock/ti/composite.txt index 5f43c4706b..6f7e1331b5 100644 --- a/dts/Bindings/clock/ti/composite.txt +++ b/dts/Bindings/clock/ti/composite.txt @@ -1,7 +1,5 @@ Binding for TI composite clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register-mapped composite clock with multiple different sub-types; @@ -27,6 +25,9 @@ Required properties: - clocks : link phandles of component clocks - #clock-cells : from common clock binding; shall be set to 0. +Optional properties: +- clock-output-names : from common clock binding. + Examples: usb_l4_gate_ick: usb_l4_gate_ick { diff --git a/dts/Bindings/clock/ti/davinci/pll.txt b/dts/Bindings/clock/ti/davinci/pll.txt index 36998e1848..c989453831 100644 --- a/dts/Bindings/clock/ti/davinci/pll.txt +++ b/dts/Bindings/clock/ti/davinci/pll.txt @@ -15,7 +15,7 @@ Required properties: - for "ti,da850-pll1", shall be "clksrc" Optional properties: -- ti,clkmode-square-wave: Indicates that the the board is supplying a square +- ti,clkmode-square-wave: Indicates that the board is supplying a square wave input on the OSCIN pin instead of using a crystal oscillator. This property is only valid when compatible = "ti,da850-pll0". diff --git a/dts/Bindings/clock/ti/divider.txt b/dts/Bindings/clock/ti/divider.txt index 9b13b32974..4d7c76f0b3 100644 --- a/dts/Bindings/clock/ti/divider.txt +++ b/dts/Bindings/clock/ti/divider.txt @@ -1,7 +1,5 @@ Binding for TI divider clock -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register-mapped adjustable clock rate divider that does not gate and has only one input clock or parent. By default the value programmed into diff --git a/dts/Bindings/clock/ti/dpll.txt b/dts/Bindings/clock/ti/dpll.txt index 37a7cb6ad0..14a1b72c2e 100644 --- a/dts/Bindings/clock/ti/dpll.txt +++ b/dts/Bindings/clock/ti/dpll.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments DPLL clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register-mapped DPLL with usually two selectable input clocks (reference clock and bypass clock), with digital phase locked diff --git a/dts/Bindings/clock/ti/dra7-atl.txt b/dts/Bindings/clock/ti/dra7-atl.txt index 21c002d28b..68504079f9 100644 --- a/dts/Bindings/clock/ti/dra7-atl.txt +++ b/dts/Bindings/clock/ti/dra7-atl.txt @@ -6,7 +6,7 @@ functional clock but can be configured to provide different clocks. ATL can maintain a clock averages to some desired frequency based on the bws/aws signals - can compensate the drift between the two ws signal. -In order to provide the support for ATL and it's output clocks (which can be used +In order to provide the support for ATL and its output clocks (which can be used internally within the SoC or external components) two sets of bindings is needed: Clock tree binding: diff --git a/dts/Bindings/clock/ti/fapll.txt b/dts/Bindings/clock/ti/fapll.txt index c19b3f253b..88986ef39d 100644 --- a/dts/Bindings/clock/ti/fapll.txt +++ b/dts/Bindings/clock/ti/fapll.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments FAPLL clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register-mapped FAPLL with usually two selectable input clocks (reference clock and bypass clock), and one or more child diff --git a/dts/Bindings/clock/ti/fixed-factor-clock.txt b/dts/Bindings/clock/ti/fixed-factor-clock.txt index 662b36d53b..dc69477b6e 100644 --- a/dts/Bindings/clock/ti/fixed-factor-clock.txt +++ b/dts/Bindings/clock/ti/fixed-factor-clock.txt @@ -1,7 +1,5 @@ Binding for TI fixed factor rate clock sources. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1], and also uses the autoidle support from TI autoidle clock [2]. @@ -16,6 +14,7 @@ Required properties: - clocks: parent clock. Optional properties: +- clock-output-names : from common clock binding. - ti,autoidle-shift: bit shift of the autoidle enable bit for the clock, see [2] - reg: offset for the autoidle register of this clock, see [2] diff --git a/dts/Bindings/clock/ti/gate.txt b/dts/Bindings/clock/ti/gate.txt index 56d603c1f7..a8e0335b00 100644 --- a/dts/Bindings/clock/ti/gate.txt +++ b/dts/Bindings/clock/ti/gate.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments gate clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. This clock is quite much similar to the basic gate-clock [2], however, it supports a number of additional features. If no register @@ -10,7 +8,7 @@ will be controlled instead and the corresponding hw-ops for that is used. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt +[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml [3] Documentation/devicetree/bindings/clock/ti/clockdomain.txt Required properties: @@ -36,6 +34,7 @@ Required properties: ti,clkdm-gate-clock type Optional properties: +- clock-output-names : from common clock binding. - ti,bit-shift : bit shift for programming the clock gate, invalid for ti,clkdm-gate-clock type - ti,set-bit-to-disable : inverts default gate programming. Setting the bit diff --git a/dts/Bindings/clock/ti/interface.txt b/dts/Bindings/clock/ti/interface.txt index 3f47040401..85fb1f2d2d 100644 --- a/dts/Bindings/clock/ti/interface.txt +++ b/dts/Bindings/clock/ti/interface.txt @@ -1,7 +1,5 @@ Binding for Texas Instruments interface clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. This clock is quite much similar to the basic gate-clock [2], however, it supports a number of additional features, including @@ -9,7 +7,7 @@ companion clock finding (match corresponding functional gate clock) and hardware autoidle enable / disable. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt +[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml Required properties: - compatible : shall be one of: @@ -28,6 +26,7 @@ Required properties: - reg : base address for the control register Optional properties: +- clock-output-names : from common clock binding. - ti,bit-shift : bit shift for the bit enabling/disabling the clock (default 0) Examples: diff --git a/dts/Bindings/clock/ti/mux.txt b/dts/Bindings/clock/ti/mux.txt index eec8994b9b..cd56d3c1c0 100644 --- a/dts/Bindings/clock/ti/mux.txt +++ b/dts/Bindings/clock/ti/mux.txt @@ -1,14 +1,12 @@ Binding for TI mux clock. -Binding status: Unstable - ABI compatibility may be broken in the future - This binding uses the common clock binding[1]. It assumes a register-mapped multiplexer with multiple input clock signals or parents, one of which can be selected as output. This clock does not gate or adjust the parent rate via a divider or multiplier. By default the "clocks" property lists the parents in the same order -as they are programmed into the regster. E.g: +as they are programmed into the register. E.g: clocks = <&foo_clock>, <&bar_clock>, <&baz_clock>; @@ -42,6 +40,7 @@ Required properties: - reg : register offset for register controlling adjustable mux Optional properties: +- clock-output-names : from common clock binding. - ti,bit-shift : number of bits to shift the bit-mask, defaults to 0 if not present - ti,index-starts-at-one : valid input select programming starts at 1, not diff --git a/dts/Bindings/clock/ti/ti,clksel.yaml b/dts/Bindings/clock/ti/ti,clksel.yaml index c56f911fff..d525f96cf2 100644 --- a/dts/Bindings/clock/ti/ti,clksel.yaml +++ b/dts/Bindings/clock/ti/ti,clksel.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/ti/ti,clksel.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Binding for TI clksel clock +title: TI clksel clock maintainers: - Tony Lindgren <tony@atomide.com> |