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-rw-r--r--dts/Bindings/crypto/fsl-dcp.txt2
-rw-r--r--dts/Bindings/crypto/fsl-imx-sahara.txt2
-rw-r--r--dts/Bindings/crypto/fsl-sec4.txt2
-rw-r--r--dts/Bindings/crypto/xlnx,zynqmp-aes.yaml37
4 files changed, 40 insertions, 3 deletions
diff --git a/dts/Bindings/crypto/fsl-dcp.txt b/dts/Bindings/crypto/fsl-dcp.txt
index 4e4d387e38..513499fcdb 100644
--- a/dts/Bindings/crypto/fsl-dcp.txt
+++ b/dts/Bindings/crypto/fsl-dcp.txt
@@ -11,7 +11,7 @@ Required properties:
Example:
-dcp@80028000 {
+dcp: crypto@80028000 {
compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
reg = <0x80028000 0x2000>;
interrupts = <52 53>;
diff --git a/dts/Bindings/crypto/fsl-imx-sahara.txt b/dts/Bindings/crypto/fsl-imx-sahara.txt
index e8a35c71e9..db690b10e5 100644
--- a/dts/Bindings/crypto/fsl-imx-sahara.txt
+++ b/dts/Bindings/crypto/fsl-imx-sahara.txt
@@ -8,7 +8,7 @@ Required properties:
Example:
-sah@10025000 {
+sah: crypto@10025000 {
compatible = "fsl,imx27-sahara";
reg = < 0x10025000 0x800>;
interrupts = <75>;
diff --git a/dts/Bindings/crypto/fsl-sec4.txt b/dts/Bindings/crypto/fsl-sec4.txt
index 2fe245ca81..8f359f473a 100644
--- a/dts/Bindings/crypto/fsl-sec4.txt
+++ b/dts/Bindings/crypto/fsl-sec4.txt
@@ -138,7 +138,7 @@ iMX6QDL/SX requires four clocks
iMX6UL does only require three clocks
- crypto: caam@2140000 {
+ crypto: crypto@2140000 {
compatible = "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/dts/Bindings/crypto/xlnx,zynqmp-aes.yaml b/dts/Bindings/crypto/xlnx,zynqmp-aes.yaml
new file mode 100644
index 0000000000..55dd6e3d27
--- /dev/null
+++ b/dts/Bindings/crypto/xlnx,zynqmp-aes.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings
+
+maintainers:
+ - Kalyani Akula <kalyani.akula@xilinx.com>
+ - Michal Simek <michal.simek@xilinx.com>
+
+description: |
+ The ZynqMP AES-GCM hardened cryptographic accelerator is used to
+ encrypt or decrypt the data with provided key and initialization vector.
+
+properties:
+ compatible:
+ const: xlnx,zynqmp-aes
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ firmware {
+ zynqmp_firmware: zynqmp-firmware {
+ compatible = "xlnx,zynqmp-firmware";
+ method = "smc";
+ xlnx_aes: zynqmp-aes {
+ compatible = "xlnx,zynqmp-aes";
+ };
+ };
+ };
+...