summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/dma/xilinx/xilinx_dma.txt
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/dma/xilinx/xilinx_dma.txt')
-rw-r--r--dts/Bindings/dma/xilinx/xilinx_dma.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/dts/Bindings/dma/xilinx/xilinx_dma.txt b/dts/Bindings/dma/xilinx/xilinx_dma.txt
index d1700a5c36..590d1948f2 100644
--- a/dts/Bindings/dma/xilinx/xilinx_dma.txt
+++ b/dts/Bindings/dma/xilinx/xilinx_dma.txt
@@ -49,6 +49,12 @@ Optional properties for AXI DMA and MCDMA:
register as configured in h/w. Takes values {8...26}. If the property
is missing or invalid then the default value 23 is used. This is the
maximum value that is supported by all IP versions.
+
+Optional properties for AXI DMA:
+- xlnx,axistream-connected: Tells whether DMA is connected to AXI stream IP.
+- xlnx,irq-delay: Tells the interrupt delay timeout value. Valid range is from
+ 0-255. Setting this value to zero disables the delay timer interrupt.
+ 1 timeout interval = 125 * clock period of SG clock.
Optional properties for VDMA:
- xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
It takes following values: