diff options
Diffstat (limited to 'dts/Bindings/iio/adc')
149 files changed, 7393 insertions, 2044 deletions
diff --git a/dts/Bindings/iio/adc/ad7949.txt b/dts/Bindings/iio/adc/ad7949.txt deleted file mode 100644 index c7f5057356..0000000000 --- a/dts/Bindings/iio/adc/ad7949.txt +++ /dev/null @@ -1,16 +0,0 @@ -* Analog Devices AD7949/AD7682/AD7689 - -Required properties: - - compatible: Should be one of - * "adi,ad7949" - * "adi,ad7682" - * "adi,ad7689" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - -Example: -adc@0 { - compatible = "adi,ad7949"; - reg = <0>; - vref-supply = <&vdd_supply>; -}; diff --git a/dts/Bindings/iio/adc/adc.txt b/dts/Bindings/iio/adc/adc.txt deleted file mode 100644 index 5bbaa330a2..0000000000 --- a/dts/Bindings/iio/adc/adc.txt +++ /dev/null @@ -1,23 +0,0 @@ -Common ADCs properties - -Optional properties for child nodes: -- bipolar : Boolean, if set the channel is used in bipolar mode. -- diff-channels : Differential channels muxed for this ADC. The first value - specifies the positive input pin, the second value the negative - input pin. - -Example: - adc@0 { - compatible = "some,adc"; - ... - channel@0 { - bipolar; - diff-channels = <0 1>; - ... - }; - - channel@1 { - diff-channels = <2 3>; - ... - }; - }; diff --git a/dts/Bindings/iio/adc/adc.yaml b/dts/Bindings/iio/adc/adc.yaml new file mode 100644 index 0000000000..2616017297 --- /dev/null +++ b/dts/Bindings/iio/adc/adc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IIO Common Properties for ADC Channels + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: + A few properties are defined in a common way ADC channels. + +properties: + $nodename: + pattern: "^channel(@[0-9a-f]+)?$" + description: + A channel index should match reg. + + reg: + maxItems: 1 + + label: + $ref: /schemas/types.yaml#/definitions/string + description: Unique name to identify which channel this is. + + bipolar: + $ref: /schemas/types.yaml#/definitions/flag + description: If provided, the channel is to be used in bipolar mode. + + diff-channels: + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 2 + minItems: 2 + description: + Many ADCs have dual Muxes to allow different input pins to be routed + to both the positive and negative inputs of a differential ADC. + The first value specifies the positive input pin, the second + specifies the negative input pin. + + settling-time-us: + description: + Time between enabling the channel and first stable readings. + + oversampling-ratio: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Oversampling is used as replacement of or addition to the low-pass filter. + In some cases, the desired filtering characteristics are a function the + device design and can interact with other characteristics such as + settling time. + +additionalProperties: true diff --git a/dts/Bindings/iio/adc/adi,ad4130.yaml b/dts/Bindings/iio/adc/adi,ad4130.yaml new file mode 100644 index 0000000000..d00690a8d3 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad4130.yaml @@ -0,0 +1,262 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2022 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4130 ADC device driver + +maintainers: + - Cosmin Tanislav <cosmin.tanislav@analog.com> + +description: | + Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf + +properties: + compatible: + enum: + - adi,ad4130 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: phandle to the master clock (mclk) + + clock-names: + items: + - const: mclk + + interrupts: + maxItems: 1 + + interrupt-names: + description: | + Specify which interrupt pin should be configured as Data Ready / FIFO + interrupt. + Default if not supplied is int. + enum: + - int + - clk + - p2 + - dout + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + '#clock-cells': + const: 0 + + clock-output-names: + maxItems: 1 + + refin1-supply: + description: refin1 supply. Can be used as reference for conversion. + + refin2-supply: + description: refin2 supply. Can be used as reference for conversion. + + avdd-supply: + description: AVDD voltage supply. Can be used as reference for conversion. + + iovdd-supply: + description: IOVDD voltage supply. Used for the chip interface. + + spi-max-frequency: + maximum: 5000000 + + adi,ext-clk-freq-hz: + description: Specify the frequency of the external clock. + enum: [76800, 153600] + default: 76800 + + adi,bipolar: + description: Specify if the device should be used in bipolar mode. + type: boolean + + adi,vbias-pins: + description: Analog inputs to apply a voltage bias of (AVDD − AVSS) / 2 to. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 16 + items: + minimum: 0 + maximum: 15 + +required: + - compatible + - reg + - interrupts + +patternProperties: + "^channel@([0-9a-f])$": + type: object + $ref: adc.yaml + unevaluatedProperties: false + + properties: + reg: + description: The channel number. + minimum: 0 + maximum: 15 + + diff-channels: + description: | + Besides the analog inputs available, internal inputs can be used. + 16: Internal temperature sensor. + 17: AVSS + 18: Internal reference + 19: DGND + 20: (AVDD − AVSS)/6+ + 21: (AVDD − AVSS)/6- + 22: (IOVDD − DGND)/6+ + 23: (IOVDD − DGND)/6- + 24: (ALDO − AVSS)/6+ + 25: (ALDO − AVSS)/6- + 26: (DLDO − DGND)/6+ + 27: (DLDO − DGND)/6- + 28: V_MV_P + 29: V_MV_M + items: + minimum: 0 + maximum: 29 + + adi,reference-select: + description: | + Select the reference source to use when converting on the + specific channel. Valid values are: + 0: REFIN1(+)/REFIN1(−) + 1: REFIN2(+)/REFIN2(−) + 2: REFOUT/AVSS (Internal reference) + 3: AVDD/AVSS + If not specified, REFIN1 is used. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 0 + + adi,excitation-pin-0: + description: | + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + default: 0 + + adi,excitation-pin-1: + description: | + Analog input to apply excitation current to while this channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + default: 0 + + adi,excitation-current-0-nanoamp: + description: | + Excitation current in nanoamps to be applied to pin specified in + adi,excitation-pin-0 while this channel is active. + enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000] + default: 0 + + adi,excitation-current-1-nanoamp: + description: | + Excitation current in nanoamps to be applied to pin specified in + adi,excitation-pin-1 while this channel is active. + enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000] + default: 0 + + adi,burnout-current-nanoamp: + description: | + Burnout current in nanoamps to be applied for this channel. + enum: [0, 500, 2000, 4000] + default: 0 + + adi,buffered-positive: + description: Enable buffered mode for positive input. + type: boolean + + adi,buffered-negative: + description: Enable buffered mode for negative input. + type: boolean + + required: + - reg + - diff-channels + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4130"; + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + spi-max-frequency = <5000000>; + interrupts = <27 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + + channel@0 { + reg = <0>; + + adi,reference-select = <2>; + + /* AIN8, AIN9 */ + diff-channels = <8 9>; + }; + + channel@1 { + reg = <1>; + + adi,reference-select = <2>; + + /* AIN10, AIN11 */ + diff-channels = <10 11>; + }; + + channel@2 { + reg = <2>; + + adi,reference-select = <2>; + + /* Temperature Sensor, DGND */ + diff-channels = <16 19>; + }; + + channel@3 { + reg = <3>; + + adi,reference-select = <2>; + + /* Internal reference, DGND */ + diff-channels = <18 19>; + }; + + channel@4 { + reg = <4>; + + adi,reference-select = <2>; + + /* DGND, DGND */ + diff-channels = <19 19>; + }; + }; + }; diff --git a/dts/Bindings/iio/adc/adi,ad7091r5.yaml b/dts/Bindings/iio/adc/adi,ad7091r5.yaml index 31ffa275f5..ddec974743 100644 --- a/dts/Bindings/iio/adc/adi,ad7091r5.yaml +++ b/dts/Bindings/iio/adc/adi,ad7091r5.yaml @@ -4,36 +4,92 @@ $id: http://devicetree.org/schemas/iio/adc/adi,ad7091r5.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices AD7091R5 4-Channel 12-Bit ADC +title: Analog Devices AD7091R-2/-4/-5/-8 Multi-Channel 12-Bit ADCs maintainers: - - Beniamin Bia <beniamin.bia@analog.com> + - Michael Hennerich <michael.hennerich@analog.com> + - Marcelo Schmitt <marcelo.schmitt@analog.com> description: | - Analog Devices AD7091R5 4-Channel 12-Bit ADC + Analog Devices AD7091R5 4-Channel 12-Bit ADC supporting I2C interface https://www.analog.com/media/en/technical-documentation/data-sheets/ad7091r-5.pdf + Analog Devices AD7091R-2/AD7091R-4/AD7091R-8 2-/4-/8-Channel 12-Bit ADCs + supporting SPI interface + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7091R-2_7091R-4_7091R-8.pdf properties: compatible: enum: + - adi,ad7091r2 + - adi,ad7091r4 - adi,ad7091r5 + - adi,ad7091r8 reg: maxItems: 1 + vdd-supply: + description: + Provide VDD power to the sensor (VDD range is from 2.7V to 5.25V). + + vdrive-supply: + description: + Determines the voltage level at which the interface logic will operate. + The V_drive voltage range is from 1.8V to 5.25V and must not exceed VDD by + more than 0.3V. + vref-supply: description: Phandle to the vref power supply - interrupts: + convst-gpios: + description: + GPIO connected to the CONVST pin. + This logic input is used to initiate conversions on the analog + input channels. maxItems: 1 + reset-gpios: + maxItems: 1 + + interrupts: + description: + Interrupt for signaling when conversion results exceed the high limit for + ADC readings or fall below the low limit for them. Interrupt source must + be attached to ALERT/BUSY/GPO0 pin. + maxItems: 1 required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + + # AD7091R-2 does not have ALERT/BUSY/GPO pin + - if: + properties: + compatible: + contains: + enum: + - adi,ad7091r2 + then: + properties: + interrupts: false + + - if: + properties: + compatible: + contains: + enum: + - adi,ad7091r2 + - adi,ad7091r4 + - adi,ad7091r8 + then: + required: + - convst-gpios + +unevaluatedProperties: false examples: - | @@ -44,11 +100,29 @@ examples: #size-cells = <0>; adc@2f { - compatible = "adi,ad7091r5"; - reg = <0x2f>; + compatible = "adi,ad7091r5"; + reg = <0x2f>; + + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + }; + }; + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; - interrupts = <25 IRQ_TYPE_EDGE_FALLING>; - interrupt-parent = <&gpio>; + adc@0 { + compatible = "adi,ad7091r8"; + reg = <0x0>; + spi-max-frequency = <1000000>; + vref-supply = <&adc_vref>; + convst-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + interrupts = <22 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; }; }; ... diff --git a/dts/Bindings/iio/adc/adi,ad7124.yaml b/dts/Bindings/iio/adc/adi,ad7124.yaml index deb34deff0..35ed04350e 100644 --- a/dts/Bindings/iio/adc/adi,ad7124.yaml +++ b/dts/Bindings/iio/adc/adi,ad7124.yaml @@ -61,10 +61,10 @@ required: patternProperties: "^channel@([0-9]|1[0-5])$": + $ref: adc.yaml type: object description: | Represents the external channels which are connected to the ADC. - See Documentation/devicetree/bindings/iio/adc/adc.txt. properties: reg: @@ -86,15 +86,9 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 3] - diff-channels: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt - items: - minimum: 0 - maximum: 15 + diff-channels: true - bipolar: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt - type: boolean + bipolar: true adi,buffered-positive: description: Enable buffered mode for positive input. @@ -108,6 +102,13 @@ patternProperties: - reg - diff-channels + additionalProperties: false + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/dts/Bindings/iio/adc/adi,ad7192.yaml b/dts/Bindings/iio/adc/adi,ad7192.yaml index d0913034b1..16def2985a 100644 --- a/dts/Bindings/iio/adc/adi,ad7192.yaml +++ b/dts/Bindings/iio/adc/adi,ad7192.yaml @@ -47,6 +47,9 @@ properties: avdd-supply: description: AVdd voltage supply + vref-supply: + description: VRef voltage supply + adi,rejection-60-Hz-enable: description: | This bit enables a notch at 60 Hz when the first notch of the sinc @@ -78,7 +81,7 @@ properties: type: boolean bipolar: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt + description: see Documentation/devicetree/bindings/iio/adc/adc.yaml type: boolean required: @@ -89,31 +92,38 @@ required: - interrupts - dvdd-supply - avdd-supply + - vref-supply - spi-cpol - spi-cpha +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | - spi0 { - #address-cells = <1>; - #size-cells = <0>; - - adc@0 { - compatible = "adi,ad7192"; - reg = <0>; - spi-max-frequency = <1000000>; - spi-cpol; - spi-cpha; - clocks = <&ad7192_mclk>; - clock-names = "mclk"; - interrupts = <25 0x2>; - interrupt-parent = <&gpio>; - dvdd-supply = <&dvdd>; - avdd-supply = <&avdd>; - - adi,refin2-pins-enable; - adi,rejection-60-Hz-enable; - adi,buffer-enable; - adi,burnout-currents-enable; + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7192"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + clocks = <&ad7192_mclk>; + clock-names = "mclk"; + interrupts = <25 0x2>; + interrupt-parent = <&gpio>; + dvdd-supply = <&dvdd>; + avdd-supply = <&avdd>; + vref-supply = <&vref>; + + adi,refin2-pins-enable; + adi,rejection-60-Hz-enable; + adi,buffer-enable; + adi,burnout-currents-enable; }; }; diff --git a/dts/Bindings/iio/adc/adi,ad7280a.yaml b/dts/Bindings/iio/adc/adi,ad7280a.yaml new file mode 100644 index 0000000000..dfb8f305e2 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7280a.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7280a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7280a Lithium Ion Battery Monitoring System + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + - Jonathan Cameron <jic23@kernel.org> + +description: | + Bindings for the Analog Devices AD7280a Battery Monitoring System. + Used in devices such as hybrid electric cars, battery backup and power tools. + Multiple chips can be daisy chained and accessed via a single SPI interface. + Data sheet found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7280A.pdf + +properties: + compatible: + const: adi,ad7280a + + reg: + maxItems: 1 + + interrupts: + description: IRQ line for the ADC + maxItems: 1 + + adi,voltage-alert-last-chan: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Allows limiting of scope of which channels are considered for voltage + alerts, typically because not all are wired to anything. Only applies to + last device in the daisy chain. + default: 5 + enum: [3, 4, 5] + + adi,acquisition-time-ns: + description: + Additional time may be needed to charge the sampling capacitors depending + on external writing. + default: 400 + enum: [400, 800, 1200, 1600] + + adi,thermistor-termination: + type: boolean + description: + Enable the thermistor termination function. + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7280a"; + reg = <0>; + spi-max-frequency = <700000>; + interrupt-parent = <&gpio>; + interrupts = <25 2>; + adi,thermistor-termination; + adi,acquisition-time-ns = <800>; + adi,voltage-alert-last-chan = <5>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/adi,ad7291.yaml b/dts/Bindings/iio/adc/adi,ad7291.yaml new file mode 100644 index 0000000000..0b2f5dc806 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7291.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7291.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor + +maintainers: + - Michael Auchter <michael.auchter@ni.com> + +description: | + Analog Devices AD7291 8-Channel I2C 12-Bit SAR ADC with Temperature Sensor + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7291.pdf + +properties: + compatible: + enum: + - adi,ad7291 + + reg: + maxItems: 1 + + vref-supply: + description: | + The regulator supply for ADC reference voltage. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ad7291: adc@0 { + compatible = "adi,ad7291"; + reg = <0>; + vref-supply = <&adc_vref>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/adi,ad7292.yaml b/dts/Bindings/iio/adc/adi,ad7292.yaml index e1f6d64bdc..2aa1f4b063 100644 --- a/dts/Bindings/iio/adc/adi,ad7292.yaml +++ b/dts/Bindings/iio/adc/adi,ad7292.yaml @@ -43,10 +43,10 @@ required: patternProperties: "^channel@[0-7]$": + $ref: adc.yaml type: object description: | Represents the external channels which are connected to the ADC. - See Documentation/devicetree/bindings/iio/adc/adc.txt. properties: reg: @@ -56,13 +56,18 @@ patternProperties: - minimum: 0 maximum: 7 - diff-channels: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt - maxItems: 1 + diff-channels: true required: - reg + additionalProperties: false + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/dts/Bindings/iio/adc/adi,ad7298.yaml b/dts/Bindings/iio/adc/adi,ad7298.yaml new file mode 100644 index 0000000000..cd8ac5162d --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7298.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7298.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7298 ADC + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + +description: | + Bindings for the Analog Devices AD7298 ADC device. Datasheet can be + found here: + https://www.analog.com/en/products/ad7298.html + +properties: + compatible: + const: adi,ad7298 + + reg: + maxItems: 1 + + vref-supply: true + vdd-supply: true + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7298"; + reg = <0>; + spi-max-frequency = <5000000>; + vref-supply = <&adc_vref>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/adi,ad7476.yaml b/dts/Bindings/iio/adc/adi,ad7476.yaml new file mode 100644 index 0000000000..44c671eeda --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7476.yaml @@ -0,0 +1,175 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7476.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AD7476 and similar simple SPI ADCs from multiple manufacturers. + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + +description: | + A lot of simple SPI ADCs have very straight forward interfaces. + They typically don't provide a MOSI pin, simply reading out data + on MISO when the clock toggles. + +properties: + compatible: + enum: + - adi,ad7091 + - adi,ad7091r + - adi,ad7273 + - adi,ad7274 + - adi,ad7276 + - adi,ad7277 + - adi,ad7278 + - adi,ad7466 + - adi,ad7467 + - adi,ad7468 + - adi,ad7475 + - adi,ad7476 + - adi,ad7476a + - adi,ad7477 + - adi,ad7477a + - adi,ad7478 + - adi,ad7478a + - adi,ad7495 + - adi,ad7910 + - adi,ad7920 + - adi,ad7940 + - ti,adc081s + - ti,adc101s + - ti,adc121s + - ti,ads7866 + - ti,ads7867 + - ti,ads7868 + - lltc,ltc2314-14 + + reg: + maxItems: 1 + + vcc-supply: + description: + Main powersupply voltage for the chips, sometimes referred to as VDD on + datasheets. If there is no separate vref-supply, then this is needed + to establish channel scaling. + + vdrive-supply: + description: + Some devices have separate supply for their digital control side. + + vref-supply: + description: + Some devices have a specific reference voltage supplied on a different pin + to the other supplies. Needed to be able to establish channel scaling + unless there is also an internal reference available (e.g. ad7091r) + + adi,conversion-start-gpios: + description: A GPIO used to trigger the start of a conversion + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + + # Devices where reference is vcc + - if: + properties: + compatible: + contains: + enum: + - adi,ad7091 + - adi,ad7276 + - adi,ad7277 + - adi,ad7278 + - adi,ad7466 + - adi,ad7467 + - adi,ad7468 + - adi,ad7940 + - ti,adc081s + - ti,adc101s + - ti,adc121s + - ti,ads7866 + - ti,ads7868 + then: + required: + - vcc-supply + # Devices with a vref + - if: + properties: + compatible: + contains: + enum: + - adi,ad7091r + - adi,ad7273 + - adi,ad7274 + - adi,ad7475 + - lltc,ltc2314-14 + then: + properties: + vref-supply: true + else: + properties: + vref-supply: false + # Devices with a vref where it is not optional + - if: + properties: + compatible: + contains: + enum: + - adi,ad7273 + - adi,ad7274 + - adi,ad7475 + - lltc,ltc2314-14 + then: + required: + - vref-supply + - if: + properties: + compatible: + contains: + enum: + - adi,ad7475 + - adi,ad7495 + then: + properties: + vdrive-supply: true + else: + properties: + vdrive-supply: false + - if: + properties: + compatible: + contains: + enum: + - adi,ad7091 + - adi,ad7091r + then: + properties: + adi,conversion-start-gpios: true + else: + properties: + adi,conversion-start-gpios: false + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7091r"; + reg = <0>; + spi-max-frequency = <5000000>; + vcc-supply = <&adc_vcc>; + vref-supply = <&adc_vref>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/adi,ad7606.yaml b/dts/Bindings/iio/adc/adi,ad7606.yaml index 5117ad68a5..7fa46df1f4 100644 --- a/dts/Bindings/iio/adc/adi,ad7606.yaml +++ b/dts/Bindings/iio/adc/adi,ad7606.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices AD7606 Simultaneous Sampling ADC maintainers: - - Beniamin Bia <beniamin.bia@analog.com> - - Stefan Popa <stefan.popa@analog.com> + - Michael Hennerich <michael.hennerich@analog.com> description: | Analog Devices AD7606 Simultaneous Sampling ADC @@ -31,6 +30,8 @@ properties: spi-cpha: true + spi-cpol: true + avcc-supply: true interrupts: @@ -53,10 +54,10 @@ properties: standby-gpios: description: - Must be the device tree identifier of the STBY pin. This pin is used - to place the AD7606 into one of two power-down modes, Standby mode or - Shutdown mode. As the line is active low, it should be marked - GPIO_ACTIVE_LOW. + Must be the device tree identifier of the STBY pin. This pin is used + to place the AD7606 into one of two power-down modes, Standby mode or + Shutdown mode. As the line is active low, it should be marked + GPIO_ACTIVE_LOW. maxItems: 1 adi,first-data-gpios: @@ -102,34 +103,39 @@ required: - interrupts - adi,conversion-start-gpios +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> - spi0 { + spi { #address-cells = <1>; #size-cells = <0>; adc@0 { - compatible = "adi,ad7606-8"; - reg = <0>; - spi-max-frequency = <1000000>; - spi-cpol; - spi-cpha; - - avcc-supply = <&adc_vref>; - - interrupts = <25 IRQ_TYPE_EDGE_FALLING>; - interrupt-parent = <&gpio>; - - adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; - adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; - adi,oversampling-ratio-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>, - <&gpio 23 GPIO_ACTIVE_HIGH>, - <&gpio 26 GPIO_ACTIVE_HIGH>; - standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; - adi,sw-mode; + compatible = "adi,ad7606-8"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + + avcc-supply = <&adc_vref>; + + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + + adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; + adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + adi,oversampling-ratio-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>, + <&gpio 23 GPIO_ACTIVE_HIGH>, + <&gpio 26 GPIO_ACTIVE_HIGH>; + standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; + adi,sw-mode; }; }; ... diff --git a/dts/Bindings/iio/adc/adi,ad7768-1.txt b/dts/Bindings/iio/adc/adi,ad7768-1.txt deleted file mode 100644 index 9f5b88cf68..0000000000 --- a/dts/Bindings/iio/adc/adi,ad7768-1.txt +++ /dev/null @@ -1,41 +0,0 @@ -Analog Devices AD7768-1 ADC device driver - -Required properties for the AD7768-1: - -- compatible: Must be "adi,ad7768-1" -- reg: SPI chip select number for the device -- spi-max-frequency: Max SPI frequency to use - see: Documentation/devicetree/bindings/spi/spi-bus.txt -- clocks: phandle to the master clock (mclk) - see: Documentation/devicetree/bindings/clock/clock-bindings.txt -- clock-names: Must be "mclk". -- interrupts: IRQ line for the ADC - see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt -- vref-supply: vref supply can be used as reference for conversion -- adi,sync-in-gpios: must be the device tree identifier of the SYNC-IN pin. Enables - synchronization of multiple devices that require simultaneous sampling. - A pulse is always required if the configuration is changed in any way, for example - if the filter decimation rate changes. As the line is active low, it should - be marked GPIO_ACTIVE_LOW. - -Optional properties: - - - reset-gpios : GPIO spec for the RESET pin. If specified, it will be asserted during - driver probe. As the line is active low, it should be marked GPIO_ACTIVE_LOW. - -Example: - - adc@0 { - compatible = "adi,ad7768-1"; - reg = <0>; - spi-max-frequency = <2000000>; - spi-cpol; - spi-cpha; - vref-supply = <&adc_vref>; - interrupts = <25 IRQ_TYPE_EDGE_RISING>; - interrupt-parent = <&gpio>; - adi,sync-in-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; - clocks = <&ad7768_mclk>; - clock-names = "mclk"; - }; diff --git a/dts/Bindings/iio/adc/adi,ad7768-1.yaml b/dts/Bindings/iio/adc/adi,ad7768-1.yaml new file mode 100644 index 0000000000..3ce59d4d06 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7768-1.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7768-1 ADC device driver + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + +description: | + Datasheet at: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf + +properties: + compatible: + const: adi,ad7768-1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: mclk + + interrupts: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + vref-supply: + description: + ADC reference voltage supply + + adi,sync-in-gpios: + maxItems: 1 + description: + Enables synchronization of multiple devices that require simultaneous + sampling. A pulse is always required if the configuration is changed + in any way, for example if the filter decimation rate changes. + As the line is active low, it should be marked GPIO_ACTIVE_LOW. + + reset-gpios: + maxItems: 1 + + spi-cpol: true + + spi-cpha: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - vref-supply + - spi-cpol + - spi-cpha + - adi,sync-in-gpios + +patternProperties: + "^channel@([0-9]|1[0-5])$": + type: object + description: | + Represents the external channels which are connected to the device. + + properties: + reg: + maxItems: 1 + description: | + The channel number. + + label: + description: | + Unique name to identify which channel this is. + required: + - reg + additionalProperties: false + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/gpio/gpio.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7768-1"; + reg = <0>; + spi-max-frequency = <2000000>; + spi-cpol; + spi-cpha; + vref-supply = <&adc_vref>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&gpio>; + adi,sync-in-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + clocks = <&ad7768_mclk>; + clock-names = "mclk"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + label = "channel_0"; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/adi,ad7780.yaml b/dts/Bindings/iio/adc/adi,ad7780.yaml index a67ba67dab..be2616ff9a 100644 --- a/dts/Bindings/iio/adc/adi,ad7780.yaml +++ b/dts/Bindings/iio/adc/adi,ad7780.yaml @@ -72,7 +72,7 @@ additionalProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> - spi0 { + spi { #address-cells = <1>; #size-cells = <0>; @@ -80,9 +80,9 @@ examples: compatible = "adi,ad7780"; reg = <0>; - avdd-supply = <&vdd_supply>; - powerdown-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; - adi,gain-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + avdd-supply = <&vdd_supply>; + powerdown-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + adi,gain-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; adi,filter-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; }; }; diff --git a/dts/Bindings/iio/adc/adi,ad7923.yaml b/dts/Bindings/iio/adc/adi,ad7923.yaml index a11b918e00..85148338c5 100644 --- a/dts/Bindings/iio/adc/adi,ad7923.yaml +++ b/dts/Bindings/iio/adc/adi,ad7923.yaml @@ -8,11 +8,10 @@ title: Analog Devices AD7923 and similars with 4 and 8 Channel ADCs. maintainers: - Michael Hennerich <michael.hennerich@analog.com> - - Patrick Vasseur <patrick.vasseur@c-s.fr> description: | Analog Devices AD7904, AD7914, AD7923, AD7924 4 Channel ADCs, and AD7908, - AD7918, AD7928 8 Channels ADCs. + AD7918, AD7927, AD7928 8 Channels ADCs. Specifications about the part can be found at: https://www.analog.com/media/en/technical-documentation/data-sheets/AD7923.pdf @@ -21,14 +20,22 @@ description: | properties: compatible: - enum: - - adi,ad7904 - - adi,ad7914 - - adi,ad7923 - - adi,ad7924 - - adi,ad7908 - - adi,ad7918 - - adi,ad7928 + oneOf: + - enum: + - adi,ad7904 + - adi,ad7908 + - adi,ad7914 + - adi,ad7918 + - adi,ad7923 + - adi,ad7928 + - const: adi,ad7924 + deprecated: true + - items: + - const: adi,ad7924 + - const: adi,ad7923 + - items: + - const: adi,ad7927 + - const: adi,ad7928 reg: maxItems: 1 @@ -37,6 +44,10 @@ properties: description: | The regulator supply for ADC reference voltage. + adi,range-double: + description: Sets the analog input range from 0 to 2xVREF. + type: boolean + '#address-cells': const: 1 @@ -47,6 +58,11 @@ required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/dts/Bindings/iio/adc/adi,ad7949.yaml b/dts/Bindings/iio/adc/adi,ad7949.yaml new file mode 100644 index 0000000000..9ee4d977c5 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad7949.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7949.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7949/AD7682/AD7689 analog to digital converters + +maintainers: + - Charles-Antoine Couret <charles-antoine.couret@essensium.com> + +description: | + Specifications on the converters can be found at: + AD7949: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf + AD7682/AD7698: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf + +properties: + compatible: + enum: + - adi,ad7682 + - adi,ad7689 + - adi,ad7949 + + reg: + maxItems: 1 + + vrefin-supply: + description: + Buffered ADC reference voltage supply. + + vref-supply: + description: + Unbuffered ADC reference voltage supply. + + adi,internal-ref-microvolt: + description: | + Internal reference voltage selection in microvolts. + + If no internal reference is specified, the channel will default to the + external reference defined by vrefin-supply (or vref-supply). + vrefin-supply will take precedence over vref-supply if both are defined. + + If no supplies are defined, the reference selection will default to + 4096mV internal reference. + + enum: [2500000, 4096000] + default: 4096000 + + + '#io-channel-cells': + const: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "adi,ad7949"; + reg = <0>; + vref-supply = <&vdd_supply>; + }; + + adc@1 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "adi,ad7949"; + reg = <1>; + vrefin-supply = <&vdd_supply>; + }; + + adc@2 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "adi,ad7949"; + reg = <2>; + adi,internal-ref-microvolt = <4096000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/adi,ad799x.yaml b/dts/Bindings/iio/adc/adi,ad799x.yaml new file mode 100644 index 0000000000..433ed2c929 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,ad799x.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad799x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD799x analog to digital converters + +maintainers: + - Michael Hennerich <Michael.Hennerich@analog.com> + +description: | + Support for Analog Devices AD7991, AD7992, AD7993, AD7994, AD7995, AD7997, AD7998, + AD7999 and similar analog to digital converters. + Specifications on the converters can be found at: + AD7991, AD7995, AD7999: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7991_7995_7999.pdf + AD7992: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7992.pdf + AD7993, AD7994: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7993_7994.pdf + AD7997, AD7998: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7997_7998.pdf + +properties: + compatible: + enum: + - adi,ad7991 + - adi,ad7992 + - adi,ad7993 + - adi,ad7994 + - adi,ad7995 + - adi,ad7997 + - adi,ad7998 + - adi,ad7999 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vcc-supply: + description: + ADC power supply + + vref-supply: + description: + ADC reference voltage supply, optional for AD7991, AD7995 and AD7999 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc1: adc@28 { + reg = <0x28>; + compatible = "adi,ad7991"; + interrupts = <13 2>; + interrupt-parent = <&gpio6>; + + vcc-supply = <&vcc_3v3>; + vref-supply = <&adc_vref>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/adi,ad9467.yaml b/dts/Bindings/iio/adc/adi,ad9467.yaml index c4f57fa6aa..7aa748d6b7 100644 --- a/dts/Bindings/iio/adc/adi,ad9467.yaml +++ b/dts/Bindings/iio/adc/adi,ad9467.yaml @@ -4,21 +4,29 @@ $id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices AD9467 High-Speed ADC +title: Analog Devices AD9467 and similar High-Speed ADCs maintainers: - Michael Hennerich <michael.hennerich@analog.com> - - Alexandru Ardelean <alexandru.ardelean@analog.com> description: | - The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital - converter (ADC). + The AD9467 and the parts similar with it, are high-speed analog-to-digital + converters (ADCs), operating in the range of 100 to 500 mega samples + per second (MSPS). Some parts support higher MSPS and some + lower MSPS, suitable for the intended application of each part. + All the parts support the register map described by Application Note AN-877 + https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf + + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf properties: compatible: enum: + - adi,ad9265 + - adi,ad9434 - adi,ad9467 reg: @@ -56,10 +64,10 @@ examples: #size-cells = <0>; adc@0 { - compatible = "adi,ad9467"; - reg = <0>; - clocks = <&adc_clk>; - clock-names = "adc-clk"; + compatible = "adi,ad9467"; + reg = <0>; + clocks = <&adc_clk>; + clock-names = "adc-clk"; }; }; ... diff --git a/dts/Bindings/iio/adc/adi,axi-adc.yaml b/dts/Bindings/iio/adc/adi,axi-adc.yaml index 0924b2b497..9996dd93f8 100644 --- a/dts/Bindings/iio/adc/adi,axi-adc.yaml +++ b/dts/Bindings/iio/adc/adi,axi-adc.yaml @@ -8,7 +8,6 @@ title: Analog Devices AXI ADC IP core maintainers: - Michael Hennerich <michael.hennerich@analog.com> - - Alexandru Ardelean <alexandru.ardelean@analog.com> description: | Analog Devices Generic AXI ADC IP core for interfacing an ADC device @@ -52,11 +51,11 @@ additionalProperties: false examples: - | axi-adc@44a00000 { - compatible = "adi,axi-adc-10.0.a"; - reg = <0x44a00000 0x10000>; - dmas = <&rx_dma 0>; - dma-names = "rx"; + compatible = "adi,axi-adc-10.0.a"; + reg = <0x44a00000 0x10000>; + dmas = <&rx_dma 0>; + dma-names = "rx"; - adi,adc-dev = <&spi_adc>; + adi,adc-dev = <&spi_adc>; }; ... diff --git a/dts/Bindings/iio/adc/adi,max11410.yaml b/dts/Bindings/iio/adc/adi,max11410.yaml new file mode 100644 index 0000000000..53f9feff13 --- /dev/null +++ b/dts/Bindings/iio/adc/adi,max11410.yaml @@ -0,0 +1,177 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2022 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,max11410.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX11410 ADC device driver + +maintainers: + - Ibrahim Tilki <Ibrahim.Tilki@analog.com> + +description: | + Bindings for the Analog Devices MAX11410 ADC device. Datasheet can be + found here: + https://datasheets.maximintegrated.com/en/ds/MAX11410.pdf + +properties: + compatible: + enum: + - adi,max11410 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + description: Name of the gpio pin of max11410 used for IRQ + minItems: 1 + items: + - enum: [gpio0, gpio1] + - const: gpio1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + avdd-supply: + description: Optional avdd supply. Used as reference when no explicit reference supplied. + + vref0p-supply: + description: vref0p supply can be used as reference for conversion. + + vref1p-supply: + description: vref1p supply can be used as reference for conversion. + + vref2p-supply: + description: vref2p supply can be used as reference for conversion. + + vref0n-supply: + description: vref0n supply can be used as reference for conversion. + + vref1n-supply: + description: vref1n supply can be used as reference for conversion. + + vref2n-supply: + description: vref2n supply can be used as reference for conversion. + + spi-max-frequency: + maximum: 8000000 + +patternProperties: + "^channel(@[0-9])?$": + $ref: adc.yaml + type: object + description: Represents the external channels which are connected to the ADC. + + properties: + reg: + description: The channel number in single-ended mode. + minimum: 0 + maximum: 9 + + adi,reference: + description: | + Select the reference source to use when converting on + the specific channel. Valid values are: + 0: VREF0P/VREF0N + 1: VREF1P/VREF1N + 2: VREF2P/VREF2N + 3: AVDD/AGND + 4: VREF0P/AGND + 5: VREF1P/AGND + 6: VREF2P/AGND + If this field is left empty, AVDD/AGND is selected. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6] + default: 3 + + adi,input-mode: + description: | + Select signal path of input channels. Valid values are: + 0: Buffered, low-power, unity-gain path (default) + 1: Bypass path + 2: PGA path + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 0 + + diff-channels: true + + bipolar: true + + settling-time-us: true + + adi,buffered-vrefp: + description: Enable buffered mode for positive reference. + type: boolean + + adi,buffered-vrefn: + description: Enable buffered mode for negative reference. + type: boolean + + required: + - reg + + additionalProperties: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + reg = <0>; + compatible = "adi,max11410"; + spi-max-frequency = <8000000>; + + interrupt-parent = <&gpio>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "gpio1"; + + avdd-supply = <&adc_avdd>; + + vref1p-supply = <&adc_vref1p>; + vref1n-supply = <&adc_vref1n>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + + channel@1 { + reg = <1>; + diff-channels = <2 3>; + adi,reference = <1>; + bipolar; + settling-time-us = <100000>; + }; + + channel@2 { + reg = <2>; + diff-channels = <7 9>; + adi,reference = <5>; + adi,input-mode = <2>; + settling-time-us = <50000>; + }; + }; + }; diff --git a/dts/Bindings/iio/adc/ads1015.txt b/dts/Bindings/iio/adc/ads1015.txt deleted file mode 100644 index 918a507d11..0000000000 --- a/dts/Bindings/iio/adc/ads1015.txt +++ /dev/null @@ -1,73 +0,0 @@ -ADS1015 (I2C) - -This device is a 12-bit A-D converter with 4 inputs. - -The inputs can be used single ended or in certain differential combinations. - -For configuration all possible combinations are mapped to 8 channels: - 0: Voltage over AIN0 and AIN1. - 1: Voltage over AIN0 and AIN3. - 2: Voltage over AIN1 and AIN3. - 3: Voltage over AIN2 and AIN3. - 4: Voltage over AIN0 and GND. - 5: Voltage over AIN1 and GND. - 6: Voltage over AIN2 and GND. - 7: Voltage over AIN3 and GND. - -Each channel can be configured individually: - - pga is the programmable gain amplifier (values are full scale) - 0: +/- 6.144 V - 1: +/- 4.096 V - 2: +/- 2.048 V (default) - 3: +/- 1.024 V - 4: +/- 0.512 V - 5: +/- 0.256 V - - data_rate in samples per second - 0: 128 - 1: 250 - 2: 490 - 3: 920 - 4: 1600 (default) - 5: 2400 - 6: 3300 - -1) The /ads1015 node - - Required properties: - - - compatible : must be "ti,ads1015" - - reg : I2C bus address of the device - - #address-cells : must be <1> - - #size-cells : must be <0> - - The node contains child nodes for each channel that the platform uses. - - Example ADS1015 node: - - ads1015@49 { - compatible = "ti,ads1015"; - reg = <0x49>; - #address-cells = <1>; - #size-cells = <0>; - - [ child node definitions... ] - } - -2) channel nodes - - Required properties: - - - reg : the channel number - - Optional properties: - - - ti,gain : the programmable gain amplifier setting - - ti,datarate : the converter data rate - - Example ADS1015 channel node: - - channel@4 { - reg = <4>; - ti,gain = <3>; - ti,datarate = <5>; - }; diff --git a/dts/Bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml b/dts/Bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file mode 100644 index 0000000000..7ef46c90eb --- /dev/null +++ b/dts/Bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/allwinner,sun20i-d1-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner D1 General Purpose ADC + +maintainers: + - Maksim Kiselev <bigunclemax@gmail.com> + +properties: + compatible: + enum: + - allwinner,sun20i-d1-gpadc + + "#io-channel-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + "^channel@[0-9a-f]+$": + $ref: adc.yaml + type: object + description: + Represents the internal channels of the ADC. + + properties: + reg: + items: + minimum: 0 + maximum: 15 + + required: + - reg + + unevaluatedProperties: false + +required: + - "#io-channel-cells" + - clocks + - compatible + - interrupts + - reg + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sun20i-d1-ccu.h> + #include <dt-bindings/reset/sun20i-d1-ccu.h> + #include <dt-bindings/interrupt-controller/irq.h> + + gpadc: adc@2009000 { + compatible = "allwinner,sun20i-d1-gpadc"; + reg = <0x2009000 0x400>; + clocks = <&ccu CLK_BUS_GPADC>; + resets = <&ccu RST_BUS_GPADC>; + interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + + channel@1 { + reg = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/allwinner,sun8i-a33-ths.yaml b/dts/Bindings/iio/adc/allwinner,sun8i-a33-ths.yaml index 15c514b835..a73a355fc6 100644 --- a/dts/Bindings/iio/adc/allwinner,sun8i-a33-ths.yaml +++ b/dts/Bindings/iio/adc/allwinner,sun8i-a33-ths.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/iio/adc/allwinner,sun8i-a33-ths.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A33 Thermal Sensor Device Tree Bindings +title: Allwinner A33 Thermal Sensor maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/dts/Bindings/iio/adc/amlogic,meson-saradc.txt b/dts/Bindings/iio/adc/amlogic,meson-saradc.txt deleted file mode 100644 index d57e9df25f..0000000000 --- a/dts/Bindings/iio/adc/amlogic,meson-saradc.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Amlogic Meson SAR (Successive Approximation Register) A/D converter - -Required properties: -- compatible: depending on the SoC this should be one of: - - "amlogic,meson8-saradc" for Meson8 - - "amlogic,meson8b-saradc" for Meson8b - - "amlogic,meson8m2-saradc" for Meson8m2 - - "amlogic,meson-gxbb-saradc" for GXBB - - "amlogic,meson-gxl-saradc" for GXL - - "amlogic,meson-gxm-saradc" for GXM - - "amlogic,meson-axg-saradc" for AXG - - "amlogic,meson-g12a-saradc" for AXG - along with the generic "amlogic,meson-saradc" -- reg: the physical base address and length of the registers -- interrupts: the interrupt indicating end of sampling -- clocks: phandle and clock identifier (see clock-names) -- clock-names: mandatory clocks: - - "clkin" for the reference clock (typically XTAL) - - "core" for the SAR ADC core clock - optional clocks: - - "adc_clk" for the ADC (sampling) clock - - "adc_sel" for the ADC (sampling) clock mux -- vref-supply: the regulator supply for the ADC reference voltage -- #io-channel-cells: must be 1, see ../iio-bindings.txt - -Optional properties: -- amlogic,hhi-sysctrl: phandle to the syscon which contains the 5th bit - of the TSC (temperature sensor coefficient) on - Meson8b and Meson8m2 (which used to calibrate the - temperature sensor) -- nvmem-cells: phandle to the temperature_calib eFuse cells -- nvmem-cell-names: if present (to enable the temperature sensor - calibration) this must contain "temperature_calib" - - -Example: - saradc: adc@8680 { - compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; - #io-channel-cells = <1>; - reg = <0x0 0x8680 0x0 0x34>; - interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>, - <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SANA>, - <&clkc CLKID_SAR_ADC_CLK>, - <&clkc CLKID_SAR_ADC_SEL>; - clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; - }; diff --git a/dts/Bindings/iio/adc/amlogic,meson-saradc.yaml b/dts/Bindings/iio/adc/amlogic,meson-saradc.yaml new file mode 100644 index 0000000000..7e8328e9ce --- /dev/null +++ b/dts/Bindings/iio/adc/amlogic,meson-saradc.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Meson SAR (Successive Approximation Register) A/D converter + +maintainers: + - Martin Blumenstingl <martin.blumenstingl@googlemail.com> + +description: + Binding covers a range of ADCs found on Amlogic Meson SoCs. + +properties: + compatible: + oneOf: + - const: amlogic,meson-saradc + - items: + - enum: + - amlogic,meson8-saradc + - amlogic,meson8b-saradc + - amlogic,meson8m2-saradc + - amlogic,meson-gxbb-saradc + - amlogic,meson-gxl-saradc + - amlogic,meson-gxm-saradc + - amlogic,meson-axg-saradc + - amlogic,meson-g12a-saradc + - const: amlogic,meson-saradc + + reg: + maxItems: 1 + + interrupts: + description: Interrupt indicates end of sampling. + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 4 + + clock-names: + minItems: 2 + items: + - const: clkin + - const: core + - const: adc_clk + - const: adc_sel + + vref-supply: true + + "#io-channel-cells": + const: 1 + + amlogic,hhi-sysctrl: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Syscon which contains the 5th bit of the TSC (temperature sensor + coefficient) on Meson8b and Meson8m2 (which used to calibrate the + temperature sensor) + + nvmem-cells: + description: phandle to the temperature_calib eFuse cells + maxItems: 1 + + nvmem-cell-names: + const: temperature_calib + +allOf: + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8-saradc + - amlogic,meson8b-saradc + - amlogic,meson8m2-saradc + then: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + else: + properties: + nvmem-cells: false + mvmem-cel-names: false + clocks: + minItems: 4 + clock-names: + minItems: 4 + + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8b-saradc + - amlogic,meson8m2-saradc + then: + properties: + amlogic,hhi-sysctrl: true + else: + properties: + amlogic,hhi-sysctrl: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/gxbb-clkc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + adc@8680 { + compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; + #io-channel-cells = <1>; + reg = <0x0 0x8680 0x0 0x34>; + interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SAR_ADC_CLK>, + <&clkc CLKID_SAR_ADC_SEL>; + clock-names = "clkin", "core", "adc_clk", "adc_sel"; + }; + adc@9680 { + compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; + #io-channel-cells = <1>; + reg = <0x0 0x9680 0x0 0x34>; + interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; + clock-names = "clkin", "core"; + nvmem-cells = <&tsens_caldata>; + nvmem-cell-names = "temperature_calib"; + amlogic,hhi-sysctrl = <&hhi>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/aspeed,ast2400-adc.yaml b/dts/Bindings/iio/adc/aspeed,ast2400-adc.yaml new file mode 100644 index 0000000000..a726b6c2ab --- /dev/null +++ b/dts/Bindings/iio/adc/aspeed,ast2400-adc.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC that forms part of an ASPEED server management processor. + +maintainers: + - Joel Stanley <joel@jms.id.au> + +description: + This device is a 10-bit converter for 16 voltage channels. All inputs are + single ended. + +properties: + compatible: + enum: + - aspeed,ast2400-adc + - aspeed,ast2500-adc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: + Input clock used to derive the sample clock. Expected to be the + SoC's APB clock. + + resets: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - resets + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/aspeed-clock.h> + adc@1e6e9000 { + compatible = "aspeed,ast2400-adc"; + reg = <0x1e6e9000 0xb0>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_ADC>; + #io-channel-cells = <1>; + }; +... diff --git a/dts/Bindings/iio/adc/aspeed,ast2600-adc.yaml b/dts/Bindings/iio/adc/aspeed,ast2600-adc.yaml new file mode 100644 index 0000000000..5c08d8b6e9 --- /dev/null +++ b/dts/Bindings/iio/adc/aspeed,ast2600-adc.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC that forms part of an ASPEED server management processor. + +maintainers: + - Billy Tsai <billy_tsai@aspeedtech.com> + +description: | + • 10-bits resolution for 16 voltage channels. + • The device split into two individual engine and each contains 8 voltage + channels. + • Channel scanning can be non-continuous. + • Programmable ADC clock frequency. + • Programmable upper and lower threshold for each channels. + • Interrupt when larger or less than threshold for each channels. + • Support hysteresis for each channels. + • Built-in a compensating method. + • Built-in a register to trim internal reference voltage. + • Internal or External reference voltage. + • Support 2 Internal reference voltage 1.2v or 2.5v. + • Integrate dividing circuit for battery sensing. + +properties: + compatible: + enum: + - aspeed,ast2600-adc0 + - aspeed,ast2600-adc1 + description: + Their trimming data, which is used to calibrate internal reference volage, + locates in different address of OTP. + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: + Input clock used to derive the sample clock. Expected to be the + SoC's APB clock. + + resets: + maxItems: 1 + + "#io-channel-cells": + const: 1 + + vref-supply: + description: + The external regulator supply ADC reference voltage. + + aspeed,int-vref-microvolt: + enum: [1200000, 2500000] + description: + ADC internal reference voltage in microvolts. + + aspeed,battery-sensing: + type: boolean + description: + Inform the driver that last channel will be used to sensor battery. + +required: + - compatible + - reg + - clocks + - resets + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/ast2600-clock.h> + adc0: adc@1e6e9000 { + compatible = "aspeed,ast2600-adc0"; + reg = <0x1e6e9000 0x100>; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_ADC>; + #io-channel-cells = <1>; + aspeed,int-vref-microvolt = <2500000>; + }; + adc1: adc@1e6e9100 { + compatible = "aspeed,ast2600-adc1"; + reg = <0x1e6e9100 0x100>; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_ADC>; + #io-channel-cells = <1>; + aspeed,int-vref-microvolt = <2500000>; + }; +... diff --git a/dts/Bindings/iio/adc/aspeed_adc.txt b/dts/Bindings/iio/adc/aspeed_adc.txt deleted file mode 100644 index 034fc2ba10..0000000000 --- a/dts/Bindings/iio/adc/aspeed_adc.txt +++ /dev/null @@ -1,22 +0,0 @@ -Aspeed ADC - -This device is a 10-bit converter for 16 voltage channels. All inputs are -single ended. - -Required properties: -- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc" -- reg: memory window mapping address and length -- clocks: Input clock used to derive the sample clock. Expected to be the - SoC's APB clock. -- resets: Reset controller phandle -- #io-channel-cells: Must be set to <1> to indicate channels are selected - by index. - -Example: - adc@1e6e9000 { - compatible = "aspeed,ast2400-adc"; - reg = <0x1e6e9000 0xb0>; - clocks = <&syscon ASPEED_CLK_APB>; - resets = <&syscon ASPEED_RESET_ADC>; - #io-channel-cells = <1>; - }; diff --git a/dts/Bindings/iio/adc/at91-sama5d2_adc.txt b/dts/Bindings/iio/adc/at91-sama5d2_adc.txt deleted file mode 100644 index 07c59f301b..0000000000 --- a/dts/Bindings/iio/adc/at91-sama5d2_adc.txt +++ /dev/null @@ -1,50 +0,0 @@ -* AT91 SAMA5D2 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "atmel,sama5d2-adc" or "microchip,sam9x60-adc". - - reg: Should contain ADC registers location and length. - - interrupts: Should contain the IRQ line for the ADC. - - clocks: phandle to device clock. - - clock-names: Must be "adc_clk". - - vref-supply: Supply used as reference for conversions. - - vddana-supply: Supply for the adc device. - - atmel,min-sample-rate-hz: Minimum sampling rate, it depends on SoC. - - atmel,max-sample-rate-hz: Maximum sampling rate, it depends on SoC. - - atmel,startup-time-ms: Startup time expressed in ms, it depends on SoC. - - atmel,trigger-edge-type: One of possible edge types for the ADTRG hardware - trigger pin. When the specific edge type is detected, the conversion will - start. Possible values are rising, falling, or both. - This property uses the IRQ edge types values: IRQ_TYPE_EDGE_RISING , - IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH - -Optional properties: - - dmas: Phandle to dma channel for the ADC. - - dma-names: Must be "rx" when dmas property is being used. - See ../../dma/dma.txt for details. - - #io-channel-cells: in case consumer drivers are attached, this must be 1. - See <Documentation/devicetree/bindings/iio/iio-bindings.txt> for details. - -Properties for consumer drivers: - - Consumer drivers can be connected to this producer device, as specified - in <Documentation/devicetree/bindings/iio/iio-bindings.txt> - - Channels exposed are specified in: - <dt-bindings/iio/adc/at91-sama5d2_adc.txt> - -Example: - -adc: adc@fc030000 { - compatible = "atmel,sama5d2-adc"; - reg = <0xfc030000 0x100>; - interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&adc_clk>; - clock-names = "adc_clk"; - atmel,min-sample-rate-hz = <200000>; - atmel,max-sample-rate-hz = <20000000>; - atmel,startup-time-ms = <4>; - vddana-supply = <&vdd_3v3_lp_reg>; - vref-supply = <&vdd_3v3_lp_reg>; - atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>; - dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; - dma-names = "rx"; - #io-channel-cells = <1>; -} diff --git a/dts/Bindings/iio/adc/at91_adc.txt b/dts/Bindings/iio/adc/at91_adc.txt deleted file mode 100644 index f65b04fb79..0000000000 --- a/dts/Bindings/iio/adc/at91_adc.txt +++ /dev/null @@ -1,83 +0,0 @@ -* AT91's Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "atmel,<chip>-adc" - <chip> can be "at91sam9260", "at91sam9g45" or "at91sam9x5" - - reg: Should contain ADC registers location and length - - interrupts: Should contain the IRQ line for the ADC - - clock-names: tuple listing input clock names. - Required elements: "adc_clk", "adc_op_clk". - - clocks: phandles to input clocks. - - atmel,adc-channels-used: Bitmask of the channels muxed and enabled for this - device - - atmel,adc-startup-time: Startup Time of the ADC in microseconds as - defined in the datasheet - - atmel,adc-vref: Reference voltage in millivolts for the conversions - - atmel,adc-res: List of resolutions in bits supported by the ADC. List size - must be two at least. - - atmel,adc-res-names: Contains one identifier string for each resolution - in atmel,adc-res property. "lowres" and "highres" - identifiers are required. - -Optional properties: - - atmel,adc-use-external-triggers: Boolean to enable the external triggers - - atmel,adc-use-res: String corresponding to an identifier from - atmel,adc-res-names property. If not specified, the highest - resolution will be used. - - atmel,adc-sleep-mode: Boolean to enable sleep mode when no conversion - - atmel,adc-sample-hold-time: Sample and Hold Time in microseconds - - atmel,adc-ts-wires: Number of touchscreen wires. Should be 4 or 5. If this - value is set, then the adc driver will enable touchscreen - support. - NOTE: when adc touchscreen is enabled, the adc hardware trigger will be - disabled. Since touchscreen will occupy the trigger register. - - atmel,adc-ts-pressure-threshold: a pressure threshold for touchscreen. It - makes touch detection more precise. - -Optional trigger Nodes: - - Required properties: - * trigger-name: Name of the trigger exposed to the user - * trigger-value: Value to put in the Trigger register - to activate this trigger - - Optional properties: - * trigger-external: Is the trigger an external trigger? - -Examples: -adc0: adc@fffb0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "atmel,at91sam9260-adc"; - reg = <0xfffb0000 0x100>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&adc_clk>, <&adc_op_clk>; - clock-names = "adc_clk", "adc_op_clk"; - atmel,adc-channels-used = <0xff>; - atmel,adc-startup-time = <40>; - atmel,adc-use-external-triggers; - atmel,adc-vref = <3300>; - atmel,adc-res = <8 10>; - atmel,adc-res-names = "lowres", "highres"; - atmel,adc-use-res = "lowres"; - - trigger0 { - trigger-name = "external-rising"; - trigger-value = <0x1>; - trigger-external; - }; - trigger1 { - trigger-name = "external-falling"; - trigger-value = <0x2>; - trigger-external; - }; - - trigger2 { - trigger-name = "external-any"; - trigger-value = <0x3>; - trigger-external; - }; - - trigger3 { - trigger-name = "continuous"; - trigger-value = <0x6>; - }; -}; diff --git a/dts/Bindings/iio/adc/atmel,sama5d2-adc.yaml b/dts/Bindings/iio/adc/atmel,sama5d2-adc.yaml new file mode 100644 index 0000000000..4817b84097 --- /dev/null +++ b/dts/Bindings/iio/adc/atmel,sama5d2-adc.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AT91 SAMA5D2 Analog to Digital Converter (ADC) + +maintainers: + - Eugen Hristev <eugen.hristev@microchip.com> + +properties: + compatible: + enum: + - atmel,sama5d2-adc + - microchip,sam9x60-adc + - microchip,sama7g5-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: adc_clk + + vref-supply: true + vddana-supply: true + + atmel,min-sample-rate-hz: + description: Minimum sampling rate, it depends on SoC. + + atmel,max-sample-rate-hz: + description: Maximum sampling rate, it depends on SoC. + + atmel,startup-time-ms: + description: Startup time expressed in ms, it depends on SoC. + + atmel,trigger-edge-type: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + One of possible edge types for the ADTRG hardware trigger pin. + When the specific edge type is detected, the conversion will + start. Should be one of IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING + or IRQ_TYPE_EDGE_BOTH. + enum: [1, 2, 3] + + dmas: + maxItems: 1 + + dma-names: + const: rx + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + - vddana-supply + - atmel,min-sample-rate-hz + - atmel,max-sample-rate-hz + - atmel,startup-time-ms + +examples: + - | + #include <dt-bindings/dma/at91.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + + adc@fc030000 { + compatible = "atmel,sama5d2-adc"; + reg = <0xfc030000 0x100>; + interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&adc_clk>; + clock-names = "adc_clk"; + atmel,min-sample-rate-hz = <200000>; + atmel,max-sample-rate-hz = <20000000>; + atmel,startup-time-ms = <4>; + vddana-supply = <&vdd_3v3_lp_reg>; + vref-supply = <&vdd_3v3_lp_reg>; + atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>; + dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; + dma-names = "rx"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/atmel,sama9260-adc.yaml b/dts/Bindings/iio/adc/atmel,sama9260-adc.yaml new file mode 100644 index 0000000000..1f30a85691 --- /dev/null +++ b/dts/Bindings/iio/adc/atmel,sama9260-adc.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AT91 sama9260 and similar Analog to Digital Converter (ADC) + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +properties: + compatible: + enum: + - atmel,at91sam9260-adc + - atmel,at91sam9rl-adc + - atmel,at91sam9g45-adc + - atmel,at91sam9x5-adc + - atmel,at91sama5d3-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: adc_clk + - const: adc_op_clk + + atmel,adc-channels-used: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Bitmask of the channels muxed and enabled for this device + + atmel,adc-startup-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Startup Time of the ADC in microseconds as defined in the datasheet + + atmel,adc-vref: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Reference voltage in millivolts for the conversions + + atmel,adc-use-external-triggers: + $ref: /schemas/types.yaml#/definitions/flag + description: Enable the external triggers + + atmel,adc-use-res: + $ref: /schemas/types.yaml#/definitions/string + description: + String corresponding to an identifier from atmel,adc-res-names property. + If not specified, the highest resolution will be used. + enum: + - lowres + - highres + + atmel,adc-sleep-mode: + $ref: /schemas/types.yaml#/definitions/flag + description: Enable sleep mode when no conversion + + atmel,adc-sample-hold-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Sample and Hold Time in microseconds + + atmel,adc-ts-wires: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Number of touchscreen wires. Must be set to enable touchscreen. + NOTE: when adc touchscreen is enabled, the adc hardware trigger will be + disabled. Since touchscreen will occupy the trigger register. + enum: + - 4 + - 5 + + atmel,adc-ts-pressure-threshold: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Pressure threshold for touchscreen. + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - atmel,adc-channels-used + - atmel,adc-startup-time + - atmel,adc-vref + +examples: + - | + #include <dt-bindings/dma/at91.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + + adc@fffb0000 { + compatible = "atmel,at91sam9260-adc"; + reg = <0xfffb0000 0x100>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&adc_clk>, <&adc_op_clk>; + clock-names = "adc_clk", "adc_op_clk"; + atmel,adc-channels-used = <0xff>; + atmel,adc-startup-time = <40>; + atmel,adc-use-external-triggers; + atmel,adc-vref = <3300>; + atmel,adc-use-res = "lowres"; + }; + }; +... diff --git a/dts/Bindings/iio/adc/avia-hx711.yaml b/dts/Bindings/iio/adc/avia-hx711.yaml index 77605f1790..9c57eb13f8 100644 --- a/dts/Bindings/iio/adc/avia-hx711.yaml +++ b/dts/Bindings/iio/adc/avia-hx711.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- -$id: "http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: AVIA HX711 ADC chip for weight cells diff --git a/dts/Bindings/iio/adc/axp20x_adc.txt b/dts/Bindings/iio/adc/axp20x_adc.txt deleted file mode 100644 index 7a63139139..0000000000 --- a/dts/Bindings/iio/adc/axp20x_adc.txt +++ /dev/null @@ -1,48 +0,0 @@ -* X-Powers AXP ADC bindings - -Required properties: - - compatible: should be one of: - - "x-powers,axp209-adc", - - "x-powers,axp221-adc", - - "x-powers,axp813-adc", - - #io-channel-cells: should be 1, - -Example: - -&axp22x { - adc { - compatible = "x-powers,axp221-adc"; - #io-channel-cells = <1>; - }; -}; - -ADC channels and their indexes per variant: - -AXP209 ------- - 0 | acin_v - 1 | acin_i - 2 | vbus_v - 3 | vbus_i - 4 | pmic_temp - 5 | gpio0_v - 6 | gpio1_v - 7 | ipsout_v - 8 | batt_v - 9 | batt_chrg_i -10 | batt_dischrg_i - -AXP22x ------- - 0 | pmic_temp - 1 | batt_v - 2 | batt_chrg_i - 3 | batt_dischrg_i - -AXP813 ------- - 0 | pmic_temp - 1 | gpio0_v - 2 | batt_v - 3 | batt_chrg_i - 4 | batt_dischrg_i diff --git a/dts/Bindings/iio/adc/berlin2_adc.txt b/dts/Bindings/iio/adc/berlin2_adc.txt deleted file mode 100644 index 908334c6b0..0000000000 --- a/dts/Bindings/iio/adc/berlin2_adc.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Berlin Analog to Digital Converter (ADC) - -The Berlin ADC has 8 channels, with one connected to a temperature sensor. -It is part of the system controller register set. The ADC node should be a -sub-node of the system controller node. - -Required properties: -- compatible: must be "marvell,berlin2-adc" -- interrupts: the interrupts for the ADC and the temperature sensor -- interrupt-names: should be "adc" and "tsen" - -Example: - -adc: adc { - compatible = "marvell,berlin2-adc"; - interrupt-parent = <&sic>; - interrupts = <12>, <14>; - interrupt-names = "adc", "tsen"; -}; diff --git a/dts/Bindings/iio/adc/brcm,iproc-static-adc.txt b/dts/Bindings/iio/adc/brcm,iproc-static-adc.txt deleted file mode 100644 index 7b1b1e4086..0000000000 --- a/dts/Bindings/iio/adc/brcm,iproc-static-adc.txt +++ /dev/null @@ -1,40 +0,0 @@ -* Broadcom's IPROC Static ADC controller - -Broadcom iProc ADC controller has 8 channels 10bit ADC. -Allows user to convert analog input voltage values to digital. - -Required properties: - -- compatible: Must be "brcm,iproc-static-adc" - -- adc-syscon: Handler of syscon node defining physical base address of the - controller and length of memory mapped region. - -- #io-channel-cells = <1>; As ADC has multiple outputs - refer to Documentation/devicetree/bindings/iio/iio-bindings.txt for details. - -- io-channel-ranges: - refer to Documentation/devicetree/bindings/iio/iio-bindings.txt for details. - -- clocks: Clock used for this block. - -- clock-names: Clock name should be given as tsc_clk. - -- interrupts: interrupt line number. - -For example: - - ts_adc_syscon: ts_adc_syscon@180a6000 { - compatible = "brcm,iproc-ts-adc-syscon","syscon"; - reg = <0x180a6000 0xc30>; - }; - - adc: adc@180a6000 { - compatible = "brcm,iproc-static-adc"; - adc-syscon = <&ts_adc_syscon>; - #io-channel-cells = <1>; - io-channel-ranges; - clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>; - clock-names = "tsc_clk"; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - }; diff --git a/dts/Bindings/iio/adc/brcm,iproc-static-adc.yaml b/dts/Bindings/iio/adc/brcm,iproc-static-adc.yaml new file mode 100644 index 0000000000..547697e8bc --- /dev/null +++ b/dts/Bindings/iio/adc/brcm,iproc-static-adc.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/brcm,iproc-static-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom's IPROC Static ADC controller + +maintainers: + - Raveendra Padasalagi <raveendra.padasalagi@broadcom.com> + +description: | + Broadcom iProc ADC controller has 8 10bit channels + +properties: + compatible: + const: brcm,iproc-static-adc + + adc-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + syscon node defining physical base address of the controller and length + of memory mapped region. + + "#io-channel-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-names: + const: tsc_clk + + interrupts: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - adc-syscon + - "#io-channel-cells" + - clocks + - clock-names + - interrupts + +examples: + - | + #include <dt-bindings/clock/bcm-cygnus.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + + adc { + compatible = "brcm,iproc-static-adc"; + adc-syscon = <&ts_adc_syscon>; + #io-channel-cells = <1>; + clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>; + clock-names = "tsc_clk"; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/cc10001_adc.txt b/dts/Bindings/iio/adc/cc10001_adc.txt deleted file mode 100644 index 904f76de90..0000000000 --- a/dts/Bindings/iio/adc/cc10001_adc.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Cosmic Circuits - Analog to Digital Converter (CC-10001-ADC) - -Required properties: - - compatible: Should be "cosmic,10001-adc" - - reg: Should contain adc registers location and length. - - clock-names: Should contain "adc". - - clocks: Should contain a clock specifier for each entry in clock-names - - vref-supply: The regulator supply ADC reference voltage. - -Optional properties: - - adc-reserved-channels: Bitmask of reserved channels, - i.e. channels that cannot be used by the OS. - -Example: -adc: adc@18101600 { - compatible = "cosmic,10001-adc"; - reg = <0x18101600 0x24>; - adc-reserved-channels = <0x2>; - clocks = <&adc_clk>; - clock-names = "adc"; - vref-supply = <®_1v8>; -}; diff --git a/dts/Bindings/iio/adc/cirrus,ep9301-adc.yaml b/dts/Bindings/iio/adc/cirrus,ep9301-adc.yaml new file mode 100644 index 0000000000..6d4fb3e1d2 --- /dev/null +++ b/dts/Bindings/iio/adc/cirrus,ep9301-adc.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/cirrus,ep9301-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cirrus Logic EP930x internal ADC + +description: | + Cirrus Logic EP9301/EP9302 SoCs' internal ADC block. + + User's manual: + https://cdn.embeddedts.com/resource-attachments/ts-7000_ep9301-ug.pdf + +maintainers: + - Alexander Sverdlin <alexander.sverdlin@gmail.com> + +properties: + compatible: + const: cirrus,ep9301-adc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + adc: adc@80900000 { + compatible = "cirrus,ep9301-adc"; + reg = <0x80900000 0x28>; + clocks = <&syscon 24>; + interrupt-parent = <&vic1>; + interrupts = <30>; + }; +... diff --git a/dts/Bindings/iio/adc/cosmic,10001-adc.yaml b/dts/Bindings/iio/adc/cosmic,10001-adc.yaml new file mode 100644 index 0000000000..4e695b97d0 --- /dev/null +++ b/dts/Bindings/iio/adc/cosmic,10001-adc.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cosmic Circuits CC-10001 ADC + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: + Cosmic Circuits 10001 10-bit ADC device. + +properties: + compatible: + const: cosmic,10001-adc + + reg: + maxItems: 1 + + adc-reserved-channels: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Bitmask of reserved channels, i.e. channels that cannot be + used by the OS. + + clocks: + maxItems: 1 + + clock-names: + const: adc + + vref-supply: true + + "#io-channel-cells": + const: 1 + + +required: + - compatible + - reg + - clocks + - clock-names + - vref-supply + +additionalProperties: false + +examples: + - | + adc@18101600 { + compatible = "cosmic,10001-adc"; + reg = <0x18101600 0x24>; + adc-reserved-channels = <0x2>; + clocks = <&adc_clk>; + clock-names = "adc"; + vref-supply = <®_1v8>; + }; +... diff --git a/dts/Bindings/iio/adc/cpcap-adc.txt b/dts/Bindings/iio/adc/cpcap-adc.txt deleted file mode 100644 index ec04008e8f..0000000000 --- a/dts/Bindings/iio/adc/cpcap-adc.txt +++ /dev/null @@ -1,17 +0,0 @@ -Motorola CPCAP PMIC ADC binding - -Required properties: -- compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc" -- interrupts: The interrupt number for the ADC device -- interrupt-names: Should be "adcdone" -- #io-channel-cells: Number of cells in an IIO specifier - -Example: - -cpcap_adc: adc { - compatible = "motorola,mapphone-cpcap-adc"; - interrupt-parent = <&cpcap>; - interrupts = <8 IRQ_TYPE_NONE>; - interrupt-names = "adcdone"; - #io-channel-cells = <1>; -}; diff --git a/dts/Bindings/iio/adc/da9150-gpadc.txt b/dts/Bindings/iio/adc/da9150-gpadc.txt deleted file mode 100644 index c07228da92..0000000000 --- a/dts/Bindings/iio/adc/da9150-gpadc.txt +++ /dev/null @@ -1,16 +0,0 @@ -Dialog Semiconductor DA9150 IIO GPADC bindings - -Required properties: -- compatible: "dlg,da9150-gpadc" for DA9150 IIO GPADC -- #io-channel-cells: Should be set to <1> - (See Documentation/devicetree/bindings/iio/iio-bindings.txt for further info) - -For further information on GPADC channels, see device datasheet. - - -Example: - - gpadc: da9150-gpadc { - compatible = "dlg,da9150-gpadc"; - #io-channel-cells = <1>; - }; diff --git a/dts/Bindings/iio/adc/dlg,da9150-gpadc.yaml b/dts/Bindings/iio/adc/dlg,da9150-gpadc.yaml new file mode 100644 index 0000000000..cc29a2f211 --- /dev/null +++ b/dts/Bindings/iio/adc/dlg,da9150-gpadc.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/dlg,da9150-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Dialog Semiconductor DA9150 IIO GPADC + +maintainers: + - Adam Thomson <Adam.Thomson.Opensource@diasemi.com> + +description: + This patch adds support for general purpose ADC within the + DA9150 Charger & Fuel-Gauge IC. + +properties: + compatible: + const: dlg,da9150-gpadc + + "#io-channel-cells": + const: 1 + +required: + - compatible + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + adc { + compatible = "dlg,da9150-gpadc"; + #io-channel-cells = <1>; + }; +... diff --git a/dts/Bindings/iio/adc/envelope-detector.txt b/dts/Bindings/iio/adc/envelope-detector.txt deleted file mode 100644 index 27544bdd44..0000000000 --- a/dts/Bindings/iio/adc/envelope-detector.txt +++ /dev/null @@ -1,54 +0,0 @@ -Bindings for ADC envelope detector using a DAC and a comparator - -The DAC is used to find the peak level of an alternating voltage input -signal by a binary search using the output of a comparator wired to -an interrupt pin. Like so: - _ - | \ - input +------>-------|+ \ - | \ - .-------. | }---. - | | | / | - | dac|-->--|- / | - | | |_/ | - | | | - | | | - | irq|------<-------' - | | - '-------' - -Required properties: -- compatible: Should be "axentia,tse850-envelope-detector" -- io-channels: Channel node of the dac to be used for comparator input. -- io-channel-names: Should be "dac". -- interrupt specification for one client interrupt, - see ../../interrupt-controller/interrupts.txt for details. -- interrupt-names: Should be "comp". - -Example: - - &i2c { - dpot: mcp4651-104@28 { - compatible = "microchip,mcp4651-104"; - reg = <0x28>; - #io-channel-cells = <1>; - }; - }; - - dac: dac { - compatible = "dpot-dac"; - vref-supply = <®_3v3>; - io-channels = <&dpot 0>; - io-channel-names = "dpot"; - #io-channel-cells = <1>; - }; - - envelope-detector { - compatible = "axentia,tse850-envelope-detector"; - io-channels = <&dac 0>; - io-channel-names = "dac"; - - interrupt-parent = <&gpio>; - interrupts = <3 IRQ_TYPE_EDGE_FALLING>; - interrupt-names = "comp"; - }; diff --git a/dts/Bindings/iio/adc/envelope-detector.yaml b/dts/Bindings/iio/adc/envelope-detector.yaml new file mode 100644 index 0000000000..296d5459b4 --- /dev/null +++ b/dts/Bindings/iio/adc/envelope-detector.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/envelope-detector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC envelope detector using a DAC and a comparator + +maintainers: + - Peter Rosin <peda@axentia.se> + +description: | + The DAC is used to find the peak level of an alternating voltage input + signal by a binary search using the output of a comparator wired to + an interrupt pin. Like so: + _ + | \ + input +------>-------|+ \ + | \ + .-------. | }---. + | | | / | + | dac|-->--|- / | + | | |_/ | + | | | + | | | + | irq|------<-------' + | | + '-------' + +properties: + compatible: + const: axentia,tse850-envelope-detector + + io-channels: + maxItems: 1 + description: Channel node of the dac to be used for comparator input. + + io-channel-names: + const: dac + + interrupts: + maxItems: 1 + + interrupt-names: + const: comp + +required: + - compatible + - io-channels + - io-channel-names + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + dpot: dpot@28 { + compatible = "microchip,mcp4651-104"; + reg = <0x28>; + #io-channel-cells = <1>; + }; + }; + + dac: dac { + compatible = "dpot-dac"; + vref-supply = <®_3v3>; + io-channels = <&dpot 0>; + io-channel-names = "dpot"; + #io-channel-cells = <1>; + }; + + envelope-detector { + compatible = "axentia,tse850-envelope-detector"; + io-channels = <&dac 0>; + io-channel-names = "dac"; + + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "comp"; + }; +... diff --git a/dts/Bindings/iio/adc/fsl,imx25-gcq.txt b/dts/Bindings/iio/adc/fsl,imx25-gcq.txt deleted file mode 100644 index eebdcec3da..0000000000 --- a/dts/Bindings/iio/adc/fsl,imx25-gcq.txt +++ /dev/null @@ -1,57 +0,0 @@ -Freescale i.MX25 ADC GCQ device - -This is a generic conversion queue device that can convert any of the -analog inputs using the ADC unit of the i.MX25. - -Required properties: - - compatible: Should be "fsl,imx25-gcq". - - reg: Should be the register range of the module. - - interrupts: Should be the interrupt number of the module. - Typically this is <1>. - - #address-cells: Should be <1> (setting for the subnodes) - - #size-cells: Should be <0> (setting for the subnodes) - -Optional properties: - - vref-ext-supply: The regulator supplying the ADC reference voltage. - Required when at least one subnode uses the this reference. - - vref-xp-supply: The regulator supplying the ADC reference voltage on pin XP. - Required when at least one subnode uses this reference. - - vref-yp-supply: The regulator supplying the ADC reference voltage on pin YP. - Required when at least one subnode uses this reference. - -Sub-nodes: -Optionally you can define subnodes which define the reference voltage -for the analog inputs. - -Required properties for subnodes: - - reg: Should be the number of the analog input. - 0: xp - 1: yp - 2: xn - 3: yn - 4: wiper - 5: inaux0 - 6: inaux1 - 7: inaux2 -Optional properties for subnodes: - - fsl,adc-refp: specifies the positive reference input as defined in - <dt-bindings/iio/adc/fsl-imx25-gcq.h> - - fsl,adc-refn: specifies the negative reference input as defined in - <dt-bindings/iio/adc/fsl-imx25-gcq.h> - -Example: - - adc: adc@50030800 { - compatible = "fsl,imx25-gcq"; - reg = <0x50030800 0x60>; - interrupt-parent = <&tscadc>; - interrupts = <1>; - #address-cells = <1>; - #size-cells = <0>; - - inaux@5 { - reg = <5>; - fsl,adc-refp = <MX25_ADC_REFP_INT>; - fsl,adc-refn = <MX25_ADC_REFN_NGND>; - }; - }; diff --git a/dts/Bindings/iio/adc/fsl,imx25-gcq.yaml b/dts/Bindings/iio/adc/fsl,imx25-gcq.yaml new file mode 100644 index 0000000000..e9103497e3 --- /dev/null +++ b/dts/Bindings/iio/adc/fsl,imx25-gcq.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,imx25-gcq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale ADC GCQ device + +description: + This is a generic conversion queue device that can convert any of the + analog inputs using the ADC unit of the i.MX25. + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +properties: + compatible: + const: fsl,imx25-gcq + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-ext-supply: + description: + The regulator supplying the ADC reference voltage. + Required when at least one subnode uses the this reference. + + vref-xp-supply: + description: + The regulator supplying the ADC reference voltage on pin XP. + Required when at least one subnode uses this reference. + + vref-yp-supply: + description: + The regulator supplying the ADC reference voltage on pin YP. + Required when at least one subnode uses this reference. + + "#io-channel-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - "#address-cells" + - "#size-cells" + +patternProperties: + "[a-z][a-z0-9]+@[0-9a-f]+$": + type: object + description: + Child nodes used to define the reference voltages used for each channel + + properties: + reg: + description: | + Number of the analog input. + 0: xp + 1: yp + 2: xn + 3: yn + 4: wiper + 5: inaux0 + 6: inaux1 + 7: inaux2 + items: + - minimum: 0 + maximum: 7 + + fsl,adc-refp: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Specifies the positive reference input as defined in + <dt-bindings/iio/adc/fsl-imx25-gcq.h> + 0: YP voltage reference + 1: XP voltage reference + 2: External voltage reference + 3: Internal voltage reference (default) + minimum: 0 + maximum: 3 + + fsl,adc-refn: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Specifies the negative reference input as defined in + <dt-bindings/iio/adc/fsl-imx25-gcq.h> + 0: XN ground reference + 1: YN ground reference + 2: Internal ground reference + 3: External ground reference (default) + minimum: 0 + maximum: 3 + + required: + - reg + + additionalProperties: false + +additionalProperties: false + +examples: + - | + #include <dt-bindings/iio/adc/fsl-imx25-gcq.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@50030800 { + compatible = "fsl,imx25-gcq"; + reg = <0x50030800 0x60>; + interrupt-parent = <&tscadc>; + interrupts = <1>; + #address-cells = <1>; + #size-cells = <0>; + + inaux@5 { + reg = <5>; + fsl,adc-refp = <MX25_ADC_REFP_INT>; + fsl,adc-refn = <MX25_ADC_REFN_NGND>; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/fsl,imx7d-adc.yaml b/dts/Bindings/iio/adc/fsl,imx7d-adc.yaml new file mode 100644 index 0000000000..afc5cc48a0 --- /dev/null +++ b/dts/Bindings/iio/adc/fsl,imx7d-adc.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale ADC found on the imx7d SoC + +maintainers: + - Haibo Chen <haibo.chen@nxp.com> + +properties: + compatible: + const: fsl,imx7d-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: adc + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/imx7d-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@30610000 { + compatible = "fsl,imx7d-adc"; + reg = <0x30610000 0x10000>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX7D_ADC_ROOT_CLK>; + clock-names = "adc"; + vref-supply = <®_vcc_3v3_mcu>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/fsl,vf610-adc.yaml b/dts/Bindings/iio/adc/fsl,vf610-adc.yaml new file mode 100644 index 0000000000..c770ff4998 --- /dev/null +++ b/dts/Bindings/iio/adc/fsl,vf610-adc.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC found on Freescale vf610 and similar SoCs + +maintainers: + - Haibo Chen <haibo.chen@nxp.com> + +description: + ADCs found on vf610/i.MX6slx and upward SoCs from Freescale. + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx6sx-adc + - fsl,imx6ul-adc + - const: fsl,vf610-adc + - items: + - const: fsl,vf610-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: ADC source clock (ipg clock) + maxItems: 1 + + clock-names: + const: adc + + vref-supply: + description: ADC reference voltage supply. + + fsl,adck-max-frequency: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 3 + maxItems: 3 + description: | + Maximum frequencies from datasheet operating requirements. + Three values necessary to cover the 3 conversion modes. + * Frequency in normal mode (ADLPC=0, ADHSC=0) + * Frequency in high-speed mode (ADLPC=0, ADHSC=1) + * Frequency in low-power mode (ADLPC=1, ADHSC=0) + + min-sample-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Minimum sampling time in nanoseconds. This value has + to be chosen according to the conversion mode and the connected analog + source resistance (R_as) and capacitance (C_as). Refer the datasheet's + operating requirements. A safe default across a wide range of R_as and + C_as as well as conversion modes is 1000ns. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/vf610-clock.h> + adc@4003b000 { + compatible = "fsl,vf610-adc"; + reg = <0x4003b000 0x1000>; + interrupts = <0 53 0x04>; + clocks = <&clks VF610_CLK_ADC0>; + clock-names = "adc"; + fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>; + vref-supply = <®_vcc_3v3_mcu>; + min-sample-time = <10000>; + }; +... diff --git a/dts/Bindings/iio/adc/hi8435.txt b/dts/Bindings/iio/adc/hi8435.txt deleted file mode 100644 index 3b0348c5e5..0000000000 --- a/dts/Bindings/iio/adc/hi8435.txt +++ /dev/null @@ -1,21 +0,0 @@ -Holt Integrated Circuits HI-8435 threshold detector bindings - -Required properties: - - compatible: should be "holt,hi8435" - - reg: spi chip select number for the device - -Recommended properties: - - spi-max-frequency: definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: - - gpios: GPIO used for controlling the reset pin - -Example: -sensor@0 { - compatible = "holt,hi8435"; - reg = <0>; - gpios = <&gpio6 1 0>; - - spi-max-frequency = <1000000>; -}; diff --git a/dts/Bindings/iio/adc/holt,hi8435.yaml b/dts/Bindings/iio/adc/holt,hi8435.yaml new file mode 100644 index 0000000000..56bcbe5dcd --- /dev/null +++ b/dts/Bindings/iio/adc/holt,hi8435.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/holt,hi8435.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Holt Integrated Circuits HI-8435 SPI threshold detector + +maintainers: + - Vladimir Barinov <vladimir.barinov@cogentembedded.com> + +description: | + Datasheet: http://www.holtic.com/documents/427-hi-8435_v-rev-lpdf.do + +properties: + compatible: + const: holt,hi8435 + + reg: + maxItems: 1 + + gpios: + description: + GPIO used for controlling the reset pin + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + threshold-detector@0 { + compatible = "holt,hi8435"; + reg = <0>; + gpios = <&gpio6 1 0>; + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/imx7d-adc.txt b/dts/Bindings/iio/adc/imx7d-adc.txt deleted file mode 100644 index f1f3a55245..0000000000 --- a/dts/Bindings/iio/adc/imx7d-adc.txt +++ /dev/null @@ -1,24 +0,0 @@ -Freescale imx7d ADC bindings - -The devicetree bindings are for the ADC driver written for -imx7d SoC. - -Required properties: -- compatible: Should be "fsl,imx7d-adc" -- reg: Offset and length of the register set for the ADC device -- interrupts: The interrupt number for the ADC device -- clocks: The root clock of the ADC controller -- clock-names: Must contain "adc", matching entry in the clocks property -- vref-supply: The regulator supply ADC reference voltage -- #io-channel-cells: Must be 1 as per ../iio-bindings.txt - -Example: -adc1: adc@30610000 { - compatible = "fsl,imx7d-adc"; - reg = <0x30610000 0x10000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7D_ADC_ROOT_CLK>; - clock-names = "adc"; - vref-supply = <®_vcc_3v3_mcu>; - #io-channel-cells = <1>; -}; diff --git a/dts/Bindings/iio/adc/ingenic,adc.txt b/dts/Bindings/iio/adc/ingenic,adc.txt deleted file mode 100644 index cd9048cf9d..0000000000 --- a/dts/Bindings/iio/adc/ingenic,adc.txt +++ /dev/null @@ -1,49 +0,0 @@ -* Ingenic JZ47xx ADC controller IIO bindings - -Required properties: - -- compatible: Should be one of: - * ingenic,jz4725b-adc - * ingenic,jz4740-adc - * ingenic,jz4770-adc -- reg: ADC controller registers location and length. -- clocks: phandle to the SoC's ADC clock. -- clock-names: Must be set to "adc". -- #io-channel-cells: Must be set to <1> to indicate channels are selected - by index. - -ADC clients must use the format described in iio-bindings.txt, giving -a phandle and IIO specifier pair ("io-channels") to the ADC controller. - -Example: - -#include <dt-bindings/iio/adc/ingenic,adc.h> - -adc: adc@10070000 { - compatible = "ingenic,jz4740-adc"; - #io-channel-cells = <1>; - - reg = <0x10070000 0x30>; - - clocks = <&cgu JZ4740_CLK_ADC>; - clock-names = "adc"; - - interrupt-parent = <&intc>; - interrupts = <18>; -}; - -adc-keys { - ... - compatible = "adc-keys"; - io-channels = <&adc INGENIC_ADC_AUX>; - io-channel-names = "buttons"; - ... -}; - -battery { - ... - compatible = "ingenic,jz4740-battery"; - io-channels = <&adc INGENIC_ADC_BATTERY>; - io-channel-names = "battery"; - ... -}; diff --git a/dts/Bindings/iio/adc/ingenic,adc.yaml b/dts/Bindings/iio/adc/ingenic,adc.yaml new file mode 100644 index 0000000000..9cd0fd5397 --- /dev/null +++ b/dts/Bindings/iio/adc/ingenic,adc.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019-2020 Artur Rojek +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic JZ47xx ADC controller IIO + +maintainers: + - Artur Rojek <contact@artur-rojek.eu> + +description: > + Industrial I/O subsystem bindings for ADC controller found in + Ingenic JZ47xx SoCs. + + ADC clients must use the format described in + https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml, + giving a phandle and IIO specifier pair ("io-channels") to the ADC controller. + +properties: + compatible: + enum: + - ingenic,jz4725b-adc + - ingenic,jz4740-adc + - ingenic,jz4760-adc + - ingenic,jz4760b-adc + - ingenic,jz4770-adc + + '#io-channel-cells': + const: 1 + description: + Must be set to <1> to indicate channels are selected by index. + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: adc + + interrupts: + maxItems: 1 + + ingenic,use-internal-divider: + description: + If present, battery voltage is read from the VBAT_IR pin, which has an + internal 1/4 divider. If absent, it is read through the VBAT_ER pin, + which does not have such a divider. + type: boolean + +if: + not: + properties: + compatible: + contains: + const: ingenic,jz4760b-adc +then: + properties: + ingenic,use-internal-divider: false + +required: + - compatible + - '#io-channel-cells' + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/ingenic,jz4740-cgu.h> + #include <dt-bindings/iio/adc/ingenic,adc.h> + + adc@10070000 { + compatible = "ingenic,jz4740-adc"; + #io-channel-cells = <1>; + + reg = <0x10070000 0x30>; + + clocks = <&cgu JZ4740_CLK_ADC>; + clock-names = "adc"; + + interrupt-parent = <&intc>; + interrupts = <18>; + }; diff --git a/dts/Bindings/iio/adc/lltc,ltc2496.yaml b/dts/Bindings/iio/adc/lltc,ltc2496.yaml index 6a991e9f78..5207c919ab 100644 --- a/dts/Bindings/iio/adc/lltc,ltc2496.yaml +++ b/dts/Bindings/iio/adc/lltc,ltc2496.yaml @@ -17,21 +17,20 @@ properties: - lltc,ltc2496 vref-supply: - description: phandle to an external regulator providing the reference voltage - $ref: /schemas/types.yaml#/definitions/phandle + description: Power supply for the reference voltage reg: - description: spi chipselect number according to the usual spi bindings - - spi-max-frequency: - description: maximal spi bus frequency supported + maxItems: 1 required: - compatible - vref-supply - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/dts/Bindings/iio/adc/lltc,ltc2497.yaml b/dts/Bindings/iio/adc/lltc,ltc2497.yaml new file mode 100644 index 0000000000..5cc6a96840 --- /dev/null +++ b/dts/Bindings/iio/adc/lltc,ltc2497.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/lltc,ltc2497.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Linear Technology / Analog Devices LTC2497 and LTC2309 ADC + +maintainers: + - Michael Hennerich <michael.hennerich@analog.com> + - Liam Beguin <liambeguin@gmail.com> + +description: | + LTC2309: + low noise, low power, 8-channel, 12-bit successive approximation ADC with an + I2C compatible serial interface. + + https://www.analog.com/media/en/technical-documentation/data-sheets/2309fd.pdf + + LTC2497: + LTC2499: + 16bit ADC supporting up to 16 single ended or 8 differential inputs. + I2C interface. + + https://www.analog.com/media/en/technical-documentation/data-sheets/2497fb.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/2499fe.pdf + +properties: + compatible: + enum: + - lltc,ltc2309 + - lltc,ltc2497 + - lltc,ltc2499 + + reg: true + vref-supply: true + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@76 { + compatible = "lltc,ltc2497"; + reg = <0x76>; + vref-supply = <<c2497_reg>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/lpc1850-adc.txt b/dts/Bindings/iio/adc/lpc1850-adc.txt deleted file mode 100644 index 9ada5abd45..0000000000 --- a/dts/Bindings/iio/adc/lpc1850-adc.txt +++ /dev/null @@ -1,20 +0,0 @@ -NXP LPC1850 ADC bindings - -Required properties: -- compatible: Should be "nxp,lpc1850-adc" -- reg: Offset and length of the register set for the ADC device -- interrupts: The interrupt number for the ADC device -- clocks: The root clock of the ADC controller -- vref-supply: The regulator supply ADC reference voltage -- resets: phandle to reset controller and line specifier - -Example: - -adc0: adc@400e3000 { - compatible = "nxp,lpc1850-adc"; - reg = <0x400e3000 0x1000>; - interrupts = <17>; - clocks = <&ccu1 CLK_APB3_ADC0>; - vref-supply = <®_vdda>; - resets = <&rgu 40>; -}; diff --git a/dts/Bindings/iio/adc/lpc32xx-adc.txt b/dts/Bindings/iio/adc/lpc32xx-adc.txt deleted file mode 100644 index 3a1bc669bd..0000000000 --- a/dts/Bindings/iio/adc/lpc32xx-adc.txt +++ /dev/null @@ -1,21 +0,0 @@ -* NXP LPC32xx SoC ADC controller - -Required properties: -- compatible: must be "nxp,lpc3220-adc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The ADC interrupt - -Optional: - - vref-supply: The regulator supply ADC reference voltage, optional - for legacy reason, but highly encouraging to us in new device tree - -Example: - - adc@40048000 { - compatible = "nxp,lpc3220-adc"; - reg = <0x40048000 0x1000>; - interrupt-parent = <&mic>; - interrupts = <39 0>; - vref-supply = <&vcc>; - }; diff --git a/dts/Bindings/iio/adc/ltc2497.txt b/dts/Bindings/iio/adc/ltc2497.txt deleted file mode 100644 index a237ed99c0..0000000000 --- a/dts/Bindings/iio/adc/ltc2497.txt +++ /dev/null @@ -1,13 +0,0 @@ -* Linear Technology / Analog Devices LTC2497 ADC - -Required properties: - - compatible: Must be "lltc,ltc2497" - - reg: Must contain the ADC I2C address - - vref-supply: The regulator supply for ADC reference voltage - -Example: - ltc2497: adc@76 { - compatible = "lltc,ltc2497"; - reg = <0x76>; - vref-supply = <<c2497_reg>; - }; diff --git a/dts/Bindings/iio/adc/marvell,berlin2-adc.yaml b/dts/Bindings/iio/adc/marvell,berlin2-adc.yaml new file mode 100644 index 0000000000..b3b292fb1c --- /dev/null +++ b/dts/Bindings/iio/adc/marvell,berlin2-adc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/marvell,berlin2-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Berlin 2 Analog to Digital Converter (ADC) + +maintainers: + - Antoine Tenart <antoine.tenart@free-electrons.com> + +description: + The Berlin ADC has 8 channels, with one connected to a temperature sensor. + It is part of the system controller register set. The ADC node should be a + sub-node of the system controller node. + +properties: + compatible: + const: marvell,berlin2-adc + + interrupts: + minItems: 2 + maxItems: 2 + + interrupt-names: + items: + - const: adc + - const: tsen + + "#io-channel-cells": + const: 1 + +required: + - compatible + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + sysctrl { + adc { + compatible = "marvell,berlin2-adc"; + interrupt-parent = <&sic>; + interrupts = <12>, <14>; + interrupt-names = "adc", "tsen"; + }; + }; +... diff --git a/dts/Bindings/iio/adc/max11100.txt b/dts/Bindings/iio/adc/max11100.txt deleted file mode 100644 index b7f7177b8a..0000000000 --- a/dts/Bindings/iio/adc/max11100.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Maxim max11100 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "maxim,max11100" - - reg: the adc unit address - - vref-supply: phandle to the regulator that provides reference voltage - -Optional properties: - - spi-max-frequency: SPI maximum frequency - -Example: - -max11100: adc@0 { - compatible = "maxim,max11100"; - reg = <0>; - vref-supply = <&adc0_vref>; - spi-max-frequency = <240000>; -}; diff --git a/dts/Bindings/iio/adc/max1118.txt b/dts/Bindings/iio/adc/max1118.txt deleted file mode 100644 index cf33d0b15a..0000000000 --- a/dts/Bindings/iio/adc/max1118.txt +++ /dev/null @@ -1,21 +0,0 @@ -* MAX1117/MAX1118/MAX1119 8-bit, dual-channel ADCs - -Required properties: - - compatible: Should be one of - * "maxim,max1117" - * "maxim,max1118" - * "maxim,max1119" - - reg: spi chip select number for the device - - (max1118 only) vref-supply: The regulator supply for ADC reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "maxim,max1118"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <1000000>; -}; diff --git a/dts/Bindings/iio/adc/max9611.txt b/dts/Bindings/iio/adc/max9611.txt deleted file mode 100644 index ab4f43145a..0000000000 --- a/dts/Bindings/iio/adc/max9611.txt +++ /dev/null @@ -1,27 +0,0 @@ -* Maxim max9611/max9612 current sense amplifier with 12-bits ADC interface - -Maxim max9611/max9612 is an high-side current sense amplifier with integrated -12-bits ADC communicating over I2c bus. -The device node for this driver shall be a child of a I2c controller. - -Required properties - - compatible: Should be "maxim,max9611" or "maxim,max9612" - - reg: The 7-bits long I2c address of the device - - shunt-resistor-micro-ohms: Value, in micro Ohms, of the current sense shunt - resistor - -Example: - -&i2c4 { - csa: adc@7c { - compatible = "maxim,max9611"; - reg = <0x7c>; - - shunt-resistor-micro-ohms = <5000>; - }; -}; - -This device node describes a current sense amplifier sitting on I2c4 bus -with address 0x7c (read address is 0xf9, write address is 0xf8). -A sense resistor of 0,005 Ohm is installed between RS+ and RS- current-sensing -inputs. diff --git a/dts/Bindings/iio/adc/maxim,max1027.yaml b/dts/Bindings/iio/adc/maxim,max1027.yaml new file mode 100644 index 0000000000..e4b3621135 --- /dev/null +++ b/dts/Bindings/iio/adc/maxim,max1027.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max1027.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX1027 and similar ADCs + +maintainers: + - Miquel Raynal <miquel.raynal@bootlin.com> + - Philippe Reynes <tremyfr@yahoo.fr> + +description: | + 300ks/s SPI ADCs with temperature sensors. + +properties: + compatible: + enum: + # 10-bit 8 channels + - maxim,max1027 + # 10-bit 12 channels + - maxim,max1029 + # 10-bit 16 channels + - maxim,max1031 + # 12-bit 8 channels + - maxim,max1227 + # 12-bit 12 channels + - maxim,max1229 + # 12-bit 16 channels + - maxim,max1231 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + spi-max-frequency: + maximum: 10000000 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + maxadc: adc@0 { + compatible = "maxim,max1027"; + reg = <0>; + #io-channel-cells = <1>; + interrupt-parent = <&gpio5>; + interrupts = <15 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/maxim,max11100.yaml b/dts/Bindings/iio/adc/maxim,max11100.yaml new file mode 100644 index 0000000000..4f74cb3338 --- /dev/null +++ b/dts/Bindings/iio/adc/maxim,max11100.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max11100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX11100 ADC + +maintainers: + - Jacopo Mondi <jacopo@jmondi.org> + +description: | + Single channel 16 bit ADC with SPI interface. + +properties: + compatible: + const: maxim,max11100 + + reg: + maxItems: 1 + + vref-supply: + description: External reference, needed to establish input scaling. + + spi-max-frequency: + minimum: 100000 + maximum: 4800000 + +required: + - compatible + - reg + - vref-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "maxim,max11100"; + reg = <0>; + vref-supply = <&adc_vref>; + spi-max-frequency = <240000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/maxim,max1118.yaml b/dts/Bindings/iio/adc/maxim,max1118.yaml new file mode 100644 index 0000000000..bb336e33eb --- /dev/null +++ b/dts/Bindings/iio/adc/maxim,max1118.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max1118.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX1118 and similar ADCs + +maintainers: + - Akinobu Mita <akinobu.mita@gmail.com> + +description: | + Dual channel 8bit ADCs. + +properties: + compatible: + enum: + - maxim,max1117 + - maxim,max1118 + - maxim,max1119 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 5000000 + + vref-supply: + description: External reference, needed to establish input scaling + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + - if: + properties: + compatible: + contains: + const: maxim,max1118 + then: + required: + - vref-supply + else: + properties: + vref-supply: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "maxim,max1118"; + reg = <0>; + vref-supply = <&adc_vref>; + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/maxim,max11205.yaml b/dts/Bindings/iio/adc/maxim,max11205.yaml new file mode 100644 index 0000000000..5f9e043cf5 --- /dev/null +++ b/dts/Bindings/iio/adc/maxim,max11205.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max11205.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX11205 ADC + +maintainers: + - Ramona Bolboaca <ramona.bolboaca@analog.com> + +description: | + The MAX11205 is an ultra-low-power (< 300FA max active current), + high-resolution, serial-output ADC. + + https://datasheets.maximintegrated.com/en/ds/MAX11205.pdf + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - maxim,max11205a + - maxim,max11205b + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + spi-max-frequency: + maximum: 5000000 + + spi-cpha: true + + vref-supply: + description: + The regulator supply for the ADC reference voltage. This is a differential + reference. It is equal to the V_REFP - V_REFN. The maximum value is 3.6V. + +required: + - compatible + - reg + - interrupts + - spi-max-frequency + - spi-cpha + - vref-supply + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + adc@0 { + compatible = "maxim,max11205a"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpha; + interrupt-parent = <&gpio>; + interrupts = <19 IRQ_TYPE_EDGE_FALLING>; + vref-supply = <&max11205_vref>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/maxim,max1238.yaml b/dts/Bindings/iio/adc/maxim,max1238.yaml index a0ebb46801..60d7b34e32 100644 --- a/dts/Bindings/iio/adc/maxim,max1238.yaml +++ b/dts/Bindings/iio/adc/maxim,max1238.yaml @@ -10,7 +10,7 @@ maintainers: - Jonathan Cameron <jic23@kernel.org> description: | - Family of simple ADCs with i2c inteface and internal references. + Family of simple ADCs with i2c interface and internal references. properties: compatible: @@ -62,6 +62,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/dts/Bindings/iio/adc/maxim,max1241.yaml b/dts/Bindings/iio/adc/maxim,max1241.yaml index f562505f5e..ef8d51e74c 100644 --- a/dts/Bindings/iio/adc/maxim,max1241.yaml +++ b/dts/Bindings/iio/adc/maxim,max1241.yaml @@ -45,12 +45,17 @@ required: - vdd-supply - vref-supply +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> spi { - #address-cells = <1>; - #size-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; adc@0 { compatible = "maxim,max1241"; diff --git a/dts/Bindings/iio/adc/maxim,max1363.yaml b/dts/Bindings/iio/adc/maxim,max1363.yaml index 48377549c3..96f3f535fe 100644 --- a/dts/Bindings/iio/adc/maxim,max1363.yaml +++ b/dts/Bindings/iio/adc/maxim,max1363.yaml @@ -10,7 +10,7 @@ maintainers: - Jonathan Cameron <jic23@kernel.org> description: | - Family of ADCs with i2c inteface, internal references and threshold + Family of ADCs with i2c interface, internal references and threshold monitoring. properties: @@ -36,6 +36,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/dts/Bindings/iio/adc/maxim,max34408.yaml b/dts/Bindings/iio/adc/maxim,max34408.yaml new file mode 100644 index 0000000000..4cba856e8d --- /dev/null +++ b/dts/Bindings/iio/adc/maxim,max34408.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max34408.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX34408/MAX34409 current monitors with overcurrent control + +maintainers: + - Ivan Mikhaylov <fr0st61te@gmail.com> + +description: | + The MAX34408/MAX34409 are two- and four-channel current monitors that are + configured and monitored with a standard I2C/SMBus serial interface. Each + unidirectional current sensor offers precision high-side operation with a + low full-scale sense voltage. The devices automatically sequence through + two or four channels and collect the current-sense samples and average them + to reduce the effect of impulse noise. The raw ADC samples are compared to + user-programmable digital thresholds to indicate overcurrent conditions. + Overcurrent conditions trigger a hardware output to provide an immediate + indication to shut down any necessary external circuitry. + + Specifications about the devices can be found at: + https://www.analog.com/media/en/technical-documentation/data-sheets/MAX34408-MAX34409.pdf + +properties: + compatible: + enum: + - maxim,max34408 + - maxim,max34409 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + powerdown-gpios: + description: + Shutdown Output. Open-drain output. This output transitions to high impedance + when any of the digital comparator thresholds are exceeded as long as the ENA + pin is high. + maxItems: 1 + + powerdown-status-gpios: + description: + SHTDN Enable Input. CMOS digital input. Connect to GND to clear the latch and + unconditionally deassert (force low) the SHTDN output and reset the shutdown + delay. Connect to VDD to enable normal latch operation of the SHTDN output. + maxItems: 1 + + vdd-supply: true + +patternProperties: + "^channel@[0-3]$": + $ref: adc.yaml + type: object + description: + Represents the internal channels of the ADC. + + properties: + reg: + items: + - minimum: 0 + maximum: 3 + + maxim,rsense-val-micro-ohms: + description: + Adjust the Rsense value to monitor higher or lower current levels for + input. + enum: [250, 500, 1000, 5000, 10000, 50000, 100000, 200000, 500000] + default: 1000 + + required: + - reg + - maxim,rsense-val-micro-ohms + + unevaluatedProperties: false + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: maxim,max34408 + then: + patternProperties: + "^channel@[2-3]$": false + "^channel@[0-1]$": + properties: + reg: + maximum: 1 + else: + patternProperties: + "^channel@[0-3]$": + properties: + reg: + maximum: 3 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@1e { + compatible = "maxim,max34409"; + reg = <0x1e>; + powerdown-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + powerdown-status-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0x0>; + maxim,rsense-val-micro-ohms = <5000>; + }; + + channel@1 { + reg = <0x1>; + maxim,rsense-val-micro-ohms = <10000>; + }; + }; + }; diff --git a/dts/Bindings/iio/adc/maxim,max9611.yaml b/dts/Bindings/iio/adc/maxim,max9611.yaml new file mode 100644 index 0000000000..95774a5562 --- /dev/null +++ b/dts/Bindings/iio/adc/maxim,max9611.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max9611.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX9611 and similar current sense amplifiers with integrated ADCs + +maintainers: + - Jacopo Mondi <jacopo@jmondi.org> + +description: | + These devices combine a high-side current sense amplifier with a 12 bit ADC. + They have an i2c interface. + +properties: + compatible: + enum: + - maxim,max9611 + - maxim,max9612 + + reg: + maxItems: 1 + + shunt-resistor-micro-ohms: + description: | + Value in micro Ohms of the shunt resistor connected between the RS+ and + RS- inputs, across which the current is measured. Value needed to compute + the scaling of the measured current. + +additionalProperties: false + +required: + - compatible + - reg + - shunt-resistor-micro-ohms + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@7c { + compatible = "maxim,max9611"; + reg = <0x7c>; + shunt-resistor-micro-ohms = <5000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/mcp320x.txt b/dts/Bindings/iio/adc/mcp320x.txt deleted file mode 100644 index 56373d643f..0000000000 --- a/dts/Bindings/iio/adc/mcp320x.txt +++ /dev/null @@ -1,57 +0,0 @@ -* Microchip Analog to Digital Converter (ADC) - -The node for this driver must be a child node of a SPI controller, hence -all mandatory properties described in - - Documentation/devicetree/bindings/spi/spi-bus.txt - -must be specified. - -Required properties: - - compatible: Must be one of the following, depending on the - model: - "mcp3001" (DEPRECATED) - "mcp3002" (DEPRECATED) - "mcp3004" (DEPRECATED) - "mcp3008" (DEPRECATED) - "mcp3201" (DEPRECATED) - "mcp3202" (DEPRECATED) - "mcp3204" (DEPRECATED) - "mcp3208" (DEPRECATED) - "mcp3301" (DEPRECATED) - - "microchip,mcp3001" - "microchip,mcp3002" - "microchip,mcp3004" - "microchip,mcp3008" - "microchip,mcp3201" - "microchip,mcp3202" - "microchip,mcp3204" - "microchip,mcp3208" - "microchip,mcp3301" - "microchip,mcp3550-50" - "microchip,mcp3550-60" - "microchip,mcp3551" - "microchip,mcp3553" - - NOTE: The use of the compatibles with no vendor prefix - is deprecated and only listed because old DT use them. - - - spi-cpha, spi-cpol (boolean): - Either SPI mode (0,0) or (1,1) must be used, so specify - none or both of spi-cpha, spi-cpol. The MCP3550/1/3 - is more efficient in mode (1,1) as only 3 instead of - 4 bytes need to be read from the ADC, but not all SPI - masters support it. - - - vref-supply: Phandle to the external reference voltage supply. - -Examples: -spi_controller { - mcp3x0x@0 { - compatible = "microchip,mcp3002"; - reg = <0>; - spi-max-frequency = <1000000>; - vref-supply = <&vref_reg>; - }; -}; diff --git a/dts/Bindings/iio/adc/mcp3422.txt b/dts/Bindings/iio/adc/mcp3422.txt deleted file mode 100644 index 82bcce0725..0000000000 --- a/dts/Bindings/iio/adc/mcp3422.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Microchip mcp3421/2/3/4/6/7/8 chip family (ADC) - -Required properties: - - compatible: Should be - "microchip,mcp3421" or - "microchip,mcp3422" or - "microchip,mcp3423" or - "microchip,mcp3424" or - "microchip,mcp3425" or - "microchip,mcp3426" or - "microchip,mcp3427" or - "microchip,mcp3428" - - reg: I2C address for the device - -Example: -adc@0 { - compatible = "microchip,mcp3424"; - reg = <0x68>; -}; diff --git a/dts/Bindings/iio/adc/mediatek,mt2701-auxadc.yaml b/dts/Bindings/iio/adc/mediatek,mt2701-auxadc.yaml new file mode 100644 index 0000000000..6168b44ea7 --- /dev/null +++ b/dts/Bindings/iio/adc/mediatek,mt2701-auxadc.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx) + +maintainers: + - Zhiyong Tao <zhiyong.tao@mediatek.com> + - Matthias Brugger <matthias.bgg@gmail.com> + +description: | + The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found + in some Mediatek SoCs which among other things measures the temperatures + in the SoC. It can be used directly with register accesses, but it is also + used by thermal controller which reads the temperatures from the AUXADC + directly via its own bus interface. See mediatek-thermal bindings + for the Thermal Controller which holds a phandle to the AUXADC. + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt2701-auxadc + - mediatek,mt2712-auxadc + - mediatek,mt6765-auxadc + - mediatek,mt7622-auxadc + - mediatek,mt7986-auxadc + - mediatek,mt8173-auxadc + - items: + - enum: + - mediatek,mt7623-auxadc + - const: mediatek,mt2701-auxadc + - items: + - enum: + - mediatek,mt8183-auxadc + - mediatek,mt8186-auxadc + - mediatek,mt8188-auxadc + - mediatek,mt8195-auxadc + - mediatek,mt8516-auxadc + - const: mediatek,mt8173-auxadc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: main + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - "#io-channel-cells" + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + adc@11001000 { + compatible = "mediatek,mt8183-auxadc", + "mediatek,mt8173-auxadc"; + reg = <0 0x11001000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_AUXADC>; + clock-names = "main"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/mediatek,mt6360-adc.yaml b/dts/Bindings/iio/adc/mediatek,mt6360-adc.yaml new file mode 100644 index 0000000000..db4e3613c1 --- /dev/null +++ b/dts/Bindings/iio/adc/mediatek,mt6360-adc.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/mediatek,mt6360-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT6360 and similar ADCs + +maintainers: + - Gene Chen <gene_chen@richtek.com> + +properties: + compatible: + const: mediatek,mt6360-adc + + "#io-channel-cells": + const: 1 + +required: + - compatible + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + adc { + compatible = "mediatek,mt6360-adc"; + #io-channel-cells = <1>; + }; +... diff --git a/dts/Bindings/iio/adc/microchip,mcp3201.yaml b/dts/Bindings/iio/adc/microchip,mcp3201.yaml new file mode 100644 index 0000000000..18108f0f37 --- /dev/null +++ b/dts/Bindings/iio/adc/microchip,mcp3201.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3201.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip mcp3201 and similar ADCs + +maintainers: + - Oskar Andero <oskar.andero@gmail.com> + +description: | + Family of simple ADCs with a SPI interface. + +properties: + compatible: + enum: + - microchip,mcp3001 + - microchip,mcp3002 + - microchip,mcp3004 + - microchip,mcp3008 + - microchip,mcp3201 + - microchip,mcp3202 + - microchip,mcp3204 + - microchip,mcp3208 + - microchip,mcp3301 + - microchip,mcp3550-50 + - microchip,mcp3550-60 + - microchip,mcp3551 + - microchip,mcp3553 + + reg: + maxItems: 1 + + spi-cpha: true + spi-cpol: true + + vref-supply: + description: External reference. + + "#io-channel-cells": + const: 1 + +dependencies: + spi-cpol: [ spi-cpha ] + spi-cpha: [ spi-cpol ] + +required: + - compatible + - reg + - vref-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "microchip,mcp3002"; + reg = <0>; + vref-supply = <&vref_reg>; + spi-cpha; + spi-cpol; + #io-channel-cells = <1>; + }; + adc@1 { + compatible = "microchip,mcp3002"; + reg = <1>; + vref-supply = <&vref_reg>; + spi-max-frequency = <1500000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/microchip,mcp3564.yaml b/dts/Bindings/iio/adc/microchip,mcp3564.yaml new file mode 100644 index 0000000000..6753192761 --- /dev/null +++ b/dts/Bindings/iio/adc/microchip,mcp3564.yaml @@ -0,0 +1,205 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3564.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MCP346X and MCP356X ADC Family + +maintainers: + - Marius Cristea <marius.cristea@microchip.com> + +description: | + Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit + Delta-Sigma ADCs with an SPI interface. Datasheet can be found here: + Datasheet for MCP3561, MCP3562, MCP3564 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181C.pdf + Datasheet for MCP3561R, MCP3562R, MCP3564R can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf + Datasheet for MCP3461, MCP3462, MCP3464 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-Sigma-ADC-Data-Sheet-20006180D.pdf + Datasheet for MCP3461R, MCP3462R, MCP3464R can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404C.pdf + +properties: + compatible: + enum: + - microchip,mcp3461 + - microchip,mcp3462 + - microchip,mcp3464 + - microchip,mcp3461r + - microchip,mcp3462r + - microchip,mcp3464r + - microchip,mcp3561 + - microchip,mcp3562 + - microchip,mcp3564 + - microchip,mcp3561r + - microchip,mcp3562r + - microchip,mcp3564r + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 20000000 + + spi-cpha: true + + spi-cpol: true + + vdd-supply: true + + avdd-supply: true + + clocks: + description: + Phandle and clock identifier for external sampling clock. + If not specified, the internal crystal oscillator will be used. + maxItems: 1 + + interrupts: + description: IRQ line of the ADC + maxItems: 1 + + drive-open-drain: + description: + Whether to drive the IRQ signal as push-pull (default) or open-drain. Note + that the device requires this pin to become "high", otherwise it will stop + converting. + type: boolean + + vref-supply: + description: + Some devices have a specific reference voltage supplied on a different + pin to the other supplies. Needed to be able to establish channel scaling + unless there is also an internal reference available (e.g. mcp3564r). In + case of "r" devices (e. g. mcp3564r), if it does not exists the internal + reference will be used. + + microchip,hw-device-address: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + description: + The address is set on a per-device basis by fuses in the factory, + configured on request. If not requested, the fuses are set for 0x1. + The device address is part of the device markings to avoid + potential confusion. This address is coded on two bits, so four possible + addresses are available when multiple devices are present on the same + SPI bus with only one Chip Select line for all devices. + Each device communication starts by a CS falling edge, followed by the + clocking of the device address (BITS[7:6] - top two bits of COMMAND BYTE + which is first one on the wire). + + "#io-channel-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^channel@([0-9]|([1-7][0-9]))$": + $ref: adc.yaml + type: object + unevaluatedProperties: false + description: Represents the external channels which are connected to the ADC. + + properties: + reg: + description: The channel number in single-ended and differential mode. + minimum: 0 + maximum: 79 + + required: + - reg + +dependencies: + spi-cpol: [ spi-cpha ] + spi-cpha: [ spi-cpol ] + +required: + - compatible + - reg + - microchip,hw-device-address + - spi-max-frequency + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + - # External vref, no internal reference + if: + properties: + compatible: + contains: + enum: + - microchip,mcp3461 + - microchip,mcp3462 + - microchip,mcp3464 + - microchip,mcp3561 + - microchip,mcp3562 + - microchip,mcp3564 + then: + required: + - vref-supply + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "microchip,mcp3564r"; + reg = <0>; + vref-supply = <&vref_reg>; + spi-cpha; + spi-cpol; + spi-max-frequency = <10000000>; + microchip,hw-device-address = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + /* CH0 to AGND */ + reg = <0>; + label = "CH0"; + }; + + channel@1 { + /* CH1 to AGND */ + reg = <1>; + label = "CH1"; + }; + + /* diff-channels */ + channel@11 { + reg = <11>; + + /* CN0, CN1 */ + diff-channels = <0 1>; + label = "CH0_CH1"; + }; + + channel@22 { + reg = <0x22>; + + /* CN1, CN2 */ + diff-channels = <1 2>; + label = "CH1_CH3"; + }; + + channel@23 { + reg = <0x23>; + + /* CN1, CN3 */ + diff-channels = <1 3>; + label = "CH1_CH3"; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/microchip,mcp3911.yaml b/dts/Bindings/iio/adc/microchip,mcp3911.yaml index 95ab285f4e..06951ec5f5 100644 --- a/dts/Bindings/iio/adc/microchip,mcp3911.yaml +++ b/dts/Bindings/iio/adc/microchip,mcp3911.yaml @@ -2,8 +2,8 @@ # Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com> %YAML 1.2 --- -$id: "http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip MCP3911 Dual channel analog front end (ADC) @@ -18,7 +18,13 @@ description: | properties: compatible: enum: + - microchip,mcp3910 - microchip,mcp3911 + - microchip,mcp3912 + - microchip,mcp3913 + - microchip,mcp3914 + - microchip,mcp3918 + - microchip,mcp3919 reg: maxItems: 1 @@ -36,6 +42,13 @@ properties: description: IRQ line of the ADC maxItems: 1 + microchip,data-ready-hiz: + description: + Data Ready Pin Inactive State Control + true = The DR pin state is high-impedance + false = The DR pin state is logic high + type: boolean + microchip,device-addr: description: Device address when multiple MCP3911 chips are present on the same SPI bus. $ref: /schemas/types.yaml#/definitions/uint32 @@ -51,7 +64,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/dts/Bindings/iio/adc/motorola,cpcap-adc.yaml b/dts/Bindings/iio/adc/motorola,cpcap-adc.yaml new file mode 100644 index 0000000000..9ceb6f18c8 --- /dev/null +++ b/dts/Bindings/iio/adc/motorola,cpcap-adc.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Motorola CPCAP PMIC ADC + +maintainers: + - Tony Lindgren <tony@atomide.com> + +description: + On Motorola phones like droid 4 there is a custom CPCAP PMIC. This PMIC + has ADCs that are used for battery charging and USB PHY VBUS and ID pin + detection. + +properties: + compatible: + enum: + - motorola,cpcap-adc + - motorola,mapphone-cpcap-adc + + interrupts: + maxItems: 1 + + interrupt-names: + const: adcdone + + "#io-channel-cells": + const: 1 + +required: + - compatible + - interrupts + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + pmic { + #address-cells = <1>; + #size-cells = <0>; + adc { + compatible = "motorola,mapphone-cpcap-adc"; + interrupt-parent = <&cpcap>; + interrupts = <8 IRQ_TYPE_NONE>; + interrupt-names = "adcdone"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/mt6577_auxadc.txt b/dts/Bindings/iio/adc/mt6577_auxadc.txt deleted file mode 100644 index 78c06e05c8..0000000000 --- a/dts/Bindings/iio/adc/mt6577_auxadc.txt +++ /dev/null @@ -1,33 +0,0 @@ -* Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc (mt65xx/mt81xx/mt27xx) -=============== - -The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found -in some Mediatek SoCs which among other things measures the temperatures -in the SoC. It can be used directly with register accesses, but it is also -used by thermal controller which reads the temperatures from the AUXADC -directly via its own bus interface. See -Documentation/devicetree/bindings/thermal/mediatek-thermal.txt -for the Thermal Controller which holds a phandle to the AUXADC. - -Required properties: - - compatible: Should be one of: - - "mediatek,mt2701-auxadc": For MT2701 family of SoCs - - "mediatek,mt2712-auxadc": For MT2712 family of SoCs - - "mediatek,mt6765-auxadc": For MT6765 family of SoCs - - "mediatek,mt7622-auxadc": For MT7622 family of SoCs - - "mediatek,mt8173-auxadc": For MT8173 family of SoCs - - "mediatek,mt8183-auxadc", "mediatek,mt8173-auxadc": For MT8183 family of SoCs - - reg: Address range of the AUXADC unit. - - clocks: Should contain a clock specifier for each entry in clock-names - - clock-names: Should contain "main". - - #io-channel-cells: Should be 1, see ../iio-bindings.txt - -Example: - -auxadc: adc@11001000 { - compatible = "mediatek,mt2701-auxadc"; - reg = <0 0x11001000 0 0x1000>; - clocks = <&pericfg CLK_PERI_AUXADC>; - clock-names = "main"; - #io-channel-cells = <1>; -}; diff --git a/dts/Bindings/iio/adc/nuvoton,nau7802.yaml b/dts/Bindings/iio/adc/nuvoton,nau7802.yaml new file mode 100644 index 0000000000..04566ff02e --- /dev/null +++ b/dts/Bindings/iio/adc/nuvoton,nau7802.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nuvoton,nau7802.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NAU7802 I2c Analog to Digital Converter (ADC) + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + - Maxime Ripard <mripard@kernel.org> + +properties: + compatible: + const: nuvoton,nau7802 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + nuvoton,vldo: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Internal reference voltage in millivolts to be configured. + minimum: 2400 + maximum: 4500 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + nau7802@2a { + compatible = "nuvoton,nau7802"; + reg = <0x2a>; + nuvoton,vldo = <3000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/nuvoton,npcm-adc.txt b/dts/Bindings/iio/adc/nuvoton,npcm-adc.txt deleted file mode 100644 index ef8eeec1a9..0000000000 --- a/dts/Bindings/iio/adc/nuvoton,npcm-adc.txt +++ /dev/null @@ -1,26 +0,0 @@ -Nuvoton NPCM Analog to Digital Converter (ADC) - -The NPCM ADC is a 10-bit converter for eight channel inputs. - -Required properties: -- compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC. -- reg: specifies physical base address and size of the registers. -- interrupts: Contain the ADC interrupt with flags for falling edge. -- resets : phandle to the reset control for this device. - -Optional properties: -- clocks: phandle of ADC reference clock, in case the clock is not - added the ADC will use the default ADC sample rate. -- vref-supply: The regulator supply ADC reference voltage, in case the - vref-supply is not added the ADC will use internal voltage - reference. - -Example: - -adc: adc@f000c000 { - compatible = "nuvoton,npcm750-adc"; - reg = <0xf000c000 0x8>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk NPCM7XX_CLK_ADC>; - resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>; -}; diff --git a/dts/Bindings/iio/adc/nuvoton,npcm750-adc.yaml b/dts/Bindings/iio/adc/nuvoton,npcm750-adc.yaml new file mode 100644 index 0000000000..fede2aa640 --- /dev/null +++ b/dts/Bindings/iio/adc/nuvoton,npcm750-adc.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM BMC Analog to Digital Converter (ADC) + +maintainers: + - Tomer Maimon <tmaimon77@gmail.com> + +description: + The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter, + both have eight channel inputs. + +properties: + compatible: + enum: + - nuvoton,npcm750-adc + - nuvoton,npcm845-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: ADC interrupt, should be set for falling edge. + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + description: If not provided the defulat ADC sample rate will be used. + + vref-supply: + description: If not supplied, the internal voltage reference will be used. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h> + #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@f000c000 { + compatible = "nuvoton,npcm750-adc"; + reg = <0xf000c000 0x8>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk NPCM7XX_CLK_ADC>; + resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/nuvoton-nau7802.txt b/dts/Bindings/iio/adc/nuvoton-nau7802.txt deleted file mode 100644 index e9582e6fe3..0000000000 --- a/dts/Bindings/iio/adc/nuvoton-nau7802.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Nuvoton NAU7802 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "nuvoton,nau7802" - - reg: Should contain the ADC I2C address - -Optional properties: - - nuvoton,vldo: Internal reference voltage in millivolts to be - configured valid values are between 2400 mV and 4500 mV. - - interrupts: IRQ line for the ADC. If not used the driver will use - polling. - -Example: -adc2: nau7802@2a { - compatible = "nuvoton,nau7802"; - reg = <0x2a>; - nuvoton,vldo = <3000>; -}; diff --git a/dts/Bindings/iio/adc/nxp,imx8qxp-adc.yaml b/dts/Bindings/iio/adc/nxp,imx8qxp-adc.yaml new file mode 100644 index 0000000000..0a192ca192 --- /dev/null +++ b/dts/Bindings/iio/adc/nxp,imx8qxp-adc.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP IMX8QXP ADC + +maintainers: + - Cai Huoqing <caihuoqing@baidu.com> + +description: + Supports the ADC found on the IMX8QXP SoC. + +properties: + compatible: + const: nxp,imx8qxp-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: per + - const: ipg + + assigned-clocks: + maxItems: 1 + + assigned-clock-rates: + maxItems: 1 + + power-domains: + maxItems: 1 + + vref-supply: + description: | + External ADC reference voltage supply on VREFH pad. If VERID[MVI] is + set, there are additional, internal reference voltages selectable. + VREFH1 is always from VREFH pad. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - assigned-clocks + - assigned-clock-rates + - power-domains + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/firmware/imx/rsrc.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + adc@5a880000 { + compatible = "nxp,imx8qxp-adc"; + reg = <0x0 0x5a880000 0x0 0x10000>; + interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX_SC_R_ADC_0>, + <&clk IMX_SC_R_ADC_0>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_SC_R_ADC_0>; + assigned-clock-rates = <24000000>; + power-domains = <&pd IMX_SC_R_ADC_0>; + vref-supply = <®_1v8>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/nxp,imx93-adc.yaml b/dts/Bindings/iio/adc/nxp,imx93-adc.yaml new file mode 100644 index 0000000000..dacc526dc6 --- /dev/null +++ b/dts/Bindings/iio/adc/nxp,imx93-adc.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP iMX93 ADC + +maintainers: + - Haibo Chen <haibo.chen@nxp.com> + +description: + The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels + connected to pins. it support normal and inject mode, include + One-Shot and Scan (continuous) conversions. Programmable DMA + enables for each channel Also this ADC contain alternate analog + watchdog thresholds, select threshold through input ports. And + also has Self-test logic and Software-initiated calibration. + +properties: + compatible: + const: nxp,imx93-adc + + reg: + maxItems: 1 + + interrupts: + items: + - description: WDGnL, watchdog threshold interrupt requests. + - description: WDGnH, watchdog threshold interrupt requests. + - description: normal conversion, include EOC (End of Conversion), + ECH (End of Chain), JEOC (End of Injected Conversion) and + JECH (End of injected Chain). + - description: Self-testing Interrupts. + + clocks: + maxItems: 1 + + clock-names: + const: ipg + + vref-supply: + description: + The reference voltage which used to establish channel scaling. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/imx93-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@44530000 { + compatible = "nxp,imx93-adc"; + reg = <0x44530000 0x10000>; + interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_ADC1_GATE>; + clock-names = "ipg"; + vref-supply = <®_vref_1v8>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/nxp,lpc1850-adc.yaml b/dts/Bindings/iio/adc/nxp,lpc1850-adc.yaml new file mode 100644 index 0000000000..70b38038a0 --- /dev/null +++ b/dts/Bindings/iio/adc/nxp,lpc1850-adc.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC1850 ADC + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: + Supports the ADC found on the LPC1850 SoC. + +properties: + compatible: + const: nxp,lpc1850-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + vref-supply: true + + resets: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - vref-supply + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/lpc18xx-ccu.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@400e3000 { + compatible = "nxp,lpc1850-adc"; + reg = <0x400e3000 0x1000>; + interrupts = <17>; + clocks = <&ccu1 CLK_APB3_ADC0>; + vref-supply = <®_vdda>; + resets = <&rgu 40>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/nxp,lpc3220-adc.yaml b/dts/Bindings/iio/adc/nxp,lpc3220-adc.yaml new file mode 100644 index 0000000000..2c5032be83 --- /dev/null +++ b/dts/Bindings/iio/adc/nxp,lpc3220-adc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,lpc3220-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC3220 SoC ADC controller + +maintainers: + - Gregory Clement <gregory.clement@bootlin.com> + +description: + This hardware block has been used on several LPC32XX SoCs. + +properties: + compatible: + const: nxp,lpc3220-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@40048000 { + compatible = "nxp,lpc3220-adc"; + reg = <0x40048000 0x1000>; + interrupt-parent = <&mic>; + interrupts = <39 0>; + vref-supply = <&vcc>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/palmas-gpadc.txt b/dts/Bindings/iio/adc/palmas-gpadc.txt deleted file mode 100644 index 4bb9a86065..0000000000 --- a/dts/Bindings/iio/adc/palmas-gpadc.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Palmas general purpose ADC IP block devicetree bindings - -Channels list: - 0 battery type - 1 battery temp NTC (optional current source) - 2 GP - 3 temp (with ext. diode, optional current source) - 4 GP - 5 GP - 6 VBAT_SENSE - 7 VCC_SENSE - 8 Backup Battery voltage - 9 external charger (VCHG) - 10 VBUS - 11 DC-DC current probe (how does this work?) - 12 internal die temp - 13 internal die temp - 14 USB ID pin voltage - 15 test network - -Required properties: -- compatible : Must be "ti,palmas-gpadc". -- #io-channel-cells: Should be set to <1>. - -Optional sub-nodes: -ti,channel0-current-microamp: Channel 0 current in uA. - Values are rounded to derive 0uA, 5uA, 15uA, 20uA. -ti,channel3-current-microamp: Channel 3 current in uA. - Values are rounded to derive 0uA, 10uA, 400uA, 800uA. -ti,enable-extended-delay: Enable extended delay. - -Example: - -pmic { - compatible = "ti,twl6035-pmic", "ti,palmas-pmic"; - ... - gpadc { - compatible = "ti,palmas-gpadc"; - interrupts = <18 0 - 16 0 - 17 0>; - #io-channel-cells = <1>; - ti,channel0-current-microamp = <5>; - ti,channel3-current-microamp = <10>; - }; - }; - ... -}; diff --git a/dts/Bindings/iio/adc/qcom,pm8018-adc.yaml b/dts/Bindings/iio/adc/qcom,pm8018-adc.yaml new file mode 100644 index 0000000000..58ea1ca4a5 --- /dev/null +++ b/dts/Bindings/iio/adc/qcom,pm8018-adc.yaml @@ -0,0 +1,166 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's PM8xxx voltage XOADC + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: | + The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal + oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921. + +properties: + compatible: + enum: + - qcom,pm8018-adc + - qcom,pm8038-adc + - qcom,pm8058-adc + - qcom,pm8921-adc + + reg: + maxItems: 1 + description: + ADC base address in the PMIC, typically 0x197. + + xoadc-ref-supply: + description: + The reference voltage may vary with PMIC variant but is typically + something like 2.2 or 1.8V. + + interrupts: + maxItems: 1 + + "#address-cells": + const: 2 + description: + The first cell is the prescaler (on PM8058) or premux (on PM8921) + with two valid bits so legal values are 0x00, 0x01 or 0x02. + The second cell is the main analog mux setting (0x00..0x0f). + The combination of prescaler/premux and analog mux uniquely addresses + a hardware channel on all systems. + + "#size-cells": + const: 0 + + "#io-channel-cells": + const: 2 + description: + The cells are precaler or premux followed by the analog muxing line. + +additionalProperties: false + +required: + - compatible + - reg + - "#io-channel-cells" + - "#address-cells" + - "#size-cells" + - adc-channel@c + - adc-channel@d + - adc-channel@f + +patternProperties: + "^(adc-channel@)[0-9a-f]$": + type: object + description: | + ADC channel specific configuration. + Note that channels c, d and f must be present for calibration. + These three nodes are used for absolute and ratiometric calibration + and only need to have these reg values: they are by hardware definition + 1:1 ratio converters that sample 625, 1250 and 0 milliV and create + an interpolation calibration for all other ADCs. + + properties: + reg: + maxItems: 1 + + qcom,decimation: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + This parameter is used to decrease the ADC sampling rate. + Quicker measurements can be made by reducing the decimation ratio. + Valid values are 512, 1024, 2048, 4096. + If the property is not found, a default value of 512 will be used. + + qcom,ratiometric: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Channel calibration type. If this property is specified + VADC will use a special voltage references for channel + calibration. The available references are specified in the + as a u32 value setting (see below) and it is compulsory + to also specify this reference if ratiometric calibration + is selected. + + If the property is not found, the channel will be + calibrated with the 0.625V and 1.25V reference channels, also + known as an absolute calibration. + + The reference voltage pairs when using ratiometric calibration: + 0 = XO_IN/XOADC_GND + 1 = PMIC_IN/XOADC_GND + 2 = PMIC_IN/BMS_CSP + 3 (invalid) + 4 = XOADC_GND/XOADC_GND + 5 = XOADC_VREF/XOADC_GND + + additionalProperties: false + + required: + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + pmic { + #address-cells = <1>; + #size-cells = <0>; + + adc@197 { + compatible = "qcom,pm8058-adc"; + reg = <0x197>; + interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>; + #address-cells = <2>; + #size-cells = <0>; + #io-channel-cells = <2>; + + vcoin: adc-channel@0 { + reg = <0x00 0x00>; + }; + vbat: adc-channel@1 { + reg = <0x00 0x01>; + }; + dcin: adc-channel@2 { + reg = <0x00 0x02>; + }; + ichg: adc-channel@3 { + reg = <0x00 0x03>; + }; + vph_pwr: adc-channel@4 { + reg = <0x00 0x04>; + }; + usb_vbus: adc-channel@a { + reg = <0x00 0x0a>; + }; + die_temp: adc-channel@b { + reg = <0x00 0x0b>; + }; + ref_625mv: adc-channel@c { + reg = <0x00 0x0c>; + }; + ref_1250mv: adc-channel@d { + reg = <0x00 0x0d>; + }; + ref_325mv: adc-channel@e { + reg = <0x00 0x0e>; + }; + ref_muxoff: adc-channel@f { + reg = <0x00 0x0f>; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/qcom,pm8xxx-xoadc.txt b/dts/Bindings/iio/adc/qcom,pm8xxx-xoadc.txt deleted file mode 100644 index 3ae0612778..0000000000 --- a/dts/Bindings/iio/adc/qcom,pm8xxx-xoadc.txt +++ /dev/null @@ -1,157 +0,0 @@ -Qualcomm's PM8xxx voltage XOADC - -The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal -oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921. - -Required properties: - -- compatible: should be one of: - "qcom,pm8018-adc" - "qcom,pm8038-adc" - "qcom,pm8058-adc" - "qcom,pm8921-adc" - -- reg: should contain the ADC base address in the PMIC, typically - 0x197. - -- xoadc-ref-supply: should reference a regulator that can supply - a reference voltage on demand. The reference voltage may vary - with PMIC variant but is typically something like 2.2 or 1.8V. - -The following required properties are standard for IO channels, see -iio-bindings.txt for more details, but notice that this particular -ADC has a special addressing scheme that require two cells for -identifying each ADC channel: - -- #address-cells: should be set to <2>, the first cell is the - prescaler (on PM8058) or premux (on PM8921) with two valid bits - so legal values are 0x00, 0x01 or 0x02. The second cell - is the main analog mux setting (0x00..0x0f). The combination - of prescaler/premux and analog mux uniquely addresses a hardware - channel on all systems. - -- #size-cells: should be set to <0> - -- #io-channel-cells: should be set to <2>, again the cells are - precaler or premux followed by the analog muxing line. - -- interrupts: should refer to the parent PMIC interrupt controller - and reference the proper ADC interrupt. - -Required subnodes: - -The ADC channels are configured as subnodes of the ADC. - -Since some of them are used for calibrating the ADC, these nodes are -compulsory: - -adc-channel@c { - reg = <0x00 0x0c>; -}; - -adc-channel@d { - reg = <0x00 0x0d>; -}; - -adc-channel@f { - reg = <0x00 0x0f>; -}; - -These three nodes are used for absolute and ratiometric calibration -and only need to have these reg values: they are by hardware definition -1:1 ratio converters that sample 625, 1250 and 0 milliV and create -an interpolation calibration for all other ADCs. - -Optional subnodes: any channels other than channels [0x00 0x0c], -[0x00 0x0d] and [0x00 0x0f] are optional. - -Required channel node properties: - -- reg: should contain the hardware channel number in the range - 0 .. 0xff (8 bits). - -Optional channel node properties: - -- qcom,decimation: - Value type: <u32> - Definition: This parameter is used to decrease the ADC sampling rate. - Quicker measurements can be made by reducing the decimation ratio. - Valid values are 512, 1024, 2048, 4096. - If the property is not found, a default value of 512 will be used. - -- qcom,ratiometric: - Value type: <u32> - Definition: Channel calibration type. If this property is specified - VADC will use a special voltage references for channel - calibration. The available references are specified in the - as a u32 value setting (see below) and it is compulsory - to also specify this reference if ratiometric calibration - is selected. - - If the property is not found, the channel will be - calibrated with the 0.625V and 1.25V reference channels, also - known as an absolute calibration. - The reference voltage pairs when using ratiometric calibration: - 0 = XO_IN/XOADC_GND - 1 = PMIC_IN/XOADC_GND - 2 = PMIC_IN/BMS_CSP - 3 (invalid) - 4 = XOADC_GND/XOADC_GND - 5 = XOADC_VREF/XOADC_GND - -Example: - -xoadc: xoadc@197 { - compatible = "qcom,pm8058-adc"; - reg = <0x197>; - interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>; - #address-cells = <2>; - #size-cells = <0>; - #io-channel-cells = <2>; - - vcoin: adc-channel@0 { - reg = <0x00 0x00>; - }; - vbat: adc-channel@1 { - reg = <0x00 0x01>; - }; - dcin: adc-channel@2 { - reg = <0x00 0x02>; - }; - ichg: adc-channel@3 { - reg = <0x00 0x03>; - }; - vph_pwr: adc-channel@4 { - reg = <0x00 0x04>; - }; - usb_vbus: adc-channel@a { - reg = <0x00 0x0a>; - }; - die_temp: adc-channel@b { - reg = <0x00 0x0b>; - }; - ref_625mv: adc-channel@c { - reg = <0x00 0x0c>; - }; - ref_1250mv: adc-channel@d { - reg = <0x00 0x0d>; - }; - ref_325mv: adc-channel@e { - reg = <0x00 0x0e>; - }; - ref_muxoff: adc-channel@f { - reg = <0x00 0x0f>; - }; -}; - -/* IIO client node */ -iio-hwmon { - compatible = "iio-hwmon"; - io-channels = <&xoadc 0x00 0x01>, /* Battery */ - <&xoadc 0x00 0x02>, /* DC in (charger) */ - <&xoadc 0x00 0x04>, /* VPH the main system voltage */ - <&xoadc 0x00 0x0b>, /* Die temperature */ - <&xoadc 0x00 0x0c>, /* Reference voltage 1.25V */ - <&xoadc 0x00 0x0d>, /* Reference voltage 0.625V */ - <&xoadc 0x00 0x0e>; /* Reference voltage 0.325V */ -}; diff --git a/dts/Bindings/iio/adc/qcom,spmi-iadc.txt b/dts/Bindings/iio/adc/qcom,spmi-iadc.txt deleted file mode 100644 index 4e36d6e2f7..0000000000 --- a/dts/Bindings/iio/adc/qcom,spmi-iadc.txt +++ /dev/null @@ -1,46 +0,0 @@ -Qualcomm's SPMI PMIC current ADC - -QPNP PMIC current ADC (IADC) provides interface to clients to read current. -A 16 bit ADC is used for current measurements. IADC can measure the current -through an external resistor (channel 1) or internal (built-in) resistor -(channel 0). When using an external resistor it is to be described by -qcom,external-resistor-micro-ohms property. - -IADC node: - -- compatible: - Usage: required - Value type: <string> - Definition: Should contain "qcom,spmi-iadc". - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: IADC base address and length in the SPMI PMIC register map - -- interrupts: - Usage: optional - Value type: <prop-encoded-array> - Definition: End of ADC conversion. - -- qcom,external-resistor-micro-ohms: - Usage: optional - Value type: <u32> - Definition: Sense resister value in micro Ohm. - If not defined value of 10000 micro Ohms will be used. - -Example: - /* IADC node */ - pmic_iadc: iadc@3600 { - compatible = "qcom,spmi-iadc"; - reg = <0x3600 0x100>; - interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; - qcom,external-resistor-micro-ohms = <10000>; - #io-channel-cells = <1>; - }; - - /* IIO client node */ - bat { - io-channels = <&pmic_iadc 0>; - io-channel-names = "iadc"; - }; diff --git a/dts/Bindings/iio/adc/qcom,spmi-iadc.yaml b/dts/Bindings/iio/adc/qcom,spmi-iadc.yaml new file mode 100644 index 0000000000..5ed893ef5c --- /dev/null +++ b/dts/Bindings/iio/adc/qcom,spmi-iadc.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-iadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's SPMI PMIC current ADC + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + QPNP PMIC current ADC (IADC) provides interface to clients to read current. + A 16 bit ADC is used for current measurements. IADC can measure the current + through an external resistor (channel 1) or internal (built-in) resistor + (channel 0). When using an external resistor it is to be described by + qcom,external-resistor-micro-ohms property. + +properties: + compatible: + items: + - enum: + - qcom,pm8226-iadc + - qcom,pm8941-iadc + - const: qcom,spmi-iadc + + reg: + description: IADC base address in the SPMI PMIC register map + maxItems: 1 + + qcom,external-resistor-micro-ohms: + description: + Sensor resistor value. If not defined value of 10000 micro Ohms + will be used. + + interrupts: + maxItems: 1 + description: + End of conversion interrupt. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + pmic { + #address-cells = <1>; + #size-cells = <0>; + + adc@3600 { + compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc"; + reg = <0x3600>; + interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; + qcom,external-resistor-micro-ohms = <10000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/qcom,spmi-rradc.yaml b/dts/Bindings/iio/adc/qcom,spmi-rradc.yaml new file mode 100644 index 0000000000..f39bc92c2b --- /dev/null +++ b/dts/Bindings/iio/adc/qcom,spmi-rradc.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-rradc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's SPMI PMIC Round Robin ADC + +maintainers: + - Caleb Connolly <caleb.connolly@linaro.org> + +description: | + The Qualcomm SPMI Round Robin ADC (RRADC) provides interface to clients to + read the voltage, current and temperature for supported peripherals such as + the battery thermistor die temperature, charger temperature, USB and DC input + voltage / current and battery ID resistor. + +properties: + compatible: + enum: + - qcom,pmi8998-rradc + - qcom,pm660-rradc + + reg: + maxItems: 1 + + qcom,batt-id-delay-ms: + description: Sets the hardware settling time for the battery ID resistor. + enum: [0, 1, 4, 12, 20, 40, 60, 80] + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pmic { + #address-cells = <1>; + #size-cells = <0>; + + adc@4500 { + compatible = "qcom,pmi8998-rradc"; + reg = <0x4500>; + #io-channel-cells = <1>; + }; + }; diff --git a/dts/Bindings/iio/adc/qcom,spmi-vadc.txt b/dts/Bindings/iio/adc/qcom,spmi-vadc.txt deleted file mode 100644 index c878768812..0000000000 --- a/dts/Bindings/iio/adc/qcom,spmi-vadc.txt +++ /dev/null @@ -1,173 +0,0 @@ -Qualcomm's SPMI PMIC ADC - -- SPMI PMIC voltage ADC (VADC) provides interface to clients to read - voltage. The VADC is a 15-bit sigma-delta ADC. -- SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read - voltage. The VADC is a 16-bit sigma-delta ADC. - -VADC node: - -- compatible: - Usage: required - Value type: <string> - Definition: Should contain "qcom,spmi-vadc". - Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. - Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver. - Should contain "qcom,pms405-adc" for PMS405 PMIC - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: VADC base address in the SPMI PMIC register map. - -- #address-cells: - Usage: required - Value type: <u32> - Definition: Must be one. Child node 'reg' property should define ADC - channel number. - -- #size-cells: - Usage: required - Value type: <u32> - Definition: Must be zero. - -- #io-channel-cells: - Usage: required - Value type: <u32> - Definition: Must be one. For details about IIO bindings see: - Documentation/devicetree/bindings/iio/iio-bindings.txt - -- interrupts: - Usage: optional - Value type: <prop-encoded-array> - Definition: End of conversion interrupt. - -Channel node properties: - -- reg: - Usage: required - Value type: <u32> - Definition: ADC channel number. - See include/dt-bindings/iio/qcom,spmi-vadc.h - -- label: - Usage: required for "qcom,spmi-adc5" and "qcom,spmi-adc-rev2" - Value type: <empty> - Definition: ADC input of the platform as seen in the schematics. - For thermistor inputs connected to generic AMUX or GPIO inputs - these can vary across platform for the same pins. Hence select - the platform schematics name for this channel. - -- qcom,decimation: - Usage: optional - Value type: <u32> - Definition: This parameter is used to decrease ADC sampling rate. - Quicker measurements can be made by reducing decimation ratio. - - For compatible property "qcom,spmi-vadc", valid values are - 512, 1024, 2048, 4096. If property is not found, default value - of 512 will be used. - - For compatible property "qcom,spmi-adc5", valid values are 250, 420 - and 840. If property is not found, default value of 840 is used. - - For compatible property "qcom,spmi-adc-rev2", valid values are 256, - 512 and 1024. If property is not present, default value is 1024. - -- qcom,pre-scaling: - Usage: optional - Value type: <u32 array> - Definition: Used for scaling the channel input signal before the signal is - fed to VADC. The configuration for this node is to know the - pre-determined ratio and use it for post scaling. Select one from - the following options. - <1 1>, <1 3>, <1 4>, <1 6>, <1 20>, <1 8>, <10 81>, <1 10> - If property is not found default value depending on chip will be used. - -- qcom,ratiometric: - Usage: optional - Value type: <empty> - Definition: Channel calibration type. - - For compatible property "qcom,spmi-vadc", if this property is - specified VADC will use the VDD reference (1.8V) and GND for - channel calibration. If property is not found, channel will be - calibrated with 0.625V and 1.25V reference channels, also - known as absolute calibration. - - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", - if this property is specified VADC will use the VDD reference - (1.875V) and GND for channel calibration. If property is not found, - channel will be calibrated with 0V and 1.25V reference channels, - also known as absolute calibration. - -- qcom,hw-settle-time: - Usage: optional - Value type: <u32> - Definition: Time between AMUX getting configured and the ADC starting - conversion. The 'hw_settle_time' is an index used from valid values - and programmed in hardware to achieve the hardware settling delay. - - For compatible property "qcom,spmi-vadc" and "qcom,spmi-adc-rev2", - Delay = 100us * (hw_settle_time) for hw_settle_time < 11, - and 2ms * (hw_settle_time - 10) otherwise. - Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800, - 900 us and 1, 2, 4, 6, 8, 10 ms. - If property is not found, channel will use 0us. - - For compatible property "qcom,spmi-adc5", delay = 15us for - value 0, 100us * (value) for values < 11, - and 2ms * (value - 10) otherwise. - Valid values are: 15, 100, 200, 300, 400, 500, 600, 700, 800, - 900 us and 1, 2, 4, 6, 8, 10 ms - Certain controller digital versions have valid values of - 15, 100, 200, 300, 400, 500, 600, 700, 1, 2, 4, 8, 16, 32, 64, 128 ms - If property is not found, channel will use 15us. - -- qcom,avg-samples: - Usage: optional - Value type: <u32> - Definition: Number of samples to be used for measurement. - Averaging provides the option to obtain a single measurement - from the ADC that is an average of multiple samples. The value - selected is 2^(value). - - For compatible property "qcom,spmi-vadc", valid values - are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 - If property is not found, 1 sample will be used. - - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", - valid values are: 1, 2, 4, 8, 16 - If property is not found, 1 sample will be used. - -NOTE: - -For compatible property "qcom,spmi-vadc" following channels, also known as -reference point channels, are used for result calibration and their channel -configuration nodes should be defined: -VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV, -VADC_GND_REF and VADC_VDD_VADC. - -Example: - -#include <dt-bindings/iio/qcom,spmi-vadc.h> -#include <linux/irq.h> -/* ... */ - - /* VADC node */ - pmic_vadc: vadc@3100 { - compatible = "qcom,spmi-vadc"; - reg = <0x3100>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - #io-channel-cells = <1>; - io-channel-ranges; - - /* Channel node */ - adc-chan@VADC_LR_MUX10_USB_ID { - reg = <VADC_LR_MUX10_USB_ID>; - qcom,decimation = <512>; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - qcom,avg-samples = <1>; - qcom,pre-scaling = <1 3>; - }; - }; - - /* IIO client node */ - usb { - io-channels = <&pmic_vadc VADC_LR_MUX10_USB_ID>; - io-channel-names = "vadc"; - }; diff --git a/dts/Bindings/iio/adc/qcom,spmi-vadc.yaml b/dts/Bindings/iio/adc/qcom,spmi-vadc.yaml new file mode 100644 index 0000000000..40fa0710f1 --- /dev/null +++ b/dts/Bindings/iio/adc/qcom,spmi-vadc.yaml @@ -0,0 +1,310 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's SPMI PMIC ADC + +maintainers: + - Andy Gross <agross@kernel.org> + - Bjorn Andersson <bjorn.andersson@linaro.org> + +description: | + SPMI PMIC voltage ADC (VADC) provides interface to clients to read + voltage. The VADC is a 15-bit sigma-delta ADC. + SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read + voltage. The VADC is a 16-bit sigma-delta ADC. + +properties: + compatible: + oneOf: + - items: + - const: qcom,pms405-adc + - const: qcom,spmi-adc-rev2 + - enum: + - qcom,spmi-vadc + - qcom,spmi-adc5 + - qcom,spmi-adc-rev2 + - qcom,spmi-adc7 + + reg: + description: VADC base address in the SPMI PMIC register map + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + '#io-channel-cells': + const: 1 + + interrupts: + maxItems: 1 + description: + End of conversion interrupt. + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - '#io-channel-cells' + +patternProperties: + "^channel@[0-9a-f]+$": + type: object + additionalProperties: false + description: | + Represents the external channels which are connected to the ADC. + For compatible property "qcom,spmi-vadc" following channels, also known as + reference point channels, are used for result calibration and their channel + configuration nodes should be defined: + VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV, + VADC_GND_REF and VADC_VDD_VADC. + + properties: + reg: + maxItems: 1 + description: | + ADC channel number. + See include/dt-bindings/iio/qcom,spmi-vadc.h + For PMIC7 ADC, the channel numbers are specified separately per PMIC + in the PMIC-specific files in include/dt-bindings/iio/. + + label: + $ref: /schemas/types.yaml#/definitions/string + description: | + ADC input of the platform as seen in the schematics. + For thermistor inputs connected to generic AMUX or GPIO inputs + these can vary across platform for the same pins. Hence select + the platform schematics name for this channel. + + qcom,decimation: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + This parameter is used to decrease ADC sampling rate. + Quicker measurements can be made by reducing decimation ratio. + + qcom,pre-scaling: + description: | + Used for scaling the channel input signal before the signal is + fed to VADC. The configuration for this node is to know the + pre-determined ratio and use it for post scaling. It is a pair of + integers, denoting the numerator and denominator of the fraction by which + input signal is multiplied. For example, <1 3> indicates the signal is scaled + down to 1/3 of its value before ADC measurement. + If property is not found default value depending on chip will be used. + $ref: /schemas/types.yaml#/definitions/uint32-array + oneOf: + - items: + - const: 1 + - enum: [ 1, 3, 4, 6, 20, 8, 10, 16 ] + - items: + - const: 10 + - const: 81 + + qcom,ratiometric: + description: | + Channel calibration type. + - For compatible property "qcom,spmi-vadc", if this property is + specified VADC will use the VDD reference (1.8V) and GND for + channel calibration. If property is not found, channel will be + calibrated with 0.625V and 1.25V reference channels, also + known as absolute calibration. + - For compatible property "qcom,spmi-adc5", "qcom,spmi-adc7" and + "qcom,spmi-adc-rev2", if this property is specified VADC will use + the VDD reference (1.875V) and GND for channel calibration. If + property is not found, channel will be calibrated with 0V and 1.25V + reference channels, also known as absolute calibration. + type: boolean + + qcom,hw-settle-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Time between AMUX getting configured and the ADC starting + conversion. The 'hw_settle_time' is an index used from valid values + and programmed in hardware to achieve the hardware settling delay. + + qcom,avg-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Number of samples to be used for measurement. + Averaging provides the option to obtain a single measurement + from the ADC that is an average of multiple samples. The value + selected is 2^(value). + + required: + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: qcom,spmi-vadc + + then: + patternProperties: + "^channel@[0-9a-f]+$": + properties: + qcom,decimation: + enum: [ 512, 1024, 2048, 4096 ] + default: 512 + + qcom,hw-settle-time: + enum: [ 0, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2, + 4, 6, 8, 10 ] + default: 0 + + qcom,avg-samples: + enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 ] + default: 1 + + - if: + properties: + compatible: + contains: + const: qcom,spmi-adc-rev2 + + then: + patternProperties: + "^channel@[0-9a-f]+$": + properties: + qcom,decimation: + enum: [ 256, 512, 1024 ] + default: 1024 + + qcom,hw-settle-time: + enum: [ 0, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2, + 4, 6, 8, 10 ] + default: 0 + + qcom,avg-samples: + enum: [ 1, 2, 4, 8, 16 ] + default: 1 + + - if: + properties: + compatible: + contains: + const: qcom,spmi-adc5 + + then: + patternProperties: + "^channel@[0-9a-f]+$": + properties: + qcom,decimation: + enum: [ 250, 420, 840 ] + default: 840 + + qcom,hw-settle-time: + enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2, + 4, 6, 8, 10, 16, 32, 64, 128 ] + default: 15 + + qcom,avg-samples: + enum: [ 1, 2, 4, 8, 16 ] + default: 1 + + - if: + properties: + compatible: + contains: + const: qcom,spmi-adc7 + + then: + patternProperties: + "^channel@[0-9a-f]+$": + properties: + qcom,decimation: + enum: [ 85, 340, 1360 ] + default: 1360 + + qcom,hw-settle-time: + enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, + 8000, 16000, 32000, 64000, 128000 ] + default: 15 + + qcom,avg-samples: + enum: [ 1, 2, 4, 8, 16 ] + default: 1 + +additionalProperties: false + +examples: + - | + pmic { + #address-cells = <1>; + #size-cells = <0>; + + adc@3100 { + compatible = "qcom,spmi-vadc"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 0x1>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + /* Channel node */ + channel@39 { + reg = <0x39>; + qcom,decimation = <512>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,avg-samples = <1>; + qcom,pre-scaling = <1 3>; + }; + + channel@9 { + reg = <0x9>; + }; + + channel@a { + reg = <0xa>; + }; + + channel@e { + reg = <0xe>; + }; + + channel@f { + reg = <0xf>; + }; + }; + }; + + - | + #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> + #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h> + #include <dt-bindings/interrupt-controller/irq.h> + + pmic { + #address-cells = <1>; + #size-cells = <0>; + + adc@3100 { + reg = <0x3100>; + compatible = "qcom,spmi-adc7"; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + /* Other properties are omitted */ + channel@44 { + reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "xo_therm"; + }; + + channel@47 { + reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + label = "conn_therm"; + }; + }; + }; diff --git a/dts/Bindings/iio/adc/renesas,gyroadc.txt b/dts/Bindings/iio/adc/renesas,gyroadc.txt deleted file mode 100644 index df5b9f2ad8..0000000000 --- a/dts/Bindings/iio/adc/renesas,gyroadc.txt +++ /dev/null @@ -1,98 +0,0 @@ -* Renesas R-Car GyroADC device driver - -The GyroADC block is a reduced SPI block with up to 8 chipselect lines, -which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs -are sampled by the GyroADC block in a round-robin fashion and the result -presented in the GyroADC registers. - -Required properties: -- compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc". - The <soc-specific> should be one of: - renesas,r8a7791-gyroadc - for the GyroADC block present - in r8a7791 SoC - renesas,r8a7792-gyroadc - for the GyroADC with interrupt - block present in r8a7792 SoC -- reg: Address and length of the register set for the device -- clocks: References to all the clocks specified in the clock-names - property as specified in - Documentation/devicetree/bindings/clock/clock-bindings.txt. -- clock-names: Shall contain "fck". The "fck" is the GyroADC block clock. -- power-domains: Must contain a reference to the PM domain, if available. -- #address-cells: Should be <1> (setting for the subnodes) for all ADCs - except for "fujitsu,mb88101a". Should be <0> (setting for - only subnode) for "fujitsu,mb88101a". -- #size-cells: Should be <0> (setting for the subnodes) - -Sub-nodes: -You must define subnode(s) which select the connected ADC type and reference -voltage for the GyroADC channels. - -Required properties for subnodes: -- compatible: Should be either of: - "fujitsu,mb88101a" - - Fujitsu MB88101A compatible mode, - 12bit sampling, up to 4 channels can be sampled in - round-robin fashion. One Fujitsu chip supplies four - GyroADC channels with data as it contains four ADCs - on the chip and thus for 4-channel operation, single - MB88101A is required. The Cx chipselect lines of the - MB88101A connect directly to two CHS lines of the - GyroADC, no demuxer is required. The data out line - of each MB88101A connects to a shared input pin of - the GyroADC. - "ti,adcs7476" or "ti,adc121" or "adi,ad7476" - - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, - 15bit sampling, up to 8 channels can be sampled in - round-robin fashion. One TI/ADI chip supplies single - ADC channel with data, thus for 8-channel operation, - 8 chips are required. A 3:8 chipselect demuxer is - required to connect the nCS line of the TI/ADI chips - to the GyroADC, while MISO line of each TI/ADI ADC - connects to a shared input pin of the GyroADC. - "maxim,max1162" or "maxim,max11100" - - Maxim MAX1162 / Maxim MAX11100 compatible mode, - 16bit sampling, up to 8 channels can be sampled in - round-robin fashion. One Maxim chip supplies single - ADC channel with data, thus for 8-channel operation, - 8 chips are required. A 3:8 chipselect demuxer is - required to connect the nCS line of the MAX chips - to the GyroADC, while MISO line of each Maxim ADC - connects to a shared input pin of the GyroADC. -- reg: Should be the number of the analog input. Should be present - for all ADCs except "fujitsu,mb88101a". -- vref-supply: Reference to the channel reference voltage regulator. - -Example: - vref_max1162: regulator-vref-max1162 { - compatible = "regulator-fixed"; - - regulator-name = "MAX1162 Vref"; - regulator-min-microvolt = <4096000>; - regulator-max-microvolt = <4096000>; - }; - - adc@e6e54000 { - compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; - reg = <0 0xe6e54000 0 64>; - clocks = <&mstp9_clks R8A7791_CLK_GYROADC>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - - pinctrl-0 = <&adc_pins>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <0>; - - adc@0 { - reg = <0>; - compatible = "maxim,max1162"; - vref-supply = <&vref_max1162>; - }; - - adc@1 { - reg = <1>; - compatible = "maxim,max1162"; - vref-supply = <&vref_max1162>; - }; - }; diff --git a/dts/Bindings/iio/adc/renesas,rcar-gyroadc.yaml b/dts/Bindings/iio/adc/renesas,rcar-gyroadc.yaml new file mode 100644 index 0000000000..36dff3250e --- /dev/null +++ b/dts/Bindings/iio/adc/renesas,rcar-gyroadc.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas R-Car GyroADC + +maintainers: + - Marek Vasut <marek.vasut+renesas@gmail.com> + +description: | + The GyroADC block is a reduced SPI block with up to 8 chipselect lines, + which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs + are sampled by the GyroADC block in a round-robin fashion and the result + presented in the GyroADC registers. + The ADC bindings should match with that of the devices connected to a + full featured SPI bus. + +properties: + compatible: + items: + - enum: + - renesas,r8a7791-gyroadc + - renesas,r8a7792-gyroadc + - const: renesas,rcar-gyroadc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: fck + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - power-domains + - resets + - "#address-cells" + - "#size-cells" + +patternProperties: + "@[0-7]$": + type: object + properties: + compatible: + description: | + fujitsu,mb88101a + - Fujitsu MB88101A compatible mode, + 12bit sampling, up to 4 channels can be sampled in round-robin + fashion. One Fujitsu chip supplies four GyroADC channels with + data as it contains four ADCs on the chip and thus for 4-channel + operation, single MB88101A is required. The Cx chipselect lines + of the MB88101A connect directly to two CHS lines of the GyroADC, + no demuxer is required. The data out line of each MB88101A + connects to a shared input pin of the GyroADC. + ti,adcs7476 or ti,adc121 or adi,ad7476 + - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit + sampling, up to 8 channels can be sampled in round-robin + fashion. One TI/ADI chip supplies single ADC channel with data, + thus for 8-channel operation, 8 chips are required. + A 3:8 chipselect demuxer is required to connect the nCS line + of the TI/ADI chips to the GyroADC, while MISO line of each + TI/ADI ADC connects to a shared input pin of the GyroADC. + maxim,max1162 or maxim,max11100 + - Maxim MAX1162 / Maxim MAX11100 compatible mode, 16bit sampling, + up to 8 channels can be sampled in round-robin fashion. One + Maxim chip supplies single ADC channel with data, thus for + 8-channel operation, 8 chips are required. + A 3:8 chipselect demuxer is required to connect the nCS line + of the MAX chips to the GyroADC, while MISO line of each Maxim + ADC connects to a shared input pin of the GyroADC. + enum: + - adi,ad7476 + - fujitsu,mb88101a + - maxim,max1162 + - maxim,max11100 + - ti,adcs7476 + - ti,adc121 + + reg: + minimum: 0 + maximum: 7 + + vref-supply: true + + additionalProperties: false + + required: + - compatible + - reg + - vref-supply + +examples: + - | + #include <dt-bindings/clock/r8a7791-cpg-mssr.h> + #include <dt-bindings/power/r8a7791-sysc.h> + + adc@e6e54000 { + compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; + reg = <0xe6e54000 64>; + clocks = <&cpg CPG_MOD 901>; + clock-names = "fck"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + resets = <&cpg 901>; + + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + reg = <0>; + compatible = "maxim,max1162"; + vref-supply = <&vref_max1162>; + }; + + adc@1 { + reg = <1>; + compatible = "maxim,max1162"; + vref-supply = <&vref_max1162>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/renesas,rzg2l-adc.yaml b/dts/Bindings/iio/adc/renesas,rzg2l-adc.yaml new file mode 100644 index 0000000000..ba86c7b7d6 --- /dev/null +++ b/dts/Bindings/iio/adc/renesas,rzg2l-adc.yaml @@ -0,0 +1,155 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/renesas,rzg2l-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G2L ADC + +maintainers: + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> + +description: | + A/D Converter block is a successive approximation analog-to-digital converter + with a 12-bit accuracy. Up to eight analog input channels can be selected. + Conversions can be performed in single or repeat mode. Result of the ADC is + stored in a 32-bit data register corresponding to each channel. + +properties: + compatible: + items: + - enum: + - renesas,r9a07g043-adc # RZ/G2UL and RZ/Five + - renesas,r9a07g044-adc # RZ/G2L + - renesas,r9a07g054-adc # RZ/V2L + - const: renesas,rzg2l-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: converter clock + - description: peripheral clock + + clock-names: + items: + - const: adclk + - const: pclk + + power-domains: + maxItems: 1 + + resets: + maxItems: 2 + + reset-names: + items: + - const: presetn + - const: adrst-n + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + - resets + - reset-names + +patternProperties: + "^channel@[0-7]$": + $ref: adc.yaml + type: object + description: | + Represents the external channels which are connected to the ADC. + + properties: + reg: + description: | + The channel number. + + required: + - reg + + additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a07g043-adc + then: + patternProperties: + "^channel@[2-7]$": false + "^channel@[0-1]$": + properties: + reg: + minimum: 0 + maximum: 1 + else: + patternProperties: + "^channel@[0-7]$": + properties: + reg: + minimum: 0 + maximum: 7 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r9a07g044-cpg.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + adc: adc@10059000 { + compatible = "renesas,r9a07g044-adc", "renesas,rzg2l-adc"; + reg = <0x10059000 0x400>; + interrupts = <GIC_SPI 347 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>, + <&cpg CPG_MOD R9A07G044_ADC_PCLK>; + clock-names = "adclk", "pclk"; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_ADC_PRESETN>, + <&cpg R9A07G044_ADC_ADRST_N>; + reset-names = "presetn", "adrst-n"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + channel@1 { + reg = <1>; + }; + channel@2 { + reg = <2>; + }; + channel@3 { + reg = <3>; + }; + channel@4 { + reg = <4>; + }; + channel@5 { + reg = <5>; + }; + channel@6 { + reg = <6>; + }; + channel@7 { + reg = <7>; + }; + }; diff --git a/dts/Bindings/iio/adc/richtek,rtq6056.yaml b/dts/Bindings/iio/adc/richtek,rtq6056.yaml new file mode 100644 index 0000000000..88e008629e --- /dev/null +++ b/dts/Bindings/iio/adc/richtek,rtq6056.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/richtek,rtq6056.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RTQ6056 Bi-Directional Current and Power Monitor with 16-bit ADC + +maintainers: + - ChiYuan Huang <cy_huang@richtek.com> + +description: | + The RTQ6056 is a high accuracy current-sense monitor with I2C and SMBus + interface, and the device provides full information for system by reading + out the loading current and power. + + The device monitors both of the drops across sense resistor and the BUS + voltage, converts into the current in amperes, and power in watts through + internal analog-to-digital converter ADC. The programmable calibration, + adjustable conversion time, and averaging function are also built in for + more design flexibility. + + Datasheet is available at + https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf + +properties: + compatible: + const: richtek,rtq6056 + + reg: + maxItems: 1 + + "#io-channel-cells": + const: 1 + + shunt-resistor-micro-ohms: + description: Shunt IN+/IN- sensing node resistor + +required: + - compatible + - reg + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + adc@40 { + compatible = "richtek,rtq6056"; + reg = <0x40>; + #io-channel-cells = <1>; + }; + }; diff --git a/dts/Bindings/iio/adc/rockchip-saradc.yaml b/dts/Bindings/iio/adc/rockchip-saradc.yaml index bcff82a423..aa24b84139 100644 --- a/dts/Bindings/iio/adc/rockchip-saradc.yaml +++ b/dts/Bindings/iio/adc/rockchip-saradc.yaml @@ -15,12 +15,15 @@ properties: - const: rockchip,saradc - const: rockchip,rk3066-tsadc - const: rockchip,rk3399-saradc + - const: rockchip,rk3588-saradc - items: - enum: - - rockchip,px30-saradc - - rockchip,rk3308-saradc - - rockchip,rk3328-saradc - - rockchip,rv1108-saradc + - rockchip,px30-saradc + - rockchip,rk3308-saradc + - rockchip,rk3328-saradc + - rockchip,rk3568-saradc + - rockchip,rv1108-saradc + - rockchip,rv1126-saradc - const: rockchip,rk3399-saradc reg: diff --git a/dts/Bindings/iio/adc/samsung,exynos-adc.yaml b/dts/Bindings/iio/adc/samsung,exynos-adc.yaml index cc3c8ea6a8..4e40f6bed5 100644 --- a/dts/Bindings/iio/adc/samsung,exynos-adc.yaml +++ b/dts/Bindings/iio/adc/samsung,exynos-adc.yaml @@ -11,18 +11,23 @@ maintainers: properties: compatible: - enum: - - samsung,exynos-adc-v1 # Exynos5250 - - samsung,exynos-adc-v2 - - samsung,exynos3250-adc - - samsung,exynos4212-adc # Exynos4212 and Exynos4412 - - samsung,exynos7-adc - - samsung,s3c2410-adc - - samsung,s3c2416-adc - - samsung,s3c2440-adc - - samsung,s3c2443-adc - - samsung,s3c6410-adc - - samsung,s5pv210-adc + oneOf: + - enum: + - samsung,exynos-adc-v1 # Exynos5250 + - samsung,exynos-adc-v2 + - samsung,exynos3250-adc + - samsung,exynos4212-adc # Exynos4212 and Exynos4412 + - samsung,exynos7-adc + - samsung,s3c2410-adc + - samsung,s3c2416-adc + - samsung,s3c2440-adc + - samsung,s3c2443-adc + - samsung,s3c6410-adc + - samsung,s5pv210-adc + - items: + - enum: + - samsung,exynos5433-adc + - const: samsung,exynos7-adc reg: maxItems: 1 @@ -41,7 +46,10 @@ properties: maxItems: 2 interrupts: - maxItems: 1 + description: + ADC interrupt followed by optional touchscreen interrupt. + minItems: 1 + maxItems: 2 "#io-channel-cells": const: 1 @@ -49,7 +57,7 @@ properties: vdd-supply: true samsung,syscon-phandle: - $ref: '/schemas/types.yaml#/definitions/phandle' + $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to the PMU system controller node (to access the ADC_PHY register on Exynos3250/4x12/5250/5420/5800). @@ -68,6 +76,9 @@ required: - "#io-channel-cells" - vdd-supply +additionalProperties: + type: object + allOf: - if: properties: @@ -78,7 +89,6 @@ allOf: - samsung,exynos-adc-v2 - samsung,exynos3250-adc - samsung,exynos4212-adc - - samsung,s5pv210-adc then: required: - samsung,syscon-phandle @@ -107,6 +117,15 @@ allOf: items: - const: adc + - if: + required: + - has-touchscreen + then: + properties: + interrupts: + minItems: 2 + maxItems: 2 + examples: - | adc: adc@12d10000 { @@ -114,7 +133,6 @@ examples: reg = <0x12d10000 0x100>; interrupts = <0 106 0>; #io-channel-cells = <1>; - io-channel-ranges; clocks = <&clock 303>; clock-names = "adc"; @@ -123,13 +141,13 @@ examples: samsung,syscon-phandle = <&pmu_system_controller>; /* NTC thermistor is a hwmon device */ - ncp15wb473 { + thermistor { compatible = "murata,ncp15wb473"; pullup-uv = <1800000>; pullup-ohm = <47000>; pulldown-ohm = <0>; io-channels = <&adc 4>; - }; + }; }; - | @@ -137,10 +155,9 @@ examples: adc@126c0000 { compatible = "samsung,exynos3250-adc"; - reg = <0x126C0000 0x100>; + reg = <0x126c0000 0x100>; interrupts = <0 137 0>; #io-channel-cells = <1>; - io-channel-ranges; clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>; diff --git a/dts/Bindings/iio/adc/sigma-delta-modulator.yaml b/dts/Bindings/iio/adc/sigma-delta-modulator.yaml index a390343d0c..cab0d425ea 100644 --- a/dts/Bindings/iio/adc/sigma-delta-modulator.yaml +++ b/dts/Bindings/iio/adc/sigma-delta-modulator.yaml @@ -4,10 +4,10 @@ $id: http://devicetree.org/schemas/iio/adc/sigma-delta-modulator.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Device-Tree bindings for sigma delta modulator +title: Sigma delta modulator maintainers: - - Arnaud Pouliquen <arnaud.pouliquen@st.com> + - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> properties: compatible: diff --git a/dts/Bindings/iio/adc/sprd,sc2720-adc.yaml b/dts/Bindings/iio/adc/sprd,sc2720-adc.yaml new file mode 100644 index 0000000000..8181cf9a8e --- /dev/null +++ b/dts/Bindings/iio/adc/sprd,sc2720-adc.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Spreadtrum SC27XX series PMICs ADC + +maintainers: + - Baolin Wang <baolin.wang7@gmail.com> + +description: + Supports the ADC found on these PMICs. + +properties: + compatible: + enum: + - sprd,sc2720-adc + - sprd,sc2721-adc + - sprd,sc2723-adc + - sprd,sc2730-adc + - sprd,sc2731-adc + - sprd,ump9620-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#io-channel-cells": + const: 1 + + hwlocks: + maxItems: 1 + + nvmem-cells: true + + nvmem-cell-names: true + +allOf: + - if: + not: + properties: + compatible: + contains: + enum: + - sprd,ump9620-adc + then: + properties: + nvmem-cells: + maxItems: 2 + nvmem-cell-names: + items: + - const: big_scale_calib + - const: small_scale_calib + + else: + properties: + nvmem-cells: + maxItems: 6 + nvmem-cell-names: + items: + - const: big_scale_calib1 + - const: big_scale_calib2 + - const: small_scale_calib1 + - const: small_scale_calib2 + - const: vbat_det_cal1 + - const: vbat_det_cal2 + +required: + - compatible + - reg + - interrupts + - "#io-channel-cells" + - hwlocks + - nvmem-cells + - nvmem-cell-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + pmic { + #address-cells = <1>; + #size-cells = <0>; + adc@480 { + compatible = "sprd,sc2731-adc"; + reg = <0x480>; + interrupt-parent = <&sc2731_pmic>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + hwlocks = <&hwlock 4>; + nvmem-cells = <&adc_big_scale>, <&adc_small_scale>; + nvmem-cell-names = "big_scale_calib", "small_scale_calib"; + }; + }; + + - | + #include <dt-bindings/interrupt-controller/irq.h> + pmic { + #address-cells = <1>; + #size-cells = <0>; + adc@504 { + compatible = "sprd,ump9620-adc"; + reg = <0x504>; + interrupt-parent = <&ump9620_pmic>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + hwlocks = <&hwlock 4>; + nvmem-cells = <&adc_bcal1>, <&adc_bcal2>, + <&adc_scal1>, <&adc_scal2>, + <&vbat_det_cal1>, <&vbat_det_cal2>; + nvmem-cell-names = "big_scale_calib1", "big_scale_calib2", + "small_scale_calib1", "small_scale_calib2", + "vbat_det_cal1", "vbat_det_cal2"; + }; + }; +... diff --git a/dts/Bindings/iio/adc/sprd,sc27xx-adc.txt b/dts/Bindings/iio/adc/sprd,sc27xx-adc.txt deleted file mode 100644 index b4daa15dcf..0000000000 --- a/dts/Bindings/iio/adc/sprd,sc27xx-adc.txt +++ /dev/null @@ -1,40 +0,0 @@ -Spreadtrum SC27XX series PMICs ADC binding - -Required properties: -- compatible: Should be one of the following. - "sprd,sc2720-adc" - "sprd,sc2721-adc" - "sprd,sc2723-adc" - "sprd,sc2730-adc" - "sprd,sc2731-adc" -- reg: The address offset of ADC controller. -- interrupt-parent: The interrupt controller. -- interrupts: The interrupt number for the ADC device. -- #io-channel-cells: Number of cells in an IIO specifier. -- hwlocks: Reference to a phandle of a hwlock provider node. -- nvmem-cells: A phandle to the calibration cells provided by eFuse device. -- nvmem-cell-names: Should be "big_scale_calib", "small_scale_calib". - -Example: - - sc2731_pmic: pmic@0 { - compatible = "sprd,sc2731"; - reg = <0>; - spi-max-frequency = <26000000>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <2>; - #address-cells = <1>; - #size-cells = <0>; - - pmic_adc: adc@480 { - compatible = "sprd,sc2731-adc"; - reg = <0x480>; - interrupt-parent = <&sc2731_pmic>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - #io-channel-cells = <1>; - hwlocks = <&hwlock 4>; - nvmem-cells = <&adc_big_scale>, <&adc_small_scale>; - nvmem-cell-names = "big_scale_calib", "small_scale_calib"; - }; - }; diff --git a/dts/Bindings/iio/adc/st,stm32-adc.yaml b/dts/Bindings/iio/adc/st,stm32-adc.yaml index 28417b31b5..995cbf8cef 100644 --- a/dts/Bindings/iio/adc/st,stm32-adc.yaml +++ b/dts/Bindings/iio/adc/st,stm32-adc.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# -title: STMicroelectronics STM32 ADC bindings +title: STMicroelectronics STM32 ADC description: | STM32 ADC is a successive approximation analog-to-digital converter. @@ -19,7 +19,7 @@ description: | Each STM32 ADC block can have up to 3 ADC instances. maintainers: - - Fabrice Gasnier <fabrice.gasnier@st.com> + - Fabrice Gasnier <fabrice.gasnier@foss.st.com> properties: compatible: @@ -27,6 +27,7 @@ properties: - st,stm32f4-adc-core - st,stm32h7-adc-core - st,stm32mp1-adc-core + - st,stm32mp13-adc-core reg: maxItems: 1 @@ -37,10 +38,13 @@ properties: - stm32f4 and stm32h7 share a common ADC interrupt line. - stm32mp1 has two separate interrupt lines, one for each ADC within ADC block. + - stm32mp13 has an interrupt line per ADC block. minItems: 1 maxItems: 2 clocks: + minItems: 1 + maxItems: 2 description: | Core can use up to two clocks, depending on part used: - "adc" clock: for the analog circuitry, common to all ADCs. @@ -76,7 +80,7 @@ properties: description: Phandle to system configuration controller. It can be used to control the analog circuitry on stm32mp1. - $ref: "/schemas/types.yaml#/definitions/phandle-array" + $ref: /schemas/types.yaml#/definitions/phandle-array interrupt-controller: true @@ -136,7 +140,6 @@ allOf: - const: bus - const: adc minItems: 1 - maxItems: 2 interrupts: items: @@ -168,7 +171,6 @@ allOf: - const: bus - const: adc minItems: 1 - maxItems: 2 interrupts: items: @@ -180,6 +182,33 @@ allOf: maximum: 36000000 default: 36000000 + - if: + properties: + compatible: + contains: + const: st,stm32mp13-adc-core + + then: + properties: + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + items: + - const: bus + - const: adc + minItems: 1 + + interrupts: + items: + - description: ADC interrupt line + + st,max-clk-rate-hz: + minimum: 150000 + maximum: 75000000 + default: 75000000 + additionalProperties: false required: @@ -208,6 +237,7 @@ patternProperties: - st,stm32f4-adc - st,stm32h7-adc - st,stm32mp1-adc + - st,stm32mp13-adc reg: description: | @@ -220,10 +250,16 @@ patternProperties: '#io-channel-cells': const: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + interrupts: description: | IRQ Line for the ADC instance. Valid values are: - - 0 for adc@0 + - 0 for adc@0 (single adc for stm32mp13) - 1 for adc@100 - 2 for adc@200 (stm32f4 only) maxItems: 1 @@ -244,17 +280,18 @@ patternProperties: assigned-resolution-bits: description: | Resolution (bits) to use for conversions: - - can be 6, 8, 10 or 12 on stm32f4 + - can be 6, 8, 10 or 12 on stm32f4 and stm32mp13 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1 - $ref: /schemas/types.yaml#/definitions/uint32 st,adc-channels: description: | List of single-ended channels muxed for this ADC. It can have up to: - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4 + - 19 channels, numbered from 0 to 18 (for in0..in18) on stm32mp13. - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and stm32mp1. $ref: /schemas/types.yaml#/definitions/uint32-array + deprecated: true st,adc-diff-channels: description: | @@ -264,7 +301,9 @@ patternProperties: <vinp vinn>, <vinp vinn>,... vinp and vinn are numbered from 0 to 19. Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is - required. Both properties can be used together. Some channels can be + required if no adc generic channel is defined. These legacy channel + properties are exclusive with adc generic channel bindings. + Both properties can be used together. Some channels can be used as single-ended and some other ones as differential (mixed). But channels can't be configured both as single-ended and differential. $ref: /schemas/types.yaml#/definitions/uint32-matrix @@ -278,6 +317,7 @@ patternProperties: "vinn" indicates negative input number minimum: 0 maximum: 19 + deprecated: true st,min-sample-time-nsecs: description: @@ -288,6 +328,50 @@ patternProperties: list, to set sample time resp. for all channels, or independently for each channel. $ref: /schemas/types.yaml#/definitions/uint32-array + deprecated: true + + nvmem-cells: + items: + - description: Phandle to the calibration vrefint data provided by otp + + nvmem-cell-names: + items: + - const: vrefint + + patternProperties: + "^channel@([0-9]|1[0-9])$": + type: object + $ref: adc.yaml + description: Represents the external channels which are connected to the ADC. + + properties: + reg: + items: + minimum: 0 + maximum: 19 + + label: + description: | + Unique name to identify which channel this is. + Reserved label names "vddcore", "vddcpu", "vddq_ddr", "vrefint" and "vbat" + are used to identify internal channels with matching names. + + diff-channels: + $ref: /schemas/types.yaml#/definitions/uint32-array + items: + minimum: 0 + maximum: 19 + + st,min-sample-time-ns: + description: | + Minimum sampling time in nanoseconds. Depending on hardware (board) + e.g. high/low analog input source impedance, fine tune of ADC + sampling time may be recommended. + + required: + - reg + + additionalProperties: false allOf: - if: @@ -366,13 +450,38 @@ patternProperties: items: minimum: 40 - additionalProperties: false - anyOf: - - required: - - st,adc-channels - - required: - - st,adc-diff-channels + - if: + properties: + compatible: + contains: + const: st,stm32mp13-adc + + then: + properties: + reg: + const: 0x0 + + interrupts: + const: 0 + + assigned-resolution-bits: + enum: [6, 8, 10, 12] + default: 12 + + st,adc-channels: + minItems: 1 + maxItems: 19 + items: + minimum: 0 + maximum: 18 + + st,min-sample-time-nsecs: + minItems: 1 + maxItems: 19 + items: + minimum: 40 + additionalProperties: false required: - compatible @@ -450,4 +559,50 @@ examples: // other adc child node follow... }; + - | + // Example 3: with stm32mp157c to setup ADC2 with: + // - internal channels 13, 14, 15. + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/stm32mp1-clks.h> + adc122: adc@48003000 { + compatible = "st,stm32mp1-adc-core"; + reg = <0x48003000 0x400>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc ADC12>, <&rcc ADC12_K>; + clock-names = "bus", "adc"; + booster-supply = <&booster>; + vdd-supply = <&vdd>; + vdda-supply = <&vdda>; + vref-supply = <&vref>; + st,syscfg = <&syscfg>; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + adc@100 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x100>; + interrupts = <1>; + #address-cells = <1>; + #size-cells = <0>; + channel@13 { + reg = <13>; + label = "vrefint"; + st,min-sample-time-ns = <9000>; + }; + channel@14 { + reg = <14>; + label = "vddcore"; + st,min-sample-time-ns = <9000>; + }; + channel@15 { + reg = <15>; + label = "vbat"; + st,min-sample-time-ns = <9000>; + }; + }; + }; + ... diff --git a/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml index d61bc011e8..1970503389 100644 --- a/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml +++ b/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: STMicroelectronics STM32 DFSDM ADC device driver maintainers: - - Fabrice Gasnier <fabrice.gasnier@st.com> - - Olivier Moysan <olivier.moysan@st.com> + - Fabrice Gasnier <fabrice.gasnier@foss.st.com> + - Olivier Moysan <olivier.moysan@foss.st.com> description: | STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to @@ -38,14 +38,12 @@ properties: dfsdm clock can also feed CLKOUT, when CLKOUT is used. - description: audio clock can be used as an alternate to feed CLKOUT. minItems: 1 - maxItems: 2 clock-names: items: - const: dfsdm - const: audio minItems: 1 - maxItems: 2 "#address-cells": const: 1 @@ -74,6 +72,7 @@ additionalProperties: false patternProperties: "^filter@[0-9]+$": type: object + unevaluatedProperties: false description: child node properties: @@ -102,7 +101,6 @@ patternProperties: st,adc-channel-names: description: List of single-ended channel names. - $ref: /schemas/types.yaml#/definitions/string-array st,filter-order: description: | @@ -111,9 +109,7 @@ patternProperties: - [1-5]: order 1 to 5. For audio purpose it is recommended to use order 3 to 5. $ref: /schemas/types.yaml#/definitions/uint32 - items: - minimum: 0 - maximum: 5 + maximum: 5 "#io-channel-cells": const: 1 @@ -177,7 +173,7 @@ patternProperties: contains: const: st,stm32-dfsdm-adc - - then: + then: properties: st,adc-channels: minItems: 1 @@ -199,8 +195,6 @@ patternProperties: description: From common IIO binding. Used to pipe external sigma delta modulator or internal ADC output to DFSDM channel. - This is not required for "st,stm32-dfsdm-pdm" compatibility as - PDM microphone is binded in Audio DT node. required: - io-channels @@ -211,7 +205,7 @@ patternProperties: contains: const: st,stm32-dfsdm-dmic - - then: + then: properties: st,adc-channels: maxItems: 1 @@ -232,9 +226,14 @@ patternProperties: patternProperties: "^dfsdm-dai+$": type: object + additionalProperties: false description: child node properties: + compatible: + enum: + - st,stm32h7-dfsdm-dai + "#sound-dai-cells": const: 0 @@ -244,6 +243,7 @@ patternProperties: modulator or internal ADC output to DFSDM channel. required: + - compatible - "#sound-dai-cells" - io-channels @@ -254,7 +254,7 @@ allOf: contains: const: st,stm32h7-dfsdm - - then: + then: patternProperties: "^filter@[0-9]+$": properties: @@ -269,7 +269,7 @@ allOf: contains: const: st,stm32mp1-dfsdm - - then: + then: patternProperties: "^filter@[0-9]+$": properties: diff --git a/dts/Bindings/iio/adc/st,stmpe-adc.yaml b/dts/Bindings/iio/adc/st,stmpe-adc.yaml new file mode 100644 index 0000000000..474e35c493 --- /dev/null +++ b/dts/Bindings/iio/adc/st,stmpe-adc.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/st,stmpe-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC on an STMPE multifunction device. + +maintainers: + - Stefan Agner <stefan@agner.ch> + +description: + This ADC forms part of an ST microelectronics STMPE multifunction device . + The ADC is shared with the STMPE touchscreen. As a result some ADC related + settings are specified in the parent node. + The node should be a child node of the stmpe node to which it belongs. + +properties: + compatible: + const: st,stmpe-adc + + st,norequest-mask: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Bitmask specifying which ADC channels should _not_ be + requestable due to different usage (e.g. touch). + + "#io-channel-cells": + const: 1 + +required: + - compatible + +additionalProperties: false + +examples: + - | + adc { + compatible = "st,stmpe-adc"; + st,norequest-mask = <0x0f>; /* dont use ADC CH3-0 */ + }; +... diff --git a/dts/Bindings/iio/adc/stmpe-adc.txt b/dts/Bindings/iio/adc/stmpe-adc.txt deleted file mode 100644 index 480e664226..0000000000 --- a/dts/Bindings/iio/adc/stmpe-adc.txt +++ /dev/null @@ -1,21 +0,0 @@ -STMPE ADC driver ----------------- - -Required properties: - - compatible: "st,stmpe-adc" - -Optional properties: -Note that the ADC is shared with the STMPE touchscreen. ADC related settings -have to be done in the mfd. -- st,norequest-mask: bitmask specifying which ADC channels should _not_ be - requestable due to different usage (e.g. touch) - -Node name must be stmpe_adc and should be child node of stmpe node to -which it belongs. - -Example: - - stmpe_adc { - compatible = "st,stmpe-adc"; - st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */ - }; diff --git a/dts/Bindings/iio/adc/ti,adc081c.yaml b/dts/Bindings/iio/adc/ti,adc081c.yaml new file mode 100644 index 0000000000..caaad77758 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc081c.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc081c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Single-channel I2C ADCs + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + - Lars-Peter Clausen <lars@metafoo.de> + +description: | + Single-channel ADC supporting 8, 10, or 12-bit samples and high/low alerts. + +properties: + compatible: + enum: + - ti,adc081c + - ti,adc101c + - ti,adc121c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-supply: + description: + Regulator for the combined power supply and voltage reference + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@52 { + compatible = "ti,adc081c"; + reg = <0x52>; + vref-supply = <®_2p5v>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,adc0832.yaml b/dts/Bindings/iio/adc/ti,adc0832.yaml new file mode 100644 index 0000000000..686721176a --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc0832.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc0832.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC0832 and similar ADCs + +maintainers: + - Akinobu Mita <akinobu.mita@gmail.com> + +description: | + 8 bit ADCs with 1, 2, 4 or 8 inputs for single ended or differential + conversion. + +properties: + compatible: + enum: + - ti,adc0831 + - ti,adc0832 + - ti,adc0834 + - ti,adc0838 + + reg: + maxItems: 1 + + vref-supply: + description: External reference, needed to establish input scaling + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc0832"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <200000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,adc084s021.yaml b/dts/Bindings/iio/adc/ti,adc084s021.yaml new file mode 100644 index 0000000000..726d2cbfa3 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc084s021.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc084s021.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC084S021 ADC + +maintainers: + - Mårten Lindahl <martenli@axis.com> + +description: | + 8 bit ADC with 4 channels + +properties: + compatible: + const: ti,adc084s021 + + reg: + maxItems: 1 + + vref-supply: + description: External reference, needed to establish input scaling + + spi-cpol: true + spi-cpha: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + - spi-cpol + - spi-cpha + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc084s021"; + reg = <0>; + vref-supply = <&adc_vref>; + spi-cpol; + spi-cpha; + spi-max-frequency = <16000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,adc108s102.yaml b/dts/Bindings/iio/adc/ti,adc108s102.yaml new file mode 100644 index 0000000000..a60b1e100e --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc108s102.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc108s102.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC108S102 and ADC128S102 + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + Family of 8 channel, 10/12 bit, SPI, single ended ADCs. + +properties: + compatible: + const: + ti,adc108s102 + + reg: true + vref-supply: true + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc108s102"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <1000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,adc12138.yaml b/dts/Bindings/iio/adc/ti,adc12138.yaml new file mode 100644 index 0000000000..076088a328 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc12138.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc12138.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC12138 and similar self-calibrating ADCs + +maintainers: + - Akinobu Mita <akinobu.mita@gmail.com> + +description: | + 13 bit ADCs with 1, 2 or 8 inputs and self calibrating circuitry to + correct for linearity, zero and full scale errors. + +properties: + compatible: + enum: + - ti,adc12130 + - ti,adc12132 + - ti,adc12138 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: End of Conversion (EOC) interrupt + + clocks: + maxItems: 1 + description: Conversion clock input. + + vref-p-supply: + description: The regulator supply for positive analog voltage reference + + vref-n-supply: + description: | + The regulator supply for negative analog voltage reference + (Note that this must not go below GND or exceed vref-p) + If not specified, this is assumed to be analog ground. + + ti,acquisition-time: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 6, 10, 18, 34 ] + description: | + The number of conversion clock periods for the S/H's acquisition time. + For high source impedances, this value can be increased to 18 or 34. + For less ADC accuracy and/or slower CCLK frequencies this value may be + decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the + datasheet for details. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - vref-p-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc12138"; + reg = <0>; + interrupts = <28 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&gpio1>; + clocks = <&cclk>; + vref-p-supply = <&ldo4_reg>; + spi-max-frequency = <5000000>; + ti,acquisition-time = <6>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,adc128s052.yaml b/dts/Bindings/iio/adc/ti,adc128s052.yaml new file mode 100644 index 0000000000..775eee972b --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc128s052.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc128s052.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC128S052 and similar ADCs + +maintainers: + - Angelo Compagnucci <angelo.compagnucci@gmail.com> + +description: | + Family of 12 bit SPI ADCs with 2 to 8 channels with a range of different + target sample rates. + +properties: + compatible: + enum: + - ti,adc122s021 + - ti,adc122s051 + - ti,adc122s101 + - ti,adc124s021 + - ti,adc124s051 + - ti,adc124s101 + - ti,adc128s052 + + reg: + maxItems: 1 + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc128s052"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <1000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,adc161s626.yaml b/dts/Bindings/iio/adc/ti,adc161s626.yaml new file mode 100644 index 0000000000..afe7825229 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,adc161s626.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc161s626.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC141S626 and ADC161S626 ADCs + +maintainers: + - Matt Ranostay <matt.ranostay@konsulko.com> + +description: | + Single channel 14/16bit differential ADCs + +properties: + compatible: + enum: + - ti,adc141s626 + - ti,adc161s626 + + reg: + maxItems: 1 + + vdda-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc161s626"; + vdda-supply = <&vdda_fixed>; + reg = <0>; + spi-max-frequency = <4300000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads1015.yaml b/dts/Bindings/iio/adc/ti,ads1015.yaml new file mode 100644 index 0000000000..d605999ffe --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads1015.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads1015.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI ADS1015/ADS1115 4 channel I2C analog to digital converter + +maintainers: + - Daniel Baluta <daniel.baluta@nxp.com> + +description: | + Datasheet at: https://www.ti.com/lit/gpn/ads1015 + Supports both single ended and differential channels. + +properties: + compatible: + enum: + - ti,ads1015 + - ti,ads1115 + - ti,tla2024 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +patternProperties: + "^channel@[0-7]+$": + type: object + additionalProperties: false + description: + Child nodes needed for each channel that the platform uses. + + properties: + reg: + description: | + 0: Voltage over AIN0 and AIN1. + 1: Voltage over AIN0 and AIN3. + 2: Voltage over AIN1 and AIN3. + 3: Voltage over AIN2 and AIN3. + 4: Voltage over AIN0 and GND. + 5: Voltage over AIN1 and GND. + 6: Voltage over AIN2 and GND. + 7: Voltage over AIN3 and GND. + items: + - minimum: 0 + maximum: 7 + + ti,gain: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 5 + description: | + pga is the programmable gain amplifier (values are full scale) + 0: +/- 6.144 V + 1: +/- 4.096 V + 2: +/- 2.048 V (default) + 3: +/- 1.024 V + 4: +/- 0.512 V + 5: +/- 0.256 V + + ti,datarate: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + description: | + Data acquisition rate in samples per second for ADS1015, TLA2024 + 0: 128 + 1: 250 + 2: 490 + 3: 920 + 4: 1600 (default) + 5: 2400 + 6: 3300 + 7: 3300 + + Data acquisition rate in samples per second for ADS1115 + 0: 8 + 1: 16 + 2: 32 + 3: 64 + 4: 128 (default) + 5: 250 + 6: 475 + 7: 860 + + required: + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@49 { + compatible = "ti,ads1015"; + reg = <0x49>; + #address-cells = <1>; + #size-cells = <0>; + channel@0 { + reg = <0>; + }; + channel@4 { + reg = <4>; + ti,gain = <3>; + ti,datarate = <5>; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads1100.yaml b/dts/Bindings/iio/adc/ti,ads1100.yaml new file mode 100644 index 0000000000..970ccab15e --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads1100.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads1100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI ADS1100/ADS1000 single channel I2C analog to digital converter + +maintainers: + - Mike Looijmans <mike.looijmans@topic.nl> + +description: | + Datasheet at: https://www.ti.com/lit/gpn/ads1100 + +properties: + compatible: + enum: + - ti,ads1100 + - ti,ads1000 + + reg: + maxItems: 1 + + vdd-supply: true + + "#io-channel-cells": + const: 0 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@49 { + compatible = "ti,ads1100"; + reg = <0x49>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads124s08.yaml b/dts/Bindings/iio/adc/ti,ads124s08.yaml new file mode 100644 index 0000000000..56a3f1766a --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads124s08.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads124s08.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments' ads124s08 and ads124s06 ADC chip + +maintainers: + - Andrew Davis <afd@ti.com> + +properties: + compatible: + enum: + - ti,ads124s06 + - ti,ads124s08 + + reg: + maxItems: 1 + + spi-cpha: true + + reset-gpios: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads124s08"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpha; + reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads131e08.yaml b/dts/Bindings/iio/adc/ti,ads131e08.yaml new file mode 100644 index 0000000000..890f125d42 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads131e08.yaml @@ -0,0 +1,182 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs + +maintainers: + - Jonathan Cameron <jic23@kernel.org> + +description: | + The ADS131E0x are a family of multichannel, simultaneous sampling, + 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a + built-in programmable gain amplifier (PGA), internal reference + and an onboard oscillator. + The communication with ADC chip is via the SPI bus (mode 1). + + https://www.ti.com/lit/ds/symlink/ads131e08.pdf + +properties: + compatible: + enum: + - ti,ads131e04 + - ti,ads131e06 + - ti,ads131e08 + + reg: + maxItems: 1 + + spi-cpha: true + + clocks: + description: | + Device tree identifier to the clock source (2.048 MHz). + Note: clock source is selected using CLKSEL pin. + maxItems: 1 + + clock-names: + items: + - const: adc-clk + + interrupts: + description: | + IRQ line for the ADC data ready. + maxItems: 1 + + vref-supply: + description: | + Optional external voltage reference. If not supplied, internal voltage + reference is used. + + ti,vref-internal: + description: | + Select the internal voltage reference value. + 0: 2.4V + 1: 4.0V + If this field is left empty, 2.4V is selected. + Note: internal voltage reference is used only if vref-supply is not supplied. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + default: 0 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + - spi-cpha + - clocks + - clock-names + - interrupts + +patternProperties: + "^channel@([0-7])$": + $ref: adc.yaml + type: object + description: | + Represents the external channels which are connected to the ADC. + + properties: + reg: + description: | + The channel number. + Up to 4 channels, numbered from 0 to 3 for ti,ads131e04. + Up to 6 channels, numbered from 0 to 5 for ti,ads131e06. + Up to 8 channels, numbered from 0 to 7 for ti,ads131e08. + items: + minimum: 0 + maximum: 7 + + ti,gain: + description: | + The PGA gain value for the channel. + If this field is left empty, PGA gain 1 is used. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 4, 8, 12] + default: 1 + + ti,mux: + description: | + Channel input selection(muliplexer). + 0: Normal input. + 1: Input shorted to (VREFP + VREFN) / 2 (for offset or noise measurements). + 3: MVDD (for supply measurement) + 4: Temperature sensor + If this field is left empty, normal input is selected. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 3, 4] + default: 0 + + required: + - reg + + additionalProperties: false + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads131e08"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpha; + clocks = <&clk2048k>; + clock-names = "adc-clk"; + interrupt-parent = <&gpio5>; + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; + vref-supply = <&adc_vref>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + + channel@1 { + reg = <1>; + }; + + channel@2 { + reg = <2>; + ti,gain = <2>; + }; + + channel@3 { + reg = <3>; + }; + + channel@4 { + reg = <4>; + }; + + channel@5 { + reg = <5>; + }; + + channel@6 { + reg = <6>; + }; + + channel@7 { + reg = <7>; + ti,mux = <4>; + }; + }; + }; diff --git a/dts/Bindings/iio/adc/ti,ads7924.yaml b/dts/Bindings/iio/adc/ti,ads7924.yaml new file mode 100644 index 0000000000..0d8d06afed --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads7924.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads7924.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI ADS7924 4 channels 12 bits I2C analog to digital converter + +maintainers: + - Hugo Villeneuve <hvilleneuve@dimonoff.com> + +description: | + Texas Instruments ADS7924 4 channels 12 bits I2C analog to digital converter + + Specifications: + https://www.ti.com/lit/gpn/ads7924 + +properties: + compatible: + const: ti,ads7924 + + reg: + maxItems: 1 + + vref-supply: + description: + The regulator supply for the ADC reference voltage (AVDD) + + reset-gpios: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#io-channel-cells": + const: 1 + +patternProperties: + "^channel@[0-3]+$": + $ref: adc.yaml + + description: | + Represents the external channels which are connected to the ADC. + + properties: + reg: + description: | + The channel number. It can have up to 4 channels numbered from 0 to 3. + items: + - minimum: 0 + maximum: 3 + + label: true + + required: + - reg + + additionalProperties: false + +additionalProperties: false + +required: + - compatible + - reg + - vref-supply + - "#address-cells" + - "#size-cells" + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/gpio/gpio.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@48 { + compatible = "ti,ads7924"; + reg = <0x48>; + vref-supply = <&ads7924_reg>; + reset-gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + #address-cells = <1>; + #size-cells = <0>; + channel@0 { + reg = <0>; + label = "CH0"; + }; + channel@1 { + reg = <1>; + label = "CH1"; + }; + channel@2 { + reg = <2>; + label = "CH2"; + }; + channel@3 { + reg = <3>; + label = "CH3"; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads7950.yaml b/dts/Bindings/iio/adc/ti,ads7950.yaml new file mode 100644 index 0000000000..5ab5027be9 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads7950.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads7950.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS7950 and similar ADCs + +maintainers: + - David Lechner <david@lechnology.com> + +description: | + Family of 4-16 channel, 8-12 bit ADCs with SPI interface. + +properties: + compatible: + enum: + - ti,ads7950 + - ti,ads7951 + - ti,ads7952 + - ti,ads7953 + - ti,ads7954 + - ti,ads7955 + - ti,ads7956 + - ti,ads7957 + - ti,ads7958 + - ti,ads7959 + - ti,ads7960 + - ti,ads7961 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 20000000 + + vref-supply: + description: Supplies the 2.5V or 5V reference voltage + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads7957"; + reg = <0>; + vref-supply = <&refin_supply>; + spi-max-frequency = <10000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads8344.yaml b/dts/Bindings/iio/adc/ti,ads8344.yaml new file mode 100644 index 0000000000..f75b2c7029 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads8344.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads8344.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS8344 ADC + +maintainers: + - Gregory Clement <gregory.clement@bootlin.com> + +description: | + 16bit 8-channel ADC with single ended inputs. + +properties: + compatible: + const: ti,ads8344 + + reg: + maxItems: 1 + + vref-supply: + description: Supply the 2.5V or 5V reference voltage + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads8344"; + reg = <0>; + vref-supply = <&refin_supply>; + spi-max-frequency = <10000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,ads8688.yaml b/dts/Bindings/iio/adc/ti,ads8688.yaml new file mode 100644 index 0000000000..f26fdbc15f --- /dev/null +++ b/dts/Bindings/iio/adc/ti,ads8688.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads8688.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments' ADS8684 and ADS8688 ADC chip + +maintainers: + - Sean Nyekjaer <sean@geanix.com> + +description: | + SPI 16bit ADCs with 4/8 channels. + +properties: + compatible: + enum: + - ti,ads8684 + - ti,ads8688 + + reg: + maxItems: 1 + + vref-supply: + description: Optional external reference. If not supplied, assume + REFSEL input tied low to enable the internal reference. + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads8688"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,am3359-adc.yaml b/dts/Bindings/iio/adc/ti,am3359-adc.yaml new file mode 100644 index 0000000000..b32be24a9f --- /dev/null +++ b/dts/Bindings/iio/adc/ti,am3359-adc.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,am3359-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI AM3359 ADC + +maintainers: + - Miquel Raynal <miquel.raynal@bootlin.com> + +properties: + compatible: + oneOf: + - enum: + - ti,am3359-adc + - ti,am4372-adc + - items: + - enum: + - ti,am654-adc + - const: ti,am3359-adc + + '#io-channel-cells': + const: 1 + + ti,adc-channels: + description: List of analog inputs available for ADC. AIN0 = 0, AIN1 = 1 and + so on until AIN7 = 7. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + + ti,chan-step-opendelay: + description: List of open delays for each channel of ADC in the order of + ti,adc-channels. The value corresponds to the number of ADC clock cycles + to wait after applying the step configuration registers and before sending + the start of ADC conversion. Maximum value is 0x3FFFF. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + + ti,chan-step-sampledelay: + description: List of sample delays for each channel of ADC in the order of + ti,adc-channels. The value corresponds to the number of ADC clock cycles + to sample (to hold start of conversion high). Maximum value is 0xFF. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + + ti,chan-step-avg: + description: Number of averages to be performed for each channel of ADC. If + average is 16 (this is also the maximum) then input is sampled 16 times + and averaged to get more accurate value. This increases the time taken by + ADC to generate a sample. Maximum value is 16. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 8 + +required: + - compatible + - '#io-channel-cells' + - ti,adc-channels + +additionalProperties: false + +examples: + - | + adc { + compatible = "ti,am3359-adc"; + #io-channel-cells = <1>; + ti,adc-channels = <4 5 6 7>; + ti,chan-step-opendelay = <0x098 0x3ffff 0x098 0x0>; + ti,chan-step-sampledelay = <0xff 0x0 0xf 0x0>; + ti,chan-step-avg = <16 2 4 8>; + }; diff --git a/dts/Bindings/iio/adc/ti,lmp92064.yaml b/dts/Bindings/iio/adc/ti,lmp92064.yaml new file mode 100644 index 0000000000..5fb65bf774 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,lmp92064.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,lmp92064.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments LMP92064 Precision Current and Voltage Sensor. + +maintainers: + - Leonard Göhrs <l.goehrs@pengutronix.de> + +description: | + The LMP92064 is a two channel ADC intended for combined voltage and current + measurements. + + The device contains two ADCs to allow simultaneous sampling of voltage and + current and thus of instantaneous power consumption. + +properties: + compatible: + enum: + - ti,lmp92064 + + reg: + maxItems: 1 + + vdd-supply: + description: Regulator that provides power to the main part of the chip + + vdig-supply: + description: | + Regulator that provides power to the digital I/O part of the chip + + shunt-resistor-micro-ohms: + description: | + Value of the shunt resistor (in µΩ) connected between INCP and INCN, + across which current is measured. Used to provide correct scaling of the + raw ADC measurement. + + reset-gpios: + maxItems: 1 + +required: + - compatible + - reg + - shunt-resistor-micro-ohms + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,lmp92064"; + reg = <0>; + vdd-supply = <&vdd>; + vdig-supply = <&vdd>; + spi-max-frequency = <20000000>; + shunt-resistor-micro-ohms = <15000>; + reset-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml b/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml new file mode 100644 index 0000000000..f94057d8f6 --- /dev/null +++ b/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,palmas-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Palmas general purpose ADC IP block + +maintainers: + - Tony Lindgren <tony@atomide.com> + +description: | + This ADC is often used to provide channels via the io-channels + consumer framework. + Channels list: + 0 battery type + 1 battery temp NTC (optional current source) + 2 GP + 3 temp (with ext. diode, optional current source) + 4 GP + 5 GP + 6 VBAT_SENSE + 7 VCC_SENSE + 8 Backup Battery voltage + 9 external charger (VCHG) + 10 VBUS + 11 DC-DC current probe (how does this work?) + 12 internal die temp + 13 internal die temp + 14 USB ID pin voltage + 15 test network + +properties: + compatible: + const: ti,palmas-gpadc + + interrupts: + minItems: 1 + maxItems: 3 + + "#io-channel-cells": + const: 1 + + ti,channel0-current-microamp: + description: Channel 0 current in uA. + enum: + - 0 + - 5 + - 15 + - 20 + + ti,channel3-current-microamp: + description: Channel 3 current in uA. + enum: + - 0 + - 10 + - 400 + - 800 + + ti,enable-extended-delay: + $ref: /schemas/types.yaml#/definitions/flag + description: Enable extended delay. + +additionalProperties: false + +required: + - compatible + - "#io-channel-cells" + +... diff --git a/dts/Bindings/iio/adc/ti,tlc4541.yaml b/dts/Bindings/iio/adc/ti,tlc4541.yaml new file mode 100644 index 0000000000..314d1d99bf --- /dev/null +++ b/dts/Bindings/iio/adc/ti,tlc4541.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,tlc4541.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TLC4541 and similar ADCs + +maintainers: + - Phil Reid <preid@electromag.com.au> + +description: | + 14/16bit single channel ADC with SPI interface. + +properties: + compatible: + enum: + - ti,tlc3541 + - ti,tlc4541 + + reg: + maxItems: 1 + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,tlc4541"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <200000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,tsc2046.yaml b/dts/Bindings/iio/adc/ti,tsc2046.yaml new file mode 100644 index 0000000000..866a05c9db --- /dev/null +++ b/dts/Bindings/iio/adc/ti,tsc2046.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,tsc2046.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TSC2046 touch screen controller. + +maintainers: + - Oleksij Rempel <o.rempel@pengutronix.de> + +description: | + TSC2046 is a touch screen controller with 8 channels ADC. + +properties: + compatible: + enum: + - ti,tsc2046e-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-supply: + description: Optional supply of the reference voltage + + "#io-channel-cells": + const: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + +patternProperties: + "^channel@[0-7]$": + $ref: adc.yaml + type: object + + properties: + reg: + description: | + The channel number. It can have up to 8 channels + items: + minimum: 0 + maximum: 7 + + settling-time-us: true + oversampling-ratio: true + + required: + - reg + + additionalProperties: false + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,tsc2046e-adc"; + reg = <0>; + spi-max-frequency = <1000000>; + interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + channel@1 { + reg = <1>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + channel@2 { + reg = <2>; + }; + channel@3 { + reg = <3>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + channel@4 { + reg = <4>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + channel@5 { + reg = <5>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + channel@6 { + reg = <6>; + }; + channel@7 { + reg = <7>; + }; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,twl4030-madc.yaml b/dts/Bindings/iio/adc/ti,twl4030-madc.yaml new file mode 100644 index 0000000000..6781ad2f0f --- /dev/null +++ b/dts/Bindings/iio/adc/ti,twl4030-madc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,twl4030-madc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MADC subsystem in the TWL4030 power module + +maintainers: + - Sebastian Reichel <sre@kernel.org> + +description: + The MADC subsystem in the TWL4030 consists of a 10-bit ADC + combined with a 16-input analog multiplexer. + +properties: + compatible: + const: ti,twl4030-madc + + interrupts: + maxItems: 1 + + ti,system-uses-second-madc-irq: + type: boolean + description: + Set if the second madc irq register should be used, which is intended + to be used by Co-Processors (e.g. a modem). + + "#io-channel-cells": + const: 1 + +required: + - compatible + - interrupts + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + twl { + madc { + compatible = "ti,twl4030-madc"; + interrupts = <3>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/ti,twl6030-gpadc.yaml b/dts/Bindings/iio/adc/ti,twl6030-gpadc.yaml new file mode 100644 index 0000000000..e779a8986e --- /dev/null +++ b/dts/Bindings/iio/adc/ti,twl6030-gpadc.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,twl6030-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPADC subsystem in the TWL6030 power module + +maintainers: + - Andreas Kemnade <andreas@kemnade.info> + +description: + The GPADC subsystem in the TWL603X consists of a 10-bit ADC + combined with a 15-input analog multiplexer in the TWL6030 resp. a + 19-input analog muliplexer in the TWL6032. + +properties: + compatible: + enum: + - ti,twl6030-gpadc + - ti,twl6032-gpadc + + interrupts: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - interrupts + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + gpadc { + compatible = "ti,twl6030-gpadc"; + interrupts = <3>; + #io-channel-cells = <1>; + }; +... diff --git a/dts/Bindings/iio/adc/ti-adc0832.txt b/dts/Bindings/iio/adc/ti-adc0832.txt deleted file mode 100644 index d91130587d..0000000000 --- a/dts/Bindings/iio/adc/ti-adc0832.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Texas Instruments' ADC0831/ADC0832/ADC0832/ADC0838 - -Required properties: - - compatible: Should be one of - * "ti,adc0831" - * "ti,adc0832" - * "ti,adc0834" - * "ti,adc0838" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - - spi-max-frequency: Max SPI frequency to use (< 400000) - -Example: -adc@0 { - compatible = "ti,adc0832"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <200000>; -}; diff --git a/dts/Bindings/iio/adc/ti-adc084s021.txt b/dts/Bindings/iio/adc/ti-adc084s021.txt deleted file mode 100644 index 4259e50620..0000000000 --- a/dts/Bindings/iio/adc/ti-adc084s021.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Texas Instruments' ADC084S021 - -Required properties: - - compatible : Must be "ti,adc084s021" - - reg : SPI chip select number for the device - - vref-supply : The regulator supply for ADC reference voltage - - spi-cpol : Per spi-bus bindings - - spi-cpha : Per spi-bus bindings - - spi-max-frequency : Per spi-bus bindings - -Example: -adc@0 { - compatible = "ti,adc084s021"; - reg = <0>; - vref-supply = <&adc_vref>; - spi-cpol; - spi-cpha; - spi-max-frequency = <16000000>; -}; diff --git a/dts/Bindings/iio/adc/ti-adc108s102.txt b/dts/Bindings/iio/adc/ti-adc108s102.txt deleted file mode 100644 index bbbbb4a9f5..0000000000 --- a/dts/Bindings/iio/adc/ti-adc108s102.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Texas Instruments' ADC108S102 and ADC128S102 ADC chip - -Required properties: - - compatible: Should be "ti,adc108s102" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,adc108s102"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <1000000>; -}; diff --git a/dts/Bindings/iio/adc/ti-adc12138.txt b/dts/Bindings/iio/adc/ti-adc12138.txt deleted file mode 100644 index 049a1d36f0..0000000000 --- a/dts/Bindings/iio/adc/ti-adc12138.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Texas Instruments' ADC12130/ADC12132/ADC12138 - -Required properties: - - compatible: Should be one of - * "ti,adc12130" - * "ti,adc12132" - * "ti,adc12138" - - reg: SPI chip select number for the device - - interrupts: Should contain interrupt for EOC (end of conversion) - - clocks: phandle to conversion clock input - - spi-max-frequency: Definision as per - Documentation/devicetree/bindings/spi/spi-bus.txt - - vref-p-supply: The regulator supply for positive analog voltage reference - -Optional properties: - - vref-n-supply: The regulator supply for negative analog voltage reference - (Note that this must not go below GND or exceed vref-p) - If not specified, this is assumed to be analog ground. - - ti,acquisition-time: The number of conversion clock periods for the S/H's - acquisition time. Should be one of 6, 10, 18, 34. If not specified, - default value of 10 is used. - For high source impedances, this value can be increased to 18 or 34. - For less ADC accuracy and/or slower CCLK frequencies this value may be - decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the - datasheet for details. - -Example: -adc@0 { - compatible = "ti,adc12138"; - reg = <0>; - interrupts = <28 IRQ_TYPE_EDGE_RISING>; - interrupt-parent = <&gpio1>; - clocks = <&cclk>; - vref-p-supply = <&ldo4_reg>; - spi-max-frequency = <5000000>; - ti,acquisition-time = <6>; -}; diff --git a/dts/Bindings/iio/adc/ti-adc128s052.txt b/dts/Bindings/iio/adc/ti-adc128s052.txt deleted file mode 100644 index c07ce1a3f5..0000000000 --- a/dts/Bindings/iio/adc/ti-adc128s052.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Texas Instruments' ADC128S052, ADC122S021 and ADC124S021 ADC chip - -Required properties: - - compatible: Should be one of: - - "ti,adc128s052" - - "ti,adc122s021" - - "ti,adc122s051" - - "ti,adc122s101" - - "ti,adc124s021" - - "ti,adc124s051" - - "ti,adc124s101" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,adc128s052"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <1000000>; -}; diff --git a/dts/Bindings/iio/adc/ti-adc161s626.txt b/dts/Bindings/iio/adc/ti-adc161s626.txt deleted file mode 100644 index 3d25011f0c..0000000000 --- a/dts/Bindings/iio/adc/ti-adc161s626.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Texas Instruments ADC141S626 and ADC161S626 chips - -Required properties: - - compatible: Should be "ti,adc141s626" or "ti,adc161s626" - - reg: spi chip select number for the device - - vdda-supply: supply voltage to VDDA pin - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,adc161s626"; - vdda-supply = <&vdda_fixed>; - reg = <0>; - spi-max-frequency = <4300000>; -}; diff --git a/dts/Bindings/iio/adc/ti-ads124s08.txt b/dts/Bindings/iio/adc/ti-ads124s08.txt deleted file mode 100644 index ecf807bb32..0000000000 --- a/dts/Bindings/iio/adc/ti-ads124s08.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Texas Instruments' ads124s08 and ads124s06 ADC chip - -Required properties: - - compatible : - "ti,ads124s08" - "ti,ads124s06" - - reg : spi chip select number for the device - -Recommended properties: - - spi-max-frequency : Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - - spi-cpha : Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: - - reset-gpios : GPIO pin used to reset the device. - -Example: -adc@0 { - compatible = "ti,ads124s08"; - reg = <0>; - spi-max-frequency = <1000000>; - spi-cpha; - reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -}; diff --git a/dts/Bindings/iio/adc/ti-ads7950.txt b/dts/Bindings/iio/adc/ti-ads7950.txt deleted file mode 100644 index e77a6f7e10..0000000000 --- a/dts/Bindings/iio/adc/ti-ads7950.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Texas Instruments ADS7950 family of A/DC chips - -Required properties: - - compatible: Must be one of "ti,ads7950", "ti,ads7951", "ti,ads7952", - "ti,ads7953", "ti,ads7954", "ti,ads7955", "ti,ads7956", "ti,ads7957", - "ti,ads7958", "ti,ads7959", "ti,ads7960", or "ti,ads7961" - - reg: SPI chip select number for the device - - #io-channel-cells: Must be 1 as per ../iio-bindings.txt - - vref-supply: phandle to a regulator node that supplies the 2.5V or 5V - reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,ads7957"; - reg = <0>; - #io-channel-cells = <1>; - vref-supply = <&refin_supply>; - spi-max-frequency = <10000000>; -}; diff --git a/dts/Bindings/iio/adc/ti-ads8344.txt b/dts/Bindings/iio/adc/ti-ads8344.txt deleted file mode 100644 index e47c3759a8..0000000000 --- a/dts/Bindings/iio/adc/ti-ads8344.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Texas Instruments ADS8344 A/DC chip - -Required properties: - - compatible: Must be "ti,ads8344" - - reg: SPI chip select number for the device - - vref-supply: phandle to a regulator node that supplies the - reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,ads8344"; - reg = <0>; - vref-supply = <&refin_supply>; - spi-max-frequency = <10000000>; -}; diff --git a/dts/Bindings/iio/adc/ti-ads8688.txt b/dts/Bindings/iio/adc/ti-ads8688.txt deleted file mode 100644 index a02337d7ef..0000000000 --- a/dts/Bindings/iio/adc/ti-ads8688.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Texas Instruments' ADS8684 and ADS8688 ADC chip - -Required properties: - - compatible: Should be "ti,ads8684" or "ti,ads8688" - - reg: spi chip select number for the device - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: - - vref-supply: The regulator supply for ADC reference voltage - -Example: -adc@0 { - compatible = "ti,ads8688"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <1000000>; -}; diff --git a/dts/Bindings/iio/adc/twl4030-madc.txt b/dts/Bindings/iio/adc/twl4030-madc.txt deleted file mode 100644 index 6bdd21404b..0000000000 --- a/dts/Bindings/iio/adc/twl4030-madc.txt +++ /dev/null @@ -1,24 +0,0 @@ -* TWL4030 Monitoring Analog to Digital Converter (MADC) - -The MADC subsystem in the TWL4030 consists of a 10-bit ADC -combined with a 16-input analog multiplexer. - -Required properties: - - compatible: Should contain "ti,twl4030-madc". - - interrupts: IRQ line for the MADC submodule. - - #io-channel-cells: Should be set to <1>. - -Optional properties: - - ti,system-uses-second-madc-irq: boolean, set if the second madc irq register - should be used, which is intended to be used - by Co-Processors (e.g. a modem). - -Example: - -&twl { - madc { - compatible = "ti,twl4030-madc"; - interrupts = <3>; - #io-channel-cells = <1>; - }; -}; diff --git a/dts/Bindings/iio/adc/vf610-adc.txt b/dts/Bindings/iio/adc/vf610-adc.txt deleted file mode 100644 index 1aad0514e6..0000000000 --- a/dts/Bindings/iio/adc/vf610-adc.txt +++ /dev/null @@ -1,36 +0,0 @@ -Freescale vf610 Analog to Digital Converter bindings - -The devicetree bindings are for the new ADC driver written for -vf610/i.MX6slx and upward SoCs from Freescale. - -Required properties: -- compatible: Should contain "fsl,vf610-adc" -- reg: Offset and length of the register set for the device -- interrupts: Should contain the interrupt for the device -- clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock. -- clock-names: Must contain "adc", matching entry in the clocks property. -- vref-supply: The regulator supply ADC reference voltage. - -Recommended properties: -- fsl,adck-max-frequency: Maximum frequencies according to datasheets operating - requirements. Three values are required, depending on conversion mode: - - Frequency in normal mode (ADLPC=0, ADHSC=0) - - Frequency in high-speed mode (ADLPC=0, ADHSC=1) - - Frequency in low-power mode (ADLPC=1, ADHSC=0) -- min-sample-time: Minimum sampling time in nanoseconds. This value has - to be chosen according to the conversion mode and the connected analog - source resistance (R_as) and capacitance (C_as). Refer the datasheet's - operating requirements. A safe default across a wide range of R_as and - C_as as well as conversion modes is 1000ns. - -Example: -adc0: adc@4003b000 { - compatible = "fsl,vf610-adc"; - reg = <0x4003b000 0x1000>; - interrupts = <0 53 0x04>; - clocks = <&clks VF610_CLK_ADC0>; - clock-names = "adc"; - fsl,adck-max-frequency = <30000000>, <40000000>, - <20000000>; - vref-supply = <®_vcc_3v3_mcu>; -}; diff --git a/dts/Bindings/iio/adc/x-powers,axp209-adc.yaml b/dts/Bindings/iio/adc/x-powers,axp209-adc.yaml new file mode 100644 index 0000000000..d40689f233 --- /dev/null +++ b/dts/Bindings/iio/adc/x-powers,axp209-adc.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/x-powers,axp209-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: X-Powers AXP ADC + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + +description: | + ADC is frequently used as a provider to consumers of the ADC channels. + Device is a child of an axp209 multifunction device + ADC channels and their indexes per variant: + + AXP209 + ------ + 0 | acin_v + 1 | acin_i + 2 | vbus_v + 3 | vbus_i + 4 | pmic_temp + 5 | gpio0_v + 6 | gpio1_v + 7 | ipsout_v + 8 | batt_v + 9 | batt_chrg_i + 10 | batt_dischrg_i + 11 | ts_v + + AXP22x + ------ + 0 | pmic_temp + 1 | batt_v + 2 | batt_chrg_i + 3 | batt_dischrg_i + 4 | ts_v + + AXP813 + ------ + 0 | pmic_temp + 1 | gpio0_v + 2 | batt_v + 3 | batt_chrg_i + 4 | batt_dischrg_i + 5 | ts_v + + +properties: + compatible: + oneOf: + - const: x-powers,axp209-adc + - const: x-powers,axp221-adc + - const: x-powers,axp813-adc + + - items: + - const: x-powers,axp803-adc + - const: x-powers,axp813-adc + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +examples: + - | + axp221 { + adc { + compatible = "x-powers,axp221-adc"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/dts/Bindings/iio/adc/xilinx-xadc.txt b/dts/Bindings/iio/adc/xilinx-xadc.txt index e0e0755cab..f42e180783 100644 --- a/dts/Bindings/iio/adc/xilinx-xadc.txt +++ b/dts/Bindings/iio/adc/xilinx-xadc.txt @@ -1,13 +1,22 @@ Xilinx XADC device driver -This binding document describes the bindings for both of them since the -bindings are very similar. The Xilinx XADC is a ADC that can be found in the -series 7 FPGAs from Xilinx. The XADC has a DRP interface for communication. -Currently two different frontends for the DRP interface exist. One that is only -available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The -other one is available on all series 7 platforms and is a softmacro with a AXI -interface. This binding document describes the bindings for both of them since -the bindings are very similar. +This binding document describes the bindings for the Xilinx 7 Series XADC as well +as the UltraScale/UltraScale+ System Monitor. + +The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from Xilinx. +The XADC has a DRP interface for communication. Currently two different +frontends for the DRP interface exist. One that is only available on the ZYNQ +family as a hardmacro in the SoC portion of the ZYNQ. The other one is available +on all series 7 platforms and is a softmacro with a AXI interface. This binding +document describes the bindings for both of them since the bindings are very +similar. + +The Xilinx System Monitor is an ADC that is found in the UltraScale and +UltraScale+ FPGAs from Xilinx. The System Monitor provides a DRP interface for +communication. Xilinx provides a standard IP core that can be used to access the +System Monitor through an AXI interface in the FPGA fabric. This IP core is +called the Xilinx System Management Wizard. This document describes the bindings +for this IP. Required properties: - compatible: Should be one of @@ -15,11 +24,14 @@ Required properties: configuration interface to interface to the XADC hardmacro. * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to interface to the XADC hardmacro. + * "xlnx,system-management-wiz-1.3": When using the + Xilinx System Management Wizard fabric IP core to access the + UltraScale and UltraScale+ System Monitor. - reg: Address and length of the register set for the device - interrupts: Interrupt for the XADC control interface. - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock, - when using the AXI-XADC pcore this must be the clock that provides the - clock to the AXI bus interface of the core. + when using the axi-xadc or the axi-system-management-wizard this must be + the clock that provides the clock to the AXI bus interface of the core. Optional properties: - xlnx,external-mux: @@ -110,3 +122,20 @@ Examples: }; }; }; + + adc@80000000 { + compatible = "xlnx,system-management-wiz-1.3"; + reg = <0x80000000 0x1000>; + interrupts = <0 81 4>; + interrupt-parent = <&gic>; + clocks = <&fpga1_clk>; + + xlnx,channels { + #address-cells = <1>; + #size-cells = <0>; + channel@0 { + reg = <0>; + xlnx,bipolar; + }; + }; + }; diff --git a/dts/Bindings/iio/adc/xlnx,zynqmp-ams.yaml b/dts/Bindings/iio/adc/xlnx,zynqmp-ams.yaml new file mode 100644 index 0000000000..8cbad7e792 --- /dev/null +++ b/dts/Bindings/iio/adc/xlnx,zynqmp-ams.yaml @@ -0,0 +1,236 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Zynq Ultrascale AMS controller + +maintainers: + - Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com> + +description: | + The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors + that can be used to sample external voltages and monitor on-die operating + conditions, such as temperature and supply voltage levels. + The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and + PS (Processing System) SYSMON. + All designs should have AMS registers, but PS and PL are optional. The + AMS controller can work with only PS, only PL and both PS and PL + configurations. Please specify registers according to your design. Devicetree + should always have AMS module property. Providing PS & PL module is optional. + + AMS Channel Details + ``````````````````` + Sysmon Block |Channel| Details |Measurement + |Number | |Type + --------------------------------------------------------------------------------------------------------- + AMS CTRL |0 |System PLLs voltage measurement, VCC_PSPLL. |Voltage + |1 |Battery voltage measurement, VCC_PSBATT. |Voltage + |2 |PL Internal voltage measurement, VCCINT. |Voltage + |3 |Block RAM voltage measurement, VCCBRAM. |Voltage + |4 |PL Aux voltage measurement, VCCAUX. |Voltage + |5 |Voltage measurement for six DDR I/O PLLs, VCC_PSDDR_PLL. |Voltage + |6 |VCC_PSINTFP_DDR voltage measurement. |Voltage + --------------------------------------------------------------------------------------------------------- + PS Sysmon |7 |LPD temperature measurement. |Temperature + |8 |FPD temperature measurement (REMOTE). |Temperature + |9 |VCC PS LPD voltage measurement (supply1). |Voltage + |10 |VCC PS FPD voltage measurement (supply2). |Voltage + |11 |PS Aux voltage reference (supply3). |Voltage + |12 |DDR I/O VCC voltage measurement. |Voltage + |13 |PS IO Bank 503 voltage measurement (supply5). |Voltage + |14 |PS IO Bank 500 voltage measurement (supply6). |Voltage + |15 |VCCO_PSIO1 voltage measurement. |Voltage + |16 |VCCO_PSIO2 voltage measurement. |Voltage + |17 |VCC_PS_GTR voltage measurement (VPS_MGTRAVCC). |Voltage + |18 |VTT_PS_GTR voltage measurement (VPS_MGTRAVTT). |Voltage + |19 |VCC_PSADC voltage measurement. |Voltage + --------------------------------------------------------------------------------------------------------- + PL Sysmon |20 |PL temperature measurement. |Temperature + |21 |PL Internal voltage measurement, VCCINT. |Voltage + |22 |PL Auxiliary voltage measurement, VCCAUX. |Voltage + |23 |ADC Reference P+ voltage measurement. |Voltage + |24 |ADC Reference N- voltage measurement. |Voltage + |25 |PL Block RAM voltage measurement, VCCBRAM. |Voltage + |26 |LPD Internal voltage measurement, VCC_PSINTLP (supply4). |Voltage + |27 |FPD Internal voltage measurement, VCC_PSINTFP (supply5). |Voltage + |28 |PS Auxiliary voltage measurement (supply6). |Voltage + |29 |PL VCCADC voltage measurement (vccams). |Voltage + |30 |Differential analog input signal voltage measurement. |Voltage + |31 |VUser0 voltage measurement (supply7). |Voltage + |32 |VUser1 voltage measurement (supply8). |Voltage + |33 |VUser2 voltage measurement (supply9). |Voltage + |34 |VUser3 voltage measurement (supply10). |Voltage + |35 |Auxiliary ch 0 voltage measurement (VAux0). |Voltage + |36 |Auxiliary ch 1 voltage measurement (VAux1). |Voltage + |37 |Auxiliary ch 2 voltage measurement (VAux2). |Voltage + |38 |Auxiliary ch 3 voltage measurement (VAux3). |Voltage + |39 |Auxiliary ch 4 voltage measurement (VAux4). |Voltage + |40 |Auxiliary ch 5 voltage measurement (VAux5). |Voltage + |41 |Auxiliary ch 6 voltage measurement (VAux6). |Voltage + |42 |Auxiliary ch 7 voltage measurement (VAux7). |Voltage + |43 |Auxiliary ch 8 voltage measurement (VAux8). |Voltage + |44 |Auxiliary ch 9 voltage measurement (VAux9). |Voltage + |45 |Auxiliary ch 10 voltage measurement (VAux10). |Voltage + |46 |Auxiliary ch 11 voltage measurement (VAux11). |Voltage + |47 |Auxiliary ch 12 voltage measurement (VAux12). |Voltage + |48 |Auxiliary ch 13 voltage measurement (VAux13). |Voltage + |49 |Auxiliary ch 14 voltage measurement (VAux14). |Voltage + |50 |Auxiliary ch 15 voltage measurement (VAux15). |Voltage + -------------------------------------------------------------------------------------------------------- + +properties: + compatible: + enum: + - xlnx,zynqmp-ams + + interrupts: + maxItems: 1 + + reg: + description: AMS Controller register space + maxItems: 1 + + clocks: + items: + - description: AMS reference clock + + ranges: + description: + Maps the child address space for PS and/or PL. + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + '#io-channel-cells': + const: 1 + + ams-ps@0: + type: object + description: | + PS (Processing System) SYSMON is memory mapped to PS. This block has + built-in alarm generation logic that is used to interrupt the processor + based on condition set. + + properties: + compatible: + enum: + - xlnx,zynqmp-ams-ps + + reg: + description: Register Space for PS-SYSMON + maxItems: 1 + + required: + - compatible + - reg + + additionalProperties: false + + ams-pl@400: + type: object + additionalProperties: false + description: + PL-SYSMON is capable of monitoring off chip voltage and temperature. + PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring + from external master. Out of this interface currently only DRP is + supported. This block has alarm generation logic that is used to + interrupt the processor based on condition set. + + properties: + compatible: + items: + - enum: + - xlnx,zynqmp-ams-pl + + reg: + description: Register Space for PL-SYSMON. + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + patternProperties: + "^channel@([2-4][0-9]|50)$": + type: object + description: + Describes the external channels connected. + + properties: + reg: + description: + Pair of pins the channel is connected to. This value is + same as Channel Number for a particular channel. + minimum: 20 + maximum: 50 + + xlnx,bipolar: + $ref: /schemas/types.yaml#/definitions/flag + type: boolean + description: + If the set channel is used in bipolar mode. + + required: + - reg + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/xlnx-zynqmp-clk.h> + + bus { + #address-cells = <2>; + #size-cells = <2>; + + xilinx_ams: ams@ffa50000 { + compatible = "xlnx,zynqmp-ams"; + interrupt-parent = <&gic>; + interrupts = <0 56 4>; + reg = <0x0 0xffa50000 0x0 0x800>; + clocks = <&zynqmp_clk AMS_REF>; + #address-cells = <1>; + #size-cells = <1>; + #io-channel-cells = <1>; + ranges = <0 0 0xffa50800 0x800>; + + ams_ps: ams-ps@0 { + compatible = "xlnx,zynqmp-ams-ps"; + reg = <0 0x400>; + }; + + ams_pl: ams-pl@400 { + compatible = "xlnx,zynqmp-ams-pl"; + reg = <0x400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + channel@30 { + reg = <30>; + xlnx,bipolar; + }; + channel@31 { + reg = <31>; + }; + channel@38 { + reg = <38>; + xlnx,bipolar; + }; + }; + }; + }; |