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-rw-r--r--dts/Bindings/iio/adc/adi,ad7124.yaml9
-rw-r--r--dts/Bindings/iio/adc/adi,ad9467.yaml65
-rw-r--r--dts/Bindings/iio/adc/adi,axi-adc.yaml62
-rw-r--r--dts/Bindings/iio/adc/lltc,ltc2496.yaml9
-rw-r--r--dts/Bindings/iio/adc/maxim,max1241.yaml63
-rw-r--r--dts/Bindings/iio/adc/microchip,mcp3911.yaml7
-rw-r--r--dts/Bindings/iio/adc/rockchip-saradc.txt37
-rw-r--r--dts/Bindings/iio/adc/rockchip-saradc.yaml80
-rw-r--r--dts/Bindings/iio/adc/st,stm32-adc.yaml35
-rw-r--r--dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml27
10 files changed, 307 insertions, 87 deletions
diff --git a/dts/Bindings/iio/adc/adi,ad7124.yaml b/dts/Bindings/iio/adc/adi,ad7124.yaml
index f0934b295e..deb34deff0 100644
--- a/dts/Bindings/iio/adc/adi,ad7124.yaml
+++ b/dts/Bindings/iio/adc/adi,ad7124.yaml
@@ -72,8 +72,8 @@ patternProperties:
The channel number. It can have up to 8 channels on ad7124-4
and 16 channels on ad7124-8, numbered from 0 to 15.
items:
- minimum: 0
- maximum: 15
+ minimum: 0
+ maximum: 15
adi,reference-select:
description: |
@@ -83,9 +83,8 @@ patternProperties:
1: REFIN2(+)/REFIN2(−).
3: AVDD
If this field is left empty, internal reference is selected.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - enum: [0, 1, 3]
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 3]
diff-channels:
description: see Documentation/devicetree/bindings/iio/adc/adc.txt
diff --git a/dts/Bindings/iio/adc/adi,ad9467.yaml b/dts/Bindings/iio/adc/adi,ad9467.yaml
new file mode 100644
index 0000000000..c4f57fa6aa
--- /dev/null
+++ b/dts/Bindings/iio/adc/adi,ad9467.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices AD9467 High-Speed ADC
+
+maintainers:
+ - Michael Hennerich <michael.hennerich@analog.com>
+ - Alexandru Ardelean <alexandru.ardelean@analog.com>
+
+description: |
+ The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital
+ converter (ADC).
+
+ https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf
+
+properties:
+ compatible:
+ enum:
+ - adi,ad9467
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: adc-clk
+
+ powerdown-gpios:
+ description:
+ Pin that controls the powerdown mode of the device.
+ maxItems: 1
+
+ reset-gpios:
+ description:
+ Reset pin for the device.
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@0 {
+ compatible = "adi,ad9467";
+ reg = <0>;
+ clocks = <&adc_clk>;
+ clock-names = "adc-clk";
+ };
+ };
+...
diff --git a/dts/Bindings/iio/adc/adi,axi-adc.yaml b/dts/Bindings/iio/adc/adi,axi-adc.yaml
new file mode 100644
index 0000000000..0924b2b497
--- /dev/null
+++ b/dts/Bindings/iio/adc/adi,axi-adc.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices AXI ADC IP core
+
+maintainers:
+ - Michael Hennerich <michael.hennerich@analog.com>
+ - Alexandru Ardelean <alexandru.ardelean@analog.com>
+
+description: |
+ Analog Devices Generic AXI ADC IP core for interfacing an ADC device
+ with a high speed serial (JESD204B/C) or source synchronous parallel
+ interface (LVDS/CMOS).
+ Usually, some other interface type (i.e SPI) is used as a control
+ interface for the actual ADC, while this IP core will interface
+ to the data-lines of the ADC and handle the streaming of data into
+ memory via DMA.
+
+ https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
+
+properties:
+ compatible:
+ enum:
+ - adi,axi-adc-10.0.a
+
+ reg:
+ maxItems: 1
+
+ dmas:
+ maxItems: 1
+
+ dma-names:
+ items:
+ - const: rx
+
+ adi,adc-dev:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ A reference to a the actual ADC to which this FPGA ADC interfaces to.
+
+required:
+ - compatible
+ - dmas
+ - reg
+ - adi,adc-dev
+
+additionalProperties: false
+
+examples:
+ - |
+ axi-adc@44a00000 {
+ compatible = "adi,axi-adc-10.0.a";
+ reg = <0x44a00000 0x10000>;
+ dmas = <&rx_dma 0>;
+ dma-names = "rx";
+
+ adi,adc-dev = <&spi_adc>;
+ };
+...
diff --git a/dts/Bindings/iio/adc/lltc,ltc2496.yaml b/dts/Bindings/iio/adc/lltc,ltc2496.yaml
index 118809a032..6a991e9f78 100644
--- a/dts/Bindings/iio/adc/lltc,ltc2496.yaml
+++ b/dts/Bindings/iio/adc/lltc,ltc2496.yaml
@@ -7,9 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Linear Technology / Analog Devices LTC2496 ADC
maintainers:
- - Lars-Peter Clausen <lars@metafoo.de>
- - Michael Hennerich <Michael.Hennerich@analog.com>
- - Stefan Popa <stefan.popa@analog.com>
+ - Lars-Peter Clausen <lars@metafoo.de>
+ - Michael Hennerich <Michael.Hennerich@analog.com>
+ - Stefan Popa <stefan.popa@analog.com>
properties:
compatible:
@@ -18,8 +18,7 @@ properties:
vref-supply:
description: phandle to an external regulator providing the reference voltage
- allOf:
- - $ref: /schemas/types.yaml#/definitions/phandle
+ $ref: /schemas/types.yaml#/definitions/phandle
reg:
description: spi chipselect number according to the usual spi bindings
diff --git a/dts/Bindings/iio/adc/maxim,max1241.yaml b/dts/Bindings/iio/adc/maxim,max1241.yaml
new file mode 100644
index 0000000000..f562505f5e
--- /dev/null
+++ b/dts/Bindings/iio/adc/maxim,max1241.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2020 Alexandru Lazar
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/maxim,max1241.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Maxim MAX1241 12-bit, single-channel analog to digital converter
+
+maintainers:
+ - Alexandru Lazar <alazar@startmail.com>
+
+description: |
+ Bindings for the max1241 12-bit, single-channel ADC device. Datasheet
+ can be found at:
+ https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf
+
+properties:
+ compatible:
+ enum:
+ - maxim,max1241
+
+ reg:
+ maxItems: 1
+
+ vdd-supply:
+ description:
+ Device tree identifier of the regulator that powers the ADC.
+
+ vref-supply:
+ description:
+ Device tree identifier of the regulator that provides the external
+ reference voltage.
+
+ shutdown-gpios:
+ description:
+ GPIO spec for the GPIO pin connected to the ADC's /SHDN pin. If
+ specified, the /SHDN pin will be asserted between conversions,
+ thus enabling power-down mode.
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - vdd-supply
+ - vref-supply
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@0 {
+ compatible = "maxim,max1241";
+ reg = <0>;
+ vdd-supply = <&adc_vdd>;
+ vref-supply = <&adc_vref>;
+ spi-max-frequency = <1000000>;
+ shutdown-gpios = <&gpio 26 1>;
+ };
+ };
diff --git a/dts/Bindings/iio/adc/microchip,mcp3911.yaml b/dts/Bindings/iio/adc/microchip,mcp3911.yaml
index 8ffeceb6ab..95ab285f4e 100644
--- a/dts/Bindings/iio/adc/microchip,mcp3911.yaml
+++ b/dts/Bindings/iio/adc/microchip,mcp3911.yaml
@@ -38,10 +38,9 @@ properties:
microchip,device-addr:
description: Device address when multiple MCP3911 chips are present on the same SPI bus.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - enum: [0, 1, 2, 3]
- - default: 0
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 2, 3]
+ default: 0
vref-supply:
description: |
diff --git a/dts/Bindings/iio/adc/rockchip-saradc.txt b/dts/Bindings/iio/adc/rockchip-saradc.txt
deleted file mode 100644
index c2c50b5987..0000000000
--- a/dts/Bindings/iio/adc/rockchip-saradc.txt
+++ /dev/null
@@ -1,37 +0,0 @@
-Rockchip Successive Approximation Register (SAR) A/D Converter bindings
-
-Required properties:
-- compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc"
- - "rockchip,saradc": for rk3188, rk3288
- - "rockchip,rk3066-tsadc": for rk3036
- - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- - "rockchip,rk3399-saradc": for rk3399
- - "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108
-
-- reg: physical base address of the controller and length of memory mapped
- region.
-- interrupts: The interrupt number to the cpu. The interrupt specifier format
- depends on the interrupt controller.
-- clocks: Must contain an entry for each entry in clock-names.
-- clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
- the peripheral clock.
-- vref-supply: The regulator supply ADC reference voltage.
-- #io-channel-cells: Should be 1, see ../iio-bindings.txt
-
-Optional properties:
-- resets: Must contain an entry for each entry in reset-names if need support
- this option. See ../reset/reset.txt for details.
-- reset-names: Must include the name "saradc-apb".
-
-Example:
- saradc: saradc@2006c000 {
- compatible = "rockchip,saradc";
- reg = <0x2006c000 0x100>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
- clock-names = "saradc", "apb_pclk";
- resets = <&cru SRST_SARADC>;
- reset-names = "saradc-apb";
- #io-channel-cells = <1>;
- vref-supply = <&vcc18>;
- };
diff --git a/dts/Bindings/iio/adc/rockchip-saradc.yaml b/dts/Bindings/iio/adc/rockchip-saradc.yaml
new file mode 100644
index 0000000000..bcff82a423
--- /dev/null
+++ b/dts/Bindings/iio/adc/rockchip-saradc.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip Successive Approximation Register (SAR) A/D Converter
+
+maintainers:
+ - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+ compatible:
+ oneOf:
+ - const: rockchip,saradc
+ - const: rockchip,rk3066-tsadc
+ - const: rockchip,rk3399-saradc
+ - items:
+ - enum:
+ - rockchip,px30-saradc
+ - rockchip,rk3308-saradc
+ - rockchip,rk3328-saradc
+ - rockchip,rv1108-saradc
+ - const: rockchip,rk3399-saradc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: converter clock
+ - description: peripheral clock
+
+ clock-names:
+ items:
+ - const: saradc
+ - const: apb_pclk
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: saradc-apb
+
+ vref-supply:
+ description:
+ The regulator supply for the ADC reference voltage.
+
+ "#io-channel-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - vref-supply
+ - "#io-channel-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3288-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ saradc: saradc@2006c000 {
+ compatible = "rockchip,saradc";
+ reg = <0x2006c000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+ clock-names = "saradc", "apb_pclk";
+ resets = <&cru SRST_SARADC>;
+ reset-names = "saradc-apb";
+ vref-supply = <&vcc18>;
+ #io-channel-cells = <1>;
+ };
diff --git a/dts/Bindings/iio/adc/st,stm32-adc.yaml b/dts/Bindings/iio/adc/st,stm32-adc.yaml
index dd8eb15aeb..28417b31b5 100644
--- a/dts/Bindings/iio/adc/st,stm32-adc.yaml
+++ b/dts/Bindings/iio/adc/st,stm32-adc.yaml
@@ -76,8 +76,7 @@ properties:
description:
Phandle to system configuration controller. It can be used to control the
analog circuitry on stm32mp1.
- allOf:
- - $ref: "/schemas/types.yaml#/definitions/phandle-array"
+ $ref: "/schemas/types.yaml#/definitions/phandle-array"
interrupt-controller: true
@@ -247,8 +246,7 @@ patternProperties:
Resolution (bits) to use for conversions:
- can be 6, 8, 10 or 12 on stm32f4
- can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
+ $ref: /schemas/types.yaml#/definitions/uint32
st,adc-channels:
description: |
@@ -256,8 +254,7 @@ patternProperties:
- 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4
- 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
stm32mp1.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32-array
+ $ref: /schemas/types.yaml#/definitions/uint32-array
st,adc-diff-channels:
description: |
@@ -270,18 +267,17 @@ patternProperties:
required. Both properties can be used together. Some channels can be
used as single-ended and some other ones as differential (mixed). But
channels can't be configured both as single-ended and differential.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32-matrix
- - items:
- items:
- - description: |
- "vinp" indicates positive input number
- minimum: 0
- maximum: 19
- - description: |
- "vinn" indicates negative input number
- minimum: 0
- maximum: 19
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ items:
+ items:
+ - description: |
+ "vinp" indicates positive input number
+ minimum: 0
+ maximum: 19
+ - description: |
+ "vinn" indicates negative input number
+ minimum: 0
+ maximum: 19
st,min-sample-time-nsecs:
description:
@@ -291,8 +287,7 @@ patternProperties:
array that matches "st,adc-channels" and/or "st,adc-diff-channels"
list, to set sample time resp. for all channels, or independently for
each channel.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32-array
+ $ref: /schemas/types.yaml#/definitions/uint32-array
allOf:
- if:
diff --git a/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml
index b1627441a0..d61bc011e8 100644
--- a/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml
+++ b/dts/Bindings/iio/adc/st,stm32-dfsdm-adc.yaml
@@ -95,16 +95,14 @@ patternProperties:
On stm32h7 and stm32mp1:
- For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
- For st,stm32-dfsdm-dmic: 1 channel numbered from 0 to 7.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32-array
- - items:
- minimum: 0
- maximum: 7
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ minimum: 0
+ maximum: 7
st,adc-channel-names:
description: List of single-ended channel names.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/string-array
+ $ref: /schemas/types.yaml#/definitions/string-array
st,filter-order:
description: |
@@ -112,11 +110,10 @@ patternProperties:
- 0: FastSinC
- [1-5]: order 1 to 5.
For audio purpose it is recommended to use order 3 to 5.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - items:
- minimum: 0
- maximum: 5
+ $ref: /schemas/types.yaml#/definitions/uint32
+ items:
+ minimum: 0
+ maximum: 5
"#io-channel-cells":
const: 1
@@ -130,8 +127,7 @@ patternProperties:
- "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0
items:
enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ]
- allOf:
- - $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+ $ref: /schemas/types.yaml#/definitions/non-unique-string-array
st,adc-channel-clk-src:
description: |
@@ -142,8 +138,7 @@ patternProperties:
- "CLKOUT_R": internal SPI clock divided by 2 (rising edge).
items:
enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]
- allOf:
- - $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+ $ref: /schemas/types.yaml#/definitions/non-unique-string-array
st,adc-alt-channel:
description: