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-rw-r--r--dts/Bindings/iommu/renesas,ipmmu-vmsa.yaml10
1 files changed, 10 insertions, 0 deletions
diff --git a/dts/Bindings/iommu/renesas,ipmmu-vmsa.yaml b/dts/Bindings/iommu/renesas,ipmmu-vmsa.yaml
index ce0c715205..8854569ca3 100644
--- a/dts/Bindings/iommu/renesas,ipmmu-vmsa.yaml
+++ b/dts/Bindings/iommu/renesas,ipmmu-vmsa.yaml
@@ -44,6 +44,10 @@ properties:
- renesas,ipmmu-r8a77990 # R-Car E3
- renesas,ipmmu-r8a77995 # R-Car D3
- renesas,ipmmu-r8a779a0 # R-Car V3U
+ - items:
+ - enum:
+ - renesas,ipmmu-r8a779f0 # R-Car S4-8
+ - const: renesas,rcar-gen4-ipmmu-vmsa # R-Car Gen4
reg:
maxItems: 1
@@ -66,6 +70,12 @@ properties:
renesas,ipmmu-main:
$ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to main IPMMU
+ - description: the interrupt bit number associated with the particular
+ cache IPMMU device. The interrupt bit number needs to match the main
+ IPMMU IMSSTR register. Only used by cache IPMMU instances.
description:
Reference to the main IPMMU phandle plus 1 cell. The cell is
the interrupt bit number associated with the particular cache IPMMU