summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/pci/rockchip-dw-pcie.yaml
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/pci/rockchip-dw-pcie.yaml')
-rw-r--r--dts/Bindings/pci/rockchip-dw-pcie.yaml110
1 files changed, 93 insertions, 17 deletions
diff --git a/dts/Bindings/pci/rockchip-dw-pcie.yaml b/dts/Bindings/pci/rockchip-dw-pcie.yaml
index 142bbe5777..5f719218c4 100644
--- a/dts/Bindings/pci/rockchip-dw-pcie.yaml
+++ b/dts/Bindings/pci/rockchip-dw-pcie.yaml
@@ -14,25 +14,19 @@ maintainers:
description: |+
RK3568 SoC PCIe host controller is based on the Synopsys DesignWare
PCIe IP and thus inherits all the common properties defined in
- designware-pcie.txt.
+ snps,dw-pcie.yaml.
allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
-
-# We need a select here so we don't match all nodes with 'snps,dw-pcie'
-select:
- properties:
- compatible:
- contains:
- const: rockchip,rk3568-pcie
- required:
- - compatible
+ - $ref: /schemas/pci/snps,dw-pcie.yaml#
properties:
compatible:
- items:
+ oneOf:
- const: rockchip,rk3568-pcie
- - const: snps,dw-pcie
+ - items:
+ - enum:
+ - rockchip,rk3588-pcie
+ - const: rockchip,rk3568-pcie
reg:
items:
@@ -47,20 +41,81 @@ properties:
- const: config
clocks:
+ minItems: 5
items:
- description: AHB clock for PCIe master
- description: AHB clock for PCIe slave
- description: AHB clock for PCIe dbi
- description: APB clock for PCIe
- description: Auxiliary clock for PCIe
+ - description: PIPE clock
+ - description: Reference clock for PCIe
clock-names:
+ minItems: 5
items:
- const: aclk_mst
- const: aclk_slv
- const: aclk_dbi
- const: pclk
- const: aux
+ - const: pipe
+ - const: ref
+
+ interrupts:
+ items:
+ - description:
+ Combined system interrupt, which is used to signal the following
+ interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme,
+ hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi,
+ edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app
+ - description:
+ Combined PM interrupt, which is used to signal the following
+ interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2,
+ linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2,
+ linkst_out_l0s, pm_dstate_update
+ - description:
+ Combined message interrupt, which is used to signal the following
+ interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi,
+ pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active
+ - description:
+ Combined legacy interrupt, which is used to signal the following
+ interrupts - inta, intb, intc, intd
+ - description:
+ Combined error interrupt, which is used to signal the following
+ interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,
+ tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx,
+ nf_err_rx, f_err_rx, radm_qoverflow
+
+ interrupt-names:
+ items:
+ - const: sys
+ - const: pmc
+ - const: msg
+ - const: legacy
+ - const: err
+
+ legacy-interrupt-controller:
+ description: Interrupt controller node for handling legacy PCI interrupts.
+ type: object
+ additionalProperties: false
+ properties:
+ "#address-cells":
+ const: 0
+
+ "#interrupt-cells":
+ const: 1
+
+ interrupt-controller: true
+
+ interrupts:
+ items:
+ - description: combined legacy interrupt
+ required:
+ - "#address-cells"
+ - "#interrupt-cells"
+ - interrupt-controller
+ - interrupts
msi-map: true
@@ -76,13 +131,19 @@ properties:
maxItems: 1
ranges:
- maxItems: 2
+ minItems: 2
+ maxItems: 3
resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
reset-names:
- const: pipe
+ oneOf:
+ - const: pipe
+ - items:
+ - const: pwr
+ - const: pipe
vpcie3v3-supply: true
@@ -104,13 +165,14 @@ unevaluatedProperties: false
examples:
- |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
bus {
#address-cells = <2>;
#size-cells = <2>;
pcie3x2: pcie@fe280000 {
- compatible = "rockchip,rk3568-pcie", "snps,dw-pcie";
+ compatible = "rockchip,rk3568-pcie";
reg = <0x3 0xc0800000 0x0 0x390000>,
<0x0 0xfe280000 0x0 0x10000>,
<0x3 0x80000000 0x0 0x100000>;
@@ -123,6 +185,12 @@ examples:
"aclk_dbi", "pclk",
"aux";
device_type = "pci";
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "sys", "pmc", "msg", "legacy", "err";
linux,pci-domain = <2>;
max-link-speed = <2>;
msi-map = <0x2000 &its 0x2000 0x1000>;
@@ -136,6 +204,14 @@ examples:
reset-names = "pipe";
#address-cells = <3>;
#size-cells = <2>;
+
+ legacy-interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
+ };
};
};
...