diff options
Diffstat (limited to 'dts/Bindings/powerpc/fsl')
-rw-r--r-- | dts/Bindings/powerpc/fsl/cpus.txt | 2 | ||||
-rw-r--r-- | dts/Bindings/powerpc/fsl/mpc5200.txt | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/dts/Bindings/powerpc/fsl/cpus.txt b/dts/Bindings/powerpc/fsl/cpus.txt index d63ab1dec1..801c660691 100644 --- a/dts/Bindings/powerpc/fsl/cpus.txt +++ b/dts/Bindings/powerpc/fsl/cpus.txt @@ -5,7 +5,7 @@ Copyright 2013 Freescale Semiconductor Inc. Power Architecture CPUs in Freescale SOCs are represented in device trees as per the definition in the Devicetree Specification. -In addition to the the Devicetree Specification definitions, the properties +In addition to the Devicetree Specification definitions, the properties defined below may be present on CPU nodes. PROPERTIES diff --git a/dts/Bindings/powerpc/fsl/mpc5200.txt b/dts/Bindings/powerpc/fsl/mpc5200.txt index d096cf461d..4571c857db 100644 --- a/dts/Bindings/powerpc/fsl/mpc5200.txt +++ b/dts/Bindings/powerpc/fsl/mpc5200.txt @@ -172,7 +172,7 @@ Interrupt controller (fsl,mpc5200-pic) node The mpc5200 pic binding splits hardware IRQ numbers into two levels. The split reflects the layout of the PIC hardware itself, which groups interrupts into one of three groups; CRIT, MAIN or PERP. Also, the -Bestcomm dma engine has it's own set of interrupt sources which are +Bestcomm dma engine has its own set of interrupt sources which are cascaded off of peripheral interrupt 0, which the driver interprets as a fourth group, SDMA. |