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-rw-r--r--dts/Bindings/reset/uniphier-reset.txt47
1 files changed, 24 insertions, 23 deletions
diff --git a/dts/Bindings/reset/uniphier-reset.txt b/dts/Bindings/reset/uniphier-reset.txt
index 5020524cdd..83ab0f599c 100644
--- a/dts/Bindings/reset/uniphier-reset.txt
+++ b/dts/Bindings/reset/uniphier-reset.txt
@@ -6,14 +6,14 @@ System reset
Required properties:
- compatible: should be one of the following:
- "socionext,uniphier-sld3-reset" - for sLD3 SoC.
- "socionext,uniphier-ld4-reset" - for LD4 SoC.
- "socionext,uniphier-pro4-reset" - for Pro4 SoC.
- "socionext,uniphier-sld8-reset" - for sLD8 SoC.
- "socionext,uniphier-pro5-reset" - for Pro5 SoC.
- "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC.
- "socionext,uniphier-ld11-reset" - for LD11 SoC.
- "socionext,uniphier-ld20-reset" - for LD20 SoC.
+ "socionext,uniphier-sld3-reset" - for sLD3 SoC
+ "socionext,uniphier-ld4-reset" - for LD4 SoC
+ "socionext,uniphier-pro4-reset" - for Pro4 SoC
+ "socionext,uniphier-sld8-reset" - for sLD8 SoC
+ "socionext,uniphier-pro5-reset" - for Pro5 SoC
+ "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC
+ "socionext,uniphier-ld11-reset" - for LD11 SoC
+ "socionext,uniphier-ld20-reset" - for LD20 SoC
- #reset-cells: should be 1.
Example:
@@ -37,14 +37,15 @@ Media I/O (MIO) reset, SD reset
Required properties:
- compatible: should be one of the following:
- "socionext,uniphier-sld3-mio-reset" - for sLD3 SoC.
- "socionext,uniphier-ld4-mio-reset" - for LD4 SoC.
- "socionext,uniphier-pro4-mio-reset" - for Pro4 SoC.
- "socionext,uniphier-sld8-mio-reset" - for sLD8 SoC.
- "socionext,uniphier-pro5-sd-reset" - for Pro5 SoC.
- "socionext,uniphier-pxs2-sd-reset" - for PXs2/LD6b SoC.
- "socionext,uniphier-ld11-mio-reset" - for LD11 SoC.
- "socionext,uniphier-ld20-sd-reset" - for LD20 SoC.
+ "socionext,uniphier-sld3-mio-reset" - for sLD3 SoC
+ "socionext,uniphier-ld4-mio-reset" - for LD4 SoC
+ "socionext,uniphier-pro4-mio-reset" - for Pro4 SoC
+ "socionext,uniphier-sld8-mio-reset" - for sLD8 SoC
+ "socionext,uniphier-pro5-sd-reset" - for Pro5 SoC
+ "socionext,uniphier-pxs2-sd-reset" - for PXs2/LD6b SoC
+ "socionext,uniphier-ld11-mio-reset" - for LD11 SoC (MIO)
+ "socionext,uniphier-ld11-sd-reset" - for LD11 SoC (SD)
+ "socionext,uniphier-ld20-sd-reset" - for LD20 SoC
- #reset-cells: should be 1.
Example:
@@ -68,13 +69,13 @@ Peripheral reset
Required properties:
- compatible: should be one of the following:
- "socionext,uniphier-ld4-peri-reset" - for LD4 SoC.
- "socionext,uniphier-pro4-peri-reset" - for Pro4 SoC.
- "socionext,uniphier-sld8-peri-reset" - for sLD8 SoC.
- "socionext,uniphier-pro5-peri-reset" - for Pro5 SoC.
- "socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC.
- "socionext,uniphier-ld11-peri-reset" - for LD11 SoC.
- "socionext,uniphier-ld20-peri-reset" - for LD20 SoC.
+ "socionext,uniphier-ld4-peri-reset" - for LD4 SoC
+ "socionext,uniphier-pro4-peri-reset" - for Pro4 SoC
+ "socionext,uniphier-sld8-peri-reset" - for sLD8 SoC
+ "socionext,uniphier-pro5-peri-reset" - for Pro5 SoC
+ "socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC
+ "socionext,uniphier-ld11-peri-reset" - for LD11 SoC
+ "socionext,uniphier-ld20-peri-reset" - for LD20 SoC
- #reset-cells: should be 1.
Example: