diff options
Diffstat (limited to 'dts/Bindings/rng')
30 files changed, 644 insertions, 237 deletions
diff --git a/dts/Bindings/rng/amlogic,meson-rng.yaml b/dts/Bindings/rng/amlogic,meson-rng.yaml index 444be32a8a..afa52af442 100644 --- a/dts/Bindings/rng/amlogic,meson-rng.yaml +++ b/dts/Bindings/rng/amlogic,meson-rng.yaml @@ -2,18 +2,19 @@ # Copyright 2019 BayLibre, SAS %YAML 1.2 --- -$id: "http://devicetree.org/schemas/rng/amlogic,meson-rng.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/rng/amlogic,meson-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic Meson Random number generator maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: enum: - amlogic,meson-rng + - amlogic,meson-s4-rng reg: maxItems: 1 diff --git a/dts/Bindings/rng/apm,rng.txt b/dts/Bindings/rng/apm,rng.txt deleted file mode 100644 index 4dde4b06cd..0000000000 --- a/dts/Bindings/rng/apm,rng.txt +++ /dev/null @@ -1,17 +0,0 @@ -APM X-Gene SoC random number generator. - -Required properties: - -- compatible : should be "apm,xgene-rng" -- reg : specifies base physical address and size of the registers map -- clocks : phandle to clock-controller plus clock-specifier pair -- interrupts : specify the fault interrupt for the RNG device - -Example: - - rng: rng@10520000 { - compatible = "apm,xgene-rng"; - reg = <0x0 0x10520000 0x0 0x100>; - interrupts = <0x0 0x41 0x4>; - clocks = <&rngpkaclk 0>; - }; diff --git a/dts/Bindings/rng/apm,x-gene-rng.yaml b/dts/Bindings/rng/apm,x-gene-rng.yaml new file mode 100644 index 0000000000..02be143cc8 --- /dev/null +++ b/dts/Bindings/rng/apm,x-gene-rng.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/apm,x-gene-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC Random Number Generator + +maintainers: + - Khuong Dinh <khuong@os.amperecomputing.com> + +properties: + compatible: + const: apm,xgene-rng + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - interrupts + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + rng@10520000 { + compatible = "apm,xgene-rng"; + reg = <0x0 0x10520000 0x0 0x100>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rngpkaclk 0>; + }; + }; diff --git a/dts/Bindings/rng/atmel,at91-trng.yaml b/dts/Bindings/rng/atmel,at91-trng.yaml new file mode 100644 index 0000000000..3ce45456d8 --- /dev/null +++ b/dts/Bindings/rng/atmel,at91-trng.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/atmel,at91-trng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel AT91 True Random Number Generator + +maintainers: + - Nicolas Ferre <nicolas.ferre@microchip.com> + - Alexandre Belloni <alexandre.belloni@bootlin.com> + - Claudiu Beznea <claudiu.beznea@microchip.com> + +properties: + compatible: + oneOf: + - enum: + - atmel,at91sam9g45-trng + - microchip,sam9x60-trng + - items: + - enum: + - microchip,sama7g5-trng + - const: atmel,at91sam9g45-trng + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - interrupts + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + rng@fffcc000 { + compatible = "atmel,at91sam9g45-trng"; + reg = <0xfffcc000 0x4000>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&trng_clk>; + }; diff --git a/dts/Bindings/rng/atmel-trng.txt b/dts/Bindings/rng/atmel-trng.txt deleted file mode 100644 index 3900ee4f35..0000000000 --- a/dts/Bindings/rng/atmel-trng.txt +++ /dev/null @@ -1,16 +0,0 @@ -Atmel TRNG (True Random Number Generator) block - -Required properties: -- compatible : Should be "atmel,at91sam9g45-trng" or "microchip,sam9x60-trng" -- reg : Offset and length of the register set of this block -- interrupts : the interrupt number for the TRNG block -- clocks: should contain the TRNG clk source - -Example: - -trng@fffcc000 { - compatible = "atmel,at91sam9g45-trng"; - reg = <0xfffcc000 0x4000>; - interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&trng_clk>; -}; diff --git a/dts/Bindings/rng/brcm,iproc-rng200.txt b/dts/Bindings/rng/brcm,iproc-rng200.txt deleted file mode 100644 index 802523196e..0000000000 --- a/dts/Bindings/rng/brcm,iproc-rng200.txt +++ /dev/null @@ -1,16 +0,0 @@ -HWRNG support for the iproc-rng200 driver - -Required properties: -- compatible : Must be one of: - "brcm,bcm2711-rng200" - "brcm,bcm7211-rng200" - "brcm,bcm7278-rng200" - "brcm,iproc-rng200" -- reg : base address and size of control register block - -Example: - -rng { - compatible = "brcm,iproc-rng200"; - reg = <0x18032000 0x28>; -}; diff --git a/dts/Bindings/rng/brcm,iproc-rng200.yaml b/dts/Bindings/rng/brcm,iproc-rng200.yaml new file mode 100644 index 0000000000..827983008e --- /dev/null +++ b/dts/Bindings/rng/brcm,iproc-rng200.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/brcm,iproc-rng200.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HWRNG support for the iproc-rng200 driver + +maintainers: + - Florian Fainelli <f.fainelli@gmail.com> + +properties: + compatible: + enum: + - brcm,bcm2711-rng200 + - brcm,bcm7211-rng200 + - brcm,bcm7278-rng200 + - brcm,iproc-rng200 + + reg: + maxItems: 1 + +additionalProperties: false + +examples: + - | + rng@18032000 { + compatible = "brcm,iproc-rng200"; + reg = <0x18032000 0x28>; + }; diff --git a/dts/Bindings/rng/ingenic,rng.yaml b/dts/Bindings/rng/ingenic,rng.yaml index b2e4a6a7f9..79a023cbfd 100644 --- a/dts/Bindings/rng/ingenic,rng.yaml +++ b/dts/Bindings/rng/ingenic,rng.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rng/ingenic,rng.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Bindings for RNG in Ingenic SoCs +title: RNG in Ingenic SoCs maintainers: - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> diff --git a/dts/Bindings/rng/ingenic,trng.yaml b/dts/Bindings/rng/ingenic,trng.yaml index 808f247c84..acaeb63caf 100644 --- a/dts/Bindings/rng/ingenic,trng.yaml +++ b/dts/Bindings/rng/ingenic,trng.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rng/ingenic,trng.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Bindings for DTRNG in Ingenic SoCs +title: DTRNG in Ingenic SoCs maintainers: - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> @@ -32,7 +32,7 @@ additionalProperties: false examples: - | - #include <dt-bindings/clock/x1830-cgu.h> + #include <dt-bindings/clock/ingenic,x1830-cgu.h> dtrng: trng@10072000 { compatible = "ingenic,x1830-dtrng"; diff --git a/dts/Bindings/rng/intel,ixp46x-rng.yaml b/dts/Bindings/rng/intel,ixp46x-rng.yaml new file mode 100644 index 0000000000..9f7590ce6b --- /dev/null +++ b/dts/Bindings/rng/intel,ixp46x-rng.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/intel,ixp46x-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel IXP46x RNG + +description: | + The Intel IXP46x has a random number generator at a fixed physical + location in memory. Each read is guaranteed to provide a unique + 32 bit random number. + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +properties: + compatible: + const: intel,ixp46x-rng + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + rng@70002100 { + compatible = "intel,ixp46x-rng"; + reg = <0x70002100 4>; + }; diff --git a/dts/Bindings/rng/ks-sa-rng.txt b/dts/Bindings/rng/ks-sa-rng.txt deleted file mode 100644 index b7a65b4879..0000000000 --- a/dts/Bindings/rng/ks-sa-rng.txt +++ /dev/null @@ -1,21 +0,0 @@ -Keystone SoC Hardware Random Number Generator(HWRNG) Module - -On Keystone SoCs HWRNG module is a submodule of the Security Accelerator. - -- compatible: should be "ti,keystone-rng" -- ti,syscon-sa-cfg: phandle to syscon node of the SA configuration registers. - This registers are shared between hwrng and crypto drivers. -- clocks: phandle to the reference clocks for the subsystem -- clock-names: functional clock name. Should be set to "fck" -- reg: HWRNG module register space - -Example: -/* K2HK */ - -rng@24000 { - compatible = "ti,keystone-rng"; - ti,syscon-sa-cfg = <&sa_config>; - clocks = <&clksa>; - clock-names = "fck"; - reg = <0x24000 0x1000>; -}; diff --git a/dts/Bindings/rng/mtk-rng.txt b/dts/Bindings/rng/mtk-rng.txt deleted file mode 100644 index dfdcb5cd2e..0000000000 --- a/dts/Bindings/rng/mtk-rng.txt +++ /dev/null @@ -1,22 +0,0 @@ -Device-Tree bindings for Mediatek random number generator -found in MediaTek SoC family - -Required properties: -- compatible : Should be - "mediatek,mt7622-rng", "mediatek,mt7623-rng" : for MT7622 - "mediatek,mt7629-rng", "mediatek,mt7623-rng" : for MT7629 - "mediatek,mt7623-rng" : for MT7623 - "mediatek,mt8516-rng", "mediatek,mt7623-rng" : for MT8516 -- clocks : list of clock specifiers, corresponding to - entries in clock-names property; -- clock-names : Should contain "rng" entries; -- reg : Specifies base physical address and size of the registers - -Example: - -rng: rng@1020f000 { - compatible = "mediatek,mt7623-rng"; - reg = <0 0x1020f000 0 0x1000>; - clocks = <&infracfg CLK_INFRA_TRNG>; - clock-names = "rng"; -}; diff --git a/dts/Bindings/rng/mtk-rng.yaml b/dts/Bindings/rng/mtk-rng.yaml new file mode 100644 index 0000000000..7e8dc62e5d --- /dev/null +++ b/dts/Bindings/rng/mtk-rng.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/mtk-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Random number generator + +maintainers: + - Sean Wang <sean.wang@mediatek.com> + +properties: + $nodename: + pattern: "^rng@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - mediatek,mt7623-rng + - items: + - enum: + - mediatek,mt7622-rng + - mediatek,mt7629-rng + - mediatek,mt7986-rng + - mediatek,mt8365-rng + - mediatek,mt8516-rng + - const: mediatek,mt7623-rng + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: rng + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt2701-clk.h> + rng: rng@1020f000 { + compatible = "mediatek,mt7623-rng"; + reg = <0x1020f000 0x1000>; + clocks = <&infracfg CLK_INFRA_TRNG>; + clock-names = "rng"; + }; diff --git a/dts/Bindings/rng/nuvoton,npcm-rng.txt b/dts/Bindings/rng/nuvoton,npcm-rng.txt deleted file mode 100644 index 65c04172fc..0000000000 --- a/dts/Bindings/rng/nuvoton,npcm-rng.txt +++ /dev/null @@ -1,12 +0,0 @@ -NPCM SoC Random Number Generator - -Required properties: -- compatible : "nuvoton,npcm750-rng" for the NPCM7XX BMC. -- reg : Specifies physical base address and size of the registers. - -Example: - -rng: rng@f000b000 { - compatible = "nuvoton,npcm750-rng"; - reg = <0xf000b000 0x8>; -}; diff --git a/dts/Bindings/rng/nuvoton,npcm-rng.yaml b/dts/Bindings/rng/nuvoton,npcm-rng.yaml new file mode 100644 index 0000000000..e8e4ab1e5b --- /dev/null +++ b/dts/Bindings/rng/nuvoton,npcm-rng.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/nuvoton,npcm-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM SoC Random Number Generator + +maintainers: + - Avi Fishman <avifishman70@gmail.com> + - Tomer Maimon <tmaimon77@gmail.com> + - Tali Perry <tali.perry1@gmail.com> + - Patrick Venture <venture@google.com> + - Nancy Yuen <yuenn@google.com> + - Benjamin Fair <benjaminfair@google.com> + +properties: + compatible: + enum: + - nuvoton,npcm750-rng + - nuvoton,npcm845-rng + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + rng@f000b000 { + compatible = "nuvoton,npcm750-rng"; + reg = <0xf000b000 0x8>; + }; diff --git a/dts/Bindings/rng/omap3_rom_rng.txt b/dts/Bindings/rng/omap3_rom_rng.txt deleted file mode 100644 index f315c9723b..0000000000 --- a/dts/Bindings/rng/omap3_rom_rng.txt +++ /dev/null @@ -1,27 +0,0 @@ -OMAP ROM RNG driver binding - -Secure SoCs may provide RNG via secure ROM calls like Nokia N900 does. The -implementation can depend on the SoC secure ROM used. - -- compatible: - Usage: required - Value type: <string> - Definition: must be "nokia,n900-rom-rng" - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: reference to the the RNG interface clock - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: must be "ick" - -Example: - - rom_rng: rng { - compatible = "nokia,n900-rom-rng"; - clocks = <&rng_ick>; - clock-names = "ick"; - }; diff --git a/dts/Bindings/rng/omap_rng.txt b/dts/Bindings/rng/omap_rng.txt deleted file mode 100644 index ea434ce50f..0000000000 --- a/dts/Bindings/rng/omap_rng.txt +++ /dev/null @@ -1,38 +0,0 @@ -OMAP SoC and Inside-Secure HWRNG Module - -Required properties: - -- compatible : Should contain entries for this and backward compatible - RNG versions: - - "ti,omap2-rng" for OMAP2. - - "ti,omap4-rng" for OMAP4, OMAP5 and AM33XX. - - "inside-secure,safexcel-eip76" for SoCs with EIP76 IP block - Note that these two versions are incompatible. -- ti,hwmods: Name of the hwmod associated with the RNG module -- reg : Offset and length of the register set for the module -- interrupts : the interrupt number for the RNG module. - Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76" -- clocks: the trng clock source. Only mandatory for the - "inside-secure,safexcel-eip76" compatible, the second clock is - needed for the Armada 7K/8K SoCs -- clock-names: mandatory if there is a second clock, in this case the - name must be "core" for the first clock and "reg" for the second - one - - -Example: -/* AM335x */ -rng: rng@48310000 { - compatible = "ti,omap4-rng"; - ti,hwmods = "rng"; - reg = <0x48310000 0x2000>; - interrupts = <111>; -}; - -/* SafeXcel IP-76 */ -trng: rng@f2760000 { - compatible = "inside-secure,safexcel-eip76"; - reg = <0xf2760000 0x7d>; - interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpm_syscon0 1 25>; -}; diff --git a/dts/Bindings/rng/omap_rng.yaml b/dts/Bindings/rng/omap_rng.yaml new file mode 100644 index 0000000000..c0ac4f68ea --- /dev/null +++ b/dts/Bindings/rng/omap_rng.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/omap_rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP SoC and Inside-Secure HWRNG Module + +maintainers: + - Jayesh Choudhary <j-choudhary@ti.com> + +properties: + compatible: + enum: + - ti,omap2-rng + - ti,omap4-rng + - inside-secure,safexcel-eip76 + + ti,hwmods: + const: rng + deprecated: true + description: Name of the hwmod associated with the RNG module + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: EIP150 gateable clock + - description: Main gateable clock + + clock-names: + minItems: 1 + items: + - const: core + - const: reg + + +allOf: + - if: + properties: + compatible: + contains: + enum: + - ti,omap4-rng + - inside-secure,safexcel-eip76 + + then: + required: + - interrupts + + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + /* AM335x */ + rng: rng@48310000 { + compatible = "ti,omap4-rng"; + ti,hwmods = "rng"; + reg = <0x48310000 0x2000>; + interrupts = <111>; + }; + - | + /* SafeXcel IP-76 */ + trng: rng@f2760000 { + compatible = "inside-secure,safexcel-eip76"; + reg = <0xf2760000 0x7d>; + interrupts = <0 59 4>; + clocks = <&cpm_syscon0 1 25>; + }; + +... diff --git a/dts/Bindings/rng/samsung,exynos5250-trng.txt b/dts/Bindings/rng/samsung,exynos5250-trng.txt deleted file mode 100644 index 5a613a4ec7..0000000000 --- a/dts/Bindings/rng/samsung,exynos5250-trng.txt +++ /dev/null @@ -1,17 +0,0 @@ -Exynos True Random Number Generator - -Required properties: - -- compatible : Should be "samsung,exynos5250-trng". -- reg : Specifies base physical address and size of the registers map. -- clocks : Phandle to clock-controller plus clock-specifier pair. -- clock-names : "secss" as a clock name. - -Example: - - rng@10830600 { - compatible = "samsung,exynos5250-trng"; - reg = <0x10830600 0x100>; - clocks = <&clock CLK_SSS>; - clock-names = "secss"; - }; diff --git a/dts/Bindings/rng/samsung,exynos5250-trng.yaml b/dts/Bindings/rng/samsung,exynos5250-trng.yaml new file mode 100644 index 0000000000..765d9f9edd --- /dev/null +++ b/dts/Bindings/rng/samsung,exynos5250-trng.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/samsung,exynos5250-trng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC True Random Number Generator + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + - Łukasz Stelmach <l.stelmach@samsung.com> + +properties: + compatible: + const: samsung,exynos5250-trng + + clocks: + maxItems: 1 + + clock-names: + items: + - const: secss + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/exynos5250.h> + + rng@10830600 { + compatible = "samsung,exynos5250-trng"; + reg = <0x10830600 0x100>; + clocks = <&clock CLK_SSS>; + clock-names = "secss"; + }; diff --git a/dts/Bindings/rng/silex-insight,ba431-rng.yaml b/dts/Bindings/rng/silex-insight,ba431-rng.yaml index 48ab82abf5..4673d6160a 100644 --- a/dts/Bindings/rng/silex-insight,ba431-rng.yaml +++ b/dts/Bindings/rng/silex-insight,ba431-rng.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rng/silex-insight,ba431-rng.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Silex Insight BA431 RNG bindings +title: Silex Insight BA431 RNG description: | The BA431 hardware random number generator is an IP that is FIPS-140-2/3 diff --git a/dts/Bindings/rng/st,rng.txt b/dts/Bindings/rng/st,rng.txt deleted file mode 100644 index 35734bc282..0000000000 --- a/dts/Bindings/rng/st,rng.txt +++ /dev/null @@ -1,15 +0,0 @@ -STMicroelectronics HW Random Number Generator ----------------------------------------------- - -Required parameters: -compatible : Should be "st,rng" -reg : Base address and size of IP's register map. -clocks : Phandle to device's clock (See: ../clocks/clock-bindings.txt) - -Example: - -rng@fee80000 { - compatible = "st,rng"; - reg = <0xfee80000 0x1000>; - clocks = <&clk_sysin>; -} diff --git a/dts/Bindings/rng/st,rng.yaml b/dts/Bindings/rng/st,rng.yaml new file mode 100644 index 0000000000..ff1211ef90 --- /dev/null +++ b/dts/Bindings/rng/st,rng.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/st,rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics Hardware Random Number Generator + +maintainers: + - Patrice Chotard <patrice.chotard@foss.st.com> + +properties: + compatible: + const: st,rng + + clocks: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - reg + +additionalProperties: false + +examples: + - | + rng@fee80000 { + compatible = "st,rng"; + reg = <0xfee80000 0x1000>; + clocks = <&clk_sysin>; + }; diff --git a/dts/Bindings/rng/st,stm32-rng.yaml b/dts/Bindings/rng/st,stm32-rng.yaml index 82bb2e97e8..717f6b321f 100644 --- a/dts/Bindings/rng/st,stm32-rng.yaml +++ b/dts/Bindings/rng/st,stm32-rng.yaml @@ -4,18 +4,20 @@ $id: http://devicetree.org/schemas/rng/st,stm32-rng.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: STMicroelectronics STM32 RNG bindings +title: STMicroelectronics STM32 RNG description: | The STM32 hardware random number generator is a simple fixed purpose IP and is fully separated from other crypto functions. maintainers: - - Lionel Debieve <lionel.debieve@st.com> + - Lionel Debieve <lionel.debieve@foss.st.com> properties: compatible: - const: st,stm32-rng + enum: + - st,stm32-rng + - st,stm32mp13-rng reg: maxItems: 1 @@ -27,13 +29,30 @@ properties: maxItems: 1 clock-error-detect: + type: boolean description: If set enable the clock detection management + st,rng-lock-conf: + type: boolean + description: If set, the RNG configuration in RNG_CR, RNG_HTCR and + RNG_NSCR will be locked. + required: - compatible - reg - clocks +allOf: + - if: + properties: + compatible: + contains: + enum: + - st,stm32-rng + then: + properties: + st,rng-lock-conf: false + additionalProperties: false examples: diff --git a/dts/Bindings/rng/starfive,jh7110-trng.yaml b/dts/Bindings/rng/starfive,jh7110-trng.yaml new file mode 100644 index 0000000000..4639247e9e --- /dev/null +++ b/dts/Bindings/rng/starfive,jh7110-trng.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/starfive,jh7110-trng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive SoC TRNG Module + +maintainers: + - Jia Jie Ho <jiajie.ho@starfivetech.com> + +properties: + compatible: + oneOf: + - items: + - const: starfive,jh8100-trng + - const: starfive,jh7110-trng + - const: starfive,jh7110-trng + + reg: + maxItems: 1 + + clocks: + items: + - description: Hardware reference clock + - description: AHB reference clock + + clock-names: + items: + - const: hclk + - const: ahb + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - interrupts + +additionalProperties: false + +examples: + - | + rng: rng@1600C000 { + compatible = "starfive,jh7110-trng"; + reg = <0x1600C000 0x4000>; + clocks = <&clk 15>, <&clk 16>; + clock-names = "hclk", "ahb"; + resets = <&reset 3>; + interrupts = <30>; + }; +... diff --git a/dts/Bindings/rng/ti,keystone-rng.yaml b/dts/Bindings/rng/ti,keystone-rng.yaml new file mode 100644 index 0000000000..06a6791b33 --- /dev/null +++ b/dts/Bindings/rng/ti,keystone-rng.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/ti,keystone-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Keystone SoC Hardware Random Number Generator + +maintainers: + - Nishanth Menon <nm@ti.com> + - Santosh Shilimkar <ssantosh@kernel.org> + +properties: + compatible: + const: ti,keystone-rng + + clocks: + maxItems: 1 + + clock-names: + items: + - const: fck + + reg: + maxItems: 1 + + ti,syscon-sa-cfg: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to syscon node of the SA configuration registers. These + registers are shared between HWRNG and crypto drivers. + +required: + - compatible + - clocks + - clock-names + - reg + - ti,syscon-sa-cfg + +additionalProperties: false + +examples: + - | + rng@24000 { + compatible = "ti,keystone-rng"; + ti,syscon-sa-cfg = <&sa_config>; + clocks = <&clksa>; + clock-names = "fck"; + reg = <0x24000 0x1000>; + }; diff --git a/dts/Bindings/rng/ti,omap-rom-rng.yaml b/dts/Bindings/rng/ti,omap-rom-rng.yaml new file mode 100644 index 0000000000..9a58440b1a --- /dev/null +++ b/dts/Bindings/rng/ti,omap-rom-rng.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/ti,omap-rom-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP ROM Random Number Generator + +maintainers: + - Pali Rohár <pali@kernel.org> + - Tony Lindgren <tony@atomide.com> + +description: + Secure SoCs may provide RNG via secure ROM calls like Nokia N900 does. + The implementation can depend on the SoC secure ROM used. + +properties: + compatible: + const: nokia,n900-rom-rng + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ick + +required: + - compatible + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + rng { + compatible = "nokia,n900-rom-rng"; + clocks = <&rng_ick>; + clock-names = "ick"; + }; diff --git a/dts/Bindings/rng/timeriomem_rng.txt b/dts/Bindings/rng/timeriomem_rng.txt deleted file mode 100644 index fb48461600..0000000000 --- a/dts/Bindings/rng/timeriomem_rng.txt +++ /dev/null @@ -1,25 +0,0 @@ -HWRNG support for the timeriomem_rng driver - -Required properties: -- compatible : "timeriomem_rng" -- reg : base address to sample from -- period : wait time in microseconds to use between samples - -Optional properties: -- quality : estimated number of bits of true entropy per 1024 bits read from the - rng. Defaults to zero which causes the kernel's default quality to - be used instead. Note that the default quality is usually zero - which disables using this rng to automatically fill the kernel's - entropy pool. - -N.B. currently 'reg' must be at least four bytes wide and 32-bit aligned - -Example: - -hwrng@44 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "timeriomem_rng"; - reg = <0x44 0x04>; - period = <1000000>; -}; diff --git a/dts/Bindings/rng/timeriomem_rng.yaml b/dts/Bindings/rng/timeriomem_rng.yaml new file mode 100644 index 0000000000..4754174e98 --- /dev/null +++ b/dts/Bindings/rng/timeriomem_rng.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/timeriomem_rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TimerIO Random Number Generator + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +properties: + compatible: + const: timeriomem_rng + + period: + $ref: /schemas/types.yaml#/definitions/uint32 + description: wait time in microseconds to use between samples + + quality: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + description: + Estimated number of bits of true entropy per 1024 bits read from the rng. + Defaults to zero which causes the kernel's default quality to be used + instead. Note that the default quality is usually zero which disables + using this rng to automatically fill the kernel's entropy pool. + + reg: + maxItems: 1 + description: + Base address to sample from. Currently 'reg' must be at least four bytes + wide and 32-bit aligned. + +required: + - compatible + - period + - reg + +additionalProperties: false + +examples: + - | + rng@44 { + compatible = "timeriomem_rng"; + reg = <0x44 0x04>; + period = <1000000>; + }; diff --git a/dts/Bindings/rng/xiphera,xip8001b-trng.yaml b/dts/Bindings/rng/xiphera,xip8001b-trng.yaml index 1e17e55762..d831322911 100644 --- a/dts/Bindings/rng/xiphera,xip8001b-trng.yaml +++ b/dts/Bindings/rng/xiphera,xip8001b-trng.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rng/xiphera,xip8001b-trng.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xiphera XIP8001B-trng bindings +title: Xiphera XIP8001B-trng maintainers: - Atte Tommiska <atte.tommiska@xiphera.com> |