14 files changed, 102 insertions, 29 deletions
diff --git a/dts/Bindings/rng/amlogic,meson-rng.yaml b/dts/Bindings/rng/amlogic,meson-rng.yaml
index 444be32a8a..afa52af442 100644
--- a/dts/Bindings/rng/amlogic,meson-rng.yaml
+++ b/dts/Bindings/rng/amlogic,meson-rng.yaml
@@ -2,18 +2,19 @@
 # Copyright 2019 BayLibre, SAS
 %YAML 1.2
 ---
-$id: "http://devicetree.org/schemas/rng/amlogic,meson-rng.yaml#"
-$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+$id: http://devicetree.org/schemas/rng/amlogic,meson-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
 
 title: Amlogic Meson Random number generator
 
 maintainers:
-  - Neil Armstrong <narmstrong@baylibre.com>
+  - Neil Armstrong <neil.armstrong@linaro.org>
 
 properties:
   compatible:
     enum:
       - amlogic,meson-rng
+      - amlogic,meson-s4-rng
 
   reg:
     maxItems: 1
diff --git a/dts/Bindings/rng/atmel,at91-trng.yaml b/dts/Bindings/rng/atmel,at91-trng.yaml
index 3ce45456d8..b38f825234 100644
--- a/dts/Bindings/rng/atmel,at91-trng.yaml
+++ b/dts/Bindings/rng/atmel,at91-trng.yaml
@@ -21,6 +21,10 @@ properties:
           - enum:
               - microchip,sama7g5-trng
           - const: atmel,at91sam9g45-trng
+      - items:
+          - enum:
+              - microchip,sam9x7-trng
+          - const: microchip,sam9x60-trng
 
   clocks:
     maxItems: 1
diff --git a/dts/Bindings/rng/brcm,iproc-rng200.yaml b/dts/Bindings/rng/brcm,iproc-rng200.yaml
index a00e9bc8b6..827983008e 100644
--- a/dts/Bindings/rng/brcm,iproc-rng200.yaml
+++ b/dts/Bindings/rng/brcm,iproc-rng200.yaml
@@ -1,8 +1,8 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: "http://devicetree.org/schemas/rng/brcm,iproc-rng200.yaml#"
-$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+$id: http://devicetree.org/schemas/rng/brcm,iproc-rng200.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
 
 title: HWRNG support for the iproc-rng200 driver
 
diff --git a/dts/Bindings/rng/ingenic,rng.yaml b/dts/Bindings/rng/ingenic,rng.yaml
index b2e4a6a7f9..79a023cbfd 100644
--- a/dts/Bindings/rng/ingenic,rng.yaml
+++ b/dts/Bindings/rng/ingenic,rng.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/rng/ingenic,rng.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Bindings for RNG in Ingenic SoCs
+title: RNG in Ingenic SoCs
 
 maintainers:
   - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
diff --git a/dts/Bindings/rng/ingenic,trng.yaml b/dts/Bindings/rng/ingenic,trng.yaml
index 044d9a0656..acaeb63caf 100644
--- a/dts/Bindings/rng/ingenic,trng.yaml
+++ b/dts/Bindings/rng/ingenic,trng.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/rng/ingenic,trng.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Bindings for DTRNG in Ingenic SoCs
+title: DTRNG in Ingenic SoCs
 
 maintainers:
   - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
diff --git a/dts/Bindings/rng/intel,ixp46x-rng.yaml b/dts/Bindings/rng/intel,ixp46x-rng.yaml
index 067e71e8eb..9f7590ce6b 100644
--- a/dts/Bindings/rng/intel,ixp46x-rng.yaml
+++ b/dts/Bindings/rng/intel,ixp46x-rng.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/rng/intel,ixp46x-rng.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Intel IXP46x RNG bindings
+title: Intel IXP46x RNG
 
 description: |
   The Intel IXP46x has a random number generator at a fixed physical
diff --git a/dts/Bindings/rng/mtk-rng.yaml b/dts/Bindings/rng/mtk-rng.yaml
index bb32491ee8..7e8dc62e5d 100644
--- a/dts/Bindings/rng/mtk-rng.yaml
+++ b/dts/Bindings/rng/mtk-rng.yaml
@@ -1,8 +1,8 @@
 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: "http://devicetree.org/schemas/rng/mtk-rng.yaml#"
-$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+$id: http://devicetree.org/schemas/rng/mtk-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
 
 title: MediaTek Random number generator
 
diff --git a/dts/Bindings/rng/nuvoton,npcm-rng.yaml b/dts/Bindings/rng/nuvoton,npcm-rng.yaml
index abd134c9d4..e8e4ab1e5b 100644
--- a/dts/Bindings/rng/nuvoton,npcm-rng.yaml
+++ b/dts/Bindings/rng/nuvoton,npcm-rng.yaml
@@ -16,7 +16,9 @@ maintainers:
 
 properties:
   compatible:
-    const: nuvoton,npcm750-rng
+    enum:
+      - nuvoton,npcm750-rng
+      - nuvoton,npcm845-rng
 
   reg:
     maxItems: 1
diff --git a/dts/Bindings/rng/omap_rng.yaml b/dts/Bindings/rng/omap_rng.yaml
index 010188cdbe..c0ac4f68ea 100644
--- a/dts/Bindings/rng/omap_rng.yaml
+++ b/dts/Bindings/rng/omap_rng.yaml
@@ -30,8 +30,8 @@ properties:
   clocks:
     minItems: 1
     items:
-      - description: EIP150 gatable clock
-      - description: Main gatable clock
+      - description: EIP150 gateable clock
+      - description: Main gateable clock
 
   clock-names:
     minItems: 1
@@ -53,17 +53,6 @@ allOf:
       required:
         - interrupts
 
-  - if:
-      properties:
-        compatible:
-          contains:
-            enum:
-              - inside-secure,safexcel-eip76
-
-    then:
-      required:
-        - clocks
-
 
 required:
   - compatible
diff --git a/dts/Bindings/rng/silex-insight,ba431-rng.yaml b/dts/Bindings/rng/silex-insight,ba431-rng.yaml
index 48ab82abf5..4673d6160a 100644
--- a/dts/Bindings/rng/silex-insight,ba431-rng.yaml
+++ b/dts/Bindings/rng/silex-insight,ba431-rng.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/rng/silex-insight,ba431-rng.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Silex Insight BA431 RNG bindings
+title: Silex Insight BA431 RNG
 
 description: |
   The BA431 hardware random number generator is an IP that is FIPS-140-2/3
diff --git a/dts/Bindings/rng/st,stm32-rng.yaml b/dts/Bindings/rng/st,stm32-rng.yaml
index fcd86f822a..717f6b321f 100644
--- a/dts/Bindings/rng/st,stm32-rng.yaml
+++ b/dts/Bindings/rng/st,stm32-rng.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/rng/st,stm32-rng.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: STMicroelectronics STM32 RNG bindings
+title: STMicroelectronics STM32 RNG
 
 description: |
   The STM32 hardware random number generator is a simple fixed purpose
@@ -15,7 +15,9 @@ maintainers:
 
 properties:
   compatible:
-    const: st,stm32-rng
+    enum:
+      - st,stm32-rng
+      - st,stm32mp13-rng
 
   reg:
     maxItems: 1
@@ -30,11 +32,27 @@ properties:
     type: boolean
     description: If set enable the clock detection management
 
+  st,rng-lock-conf:
+    type: boolean
+    description: If set, the RNG configuration in RNG_CR, RNG_HTCR and
+                  RNG_NSCR will be locked.
+
 required:
   - compatible
   - reg
   - clocks
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - st,stm32-rng
+    then:
+      properties:
+        st,rng-lock-conf: false
+
 additionalProperties: false
 
 examples:
diff --git a/dts/Bindings/rng/starfive,jh7110-trng.yaml b/dts/Bindings/rng/starfive,jh7110-trng.yaml
new file mode 100644
index 0000000000..4639247e9e
--- /dev/null
+++ b/dts/Bindings/rng/starfive,jh7110-trng.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/starfive,jh7110-trng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive SoC TRNG Module
+
+maintainers:
+  - Jia Jie Ho <jiajie.ho@starfivetech.com>
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: starfive,jh8100-trng
+          - const: starfive,jh7110-trng
+      - const: starfive,jh7110-trng
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Hardware reference clock
+      - description: AHB reference clock
+
+  clock-names:
+    items:
+      - const: hclk
+      - const: ahb
+
+  resets:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - resets
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    rng: rng@1600C000 {
+        compatible = "starfive,jh7110-trng";
+        reg = <0x1600C000 0x4000>;
+        clocks = <&clk 15>, <&clk 16>;
+        clock-names = "hclk", "ahb";
+        resets = <&reset 3>;
+        interrupts = <30>;
+    };
+...
diff --git a/dts/Bindings/rng/ti,keystone-rng.yaml b/dts/Bindings/rng/ti,keystone-rng.yaml
index e749818fc1..06a6791b33 100644
--- a/dts/Bindings/rng/ti,keystone-rng.yaml
+++ b/dts/Bindings/rng/ti,keystone-rng.yaml
@@ -25,7 +25,7 @@ properties:
     maxItems: 1
 
   ti,syscon-sa-cfg:
-    $ref: "/schemas/types.yaml#/definitions/phandle"
+    $ref: /schemas/types.yaml#/definitions/phandle
     description: |
       Phandle to syscon node of the SA configuration registers.  These
       registers are shared between HWRNG and crypto drivers.
diff --git a/dts/Bindings/rng/xiphera,xip8001b-trng.yaml b/dts/Bindings/rng/xiphera,xip8001b-trng.yaml
index 1e17e55762..d831322911 100644
--- a/dts/Bindings/rng/xiphera,xip8001b-trng.yaml
+++ b/dts/Bindings/rng/xiphera,xip8001b-trng.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/rng/xiphera,xip8001b-trng.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Xiphera XIP8001B-trng bindings
+title: Xiphera XIP8001B-trng
 
 maintainers:
   - Atte Tommiska <atte.tommiska@xiphera.com>