diff options
Diffstat (limited to 'dts/Bindings/rtc')
48 files changed, 883 insertions, 227 deletions
diff --git a/dts/Bindings/rtc/adi,max31335.yaml b/dts/Bindings/rtc/adi,max31335.yaml new file mode 100644 index 0000000000..0125cf6727 --- /dev/null +++ b/dts/Bindings/rtc/adi,max31335.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/adi,max31335.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX31335 RTC + +maintainers: + - Antoniu Miclaus <antoniu.miclaus@analog.com> + +description: + Analog Devices MAX31335 I2C RTC ±2ppm Automotive Real-Time Clock with + Integrated MEMS Resonator. + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + const: adi,max31335 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#clock-cells": + description: + RTC can be used as a clock source through its clock output pin. + const: 0 + + adi,tc-diode: + description: + Select the diode configuration for the trickle charger. + schottky - Schottky diode in series. + standard+schottky - standard diode + Schottky diode in series. + enum: [schottky, standard+schottky] + + trickle-resistor-ohms: + description: + Selected resistor for trickle charger. Should be specified if trickle + charger should be enabled. + enum: [3000, 6000, 11000] + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@68 { + compatible = "adi,max31335"; + reg = <0x68>; + pinctrl-0 = <&rtc_nint_pins>; + interrupts-extended = <&gpio1 16 IRQ_TYPE_LEVEL_HIGH>; + aux-voltage-chargeable = <1>; + trickle-resistor-ohms = <6000>; + adi,tc-diode = "schottky"; + }; + }; +... diff --git a/dts/Bindings/rtc/allwinner,sun4i-a10-rtc.yaml b/dts/Bindings/rtc/allwinner,sun4i-a10-rtc.yaml index dede494317..054e1e397f 100644 --- a/dts/Bindings/rtc/allwinner,sun4i-a10-rtc.yaml +++ b/dts/Bindings/rtc/allwinner,sun4i-a10-rtc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A10 RTC allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/dts/Bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/dts/Bindings/rtc/allwinner,sun6i-a31-rtc.yaml index 04947e166c..4531eec568 100644 --- a/dts/Bindings/rtc/allwinner,sun6i-a31-rtc.yaml +++ b/dts/Bindings/rtc/allwinner,sun6i-a31-rtc.yaml @@ -61,7 +61,7 @@ properties: - the Internal Oscillator, at index 2. allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# - if: properties: compatible: diff --git a/dts/Bindings/rtc/amlogic,meson-vrtc.yaml b/dts/Bindings/rtc/amlogic,meson-vrtc.yaml new file mode 100644 index 0000000000..a89865fa67 --- /dev/null +++ b/dts/Bindings/rtc/amlogic,meson-vrtc.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/amlogic,meson-vrtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Virtual RTC (VRTC) + +maintainers: + - Neil Armstrong <neil.armstrong@linaro.org> + +description: | + This is a Linux interface to an RTC managed by firmware, hence it's + virtual from a Linux perspective. The interface is 1 register where + an alarm time (in seconds) is to be written. + The alarm register is a simple scratch register shared between the + application processors (AP) and the secure co-processor (SCP.) When + the AP suspends, the SCP will use the value of this register to + program an always-on timer before going sleep. When the timer expires, + the SCP will wake up and will then wake the AP. + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - amlogic,meson-vrtc + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + rtc@a8 { + compatible = "amlogic,meson-vrtc"; + reg = <0x000a8 0x4>; + }; diff --git a/dts/Bindings/rtc/amlogic,meson6-rtc.yaml b/dts/Bindings/rtc/amlogic,meson6-rtc.yaml index 8bf7d3a9be..3a4551253e 100644 --- a/dts/Bindings/rtc/amlogic,meson6-rtc.yaml +++ b/dts/Bindings/rtc/amlogic,meson6-rtc.yaml @@ -13,6 +13,7 @@ maintainers: allOf: - $ref: rtc.yaml# - $ref: /schemas/nvmem/nvmem.yaml# + - $ref: /schemas/nvmem/nvmem-deprecated-cells.yaml# properties: compatible: diff --git a/dts/Bindings/rtc/atmel,at91rm9200-rtc.yaml b/dts/Bindings/rtc/atmel,at91rm9200-rtc.yaml index 0e5f0fcc26..c8bb2eef44 100644 --- a/dts/Bindings/rtc/atmel,at91rm9200-rtc.yaml +++ b/dts/Bindings/rtc/atmel,at91rm9200-rtc.yaml @@ -7,20 +7,24 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel AT91 RTC allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Alexandre Belloni <alexandre.belloni@bootlin.com> properties: compatible: - enum: - - atmel,at91rm9200-rtc - - atmel,at91sam9x5-rtc - - atmel,sama5d4-rtc - - atmel,sama5d2-rtc - - microchip,sam9x60-rtc - - microchip,sama7g5-rtc + oneOf: + - enum: + - atmel,at91rm9200-rtc + - atmel,at91sam9x5-rtc + - atmel,sama5d4-rtc + - atmel,sama5d2-rtc + - microchip,sam9x60-rtc + - microchip,sama7g5-rtc + - items: + - const: microchip,sam9x7-rtc + - const: microchip,sam9x60-rtc reg: maxItems: 1 diff --git a/dts/Bindings/rtc/atmel,at91sam9260-rtt.yaml b/dts/Bindings/rtc/atmel,at91sam9260-rtt.yaml index b5cd20e89d..b80b85c394 100644 --- a/dts/Bindings/rtc/atmel,at91sam9260-rtt.yaml +++ b/dts/Bindings/rtc/atmel,at91sam9260-rtt.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel AT91 RTT allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Alexandre Belloni <alexandre.belloni@bootlin.com> diff --git a/dts/Bindings/rtc/brcm,brcmstb-waketimer.yaml b/dts/Bindings/rtc/brcm,brcmstb-waketimer.yaml index 9fe079917a..c5e5c5aec7 100644 --- a/dts/Bindings/rtc/brcm,brcmstb-waketimer.yaml +++ b/dts/Bindings/rtc/brcm,brcmstb-waketimer.yaml @@ -11,10 +11,11 @@ maintainers: description: The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the - ability to wake up the system from low-power suspend/standby modes. + ability to wake up the system from low-power suspend/standby modes and + optionally generate RTC alarm interrupts. allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# properties: compatible: @@ -24,8 +25,14 @@ properties: maxItems: 1 interrupts: - description: the TIMER interrupt - maxItems: 1 + minItems: 1 + items: + - description: the TIMER interrupt + - description: the ALARM interrupt + description: + The TIMER interrupt wakes the system from low-power suspend/standby modes. + An ALARM interrupt may be specified to interrupt the CPU when an RTC alarm + is enabled. clocks: description: clock reference in the 27MHz domain @@ -35,10 +42,10 @@ additionalProperties: false examples: - | - rtc@f0411580 { + rtc@f041a080 { compatible = "brcm,brcmstb-waketimer"; - reg = <0xf0411580 0x14>; - interrupts = <0x3>; - interrupt-parent = <&aon_pm_l2_intc>; + reg = <0xf041a080 0x14>; + interrupts-extended = <&aon_pm_l2_intc 0x04>, + <&upg_aux_aon_intr2_intc 0x08>; clocks = <&upg_fixed>; }; diff --git a/dts/Bindings/rtc/cirrus,ep9301-rtc.yaml b/dts/Bindings/rtc/cirrus,ep9301-rtc.yaml new file mode 100644 index 0000000000..a95f6af2b1 --- /dev/null +++ b/dts/Bindings/rtc/cirrus,ep9301-rtc.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/cirrus,ep9301-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cirrus EP93xx Real Time Clock controller + +maintainers: + - Hartley Sweeten <hsweeten@visionengravers.com> + - Alexander Sverdlin <alexander.sverdlin@gmail.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + oneOf: + - const: cirrus,ep9301-rtc + - items: + - enum: + - cirrus,ep9302-rtc + - cirrus,ep9307-rtc + - cirrus,ep9312-rtc + - cirrus,ep9315-rtc + - const: cirrus,ep9301-rtc + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + rtc@80920000 { + compatible = "cirrus,ep9301-rtc"; + reg = <0x80920000 0x100>; + }; diff --git a/dts/Bindings/rtc/epson,rtc7301.txt b/dts/Bindings/rtc/epson,rtc7301.txt deleted file mode 100644 index 5f9df3f146..0000000000 --- a/dts/Bindings/rtc/epson,rtc7301.txt +++ /dev/null @@ -1,16 +0,0 @@ -EPSON TOYOCOM RTC-7301SF/DG - -Required properties: - -- compatible: Should be "epson,rtc7301sf" or "epson,rtc7301dg" -- reg: Specifies base physical address and size of the registers. -- interrupts: A single interrupt specifier. - -Example: - -rtc: rtc@44a00000 { - compatible = "epson,rtc7301dg"; - reg = <0x44a00000 0x10000>; - interrupt-parent = <&axi_intc_0>; - interrupts = <3 2>; -}; diff --git a/dts/Bindings/rtc/epson,rtc7301.yaml b/dts/Bindings/rtc/epson,rtc7301.yaml new file mode 100644 index 0000000000..bdb5cadb31 --- /dev/null +++ b/dts/Bindings/rtc/epson,rtc7301.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/epson,rtc7301.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Epson Toyocom RTC-7301SF/DG + +description: + The only difference between the two variants is the packaging. + The DG variant is a DIL package, and the SF variant is a flat + package. + +maintainers: + - Akinobu Mita <akinobu.mita@gmail.com> + +properties: + compatible: + enum: + - epson,rtc7301dg + - epson,rtc7301sf + + reg: + maxItems: 1 + + reg-io-width: + description: + The size (in bytes) of the IO accesses that should be performed + on the device. + enum: [1, 4] + default: 4 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + rtc: rtc@44a00000 { + compatible = "epson,rtc7301dg"; + reg = <0x44a00000 0x10000>; + reg-io-width = <4>; + interrupt-parent = <&axi_intc_0>; + interrupts = <3 2>; + }; diff --git a/dts/Bindings/rtc/epson,rx8900.yaml b/dts/Bindings/rtc/epson,rx8900.yaml index 1df7c45d95..b770149c5f 100644 --- a/dts/Bindings/rtc/epson,rx8900.yaml +++ b/dts/Bindings/rtc/epson,rx8900.yaml @@ -29,6 +29,8 @@ properties: trickle-diode-disable: true + wakeup-source: true + required: - compatible - reg diff --git a/dts/Bindings/rtc/faraday,ftrtc010.yaml b/dts/Bindings/rtc/faraday,ftrtc010.yaml index 056d42daae..b1c1a0e213 100644 --- a/dts/Bindings/rtc/faraday,ftrtc010.yaml +++ b/dts/Bindings/rtc/faraday,ftrtc010.yaml @@ -38,8 +38,8 @@ properties: clock-names: items: - - const: "PCLK" - - const: "EXTCLK" + - const: PCLK + - const: EXTCLK required: - compatible diff --git a/dts/Bindings/rtc/ingenic,rtc.yaml b/dts/Bindings/rtc/ingenic,rtc.yaml index af78b67b3d..de9879bdb3 100644 --- a/dts/Bindings/rtc/ingenic,rtc.yaml +++ b/dts/Bindings/rtc/ingenic,rtc.yaml @@ -11,6 +11,17 @@ maintainers: allOf: - $ref: rtc.yaml# + - if: + not: + properties: + compatible: + contains: + enum: + - ingenic,jz4770-rtc + - ingenic,jz4780-rtc + then: + properties: + "#clock-cells": false properties: compatible: @@ -39,6 +50,9 @@ properties: clock-names: const: rtc + "#clock-cells": + const: 0 + system-power-controller: description: | Indicates that the RTC is responsible for powering OFF @@ -83,3 +97,18 @@ examples: clocks = <&cgu JZ4740_CLK_RTC>; clock-names = "rtc"; }; + + - | + #include <dt-bindings/clock/ingenic,jz4780-cgu.h> + rtc: rtc@10003000 { + compatible = "ingenic,jz4780-rtc", "ingenic,jz4760-rtc"; + reg = <0x10003000 0x4c>; + + interrupt-parent = <&intc>; + interrupts = <32>; + + clocks = <&cgu JZ4780_CLK_RTCLK>; + clock-names = "rtc"; + + #clock-cells = <0>; + }; diff --git a/dts/Bindings/rtc/intersil,isl12022.yaml b/dts/Bindings/rtc/intersil,isl12022.yaml new file mode 100644 index 0000000000..c2d1441ef2 --- /dev/null +++ b/dts/Bindings/rtc/intersil,isl12022.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/intersil,isl12022.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intersil ISL12022 Real-time Clock + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +properties: + compatible: + const: isil,isl12022 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#clock-cells': + const: 0 + + isil,battery-trip-levels-microvolt: + description: + The battery voltages at which the first alarm and second alarm + should trigger (normally ~85% and ~75% of nominal V_BAT). + items: + - enum: [2125000, 2295000, 2550000, 2805000, 3060000, 4250000, 4675000] + - enum: [1875000, 2025000, 2250000, 2475000, 2700000, 3750000, 4125000] + +required: + - compatible + - reg + +allOf: + - $ref: rtc.yaml# + # If #clock-cells is present, interrupts must not be present + - if: + required: + - '#clock-cells' + then: + properties: + interrupts: false + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@6f { + compatible = "isil,isl12022"; + reg = <0x6f>; + interrupts-extended = <&gpio1 5 IRQ_TYPE_LEVEL_LOW>; + isil,battery-trip-levels-microvolt = <2550000>, <2250000>; + }; + }; + +... diff --git a/dts/Bindings/rtc/isil,isl1208.txt b/dts/Bindings/rtc/isil,isl1208.txt deleted file mode 100644 index 51f003006f..0000000000 --- a/dts/Bindings/rtc/isil,isl1208.txt +++ /dev/null @@ -1,38 +0,0 @@ -Intersil ISL1209/19 I2C RTC/Alarm chip with event in - -ISL12X9 have additional pins EVIN and #EVDET for tamper detection, while the -ISL1208 and ISL1218 do not. They are all use the same driver with the bindings -described here, with chip specific properties as noted. - -Required properties supported by the device: - - "compatible": Should be one of the following: - - "isil,isl1208" - - "isil,isl1209" - - "isil,isl1218" - - "isil,isl1219" - - "reg": I2C bus address of the device - -Optional properties: - - "interrupt-names": list which may contains "irq" and "evdet" - evdet applies to isl1209 and isl1219 only - - "interrupts": list of interrupts for "irq" and "evdet" - evdet applies to isl1209 and isl1219 only - - "isil,ev-evienb": Enable or disable internal pull on EVIN pin - Applies to isl1209 and isl1219 only - Possible values are 0 and 1 - Value 0 enables internal pull-up on evin pin, 1 disables it. - Default will leave the non-volatile configuration of the pullup - as is. - -Example isl1219 node with #IRQ pin connected to SoC gpio1 pin12 and #EVDET pin -connected to SoC gpio2 pin 24 and internal pull-up enabled in EVIN pin. - - isl1219: rtc@68 { - compatible = "isil,isl1219"; - reg = <0x68>; - interrupt-names = "irq", "evdet"; - interrupts-extended = <&gpio1 12 IRQ_TYPE_EDGE_FALLING>, - <&gpio2 24 IRQ_TYPE_EDGE_FALLING>; - isil,ev-evienb = <1>; - }; - diff --git a/dts/Bindings/rtc/isil,isl1208.yaml b/dts/Bindings/rtc/isil,isl1208.yaml new file mode 100644 index 0000000000..11f7378d49 --- /dev/null +++ b/dts/Bindings/rtc/isil,isl1208.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/isil,isl1208.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intersil ISL1209/19 I2C RTC/Alarm chip with event in + +maintainers: + - Biju Das <biju.das.jz@bp.renesas.com> + - Trent Piepho <tpiepho@gmail.com> + +description: + ISL12X9 have additional pins EVIN and EVDET for tamper detection, while the + ISL1208 and ISL1218 do not. + +properties: + compatible: + enum: + - isil,isl1208 + - isil,isl1209 + - isil,isl1218 + - isil,isl1219 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + description: | + Use xin, if connected to an external crystal. + Use clkin, if connected to an external clock signal. + enum: + - xin + - clkin + + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - const: irq + - const: evdet + + isil,ev-evienb: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + description: | + Enable or disable internal pull on EVIN pin + Default will leave the non-volatile configuration of the pullup + as is. + <0> : Enables internal pull-up on evin pin + <1> : Disables internal pull-up on evin pin + +required: + - compatible + - reg + +allOf: + - $ref: rtc.yaml# + - if: + properties: + compatible: + contains: + enum: + - isil,isl1209 + - isil,isl1219 + then: + properties: + interrupts: + maxItems: 2 + interrupt-names: + items: + - const: irq + - const: evdet + else: + properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: irq + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc_twi: rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; + }; diff --git a/dts/Bindings/rtc/loongson,rtc.yaml b/dts/Bindings/rtc/loongson,rtc.yaml new file mode 100644 index 0000000000..f89c1f660a --- /dev/null +++ b/dts/Bindings/rtc/loongson,rtc.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/loongson,rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson Real-Time Clock + +description: + The Loongson family chips use an on-chip counter 0 (Time Of Year + counter) as the RTC. + +maintainers: + - Binbin Zhou <zhoubinbin@loongson.cn> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + oneOf: + - enum: + - loongson,ls1b-rtc + - loongson,ls1c-rtc + - loongson,ls7a-rtc + - loongson,ls2k1000-rtc + - items: + - enum: + - loongson,ls2k2000-rtc + - loongson,ls2k0500-rtc + - const: loongson,ls7a-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + rtc@1fe27800 { + compatible = "loongson,ls2k1000-rtc"; + reg = <0x1fe27800 0x100>; + + interrupt-parent = <&liointc1>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + }; + +... diff --git a/dts/Bindings/rtc/maxim,ds3231.txt b/dts/Bindings/rtc/maxim,ds3231.txt deleted file mode 100644 index 85be53a421..0000000000 --- a/dts/Bindings/rtc/maxim,ds3231.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Maxim DS3231 Real Time Clock - -Required properties: -- compatible: Should contain "maxim,ds3231". -- reg: I2C address for chip. - -Optional property: -- #clock-cells: Should be 1. -- clock-output-names: - overwrite the default clock names "ds3231_clk_sqw" and "ds3231_clk_32khz". - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. Following indices are allowed: - - 0: square-wave output on the SQW pin - - 1: square-wave output on the 32kHz pin - -- interrupts: rtc alarm/event interrupt. When this property is selected, - clock on the SQW pin cannot be used. - -Example: - -ds3231: ds3231@51 { - compatible = "maxim,ds3231"; - reg = <0x68>; - #clock-cells = <1>; -}; - -device1 { -... - clocks = <&ds3231 0>; -... -}; - -device2 { -... - clocks = <&ds3231 1>; -... -}; diff --git a/dts/Bindings/rtc/maxim,mcp795.txt b/dts/Bindings/rtc/maxim,mcp795.txt deleted file mode 100644 index a59fdd8c23..0000000000 --- a/dts/Bindings/rtc/maxim,mcp795.txt +++ /dev/null @@ -1,11 +0,0 @@ -* Maxim MCP795 SPI Serial Real-Time Clock - -Required properties: -- compatible: Should contain "maxim,mcp795". -- reg: SPI address for chip - -Example: - mcp795: rtc@0 { - compatible = "maxim,mcp795"; - reg = <0>; - }; diff --git a/dts/Bindings/rtc/microcrystal,rv3028.yaml b/dts/Bindings/rtc/microcrystal,rv3028.yaml new file mode 100644 index 0000000000..5ade5dfad0 --- /dev/null +++ b/dts/Bindings/rtc/microcrystal,rv3028.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/microcrystal,rv3028.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip RV-3028 RTC + +allOf: + - $ref: rtc.yaml# + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +properties: + compatible: + const: microcrystal,rv3028 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + trickle-resistor-ohms: + enum: + - 3000 + - 5000 + - 9000 + - 15000 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@51 { + compatible = "microcrystal,rv3028"; + reg = <0x51>; + pinctrl-0 = <&rtc_nint_pins>; + interrupts-extended = <&gpio1 16 IRQ_TYPE_LEVEL_HIGH>; + trickle-resistor-ohms = <3000>; + }; + }; + +... diff --git a/dts/Bindings/rtc/microcrystal,rv3032.yaml b/dts/Bindings/rtc/microcrystal,rv3032.yaml index dd6eebf06e..7680089d1d 100644 --- a/dts/Bindings/rtc/microcrystal,rv3032.yaml +++ b/dts/Bindings/rtc/microcrystal,rv3032.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip RV-3032 RTC allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Alexandre Belloni <alexandre.belloni@bootlin.com> @@ -38,6 +38,8 @@ properties: - 3000 - 4400 + wakeup-source: true + required: - compatible - reg diff --git a/dts/Bindings/rtc/moxa,moxart-rtc.txt b/dts/Bindings/rtc/moxa,moxart-rtc.txt index c9d3ac1477..1374df7bf9 100644 --- a/dts/Bindings/rtc/moxa,moxart-rtc.txt +++ b/dts/Bindings/rtc/moxa,moxart-rtc.txt @@ -3,15 +3,15 @@ MOXA ART real-time clock Required properties: - compatible : Should be "moxa,moxart-rtc" -- gpio-rtc-sclk : RTC sclk gpio, with zero flags -- gpio-rtc-data : RTC data gpio, with zero flags -- gpio-rtc-reset : RTC reset gpio, with zero flags +- rtc-sclk-gpios : RTC sclk gpio, with zero flags +- rtc-data-gpios : RTC data gpio, with zero flags +- rtc-reset-gpios : RTC reset gpio, with zero flags Example: rtc: rtc { compatible = "moxa,moxart-rtc"; - gpio-rtc-sclk = <&gpio 5 0>; - gpio-rtc-data = <&gpio 6 0>; - gpio-rtc-reset = <&gpio 7 0>; + rtc-sclk-gpios = <&gpio 5 0>; + rtc-data-gpios = <&gpio 6 0>; + rtc-reset-gpios = <&gpio 7 0>; }; diff --git a/dts/Bindings/rtc/mstar,msc313-rtc.yaml b/dts/Bindings/rtc/mstar,msc313-rtc.yaml index 585c185d1e..af4a31cd09 100644 --- a/dts/Bindings/rtc/mstar,msc313-rtc.yaml +++ b/dts/Bindings/rtc/mstar,msc313-rtc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mstar MSC313e RTC allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Daniel Palmer <daniel@0x0f.com> diff --git a/dts/Bindings/rtc/mstar,ssd202d-rtc.yaml b/dts/Bindings/rtc/mstar,ssd202d-rtc.yaml new file mode 100644 index 0000000000..4c1f22ef5a --- /dev/null +++ b/dts/Bindings/rtc/mstar,ssd202d-rtc.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/mstar,ssd202d-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mstar SSD202D Real Time Clock + +maintainers: + - Daniel Palmer <daniel@0x0f.com> + - Romain Perier <romain.perier@gmail.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - mstar,ssd202d-rtc + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + rtc@6800 { + compatible = "mstar,ssd202d-rtc"; + reg = <0x6800 0x200>; + }; +... diff --git a/dts/Bindings/rtc/nuvoton,ma35d1-rtc.yaml b/dts/Bindings/rtc/nuvoton,ma35d1-rtc.yaml new file mode 100644 index 0000000000..5e4ade803e --- /dev/null +++ b/dts/Bindings/rtc/nuvoton,ma35d1-rtc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/nuvoton,ma35d1-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton MA35D1 Real Time Clock + +maintainers: + - Min-Jen Chen <mjchen@nuvoton.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - nuvoton,ma35d1-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> + rtc@40410000 { + compatible = "nuvoton,ma35d1-rtc"; + reg = <0x40410000 0x200>; + interrupts = <GIC_SPI 5 IRQ_TYPE_EDGE_RISING>; + clocks = <&clk RTC_GATE>; + }; + +... diff --git a/dts/Bindings/rtc/nuvoton,nct3018y.yaml b/dts/Bindings/rtc/nuvoton,nct3018y.yaml index 7a1857f5ca..4f9b5604ac 100644 --- a/dts/Bindings/rtc/nuvoton,nct3018y.yaml +++ b/dts/Bindings/rtc/nuvoton,nct3018y.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: NUVOTON NCT3018Y Real Time Clock allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Medad CChien <ctcchien@nuvoton.com> diff --git a/dts/Bindings/rtc/nxp,pcf2123.yaml b/dts/Bindings/rtc/nxp,pcf2123.yaml new file mode 100644 index 0000000000..96e377a4d1 --- /dev/null +++ b/dts/Bindings/rtc/nxp,pcf2123.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/nxp,pcf2123.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PCF2123 SPI Real Time Clock + +maintainers: + - Javier Carrasco <javier.carrasco.cruz@gmail.com> + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - nxp,pcf2123 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + + rtc@3 { + compatible = "nxp,pcf2123"; + reg = <3>; + interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_LOW>; + spi-cs-high; + }; + }; +... diff --git a/dts/Bindings/rtc/nxp,pcf2127.yaml b/dts/Bindings/rtc/nxp,pcf2127.yaml index cde7b1675e..2d9fe5a75b 100644 --- a/dts/Bindings/rtc/nxp,pcf2127.yaml +++ b/dts/Bindings/rtc/nxp,pcf2127.yaml @@ -7,14 +7,18 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP PCF2127 Real Time Clock allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Alexandre Belloni <alexandre.belloni@bootlin.com> properties: compatible: - const: nxp,pcf2127 + enum: + - nxp,pca2129 + - nxp,pcf2127 + - nxp,pcf2129 + - nxp,pcf2131 reg: maxItems: 1 diff --git a/dts/Bindings/rtc/nxp,pcf8523.txt b/dts/Bindings/rtc/nxp,pcf8523.txt deleted file mode 100644 index 0b1080c60f..0000000000 --- a/dts/Bindings/rtc/nxp,pcf8523.txt +++ /dev/null @@ -1,18 +0,0 @@ -* NXP PCF8523 Real Time Clock - -Required properties: -- compatible: Should contain "nxp,pcf8523". -- reg: I2C address for chip. - -Optional property: -- quartz-load-femtofarads: The capacitive load of the quartz(x-tal), - expressed in femto Farad (fF). Valid values are 7000 and 12500. - Default value (if no value is specified) is 12500fF. - -Example: - -pcf8523: rtc@68 { - compatible = "nxp,pcf8523"; - reg = <0x68>; - quartz-load-femtofarads = <7000>; -}; diff --git a/dts/Bindings/rtc/nxp,pcf8523.yaml b/dts/Bindings/rtc/nxp,pcf8523.yaml new file mode 100644 index 0000000000..d11c8bc16b --- /dev/null +++ b/dts/Bindings/rtc/nxp,pcf8523.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/nxp,pcf8523.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PCF8523 Real Time Clock + +maintainers: + - Sam Ravnborg <sam@ravnborg.org> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + const: nxp,pcf8523 + + reg: + maxItems: 1 + + quartz-load-femtofarads: + description: + The capacitive load of the crystal, expressed in femto Farad (fF). + enum: [ 7000, 12500 ] + default: 12500 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + quartz-load-femtofarads = <7000>; + }; + }; diff --git a/dts/Bindings/rtc/nxp,pcf85363.yaml b/dts/Bindings/rtc/nxp,pcf85363.yaml new file mode 100644 index 0000000000..52aa3e2091 --- /dev/null +++ b/dts/Bindings/rtc/nxp,pcf85363.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/nxp,pcf85363.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Philips PCF85263/PCF85363 Real Time Clock + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - nxp,pcf85263 + - nxp,pcf85363 + + reg: + maxItems: 1 + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + + interrupts: + maxItems: 1 + + quartz-load-femtofarads: + description: + The capacitive load of the quartz(x-tal). + enum: [6000, 7000, 12500] + default: 7000 + + start-year: true + wakeup-source: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@51 { + compatible = "nxp,pcf85363"; + reg = <0x51>; + #clock-cells = <0>; + quartz-load-femtofarads = <12500>; + }; + }; diff --git a/dts/Bindings/rtc/nxp,pcf8563.yaml b/dts/Bindings/rtc/nxp,pcf8563.yaml index a98b727523..22909a9612 100644 --- a/dts/Bindings/rtc/nxp,pcf8563.yaml +++ b/dts/Bindings/rtc/nxp,pcf8563.yaml @@ -19,8 +19,6 @@ properties: - microcrystal,rv8564 - nxp,pca8565 - nxp,pcf8563 - - nxp,pcf85263 - - nxp,pcf85363 reg: maxItems: 1 diff --git a/dts/Bindings/rtc/nxp,rtc-2123.txt b/dts/Bindings/rtc/nxp,rtc-2123.txt deleted file mode 100644 index 7371f525a6..0000000000 --- a/dts/Bindings/rtc/nxp,rtc-2123.txt +++ /dev/null @@ -1,17 +0,0 @@ -NXP PCF2123 SPI Real Time Clock - -Required properties: -- compatible: should be: "nxp,pcf2123" - or "microcrystal,rv2123" -- reg: should be the SPI slave chipselect address - -Optional properties: -- spi-cs-high: PCF2123 needs chipselect high - -Example: - -pcf2123: rtc@3 { - compatible = "nxp,pcf2123" - reg = <3> - spi-cs-high; -}; diff --git a/dts/Bindings/rtc/qcom-pm8xxx-rtc.yaml b/dts/Bindings/rtc/qcom-pm8xxx-rtc.yaml index 0a7aa29563..d274bb7a53 100644 --- a/dts/Bindings/rtc/qcom-pm8xxx-rtc.yaml +++ b/dts/Bindings/rtc/qcom-pm8xxx-rtc.yaml @@ -40,6 +40,18 @@ properties: description: Indicates that the setting of RTC time is allowed by the host CPU. + nvmem-cells: + items: + - description: + four-byte nvmem cell holding a little-endian offset from the Unix + epoch representing the time when the RTC timer was last reset + + nvmem-cell-names: + items: + - const: offset + + wakeup-source: true + required: - compatible - reg @@ -49,25 +61,27 @@ additionalProperties: false examples: - | + #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/spmi/spmi.h> - spmi_bus: spmi@c440000 { - reg = <0x0c440000 0x1100>; - #address-cells = <2>; - #size-cells = <0>; - pmicintc: pmic@0 { - reg = <0x0 SPMI_USID>; - compatible = "qcom,pm8921"; - interrupts = <104 8>; - #interrupt-cells = <2>; - interrupt-controller; - #address-cells = <1>; + + spmi { + #address-cells = <2>; #size-cells = <0>; - pm8921_rtc: rtc@11d { - compatible = "qcom,pm8921-rtc"; - reg = <0x11d>; - interrupts = <0x27 0>; + pmic@0 { + compatible = "qcom,pm8941", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + nvmem-cells = <&rtc_offset>; + nvmem-cell-names = "offset"; + }; }; - }; }; ... diff --git a/dts/Bindings/rtc/rtc-cmos.txt b/dts/Bindings/rtc/rtc-cmos.txt index b94b35f360..7d7b5f6bda 100644 --- a/dts/Bindings/rtc/rtc-cmos.txt +++ b/dts/Bindings/rtc/rtc-cmos.txt @@ -10,7 +10,7 @@ Optional properties: - ctrl-reg : Contains the initial value of the control register also called "Register B". - freq-reg : Contains the initial value of the frequency register also - called "Regsiter A". + called "Register A". "Register A" and "B" are usually initialized by the firmware (BIOS for instance). If this is not done, it can be performed by the driver. diff --git a/dts/Bindings/rtc/rtc-meson-vrtc.txt b/dts/Bindings/rtc/rtc-meson-vrtc.txt deleted file mode 100644 index c014f54a98..0000000000 --- a/dts/Bindings/rtc/rtc-meson-vrtc.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Amlogic Virtual RTC (VRTC) - -This is a Linux interface to an RTC managed by firmware, hence it's -virtual from a Linux perspective. The interface is 1 register where -an alarm time (in seconds) is to be written. - -Required properties: -- compatible: should be "amlogic,meson-vrtc" -- reg: physical address for the alarm register - -The alarm register is a simple scratch register shared between the -application processors (AP) and the secure co-processor (SCP.) When -the AP suspends, the SCP will use the value of this register to -program an always-on timer before going sleep. When the timer expires, -the SCP will wake up and will then wake the AP. - -Example: - - vrtc: rtc@0a8 { - compatible = "amlogic,meson-vrtc"; - reg = <0x0 0x000a8 0x0 0x4>; - }; diff --git a/dts/Bindings/rtc/rtc-mxc.yaml b/dts/Bindings/rtc/rtc-mxc.yaml index 4f263fa6fd..a14b52178c 100644 --- a/dts/Bindings/rtc/rtc-mxc.yaml +++ b/dts/Bindings/rtc/rtc-mxc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Real Time Clock of the i.MX SoCs allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Philippe Reynes <tremyfr@gmail.com> diff --git a/dts/Bindings/rtc/rtc-mxc_v2.yaml b/dts/Bindings/rtc/rtc-mxc_v2.yaml index 2d1a30663d..e50131c26d 100644 --- a/dts/Bindings/rtc/rtc-mxc_v2.yaml +++ b/dts/Bindings/rtc/rtc-mxc_v2.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: i.MX53 Secure Real Time Clock (SRTC) allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# maintainers: - Patrick Bruenn <p.bruenn@beckhoff.com> diff --git a/dts/Bindings/rtc/rtc.yaml b/dts/Bindings/rtc/rtc.yaml index c6fff5486f..efb66df827 100644 --- a/dts/Bindings/rtc/rtc.yaml +++ b/dts/Bindings/rtc/rtc.yaml @@ -15,7 +15,7 @@ description: | properties: $nodename: - pattern: "^rtc(@.*|-[0-9a-f])*$" + pattern: "^rtc(@.*|-([0-9]|[1-9][0-9]+))?$" aux-voltage-chargeable: $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/dts/Bindings/rtc/s3c-rtc.yaml b/dts/Bindings/rtc/s3c-rtc.yaml index d51b236939..bf4e11d6df 100644 --- a/dts/Bindings/rtc/s3c-rtc.yaml +++ b/dts/Bindings/rtc/s3c-rtc.yaml @@ -17,6 +17,11 @@ properties: - samsung,s3c2416-rtc - samsung,s3c2443-rtc - samsung,s3c6410-rtc + - items: + - enum: + - samsung,exynos7-rtc + - samsung,exynos850-rtc + - const: samsung,s3c6410-rtc - const: samsung,exynos3250-rtc deprecated: true diff --git a/dts/Bindings/rtc/sa1100-rtc.yaml b/dts/Bindings/rtc/sa1100-rtc.yaml index b04b87ef6f..a16c355dcd 100644 --- a/dts/Bindings/rtc/sa1100-rtc.yaml +++ b/dts/Bindings/rtc/sa1100-rtc.yaml @@ -34,8 +34,8 @@ properties: interrupt-names: items: - - const: 'rtc 1Hz' - - const: 'rtc alarm' + - const: rtc 1Hz + - const: rtc alarm required: - compatible diff --git a/dts/Bindings/rtc/snvs-rtc.txt b/dts/Bindings/rtc/snvs-rtc.txt deleted file mode 100644 index fb61ed77ad..0000000000 --- a/dts/Bindings/rtc/snvs-rtc.txt +++ /dev/null @@ -1 +0,0 @@ -See Documentation/devicetree/bindings/crypto/fsl-sec4.txt for details. diff --git a/dts/Bindings/rtc/st,m48t86.yaml b/dts/Bindings/rtc/st,m48t86.yaml new file mode 100644 index 0000000000..e3e12fa233 --- /dev/null +++ b/dts/Bindings/rtc/st,m48t86.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/st,m48t86.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ST M48T86 / Dallas DS12887 RTC with SRAM + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +allOf: + - $ref: rtc.yaml + +properties: + compatible: + enum: + - st,m48t86 + + reg: + items: + - description: index register + - description: data register + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + rtc@10800000 { + compatible = "st,m48t86"; + reg = <0x10800000 0x1>, <0x11700000 0x1>; + }; + +... diff --git a/dts/Bindings/rtc/st,stm32-rtc.yaml b/dts/Bindings/rtc/st,stm32-rtc.yaml index 9e66ed33cd..4703083d1f 100644 --- a/dts/Bindings/rtc/st,stm32-rtc.yaml +++ b/dts/Bindings/rtc/st,stm32-rtc.yaml @@ -32,7 +32,7 @@ properties: maxItems: 1 st,syscfg: - $ref: "/schemas/types.yaml#/definitions/phandle-array" + $ref: /schemas/types.yaml#/definitions/phandle-array items: minItems: 3 maxItems: 3 diff --git a/dts/Bindings/rtc/ti,k3-rtc.yaml b/dts/Bindings/rtc/ti,k3-rtc.yaml index d995ef04a6..df5b4f77f6 100644 --- a/dts/Bindings/rtc/ti,k3-rtc.yaml +++ b/dts/Bindings/rtc/ti,k3-rtc.yaml @@ -13,7 +13,7 @@ description: | This RTC appears in the AM62x family of SoCs. allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# properties: compatible: diff --git a/dts/Bindings/rtc/trivial-rtc.yaml b/dts/Bindings/rtc/trivial-rtc.yaml index d9fc120c61..c9e3c5262c 100644 --- a/dts/Bindings/rtc/trivial-rtc.yaml +++ b/dts/Bindings/rtc/trivial-rtc.yaml @@ -15,7 +15,7 @@ description: | possibly an interrupt line. allOf: - - $ref: "rtc.yaml#" + - $ref: rtc.yaml# properties: compatible: @@ -45,16 +45,12 @@ properties: - isil,isl1208 # Intersil ISL1218 Low Power RTC with Battery Backed SRAM - isil,isl1218 - # Intersil ISL12022 Real-time Clock - - isil,isl12022 - # Real Time Clock Module with I2C-Bus - - microcrystal,rv3028 + # SPI-BUS INTERFACE REAL TIME CLOCK MODULE + - maxim,mcp795 # Real Time Clock Module with I2C-Bus - microcrystal,rv3029 # Real Time Clock - microcrystal,rv8523 - - nxp,pca2129 - - nxp,pcf2129 # Real-time Clock Module - pericom,pt7c4338 # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC diff --git a/dts/Bindings/rtc/xlnx,zynqmp-rtc.yaml b/dts/Bindings/rtc/xlnx,zynqmp-rtc.yaml index 7ed0230f6c..d1f5eb996d 100644 --- a/dts/Bindings/rtc/xlnx,zynqmp-rtc.yaml +++ b/dts/Bindings/rtc/xlnx,zynqmp-rtc.yaml @@ -11,7 +11,7 @@ description: The RTC controller has separate IRQ lines for seconds and alarm. maintainers: - - Michal Simek <michal.simek@xilinx.com> + - Michal Simek <michal.simek@amd.com> allOf: - $ref: rtc.yaml# |