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-rw-r--r--dts/Bindings/serial/fsl-imx-uart.txt4
-rw-r--r--dts/Bindings/serial/fsl-lpuart.txt3
-rw-r--r--dts/Bindings/serial/ingenic,uart.txt8
-rw-r--r--dts/Bindings/serial/lantiq_asc.txt2
-rw-r--r--dts/Bindings/serial/maxim,max310x.txt18
-rw-r--r--dts/Bindings/serial/mvebu-uart.txt50
-rw-r--r--dts/Bindings/serial/omap_serial.txt1
-rw-r--r--dts/Bindings/serial/rs485.txt1
8 files changed, 74 insertions, 13 deletions
diff --git a/dts/Bindings/serial/fsl-imx-uart.txt b/dts/Bindings/serial/fsl-imx-uart.txt
index 860a955983..afcfbc34e2 100644
--- a/dts/Bindings/serial/fsl-imx-uart.txt
+++ b/dts/Bindings/serial/fsl-imx-uart.txt
@@ -6,10 +6,10 @@ Required properties:
- interrupts : Should contain uart interrupt
Optional properties:
-- fsl,irda-mode : Indicate the uart supports irda mode
- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
in DCE mode by default.
-- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
+- rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx,
+ linux,rs485-enabled-at-boot-time: see rs485.txt
Please check Documentation/devicetree/bindings/serial/serial.txt
for the complete list of generic properties.
diff --git a/dts/Bindings/serial/fsl-lpuart.txt b/dts/Bindings/serial/fsl-lpuart.txt
index 59567b51cf..6bd3f2e93d 100644
--- a/dts/Bindings/serial/fsl-lpuart.txt
+++ b/dts/Bindings/serial/fsl-lpuart.txt
@@ -16,7 +16,8 @@ Required properties:
Optional properties:
- dmas: A list of two dma specifiers, one for each entry in dma-names.
- dma-names: should contain "tx" and "rx".
-- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
+- rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx,
+ linux,rs485-enabled-at-boot-time: see rs485.txt
Note: Optional properties for DMA support. Write them both or both not.
diff --git a/dts/Bindings/serial/ingenic,uart.txt b/dts/Bindings/serial/ingenic,uart.txt
index 02cb7fe59c..c3c6406d5c 100644
--- a/dts/Bindings/serial/ingenic,uart.txt
+++ b/dts/Bindings/serial/ingenic,uart.txt
@@ -1,8 +1,12 @@
* Ingenic SoC UART
Required properties:
-- compatible : "ingenic,jz4740-uart", "ingenic,jz4760-uart",
- "ingenic,jz4775-uart" or "ingenic,jz4780-uart"
+- compatible : One of:
+ - "ingenic,jz4740-uart",
+ - "ingenic,jz4760-uart",
+ - "ingenic,jz4770-uart",
+ - "ingenic,jz4775-uart",
+ - "ingenic,jz4780-uart".
- reg : offset and length of the register set for the device.
- interrupts : should contain uart interrupt.
- clocks : phandles to the module & baud clocks.
diff --git a/dts/Bindings/serial/lantiq_asc.txt b/dts/Bindings/serial/lantiq_asc.txt
index 5b78591aaa..3acbd309ab 100644
--- a/dts/Bindings/serial/lantiq_asc.txt
+++ b/dts/Bindings/serial/lantiq_asc.txt
@@ -8,7 +8,7 @@ Required properties:
Example:
-asc1: serial@E100C00 {
+asc1: serial@e100c00 {
compatible = "lantiq,asc";
reg = <0xE100C00 0x400>;
interrupt-parent = <&icu0>;
diff --git a/dts/Bindings/serial/maxim,max310x.txt b/dts/Bindings/serial/maxim,max310x.txt
index 83a919c241..823f77dd79 100644
--- a/dts/Bindings/serial/maxim,max310x.txt
+++ b/dts/Bindings/serial/maxim,max310x.txt
@@ -24,13 +24,27 @@ Optional properties:
1 = active low.
Example:
+
+/ {
+ clocks {
+ spi_uart_clk: osc_max14830 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <3686400>;
+ };
+
+ };
+};
+
+&spi0 {
max14830: max14830@0 {
compatible = "maxim,max14830";
reg = <0>;
- clocks = <&clk20m>;
+ clocks = <&spi_uart_clk>;
clock-names = "osc";
interrupt-parent = <&gpio3>;
- interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
gpio-controller;
#gpio-cells = <2>;
};
+};
diff --git a/dts/Bindings/serial/mvebu-uart.txt b/dts/Bindings/serial/mvebu-uart.txt
index d37fabe17b..2ae2fee7e0 100644
--- a/dts/Bindings/serial/mvebu-uart.txt
+++ b/dts/Bindings/serial/mvebu-uart.txt
@@ -1,13 +1,53 @@
-* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
+* Marvell UART : Non standard UART used in some of Marvell EBU SoCs
+ e.g., Armada-3700.
Required properties:
-- compatible: "marvell,armada-3700-uart"
+- compatible:
+ - "marvell,armada-3700-uart" for the standard variant of the UART
+ (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
+ FIFO, baudrate limited to 230400).
+ - "marvell,armada-3700-uart-ext" for the extended variant of the
+ UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
+ accesses to the FIFO, baudrate unlimited by the dividers).
- reg: offset and length of the register set for the device.
-- interrupts: device interrupt
+- clocks: UART reference clock used to derive the baudrate. If no clock
+ is provided (possible only with the "marvell,armada-3700-uart"
+ compatible string for backward compatibility), it will only work
+ if the baudrate was initialized by the bootloader and no baudrate
+ change will then be possible.
+- interrupts:
+ - Must contain three elements for the standard variant of the IP
+ (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
+ respectively the UART sum interrupt, the UART TX interrupt and
+ UART RX interrupt. A corresponding interrupt-names property must
+ be defined.
+ - Must contain two elements for the extended variant of the IP
+ (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
+ respectively the UART TX interrupt and the UART RX interrupt. A
+ corresponding interrupts-names property must be defined.
+ - For backward compatibility reasons, a single element interrupts
+ property is also supported for the standard variant of the IP,
+ containing only the UART sum interrupt. This form is deprecated
+ and should no longer be used.
Example:
- serial@12000 {
+ uart0: serial@12000 {
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x200>;
- interrupts = <43>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uart-sum", "uart-tx", "uart-rx";
+ };
+
+ uart1: serial@12200 {
+ compatible = "marvell,armada-3700-uart-ext";
+ reg = <0x12200 0x30>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uart-tx", "uart-rx";
};
diff --git a/dts/Bindings/serial/omap_serial.txt b/dts/Bindings/serial/omap_serial.txt
index 43eac675f2..4b0f05adb2 100644
--- a/dts/Bindings/serial/omap_serial.txt
+++ b/dts/Bindings/serial/omap_serial.txt
@@ -20,6 +20,7 @@ Optional properties:
node and a DMA channel number.
- dma-names : "rx" for receive channel, "tx" for transmit channel.
- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
+- rs485-rts-active-high: drive RTS high when sending (default is low).
Example:
diff --git a/dts/Bindings/serial/rs485.txt b/dts/Bindings/serial/rs485.txt
index b8415936df..b7c29f74eb 100644
--- a/dts/Bindings/serial/rs485.txt
+++ b/dts/Bindings/serial/rs485.txt
@@ -12,6 +12,7 @@ Optional properties:
* b is the delay between end of data sent and rts signal in milliseconds
it corresponds to the delay after sending data and actual release of the line.
If this property is not specified, <0 0> is assumed.
+- rs485-rts-active-low: drive RTS low when sending (default is high).
- linux,rs485-enabled-at-boot-time: empty property telling to enable the rs485
feature at boot time. It can be disabled later with proper ioctl.
- rs485-rx-during-tx: empty property that enables the receiving of data even